Fix if statement eval error in set_clock_disable()

etherkit · Mar 1, 2016 · e4978e8 · e4978e8
1 parent 2fdb166
commit e4978e8
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Showing 2 changed files with 13 additions and 5 deletions.
diff --git a/library.properties b/library.properties
@@ -1,5 +1,5 @@
 name=Etherkit Si5351
-version=1.1.0
+version=1.1.1
 author=Jason Milldrum <milldrum@gmail.com>
 maintainer=Jason Milldrum <milldrum@gmail.com>
 sentence=A full-featured library for the Si5351 series of clock generator ICs from Silicon Labs

diff --git a/src/si5351.cpp b/src/si5351.cpp
@@ -823,27 +823,35 @@ void Si5351::set_clock_disable(enum si5351_clock clk, enum si5351_clock_disable
 {
 	uint8_t reg_val, reg;
 
-	if (clk >= SI5351_CLK0 && clk <= SI5351_CLK3)
+	if(clk >= SI5351_CLK0 && clk <= SI5351_CLK3)
 	{
 		reg = SI5351_CLK3_0_DISABLE_STATE;
 	}
-	else if (clk >= SI5351_CLK0 && clk <= SI5351_CLK3)
+	else if(clk >= SI5351_CLK4 && clk <= SI5351_CLK7)
 	{
 		reg = SI5351_CLK7_4_DISABLE_STATE;
 	}
+	else
+	{
+		return;
+	}
 
 	reg_val = si5351_read(reg);
 
-	if (clk >= SI5351_CLK0 && clk <= SI5351_CLK3)
+	if(clk >= SI5351_CLK0 && clk <= SI5351_CLK3)
 	{
 		reg_val &= ~(0b11 << (clk * 2));
 		reg_val |= dis_state << (clk * 2);
 	}
-	else if (clk >= SI5351_CLK0 && clk <= SI5351_CLK3)
+	else if(clk >= SI5351_CLK4 && clk <= SI5351_CLK7)
 	{
 		reg_val &= ~(0b11 << ((clk - 4) * 2));
 		reg_val |= dis_state << ((clk - 4) * 2);
 	}
+	else
+	{
+		return;
+	}
 
 	si5351_write(reg, reg_val);
 }