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Merge pull request #46 from etherkit/v2.0.4
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Fix error in VCXO algorithm
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NT7S committed Apr 19, 2017
2 parents a9ba538 + 84ca6b2 commit 49690d6
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Showing 4 changed files with 10 additions and 4 deletions.
6 changes: 6 additions & 0 deletions README.md
Expand Up @@ -249,6 +249,8 @@ PLLA and PLLB are set to 800 MHz (also defined as _SI5351_PLL_FIXED_ in the libr

All CLK outputs are set to 0 Hz and disabled.

Default drive strength is 2 mA on each output.

Constraints
-----------
* Two multisynths cannot share a PLL with when both outputs are >= 100 MHz. The library will refuse to set another multisynth to a frequency in that range if another multisynth sharing the same PLL is already within that frequency range.
Expand Down Expand Up @@ -663,6 +665,10 @@ This library does not currently support the spread spectrum function of the Si53

Changelog
---------
* v2.0.4

* Fix error in VCXO algorithm

* v2.0.3

* Fix regression in _set_freq()_ that wiped out proper R div setting, causing errors in setting low frequency outputs
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2 changes: 1 addition & 1 deletion library.properties
@@ -1,5 +1,5 @@
name=Etherkit Si5351
version=2.0.3
version=2.0.4
author=Jason Milldrum <milldrum@gmail.com>
maintainer=Jason Milldrum <milldrum@gmail.com>
sentence=A full-featured library for the Si5351 series of clock generator ICs from Silicon Labs
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4 changes: 2 additions & 2 deletions src/si5351.cpp
Expand Up @@ -1197,7 +1197,7 @@ void Si5351::set_vcxo(uint64_t pll_freq, uint8_t ppm)
delete params;

// Write the VCXO parameters
vcxo_param = (vcxo_param * ppm) / RFRAC_DENOM;
vcxo_param = ((vcxo_param * ppm * SI5351_VCXO_MARGIN) / 100ULL) / 1000000ULL;

temp = (uint8_t)(vcxo_param & 0xFF);
si5351_write(SI5351_VXCO_PARAMETERS_LOW, temp);
Expand Down Expand Up @@ -1319,7 +1319,7 @@ uint64_t Si5351::pll_calc(uint64_t freq, struct Si5351RegSet *reg, int32_t corre

if(vcxo)
{
return (uint64_t)(128 * a * SI5351_VCXO_MARGIN + b * SI5351_VCXO_MARGIN);
return (uint64_t)(128 * a * 1000000ULL + b);
}
else
{
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2 changes: 1 addition & 1 deletion src/si5351.h
Expand Up @@ -69,7 +69,7 @@
#define SI5351_MULTISYNTH_P3_MAX ((1<<20)-1)
#define SI5351_VCXO_PULL_MIN 30
#define SI5351_VCXO_PULL_MAX 240
#define SI5351_VCXO_MARGIN 1030000
#define SI5351_VCXO_MARGIN 103

#define SI5351_DEVICE_STATUS 0
#define SI5351_INTERRUPT_STATUS 1
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