Skip to content
View damdoy's full-sized avatar
  • Switzerland
Block or Report

Block or report damdoy

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned

  1. ice40_ultraplus_examples ice40_ultraplus_examples Public

    Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

    Verilog 231 43

  2. opengl_examples opengl_examples Public

    Collection of examples for OpenGL: Perlin noise, ambient occlusion, shadow mapping, water reflection and others

    C++ 219 43

  3. fpga_image_processing fpga_image_processing Public

    IP operations in verilog (simulation and implementation on ice40)

    Verilog 49 14

  4. simple_riscv_cpu simple_riscv_cpu Public

    Verilog implementation of a simple riscv cpu

    Verilog 15 4

  5. fpga_peripherals fpga_peripherals Public

    OV7670 camera, ST7735 screen and others on ice40 ultraplus fpga (breakout board)

    Verilog 15 4

  6. webgl_examples webgl_examples Public

    Collection of examples to learn webgl, using shaders

    JavaScript 1