Skip to content

Issues: alexforencich/cocotbext-axi

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

31 Open 30 Closed
31 Open 30 Closed
Author
Filter by author
Label
Filter by label
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Milestones
Filter by milestone
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

Writing to / Reading of AxiRam from the hardware DUT hang when adding when loops to the test bench
#85 opened Apr 8, 2024 by JeffreyWong20
Issue accessing AXI4Lite bus signals wrapped in a VHDL record
#83 opened Mar 20, 2024 by yotarid
2
Setting optional arguments arid,awid in AxiMaster don't seem to work
#80 opened Jan 30, 2024 by mvsoliveira
No support for suffixed AXI bus signal names
#78 opened Dec 11, 2023 by yotarid
Conditional logging
#75 opened Dec 1, 2023 by ollie-etl
AxiStreamSink not reading signed_int from dut
#74 opened Nov 8, 2023 by thenameisT
5
Something is broken between 0.1.20 and 0.1.22
#73 opened Nov 3, 2023 by rodrigomelo9
Axis DUT signal naming
#70 opened Sep 21, 2023 by davidp135
1
AxiStreamSink cannot handle tdata X-bytes for bytes to ignore (tkeep=0)
#64 opened Jun 20, 2023 by svsi
1
Axi Streaming is missing support for tstrb
#61 opened Apr 10, 2023 by ollie-etl
address may exeed signal width
#59 opened Feb 27, 2023 by boryahlopunov
2
axi address width causing overflow
#58 opened Feb 21, 2023 by CharAznable97
5
Manually set a bus signal as optional even if present
#54 opened Jan 10, 2023 by patrickrst
5
AxiLiteMaster reads forever
#53 opened Jan 1, 2023 by vacagonzalo
8
Small bugs at axi_slave.py
#49 opened Nov 25, 2022 by spoursalidis
AXIStream: self.width = len(self.bus.tdata) TypeError: object of type 'NoneType' has no len()
#42 opened Apr 20, 2022 by garmin-brandonb
19
How to connect callbacks to AXI monitor?
#41 opened Apr 11, 2022 by kirill-bessonov
All signals except TDATA are "not present"
#40 opened Apr 6, 2022 by kirill-bessonov
5
All *PROT signals are missing
#39 opened Mar 24, 2022 by kirill-bessonov
Simulation gets stuck with SIM=verilator 4.106
#35 opened Jan 19, 2022 by andreaskuster
1
10
There aren't examples about AxiSlave, AxiLiteSlave, or from_entity
#34 opened Jan 4, 2022 by rodrigomelo9
1
Uppercase signals are not supported
#33 opened Jan 4, 2022 by rodrigomelo9
2
AxiLiteSlave: object has no attribute 'aw'
#32 opened Jan 4, 2022 by rodrigomelo9
8
I can't install cocotbext-axi - please help
#30 opened Oct 28, 2021 by hossamfadeel
3
question for install
#27 opened Oct 3, 2021 by sunkim68
3
ProTip! Type g p on any issue or pull request to go back to the pull request listing page.