immu

An implementation of Forth with inner interpreter using minimal indirect thread code and a dictionary made of machine independent vocabularies.

Only the inner interpreter and vocabularies related to systems, drives and primitives are machine dependent.

The minimal indirect thread code MITC gives to Forth inner interpreter the decision of when use "push and pull" or "jump and link".

More information in Details

In 2023, the immu Forth was splitted for ISAs: 6502, Atmega328, and RiscV.

In september, 2023, a better code for MITC was born, using deep-first search.

see a presentation at the words in MITC

Go Slow

Ideally Forth was two types of words, primitives, aka leafs, that does not reference any forth word, and compounds, aka twigs, that are a list of references to forth words.

Usually leafs are CPU/MCU ISA dependents.

For now, immu just does the MITC and primitives:

    FALSE TRUE AND OR XOR SHR SHL NEGATE INVERT
    0= 0< = < + - UM+ U< U* (UM*) U/ (UM/MOD)
    >R R> R@ SP@ SP! RP@ RP! DROP ?DUP DUP OVER SWAP ROT 
    BRANCH ZBRANCH LIT EXEC JUMP ALIGN 
    0 1 2 4 1+ 2+ 4+ 1- 2- 4- >< (NIBBLE)
    CHAR CHAR+ CHAR- CELL CELL+ CELL-

Some minimal BIOS support for ( in schedule )

    KEY?, KEY, EMIT, 
    IO!, IO@, IRQ? ( for read/write devices and interrupts )
    clock, tick ( for timers )
    flash flush ( for read/write flash memory )

For mixed code, not really a good practice ( in schedule )

    :code ;code ( for inline assembler )

Working

I'm requesting for comments about immu, an minimal indirect thread code for forth.

I welcome your patience.

There are some insights and documentation at https://github.com/agsb/immu/tree/main/docs

For known about Forth Style

Imagem de Dean Marston por Pixabay