Changelog

[lokki11199]

Hello,
I last used ORFS last year and now I want to understand the innovations. I have not found any changelog. Can someone please tell me where to find a list of changes or summarize what has changed.

Thank You!

[maliberty]

We don't keep a regular changelog aside from the git history. Some notable point would be the inclusion of the IHP PDK, addition of post-global-route timing optimization, improved CTS, etc. Is there any particular area of interest or concern?

[lokki11199]

I'm interested in key changes such as you listed above. I am also interested in the following things:

1. Did timing-driven logic synthesis based on sdc appear?
2. Previously ORFS did not support corner-based optimization, is this option available now?
3. Last time I read that LVS is under development and its results may not be correct. What is the status of this now?
4. Is CCS still under development?
5. Has support for SystemVerilog expanded?

Also, is there access to earlier versions of the documentation so I can compare thread variables for a more detailed study?

Thank you for your answers!

[maliberty]

1. Did timing-driven logic synthesis based on sdc appear?

Still in development

2. Previously ORFS did not support corner-based optimization, is this option available now?

The support in OR has been there for a while but we haven't enabled it in ORFS. If there is interest we could work on it.

3. Last time I read that LVS is under development and its results may not be correct. What is the status of this now?

I don't think LVS was ever in the plan. KLayout or Magic support it.

4. Is CCS still under development?

It is still in development.

5. Has support for SystemVerilog expanded?

No change - that is a yosys issue.

[lokki11199]

I really hope it gets done eventually. Maybe you can give some recommendations on this? 180 nm tech node.

[maliberty]

Even if there were some option to do LVS you would still need to setup the KLayout rules yourself for a proprietary PDK. Almost all of the work is in that step not in enabling it in ORFS.

[rovinski]

Being 180nm will make it easier (as opposed to XXnm). If you are starting from a proprietary rule deck, try to do a 1:1 conversion to an equivalent rule in KLayout, if it exists. For LVS, most operations you would need should exist. For DRC, there may not be a 1:1 correspondence in proprietary operations to KLayout operations so you might have to get creative in how to define a check (but I wouldn't foresee much of this in 180nm).

Refer to the KLayout user guide and LVS API guide for which operations are supported and how to use them. Look at examples from other PDKs.

Create lots of examples for validating your rule deck. Manually examine it to verify, or if you have a golden model, compare your results and make sure they match (at least such that full match == full match and non-matching == non-matching; it's very difficult to get two LVS tools to agree exactly how two circuits differ)

[rovinski]

Even if there were some option to do LVS you would still need to setup the KLayout rules yourself for a proprietary PDK. Almost all of the work is in that step not in enabling it in ORFS.

Also true

[lokki11199]

Thank you for your replies! I think the discussion can be closed.