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Design_and_analysis_of_nmos_pmos_and_inveter_using_sky130pdk
Design_and_analysis_of_nmos_pmos_and_inveter_using_sky130pdk PublicDesign and Analysis of nMOS and pMOS using the sky130 pdk and various open source tools
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VSD_YOSYS_TCL_WORKSHOP
VSD_YOSYS_TCL_WORKSHOP Public5 - Days --> TCL Beginner to Advance Training Workshop by VSD
Tcl
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SoC_Design_and_Chip_Planning_Using_OpenLane_Flow
SoC_Design_and_Chip_Planning_Using_OpenLane_Flow Public -
soc-design-and-planning-nasscom-vsd
soc-design-and-planning-nasscom-vsd PublicForked from fayizferosh/soc-design-and-planning-nasscom-vsd
2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advanced Physical Design using OpenLANE/Sky130)
Verilog
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OpenLANE-Sky130-Physical-Design-Workshop
OpenLANE-Sky130-Physical-Design-Workshop PublicForked from AngeloJacobo/OpenLANE-Sky130-Physical-Design-Workshop
Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
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vsdstdcelldesign
vsdstdcelldesign PublicForked from nickson-jose/vsdstdcelldesign
This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedures on how to create a custom LEF file and plugging it into an…
Verilog
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