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mayaPolyQuickHull
mayaPolyQuickHull PublicMaya plugin that creates a polygonal mesh of the convex hull of irregular point cloud
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extremetuxracer
extremetuxracer PublicFork of extremetuxracer, focussing on cross-platform, performance & OpenGL-ES support
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unittest-cpp
unittest-cpp PublicForked from unittest-cpp/unittest-cpp
A lightweight unit testing framework for C++
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libdivide
libdivide PublicForked from ridiculousfish/libdivide
Official git repository for libdivide: optimized integer division
C
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llvm-project
llvm-project PublicForked from llvm/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at…
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1,814 contributions in the last year
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Contribution activity
March 2024
Created 48 commits in 2 repositories
Created a pull request in llvm/llvm-project that received 11 comments
[X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics
Waiting for intrinsics to be lowered to ISD target nodes is causing some poor combine decisions - at the very least we need better value tracking h…
Opened 9 other pull requests in 1 repository
llvm/llvm-project
7
merged
2
open
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[Support] Add KnownBits::abds signed absolute difference and rename absdiff -> abdu
This contribution was made on Mar 12
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[CodeGen] TwoAddressInstructionPass - Control NumVisited limit via command line option
This contribution was made on Mar 11
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[ADT] Add APIntOps::abds signed absolute difference and rename absdiff -> abdu
This contribution was made on Mar 11
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[X86] Add missing immediate qualifier to the (V)CMPSS/D instructions
This contribution was made on Mar 8
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[CostModel] getInstructionCost - improve estimation of costs for length changing shuffles
This contribution was made on Mar 6
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[CostModel][X86] SK_InsertSubvector - if the legalized base/subvector types match then the insert is now just a copy
This contribution was made on Mar 5
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[X86] Improve KnownBits for X86ISD::PSADBW nodes
This contribution was made on Mar 4
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[X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits
This contribution was made on Mar 1
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[X86] Pre-SSE42 v2i64 sgt lowering - check if representable as v2i32
This contribution was made on Mar 1
Reviewed 67 pull requests in 1 repository
llvm/llvm-project
25 pull requests
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[SelectionDAG] Add MaskedValueIsZero check to allow folding of zero extended variables we know are safe to extend
This contribution was made on Mar 18
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Print more descriptive error message when trying to link a global with appending linkage
This contribution was made on Mar 18
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[DAG] Add SDPatternMatch m_ZExtOrSelf/m_SExtOrSelf/m_AExtOrSelf/m_TruncOrSelf matchers
This contribution was made on Mar 18
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[X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX
This contribution was made on Mar 15
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[X86][AVX] Fix handling of out-of-bounds shift amounts in AVX2 vector shift nodes
This contribution was made on Mar 15
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[X86] Fast AVX-512-VNNI vpdpwssd tuning
This contribution was made on Mar 15
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[ADT] Add signed and unsigned mulh to APInt
This contribution was made on Mar 15
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[ADT] [NFC] Resolve a potential overload ambiguity in the ADT unit tests
This contribution was made on Mar 15
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[SLP]Improve minbitwidth analysis for shifts.
This contribution was made on Mar 14
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[DAG] Matched FixedWidth pattern for ISD::AVGFLOORU
This contribution was made on Mar 14
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[APInt] Implement average functions without sign/zero-extension. NFC.
This contribution was made on Mar 14
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[SLP]Do extra analysis int minbitwidth if some checks return false.
This contribution was made on Mar 14
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[CodeGen][X86] Remove Expensive option copy and delete copy assignment
This contribution was made on Mar 14
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[X86] Fast AVX-512-VNNI vpdpwssd tuning
This contribution was made on Mar 14
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[ADT] Add implementations for avgFloor and avgCeil to APInt
This contribution was made on Mar 14
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[DAGCombiner] Freeze maybe poison operands when folding select to logic
This contribution was made on Mar 13
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[X86] matchAddressRecursively - move ZERO_EXTEND patterns into matchIndexRecursively
This contribution was made on Mar 13
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[SelectionDAG] Handle more opcodes in canCreateUndefOrPoison
This contribution was made on Mar 13
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[AArch64] SimplifyDemandedBitsForTargetNode - add AArch64ISD::BICi handling
This contribution was made on Mar 13
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[SelectionDAG] Replace some basic patterns in visitADDLike with SDPatternMatch
This contribution was made on Mar 12
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[GitHub] Allow shortcut for "introductory issue" and request linking to issue in PR
This contribution was made on Mar 12
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[SelectionDAG] Prevent combination on inconsistent type in
combineCarryDiamond
This contribution was made on Mar 12 -
[ADT] Add APIntOps::abds signed absolute difference and rename absdiff -> abdu
This contribution was made on Mar 11
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[X86] Improve helper for simplifying demanded bits of compares
This contribution was made on Mar 11
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[RISCV] Add integer RISCVISD::SELECT_CC to canCreateUndefOrPoison and isGuaranteedNotToBeUndefOrPoison.
This contribution was made on Mar 11
- Some pull request reviews not shown.
Created an issue in llvm/llvm-project that received 22 comments
[X86][AVX] Recognise out of bounds AVX2 shift amounts
Pulled out of #39822 which was a bit too general. Unlike the general ISD SRA/SRL/SHL nodes, the AVX2 vector shift nodes X86ISD VSRAV/VSRLV/VSHLV ha…
Opened 17 other issues in 1 repository
llvm/llvm-project
12
open
5
closed
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[SelectionDAG] Add m_ZExtOrSelf/m_SExtOrSelf/m_AExtOrSelf/m_TruncOrSelf pattern matchers
This contribution was made on Mar 15
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[Analysis] Remove getFPOpCost and use getInstructionCost/getArithmeticInstrCost directly?
This contribution was made on Mar 13
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[DAG] SDPatternMatch - add m_Neg and m_Not matchers
This contribution was made on Mar 13
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[DAG] SDPatternMatch - add m_BinOp/m_c_BinOp variants driven by TLI.isBinOp/isCommutativeBinOp
This contribution was made on Mar 12
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[DAG] SelectionDAG::computeKnownBits - add ISD::ABDU/ISD::ABDS handling
This contribution was made on Mar 12
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[llvm-exegesis] Analysis reporting bad match even with exactly the same capture
This contribution was made on Mar 11
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[DAG] SimplifyDemandedVectorElts - add ISD::AVGCEILS/AVGCEILU/AVGFLOORS/AVGFLOORU nodes
This contribution was made on Mar 11
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[DAG] Match some basic ISD::AVGCEILU patterns
This contribution was made on Mar 11
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[DAG] Match some basic ISD::AVGFLOORU patterns
This contribution was made on Mar 11
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[DAG] Failure to recognise ISD::AVGFLOORS -> ISD::AVGFLOORU fold for non-negative arguments
This contribution was made on Mar 11
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[DAG] DAGCombiner::visitADDLike - investigate converting fold some basic patterns to SDPatternMatch
This contribution was made on Mar 11
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[Support] Add KnownBits implementations for avgFloor and avgCeil
This contribution was made on Mar 9
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[DAG] TargetLowering::expandABD - investigate alternative expansions
This contribution was made on Mar 9
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[Support] Investigate making KnownBits saturated add/sub implementations optimal
This contribution was made on Mar 6
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[Support] Investigate making KnownBits::abdu optimal
This contribution was made on Mar 6
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[ADT] Add APIntOps::avgfloors/avgflooru/avgceils/avgceilu
This contribution was made on Mar 6
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[ADT] Add APIntOps::mulhs / APIntOps::mulhu
This contribution was made on Mar 6