Pinned

1. RISCV_LBIST RISCV_LBIST Public

   Forked from alessandrolandra/RISCV_LBIST

   Design of a BIST module for RISC-V fault testing

   Verilog 1

2. DLX DLX Public

   RTL description, synthesis and physical design of a 4-stage pipelined 32bit RISC processor

   Verilog 4 2

3. Resume Resume Public

   My Curriculum Vitae in LaTeX

   TeX

4. mc2101 mc2101 Public

   Forked from RHESGroup/mc2101

   VHDL

5. Thesis Thesis Public

   MSc Thesis in Computer Engineering, Embedded Systems

   TeX 1

6. LeNetCUDA LeNetCUDA Public

   LeNet-1 Forward Propagation algorithm in CUDA

   Cuda