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v4.1.2
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* HAL: Changed configuration of IQ polarity of FPGA for TX to comply with FPGA
version greater than v27. (Only required for AP2 Semtech reference design)
* HAL: Updated default LoRa preamble size according to LoRaWAN spec.
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mcoracin committed Jan 10, 2017
1 parent f4cff85 commit ddc5e50
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Showing 4 changed files with 16 additions and 3 deletions.
2 changes: 1 addition & 1 deletion VERSION
@@ -1 +1 @@
4.1.1
4.1.2
7 changes: 7 additions & 0 deletions libloragw/src/loragw_fpga.c
Expand Up @@ -144,6 +144,13 @@ int lgw_fpga_configure(uint32_t tx_notch_freq) {
return LGW_REG_ERROR;
}

/* Required for Semtech AP2 reference design */
x = lgw_fpga_reg_w(LGW_FPGA_CTRL_INVERT_IQ, 1);
if (x != LGW_REG_SUCCESS) {
DEBUG_MSG("ERROR: Failed to configure FPGA polarity\n");
return LGW_REG_ERROR;
}

/* Configure TX notch filter */
if (tx_filter_support == true) {
notch_offset_reg = (32E6 / (2*tx_notch_freq)) - 64;
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4 changes: 2 additions & 2 deletions libloragw/src/loragw_hal.c
Expand Up @@ -69,8 +69,8 @@ Maintainer: Sylvain Miermont
#define AGC_CMD_WAIT 16
#define AGC_CMD_ABORT 17

#define MIN_LORA_PREAMBLE 4
#define STD_LORA_PREAMBLE 6
#define MIN_LORA_PREAMBLE 6
#define STD_LORA_PREAMBLE 8
#define MIN_FSK_PREAMBLE 3
#define STD_FSK_PREAMBLE 5

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6 changes: 6 additions & 0 deletions readme.md
Expand Up @@ -70,6 +70,12 @@ chip through GPIO, before starting any application using the concentrator.
4. Changelog
-------------

### v4.1.2 ###

* HAL: Changed configuration of IQ polarity of FPGA for TX to comply with FPGA
version greater than v27. (Only required for AP2 Semtech reference design)
* HAL: Updated default LoRa preamble size according to LoRaWAN spec.

### v4.1.1 ###

* HAL: Fixed bug in "Listen-Before-Talk" which was preventing from configuring
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