Building a RISC-V CPU Core

Accompanying resources for the Building a RISC-V CPU Core EdX course by Steve Hoover of Redwood EDA, Linux Foundation, and RISC-V International.

Welcome

The repository contains all the resources provided by the Linux Foundation.

Solution code compiled by ChaminduS

In addition, the complete code required to build the RISC-V CPU Core through the Makerchip IDE is also given here. Please note that the code you find here is work of ChaminduS and it is highly encouraged that you audit the course and generate the code on your own using the guidelines provided there.

RISC-V Reference Solution

In case you get stuck, we've got your back! These reference solutions (Ctrl-click) will help with syntax, etc. without handing you the answers.

Here's a pre-built logic diagram of the final CPU. Ctrl-click here to explore in its own tab.

Happy Learning!