Add wire length attribute to RR graph output XML when using "--write_rr_graph" option

[StephenMoreOSU]

On VTR master commit 9479f9d

When running the below command:

$VTR_ROOT/vpr/vpr \
    $VTR_ROOT/vtr_flow/arch/titan/stratixiv_arch.timing.xml \
    $VTR_ROOT/vtr_flow/benchmarks/blif/alu4.blif \
    --seed 55000 --route_chan_width 300 \
    --write_rr_graph rr_graph.xml \

The current output XML has the following for its segment fields:

<segments>
<segment id="0" name="L4"><timing C_per_meter="1.80000007e-14" R_per_meter="201.699997"/>
</segment>
<segment id="1" name="L16"><timing C_per_meter="2.06999995e-14" R_per_meter="50.4199982"/>
</segment>
</segments>

I'd like this to be changed to the following output:

<segments>
<segment id="0" name="L4" length="4"><timing C_per_meter="1.80000007e-14" R_per_meter="201.699997"/>
</segment>
<segment id="1" name="L16" length="16"><timing C_per_meter="2.06999995e-14" R_per_meter="50.4199982"/>
</segment>
</segments>

This would then match the following description in the Stratix IV Architecture file:

<segment name="L4" freq="260" length="4" type="unidir" Rmetal="201.7" Cmetal="18.0e-15">
      <mux name="seg4_driver"/>
      <sb type="pattern">1 1 1 1 1</sb>
      <cb type="pattern">1 1 1 1</cb>
    </segment>
    <segment name="L16" freq="40" length="16" type="unidir" Rmetal="50.42" Cmetal="20.7e-15">
      <mux name="seg16_driver"/>
      <sb type="pattern">1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1</sb>
      <cb type="pattern">0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0</cb>
    </segment>