SAP-1 implementation in VHDL for the Sipeed Tang Nano 9k
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Updated
Feb 19, 2024 - VHDL
SAP-1 implementation in VHDL for the Sipeed Tang Nano 9k
Not Quite Simple As Possible breadboard computer
A C++ Implementation of X-Bit Computer SAP-X Architecture Virtualization
Verilog implementation of SAP-1 computer architecture
The Simple-As-Possible (SAP)-1 computer is a very basic model of a microprocessor explained by Albert Paul Malvino. The SAP-1 design contains the basic necessities for a functional Microprocessor. Its primary purpose is to develop a basic understanding of how a microprocessor works, interacts with memory and other parts of the system like input …
Documentation of my 8-bit computer build
Code, documentation, schematics, notes for my Ben Eater inspired breadboard computer and emulator
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