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Play and learn some valuable lessons with a generic Ebay/China CPLD board featuring an Altera/Intel MAX II CPLD. The hardware is pretty crappy (just mine?) so it won't be much fun.
Updated
Sep 18, 2019
Verilog
ALUminium is a CPLD/FPGA code for a 8bits arithmetic–logic unit, made for processor like GP8B
Updated
Dec 11, 2019
VHDL
VHDL Source Code For XC9536 CPLD Experiment Board
Addressable 8 SPDT debouncer in Verilog
Updated
Jun 28, 2020
Verilog
The CP/LD viewer is a Visual Studio Code extension that allows you to view and browse CP/LD compliant documents inside VSCode.
Updated
May 29, 2024
JavaScript
Porting TD4 (Toriaezu Dousasurudakeno 4bit-CPU) to CPLD
Updated
Jan 6, 2017
Verilog
this repository contains some PCB design files made in Proteus VSM. I use them here to support my blogs.
Updated
Jan 22, 2019
VHDL
RAM and ROM board expansion for the MAXV DeltaBrd
tranZPUter Fusion - Evolution of the tranZPUter concept, increasing functionality to extend the ZPU Z80, Memory, Video and Audio for Z80 Host systems.
A SPI master interface core for CPLD/FPGA
Updated
Oct 8, 2018
Verilog
psoc switch coordinate to register & bit mappings in tabular format for easy parsing & analysis
Updated
Aug 18, 2017
Shell
A simple text-mode VGA CRTC implemented in Verilog
Updated
Mar 25, 2022
Verilog
PGA44 to DIP44 socket PCB project using EAGLE CAD
Updated
May 5, 2017
Eagle
Frequency counter implemented with ATmega8515, CPLD EPM3064 and SCD5583 display
Updated
Jul 19, 2018
Verilog
A circuit that helps create a single slope ADC for device such as PLDs
Updated
Aug 16, 2017
Forth
A bidirectional room visitor counter using schematic capture and AHDL on Intel Quartus Prime using an Altera CPLD
Updated
Sep 19, 2022
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