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Clean up UDI and UDS implementation as well as udi_uds_patch program #198

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secworks opened this issue Apr 3, 2024 · 0 comments
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fpga Related to the FPGA design tools Related to tooling

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secworks commented Apr 3, 2024

The UDI and UDS are implemented using named instances of SB_LUT4s in the FPGA. This is all well and good. But LUT inputs are implicitly specified (in UDI). One input for UDS is used as 'read_enable', which it isn't. And the read_enable is connected to the write_enable signal for the read once-registers. Registers which are the ones that actually determine of a read access should be allowed. Note the write_emab

Finally the udi_uds_patch program writes UDI data into all 16 bits of the LUT4s, even though only two bits can be addressed.

We therefore should:

  1. Clean up the RTL for the UDI to handle all inputs
  2. Clean up the RTL for the UDS to use the read once-registers for access control
  3. Clean up the patch program to not repeat the UDI data, and generally clean up the code
@secworks secworks added fpga Related to the FPGA design tools Related to tooling labels Apr 3, 2024
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