Add build of FPGA design with Icarus

[secworks]

Icarus Verilog is a mature and well used open source simulator with its own parser. It might be hard to build the application_fpga design due to the device specific modules. But it would be interesting to get another parser included as option in the build process.

Therefore add build with Icarus Verilog. https://github.com/steveicarus/iverilog