{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":304615451,"defaultBranch":"master","name":"rv32emu","ownerLogin":"sysprog21","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2020-10-16T12:05:06.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/22310129?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1716315345.0","currentOid":""},"activityList":{"items":[{"before":"6f229836e690ed752c6560b850bb93779c9a72ce","after":"82616093f3d3dce8e013c557194db559864a4267","ref":"refs/heads/update-gnu-toolchain","pushedAt":"2024-05-27T05:12:22.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Bump riscv-arch-test version","shortMessageHtmlLink":"Bump riscv-arch-test version"}},{"before":"69fae57be639413ed059af70f085c3d13b5a6e9b","after":"a96831076ac049ccad74a62a94f09179a9c1187b","ref":"refs/heads/master","pushedAt":"2024-05-27T02:49:34.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #443 from ChinYikMing/sret-can-branch\n\nSpecify can_branch and decode the sret instruction","shortMessageHtmlLink":"Merge pull request #443 from ChinYikMing/sret-can-branch"}},{"before":"f3c4d5052d44c4a3d2d252201dd2ee4b263a934d","after":"69fae57be639413ed059af70f085c3d13b5a6e9b","ref":"refs/heads/master","pushedAt":"2024-05-25T11:59:18.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #447 from visitorckw/fix-canonical-order\n\nFix canonical order of RISC-V extension names in help information","shortMessageHtmlLink":"Merge pull request #447 from visitorckw/fix-canonical-order"}},{"before":"a8aa29eed782318f80320c242c0944e8fe624b70","after":"f3c4d5052d44c4a3d2d252201dd2ee4b263a934d","ref":"refs/heads/master","pushedAt":"2024-05-22T00:37:04.000Z","pushType":"pr_merge","commitsCount":3,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #445 from visitorckw/update-time-info-resolution\n\nModify get_time_info() to return seconds and nanoseconds","shortMessageHtmlLink":"Merge pull request #445 from visitorckw/update-time-info-resolution"}},{"before":null,"after":"6f229836e690ed752c6560b850bb93779c9a72ce","ref":"refs/heads/update-gnu-toolchain","pushedAt":"2024-05-21T18:15:45.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"CI: Bump riscv-gnu-toolchain","shortMessageHtmlLink":"CI: Bump riscv-gnu-toolchain"}},{"before":"ddaba0d33a673b080a03e1ed9b38c7d178cd26ad","after":"a8aa29eed782318f80320c242c0944e8fe624b70","ref":"refs/heads/master","pushedAt":"2024-05-21T18:15:09.000Z","pushType":"force_push","commitsCount":0,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix the microsecond-to-nanosecond conversion (#360)\n\nA microsecond is 1000 times bigger than a nanosecond (1e-6 vs 1e-9 seconds).\r\nThis commit corrects the conversion of microseconds to nanoseconds in\r\nrv_clock_gettime() by multiplying tv_usec by 1000 instead of dividing it.","shortMessageHtmlLink":"Fix the microsecond-to-nanosecond conversion (#360)"}},{"before":"a8aa29eed782318f80320c242c0944e8fe624b70","after":"ddaba0d33a673b080a03e1ed9b38c7d178cd26ad","ref":"refs/heads/master","pushedAt":"2024-05-21T18:01:54.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"CI: Bump riscv-gnu-toolchain","shortMessageHtmlLink":"CI: Bump riscv-gnu-toolchain"}},{"before":"b8e20f69788d4ad127c6fce8df3d77d57aedbe05","after":"a8aa29eed782318f80320c242c0944e8fe624b70","ref":"refs/heads/master","pushedAt":"2024-05-21T17:58:11.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix the microsecond-to-nanosecond conversion (#360)\n\nA microsecond is 1000 times bigger than a nanosecond (1e-6 vs 1e-9 seconds).\r\nThis commit corrects the conversion of microseconds to nanoseconds in\r\nrv_clock_gettime() by multiplying tv_usec by 1000 instead of dividing it.","shortMessageHtmlLink":"Fix the microsecond-to-nanosecond conversion (#360)"}},{"before":"347be4b421b0bca2de7c42872a289a654b31b77d","after":"b8e20f69788d4ad127c6fce8df3d77d57aedbe05","ref":"refs/heads/master","pushedAt":"2024-05-18T10:51:33.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix typo (#442)","shortMessageHtmlLink":"Fix typo (#442)"}},{"before":"7d13e82671a8f962739a6bf9d26fc371431d1b64","after":"347be4b421b0bca2de7c42872a289a654b31b77d","ref":"refs/heads/master","pushedAt":"2024-05-13T16:14:43.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #440 from qwe661234/fix_t1c\n\nCorrectly update the information of hotspot","shortMessageHtmlLink":"Merge pull request #440 from qwe661234/fix_t1c"}},{"before":"8351106c4451607a828eeb0927abf1d642a4e28c","after":"7d13e82671a8f962739a6bf9d26fc371431d1b64","ref":"refs/heads/master","pushedAt":"2024-05-13T09:12:40.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Implement minimal SBI (#439)\n\nSBI acts as a communication layer between S-mode software and M-mode\r\nhardware. To boot the Linux kernel, some minimal SBI extensions (v0.3)\r\nhave to be implemented, and they are:\r\n1. Base extension (EID=0x10)\r\n2. Timer extension (EID=0x54494D45)\r\n\r\nThe SRST extension (EID=0x53525354) is optional, so only the shutdown\r\nreason has been implemented.","shortMessageHtmlLink":"Implement minimal SBI (#439)"}},{"before":"da034acc6b9e5190ea0660edb9d9c9c61833bb5e","after":"8351106c4451607a828eeb0927abf1d642a4e28c","ref":"refs/heads/master","pushedAt":"2024-05-12T05:21:29.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Refactor mpool allocation (#433)\n\nThe mpool_calloc function contains code identical to that found in the\r\nmpool_alloc function. Replace part of the code in the mpool_alloc and\r\nmpool_calloc functions with the mpool_alloc_helper function.","shortMessageHtmlLink":"Refactor mpool allocation (#433)"}},{"before":"98c8d81cbf98b7cd3fda11ecab93af9e9fa10d3e","after":"da034acc6b9e5190ea0660edb9d9c9c61833bb5e","ref":"refs/heads/master","pushedAt":"2024-05-12T01:33:04.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #436 from visitorckw/optimize-write\n\nOptimize syscall_write() to avoid redundant checks and FILE* retrievals","shortMessageHtmlLink":"Merge pull request #436 from visitorckw/optimize-write"}},{"before":"0f4512c6eb6ffa8cf4978d72bd5a72e9f94b57ac","after":"98c8d81cbf98b7cd3fda11ecab93af9e9fa10d3e","ref":"refs/heads/master","pushedAt":"2024-05-12T01:31:42.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #437 from qwe661234/consolidate_block_translate\n\nConsolidate the block_translate fucntion","shortMessageHtmlLink":"Merge pull request #437 from qwe661234/consolidate_block_translate"}},{"before":"c469828151c82ba27b557bd81848888f626cac49","after":"0f4512c6eb6ffa8cf4978d72bd5a72e9f94b57ac","ref":"refs/heads/master","pushedAt":"2024-05-11T14:06:16.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #434 from visitorckw/fix-lseek\n\nFix syscall lseek() to return correct offset","shortMessageHtmlLink":"Merge pull request #434 from visitorckw/fix-lseek"}},{"before":"99a08419e48b85b1cdf885548e3d20396c027b5c","after":"c469828151c82ba27b557bd81848888f626cac49","ref":"refs/heads/master","pushedAt":"2024-05-09T14:37:19.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #432 from ChinYikMing/handle-illegal-instr-for-csr\n\nRaise illegal instruction exception for Zicsr","shortMessageHtmlLink":"Merge pull request #432 from ChinYikMing/handle-illegal-instr-for-csr"}},{"before":"a3d2418b95ccd3ee7824690f8b49a7fd01952a08","after":"99a08419e48b85b1cdf885548e3d20396c027b5c","ref":"refs/heads/master","pushedAt":"2024-05-08T10:30:43.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix typo (#431)","shortMessageHtmlLink":"Fix typo (#431)"}},{"before":"5c6a5b72bddca76730a22de47636a41884396d3e","after":"a3d2418b95ccd3ee7824690f8b49a7fd01952a08","ref":"refs/heads/master","pushedAt":"2024-05-08T07:09:22.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix typo (#430)","shortMessageHtmlLink":"Fix typo (#430)"}},{"before":"06ce6d2a95e7028e834ae1b41603bf587ff884af","after":"5c6a5b72bddca76730a22de47636a41884396d3e","ref":"refs/heads/master","pushedAt":"2024-05-07T09:02:23.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #429 from p96114175/master\n\nFix typo","shortMessageHtmlLink":"Merge pull request #429 from p96114175/master"}},{"before":"fe4030710d6df1116e92666e28c96352f2f0830c","after":"06ce6d2a95e7028e834ae1b41603bf587ff884af","ref":"refs/heads/master","pushedAt":"2024-05-06T21:18:42.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Consolidate consistency of AMO RVOP (#428)\n\nThe 'addr' variable is used to specify the memory address in many I/O\r\noperations within the RVOP macro, such as the 'lh' and 'lw' instructions.\r\nHowever, most of the AMO (Atomic Memory Operation) instructions did not\r\nuse it. To maintain consistency, the use of the 'addr' variable has been\r\nconsolidated.","shortMessageHtmlLink":"Consolidate consistency of AMO RVOP (#428)"}},{"before":"c0833ebf9a3c329d26ce8568cd1f5c2f656389eb","after":"fe4030710d6df1116e92666e28c96352f2f0830c","ref":"refs/heads/master","pushedAt":"2024-05-06T20:21:29.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix typo (#427)","shortMessageHtmlLink":"Fix typo (#427)"}},{"before":"6d459594eba7531bdb5ae6581d9ad4853b2def83","after":"c0833ebf9a3c329d26ce8568cd1f5c2f656389eb","ref":"refs/heads/master","pushedAt":"2024-05-05T08:24:04.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #426 from visitorckw/fix-missing-rc32fc-test\n\nCI: Reinstate rv32fc test suite","shortMessageHtmlLink":"Merge pull request #426 from visitorckw/fix-missing-rc32fc-test"}},{"before":"5b1a119ada5068f086267b786deea1177188feb6","after":"6d459594eba7531bdb5ae6581d9ad4853b2def83","ref":"refs/heads/master","pushedAt":"2024-05-04T15:18:54.000Z","pushType":"pr_merge","commitsCount":5,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #424 from visitorckw/optimize-ci-efficiency\n\nCI: Parallelize compilation for faster testing","shortMessageHtmlLink":"Merge pull request #424 from visitorckw/optimize-ci-efficiency"}},{"before":"b1820716ea6dcc7f2b585a3fe788faed6d970433","after":"5b1a119ada5068f086267b786deea1177188feb6","ref":"refs/heads/master","pushedAt":"2024-05-04T14:48:08.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix parallel builds (#423)\n\nWhen adding the -j flag to make for faster compilation speeds, it led\r\nto the following error:\r\n\r\nsrc/riscv.h:20:10: fatal error: softfloat/softfloat.h: No such file or directory\r\n 20 | #include \"softfloat/softfloat.h\"\r\n | ^~~~~~~~~~~~~~~~~~~~~~~\r\ncompilation terminated.\r\n\r\nThis was due to incorrect dependency settings, where compilation of the\r\nsource code started before completing the git submodule update, leading\r\nto the error. Add appropriate dependency handling to ensure that\r\ncompilation of the softfloat library is completed before compiling the\r\nsource code.","shortMessageHtmlLink":"Fix parallel builds (#423)"}},{"before":"a25e92dbf6d300b8d8a6de52a5715d94782bc906","after":"b1820716ea6dcc7f2b585a3fe788faed6d970433","ref":"refs/heads/master","pushedAt":"2024-05-02T16:29:07.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Fix typo (#422)","shortMessageHtmlLink":"Fix typo (#422)"}},{"before":"64e854a8a70371d6d9ac1bb7832d2ac0d8e66a52","after":"a25e92dbf6d300b8d8a6de52a5715d94782bc906","ref":"refs/heads/master","pushedAt":"2024-05-02T10:05:38.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #421 from p96114175/master\n\nRemove extra comma of SUPPORTED_SYSCALLS","shortMessageHtmlLink":"Merge pull request #421 from p96114175/master"}},{"before":"c7179b9c7bc6702c1643a92eda132ab683792add","after":"64e854a8a70371d6d9ac1bb7832d2ac0d8e66a52","ref":"refs/heads/master","pushedAt":"2024-05-01T11:10:31.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"chmod -x RISC-V ELF file","shortMessageHtmlLink":"chmod -x RISC-V ELF file"}},{"before":"ab487d99c7bce6254e980c8c64ab923930390c8b","after":"c7179b9c7bc6702c1643a92eda132ab683792add","ref":"refs/heads/master","pushedAt":"2024-04-29T19:21:11.000Z","pushType":"pr_merge","commitsCount":1,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"jit: Implement register allocation (#418)\n\nThis commit implements the register allocator using linear-scan register\r\nallocation. The \"reg_table\" has been removed and integrated into the\r\n\"host_reg\" for easier access to the VM register by the \"reg_idx\".\r\n\r\nThe performance comparison is shown below: (x86-64)\r\n\r\n| Metric | Original | w/ reg-alloc | SpeedUp |\r\n|-----------+----------------+----------------+---------|\r\n| dhrystone | 14060 DMIPS | 15225 DMIPS | +8.29% |\r\n| coremark | 3874 iters/s | 3828 iters/s | -1.19% |\r\n| aes | 0.0297 s | 0.0323 s | -8.75% |\r\n| nqueens | 2.16 s | 2.05 s | +5.09% |\r\n| stream | 29.6 s | 27.6 s | +6.76% |","shortMessageHtmlLink":"jit: Implement register allocation (#418)"}},{"before":"cadd55a7c6eec60f3c765ed16f3de8e3b93fc790","after":"ab487d99c7bce6254e980c8c64ab923930390c8b","ref":"refs/heads/master","pushedAt":"2024-04-22T13:15:15.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #417 from qwe661234/add_cache_flush\n\nAdd code cache flush mechanism","shortMessageHtmlLink":"Merge pull request #417 from qwe661234/add_cache_flush"}},{"before":"ab588a94453fc5ed567b505a405dd68a66261fdb","after":"cadd55a7c6eec60f3c765ed16f3de8e3b93fc790","ref":"refs/heads/master","pushedAt":"2024-04-19T03:30:24.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"jserv","name":"Jim Huang","path":"/jserv","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/478921?s=80&v=4"},"commit":{"message":"Merge pull request #416 from ChinYikMing/fix-wasm-ci\n\nFix wasm build failed in deploy-wasm CI","shortMessageHtmlLink":"Merge pull request #416 from ChinYikMing/fix-wasm-ci"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEVIJQLQA","startCursor":null,"endCursor":null}},"title":"Activity ยท sysprog21/rv32emu"}