Targeting ZCU111 with Vivado/Petalinux 2022.2 #47
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This is similar to #33 with the key difference being the version 2022.2 . Background: Issue: make ARCH=arm64 -j4 make -C /home/drew/Projects/linux-xlnx/ M=/home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module modules make[1]: Entering directory '/home/drew/Projects/linux-xlnx' CC [M] /home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module/srs_dma_driver.o /home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module/srs_dma_driver.c: In function ‘allocate_trx_dma_buffers’: /home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module/srs_dma_driver.c:424:22: error: implicit declaration of function ‘dma_zalloc_coherent’; did you mean ‘dma_alloc_coherent’? [-Werror=implicit-function-declaration] 424 | buffer->virtaddr = dma_zalloc_coherent(&d_info->pdev->dev, alloc_request->buffer_size, | ^~~~~~~~~~~~~~~~~~~ | dma_alloc_coherent /home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module/srs_dma_driver.c:424:20: warning: assignment to ‘void *’ from ‘int’ makes pointer from integer without a cast [-Wint-conversion] 424 | buffer->virtaddr = dma_zalloc_coherent(&d_info->pdev->dev, alloc_request->buffer_size, | ^ cc1: some warnings being treated as errors make[2]: *** [scripts/Makefile.build:277: /home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module/srs_dma_driver.o] Error 1 make[1]: *** [Makefile:1868: /home/drew/Projects/zynq_timestamping/sw/lib/src/phy/rf/xrfdc/kernel_module] Error 2 make[1]: Leaving directory '/home/drew/Projects/linux-xlnx' make: *** [Makefile:16: default] Error 2 The variable KDIR is set to Followup question: |
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Replies: 4 comments 7 replies
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So the answer to the original problem was to replace dma_zalloc_coherent with dma_alloc_coherent exactly like the error description suggested. Apparently dma_zalloc_coherent is deprecated and not present in new kernel versions. If I run into any other issues I'll post them here. |
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Hi @drew-os , Thanks for the detailed description of driver compilation using Petalinux tools - this is another way to do it compared to manual compilation we described in the appnote.
I'd say the fpga design and device-tree node for RFdc IP mismatch. Although I understood that you relied on Petalinux to build it (based on exported hardware). Basically I would first make sure that the address of RFdc IP in Vivado project and device-tree match. Then another thing that I encountered myself a few times - when you upgrade some IP (custom or Xilinx) due to a new version availability, sometimes the IP looses its configuration, thus please check the GUI config of the RFdc IP and compare it to the original 2019.2 project. Small note regarding device-tree:
Very good! Just make sure that the |
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Hi @drew-os, from #52 it seems that you've managed to overcome the issues detailed above. Is this correct? If that's so, would you mind to provide some minimal details and close this thread? Thanks! |
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Just for anyone else that ends up here in the future, I've managed to migrate the zcu111 build to Vivado/Petalinux 2023.2. Thanks to @drew-os for doing most of the legwork! The final hurdle at the For me, the SCI18IS60C had moved from bus zcu111:~# i2cdetect -y -r 11
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 2f
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- 48 -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- UU UU -- -- Updating the A modification I haven't seen mentioned elsewhere: when doing the IP upgrade in Vivado it has a habit of clobbering some of the IP settings. For me, the main one was that it resets the reset polarity on set_property -dict [ list \
CONFIG.POLARITY {ACTIVE_HIGH} \
] [get_bd_pins /rfdc_adc_data_decim_0/ADCxN_reset]
set_property -dict [ list \
CONFIG.POLARITY {ACTIVE_HIGH} \
] [get_bd_pins /rfdc_dac_data_interp_0/DACxN_reset] The final detail I had different from the above discussions was I had to fix the DMA reference in the device tree for the rx channel (from
Cheers, Iain |
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Just for anyone else that ends up here in the future, I've managed to migrate the zcu111 build to Vivado/Petalinux 2023.2. Thanks to @drew-os for doing most of the legwork!
The final hurdle at the
ADC 0 timed out at state 6 in XRFdc_WaitForRestartClr
error (which basically says the ADC PLL isn't locked) is that the i2c bus numbers seem to have moved around a bit in newer Petalinux builds. Trying to program the clock tree silently fails, and the clocks to the RFdc are never generated.For me, the SCI18IS60C had moved from bus
12
to bus11
, as verified by i2cdetect (2f
is the address of the i2c to spi chip used to talk to the LMK/LMX chips):