test_bench for IP cores #36
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ofontbach
julianctrt
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Hi again, in my adventure to port the design to the zcu208 I need to debug the modules in hdl, for this reason I would like to know if there are available test bench for the IP cores at least as independent entities. regards. |
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Answered by
ofontbach
Dec 22, 2022
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Hi @julianctrt, we have some code, but honestly it's a little outdated. I've created a new issue to add some minimal RTL simulation capabilities to the repo. Regards |
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Hi @julianctrt,
we have some code, but honestly it's a little outdated. I've created a new issue to add some minimal RTL simulation capabilities to the repo.
Regards