When timing requirements are violated, Logic should simply stop decoding

[timreyes]

Issue was initially reported by @gonzzor through our support team

• See support ticket #81005 for more info

Capture File provided below for reference:
Broken Modbus communication Jonas.sal.zip

When decoding Modbus RTU frames that violates timing requirements Logic should highlight them as invalid and stop decoding them, rather than assuming the rest of the incoming data is valid.

The timing requirement between characters is max 0.75 ms and min 1.75 ms between frames, at least when running above 19200 bps. In the image below, the analyzer should have stopped decoding by then. Instead, the analyzer kept looking for the next data bits for the next 150 ms or so.

It's obvious that the response from the server is broken, but it's still decoded as if it was a proper response despite breaking the timing requirements of Modbus.

While it might be nice to have Logic wait forever to complete a frame, it's hard to decode frames that are only partly sent and re-transmitted.