Implementation of OpenHPSDR protocol 2 in application "SDR Tranceiver HPSDR"

[F4HZA]

Description of the setup:

• Device: 125-14
• SD card image: red-pitaya-alpine-3.18-armv7-20240204.zip
• Application: SDR Tranceiver HPSDR

Hello,
I would like to know if it was possible to implement HPSDR protocol 2.

This protocol brings advantages:

• definition of hardware in initialization of exchanges: "255: Full hardware description follows"
• frequency defined in the configuration: "DSP clock frequency (Hz)" ex 125 Mhz, therefore no need for an FIR filters for fractional sample rate conversion, which would relieve the FPGA.
• other band width available: 768khz and 1536 khz
• supported by SDR Console and THETIS applications.

Thank you for your comeback.

Best regards.

[pavel-demin]

It should be possible to implement some parts of the new HPSDR protocol. However, I do not see its usefulness for my projects and I am not sure that the advantages that you describe can actually be leveraged with existing software. For example, I do not recall seeing in the Thetis source code any support for sample rates other than those that are multiples of 48000.

The new protocol is developed with the Angelia and Orion platforms in mind. Angelia and Orion feature large FPGAs (EP4CE115, EP4CGX150) with 3-5 times more FPGA resources than available on Red Pitaya 125-14 (XC7Z010). I think that Red Pitaya 125-14 does not have enough resources to support all the features (more receivers, higher sample rates) of the new protocol.

Implementing this new protocol would take me quite a bit of time, that for the moment I prefer to devote to other projects that interest me more.

Additionally, Thetis does not work well under Wine on Linux and I prefer not to use Windows anymore. It would therefore be quite difficult for me to test this new protocol.