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bpi-r4 doesn't recognize all PCI devices #14767

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mmisiewicz opened this issue Mar 2, 2024 · 4 comments
Open
1 task done

bpi-r4 doesn't recognize all PCI devices #14767

mmisiewicz opened this issue Mar 2, 2024 · 4 comments
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bug issue report with a confirmed bug Official Image SNAPSHOT target/mediatek pull request/issue for mediatek target

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@mmisiewicz
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Describe the bug

Compared to the Banana pi-provided image which is based on kernel 5.4.246, the most recent snapshot of openwrt fails to detect all the PCI devices on. I'm specifically trying to get a T99W175 b-key modem working. On the sinovoip provided build, the modem is detected, but not on snapshot openwrt.

There are some suggestive errors in the kernel log:

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x411fd090]
[    0.000000] Linux version 6.1.79 (builder@buildhost) (aarch64-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r25361-a86ff06d2e) 12.3.0, GNU ld (GNU Binutils) 2.40.0) #0 SMP Fri Mar  1 01:42:36 2024
[    0.000000] Machine model: Bananapi BPI-R4
...
[    0.042510] mtk-xsphy soc:xphy@11e10000: failed to get ref_clk(id-1)
[    0.043034] mtk-pcie-gen3 11280000.pcie: host bridge /soc/pcie@11280000 ranges:
[    0.043054] mtk-pcie-gen3 11280000.pcie: Parsing ranges property...
[    0.043065] mtk-pcie-gen3 11280000.pcie:       IO 0x0020000000..0x00201fffff -> 0x0020000000
[    0.043078] mtk-pcie-gen3 11280000.pcie:      MEM 0x0020200000..0x0027ffffff -> 0x0020200000
[    0.043174] mtk-pcie-gen3 11290000.pcie: host bridge /soc/pcie@11290000 ranges:
[    0.043185] mtk-pcie-gen3 11290000.pcie: Parsing ranges property...
[    0.043194] mtk-pcie-gen3 11290000.pcie:       IO 0x0028000000..0x00281fffff -> 0x0028000000
[    0.043204] mtk-pcie-gen3 11290000.pcie:      MEM 0x0028200000..0x002fffffff -> 0x0028200000
[    0.043223] /soc/pcie@11290000: Failed to get clk index: 0 ret: -517
[    0.043232] mtk-pcie-gen3 11290000.pcie: failed to get clocks
[    0.043294] mtk-pcie-gen3 11300000.pcie: host bridge /soc/pcie@11300000 ranges:
[    0.043304] mtk-pcie-gen3 11300000.pcie: Parsing ranges property...
[    0.043313] mtk-pcie-gen3 11300000.pcie:       IO 0x0030000000..0x00301fffff -> 0x0030000000
[    0.043322] mtk-pcie-gen3 11300000.pcie:      MEM 0x0030200000..0x0037ffffff -> 0x0030200000
[    0.043337] /soc/pcie@11300000: Failed to get clk index: 0 ret: -517
[    0.043345] mtk-pcie-gen3 11300000.pcie: failed to get clocks
[    0.043418] mtk-pcie-gen3 11310000.pcie: host bridge /soc/pcie@11310000 ranges:
[    0.043428] mtk-pcie-gen3 11310000.pcie: Parsing ranges property...
[    0.043436] mtk-pcie-gen3 11310000.pcie:       IO 0x0038000000..0x00381fffff -> 0x0038000000
[    0.043445] mtk-pcie-gen3 11310000.pcie:      MEM 0x0038200000..0x003fffffff -> 0x0038200000
[    0.043461] /soc/pcie@11310000: Failed to get clk index: 0 ret: -517
...
[    2.264470] mtk-pcie-gen3 11280000.pcie: host bridge /soc/pcie@11280000 ranges:
[    2.271809] mtk-pcie-gen3 11280000.pcie: Parsing ranges property...
[    2.278074] mtk-pcie-gen3 11280000.pcie:       IO 0x0020000000..0x00201fffff -> 0x0020000000
[    2.285724] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
[    2.286502] mtk-pcie-gen3 11280000.pcie:      MEM 0x0020200000..0x0027ffffff -> 0x0020200000
...
[    2.637311] mtk-pcie-gen3 11280000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x0)
[    2.646106] mtk-pcie-gen3: probe of 11280000.pcie failed with error -110
[    2.653141] mtk-pcie-gen3 11290000.pcie: host bridge /soc/pcie@11290000 ranges:
[    2.660455] mtk-pcie-gen3 11290000.pcie: Parsing ranges property...
[    2.666719] mtk-pcie-gen3 11290000.pcie:       IO 0x0028000000..0x00281fffff -> 0x0028000000
[    2.675154] mtk-pcie-gen3 11290000.pcie:      MEM 0x0028200000..0x002fffffff -> 0x0028200000
[    3.017310] mtk-pcie-gen3 11290000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x1)
[    3.026086] mtk-pcie-gen3: probe of 11290000.pcie failed with error -110
[    3.032937] mtk-pcie-gen3 11300000.pcie: host bridge /soc/pcie@11300000 ranges:
[    3.040244] mtk-pcie-gen3 11300000.pcie: Parsing ranges property...
[    3.046503] mtk-pcie-gen3 11300000.pcie:       IO 0x0030000000..0x00301fffff -> 0x0030000000
[    3.054938] mtk-pcie-gen3 11300000.pcie:      MEM 0x0030200000..0x0037ffffff -> 0x0030200000
[    3.397313] mtk-pcie-gen3 11300000.pcie: PCIe link down, current LTSSM state: detect.quiet (0x1)
[    3.406088] mtk-pcie-gen3: probe of 11300000.pcie failed with error -110
[    3.412945] mtk-pcie-gen3 11310000.pcie: host bridge /soc/pcie@11310000 ranges:
[    3.420253] mtk-pcie-gen3 11310000.pcie: Parsing ranges property...
[    3.426511] mtk-pcie-gen3 11310000.pcie:       IO 0x0038000000..0x00381fffff -> 0x0038000000
[    3.434942] mtk-pcie-gen3 11310000.pcie:      MEM 0x0038200000..0x003fffffff -> 0x0038200000
[    3.707436] mtk-pcie-gen3 11310000.pcie: set IO trans window[0]: cpu_addr = 0x38000000, pci_addr = 0x38000000, size = 0x200000
[    3.718816] mtk-pcie-gen3 11310000.pcie: set MEM trans window[1]: cpu_addr = 0x38200000, pci_addr = 0x38200000, size = 0x200000
[    3.730281] mtk-pcie-gen3 11310000.pcie: set MEM trans window[2]: cpu_addr = 0x38400000, pci_addr = 0x38400000, size = 0x400000
[    3.741743] mtk-pcie-gen3 11310000.pcie: set MEM trans window[3]: cpu_addr = 0x38800000, pci_addr = 0x38800000, size = 0x800000
[    3.753206] mtk-pcie-gen3 11310000.pcie: set MEM trans window[4]: cpu_addr = 0x39000000, pci_addr = 0x39000000, size = 0x1000000
[    3.764754] mtk-pcie-gen3 11310000.pcie: set MEM trans window[5]: cpu_addr = 0x3a000000, pci_addr = 0x3a000000, size = 0x2000000
[    3.776303] mtk-pcie-gen3 11310000.pcie: set MEM trans window[6]: cpu_addr = 0x3c000000, pci_addr = 0x3c000000, size = 0x4000000
[    3.787965] mtk-pcie-gen3 11310000.pcie: PCI host bridge to bus 0001:00
[    3.794568] pci_bus 0001:00: root bus resource [bus 00-ff]
[    3.800048] pci_bus 0001:00: root bus resource [io  0x600000-0x7fffff] (bus address [0x38000000-0x381fffff])
[    3.809863] pci_bus 0001:00: root bus resource [mem 0x38200000-0x3fffffff]
[    3.816724] pci_bus 0001:00: scanning bus
[    3.820747] pci 0001:00:00.0: [14c3:7988] type 01 class 0x060400
[    3.826754] pci 0001:00:00.0: reg 0x10: [mem 0x00000000-0x00007fff 64bit]
[    3.833593] pci 0001:00:00.0: PME# supported from D0 D3hot D3cold
[    3.839680] pci 0001:00:00.0: PME# disabled
[    3.845052] pci_bus 0001:00: fixups for bus
[    3.849233] pci 0001:00:00.0: scanning [bus 00-00] behind bridge, pass 0
[    3.855922] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    3.863919] pci 0001:00:00.0: scanning [bus 00-00] behind bridge, pass 1
[    3.870661] pci_bus 0001:01: scanning bus
[    3.874682] pci 0001:01:00.0: [17cb:1103] type 00 class 0x028000
[    3.880698] pci 0001:01:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit]
[    3.887594] pci 0001:01:00.0: PME# supported from D0 D3hot D3cold
[    3.893679] pci 0001:01:00.0: PME# disabled
[    3.927331] pci_bus 0001:01: fixups for bus
[    3.931504] pci_bus 0001:01: bus scan returning with max=01
[    3.937063] pci_bus 0001:01: busn_res: [bus 01-ff] end is updated to 01
[    3.943673] pci_bus 0001:00: bus scan returning with max=01
[    3.949246] pci 0001:00:00.0: BAR 8: assigned [mem 0x38200000-0x383fffff]
[    3.956022] pci 0001:00:00.0: BAR 0: assigned [mem 0x38400000-0x38407fff 64bit]
[    3.963328] pci 0001:01:00.0: BAR 0: assigned [mem 0x38200000-0x383fffff 64bit]
[    3.970635] pci 0001:00:00.0: PCI bridge to [bus 01]
[    3.975590] pci 0001:00:00.0:   bridge window [mem 0x38200000-0x383fffff]
[    3.982378] pci 0001:00:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  256
[    3.990818] pci 0001:01:00.0: Max Payload Size set to  128/ 128 (was  128), Max Read Rq  128
[    3.999319] pcieport 0001:00:00.0: assign IRQ: got 112
[    4.004450] pcieport 0001:00:00.0: enabling device (0000 -> 0002)
[    4.010547] pcieport 0001:00:00.0: enabling bus mastering
[    4.016199] mtk-pcie-gen3 11310000.pcie: msi#0x0 address_hi 0x0 address_lo 0x11310c00 data 0
[    4.024635] mtk-pcie-gen3 11310000.pcie: msi#0x1 address_hi 0x0 address_lo 0x11310c00 data 1
[    4.033062] mtk-pcie-gen3 11310000.pcie: msi#0x2 address_hi 0x0 address_lo 0x11310c00 data 2
[    4.041488] mtk-pcie-gen3 11310000.pcie: msi#0x3 address_hi 0x0 address_lo 0x11310c00 data 3
[    4.049917] mtk-pcie-gen3 11310000.pcie: msi#0x4 address_hi 0x0 address_lo 0x11310c00 data 4
[    4.058342] mtk-pcie-gen3 11310000.pcie: msi#0x5 address_hi 0x0 address_lo 0x11310c00 data 5
[    4.066766] mtk-pcie-gen3 11310000.pcie: msi#0x6 address_hi 0x0 address_lo 0x11310c00 data 6
[    4.075191] mtk-pcie-gen3 11310000.pcie: msi#0x7 address_hi 0x0 address_lo 0x11310c00 data 7
[    4.083617] mtk-pcie-gen3 11310000.pcie: msi#0x8 address_hi 0x0 address_lo 0x11310c00 data 8
[    4.092042] mtk-pcie-gen3 11310000.pcie: msi#0x9 address_hi 0x0 address_lo 0x11310c00 data 9
[    4.100471] mtk-pcie-gen3 11310000.pcie: msi#0xa address_hi 0x0 address_lo 0x11310c00 data 10
[    4.108984] mtk-pcie-gen3 11310000.pcie: msi#0xb address_hi 0x0 address_lo 0x11310c00 data 11
[    4.117496] mtk-pcie-gen3 11310000.pcie: msi#0xc address_hi 0x0 address_lo 0x11310c00 data 12
[    4.126005] mtk-pcie-gen3 11310000.pcie: msi#0xd address_hi 0x0 address_lo 0x11310c00 data 13
[    4.134517] mtk-pcie-gen3 11310000.pcie: msi#0xe address_hi 0x0 address_lo 0x11310c00 data 14
[    4.143029] mtk-pcie-gen3 11310000.pcie: msi#0xf address_hi 0x0 address_lo 0x11310c00 data 15
[    4.151541] mtk-pcie-gen3 11310000.pcie: msi#0x10 address_hi 0x0 address_lo 0x11310c00 data 16
[    4.160140] mtk-pcie-gen3 11310000.pcie: msi#0x11 address_hi 0x0 address_lo 0x11310c00 data 17
[    4.168742] mtk-pcie-gen3 11310000.pcie: msi#0x12 address_hi 0x0 address_lo 0x11310c00 data 18
[    4.177341] mtk-pcie-gen3 11310000.pcie: msi#0x13 address_hi 0x0 address_lo 0x11310c00 data 19
[    4.185937] mtk-pcie-gen3 11310000.pcie: msi#0x14 address_hi 0x0 address_lo 0x11310c00 data 20
[    4.194536] mtk-pcie-gen3 11310000.pcie: msi#0x15 address_hi 0x0 address_lo 0x11310c00 data 21
[    4.203134] mtk-pcie-gen3 11310000.pcie: msi#0x16 address_hi 0x0 address_lo 0x11310c00 data 22
[    4.211733] mtk-pcie-gen3 11310000.pcie: msi#0x17 address_hi 0x0 address_lo 0x11310c00 data 23
[    4.220332] mtk-pcie-gen3 11310000.pcie: msi#0x18 address_hi 0x0 address_lo 0x11310c00 data 24
[    4.228931] mtk-pcie-gen3 11310000.pcie: msi#0x19 address_hi 0x0 address_lo 0x11310c00 data 25
[    4.237530] mtk-pcie-gen3 11310000.pcie: msi#0x1a address_hi 0x0 address_lo 0x11310c00 data 26
[    4.246127] mtk-pcie-gen3 11310000.pcie: msi#0x1b address_hi 0x0 address_lo 0x11310c00 data 27
[    4.254726] mtk-pcie-gen3 11310000.pcie: msi#0x1c address_hi 0x0 address_lo 0x11310c00 data 28
[    4.263325] mtk-pcie-gen3 11310000.pcie: msi#0x1d address_hi 0x0 address_lo 0x11310c00 data 29
[    4.271924] mtk-pcie-gen3 11310000.pcie: msi#0x1e address_hi 0x0 address_lo 0x11310c00 data 30
[    4.280522] mtk-pcie-gen3 11310000.pcie: msi#0x1f address_hi 0x0 address_lo 0x11310c00 data 31
[    4.289419] mtk-pcie-gen3 11310000.pcie: msi#0x0 address_hi 0x0 address_lo 0x11310c00 data 0
[    4.297910] pcieport 0001:00:00.0: PME: Signaling with IRQ 113
[    4.303836] pcieport 0001:00:00.0: AER: enabled with IRQ 113
[    4.309523] pcieport 0001:00:00.0: saving config space at offset 0x0 (reading 0x798814c3)
[    4.317692] pcieport 0001:00:00.0: saving config space at offset 0x4 (reading 0x100406)
[    4.325681] pcieport 0001:00:00.0: saving config space at offset 0x8 (reading 0x6040001)
[    4.333760] pcieport 0001:00:00.0: saving config space at offset 0xc (reading 0x10000)
[    4.341664] pcieport 0001:00:00.0: saving config space at offset 0x10 (reading 0x38400004)
[    4.349916] pcieport 0001:00:00.0: saving config space at offset 0x14 (reading 0x0)
[    4.357560] pcieport 0001:00:00.0: saving config space at offset 0x18 (reading 0x10100)
[    4.365549] pcieport 0001:00:00.0: saving config space at offset 0x1c (reading 0x1f1)
[    4.373367] pcieport 0001:00:00.0: saving config space at offset 0x20 (reading 0x38303820)
[    4.381618] pcieport 0001:00:00.0: saving config space at offset 0x24 (reading 0x1fff1)
[    4.389608] pcieport 0001:00:00.0: saving config space at offset 0x28 (reading 0x0)
[    4.397250] pcieport 0001:00:00.0: saving config space at offset 0x2c (reading 0x0)
[    4.404894] pcieport 0001:00:00.0: saving config space at offset 0x30 (reading 0x0)
[    4.412541] pcieport 0001:00:00.0: saving config space at offset 0x34 (reading 0x80)
[    4.420273] pcieport 0001:00:00.0: saving config space at offset 0x38 (reading 0x0)
[    4.427917] pcieport 0001:00:00.0: saving config space at offset 0x3c (reading 0x20170)

The device I'm expecting to see shows this output in lspci when booting on the 5.4 kernel:

0003:01:00.0 Unassigned class [ff00]: Qualcomm Device 0306
	Subsystem: Qualcomm Device 010c
	Flags: fast devsel
	Memory at 20200000 (64-bit, non-prefetchable) [disabled] [size=4K]
	Memory at 20201000 (64-bit, non-prefetchable) [disabled] [size=4K]
	Capabilities: [40] Power Management version 3
	Capabilities: [50] MSI: Enable- Count=1/32 Maskable+ 64bit+
	Capabilities: [70] Express Endpoint, MSI 00
	Capabilities: [100] Advanced Error Reporting
	Capabilities: [148] Secondary PCI Express
	Capabilities: [168] Physical Layer 16.0 GT/s <?>
	Capabilities: [18c] Lane Margining at the Receiver <?>
	Capabilities: [19c] Transaction Processing Hints
	Capabilities: [228] Latency Tolerance Reporting
	Capabilities: [230] L1 PM Substates
	Capabilities: [240] Data Link Feature <?>

Those errors mentioning "probe failed" with code -110 seem like they might be related.

This is from today's (2024-03-01) nightly downloaded directly from downloads.openwrt.org.

I'm curious if there's any fix for this issue.

OpenWrt version

r25361-a86ff06d2e

OpenWrt release

SNAPSHOT

OpenWrt target/subtarget

mediatek/filogic

Device

Bananapi BPI-R4

Image kind

Official downloaded image

Steps to reproduce

Put a PCIe card in the b key M2 slot, boot up.

Actual behaviour

Card not detected

Expected behaviour

Card is detected (and then drivers load)

Additional info

No response

Diffconfig

No response

Terms

  • I am reporting an issue for OpenWrt, not an unsupported fork.
@mmisiewicz mmisiewicz added the bug issue report with a confirmed bug label Mar 2, 2024
@mmisiewicz
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full boot log attached
r25361-a86ff06d2e boot.txt

@mmisiewicz
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full boot log from bpi stock
bpi-stock.txt

@github-actions github-actions bot added SNAPSHOT target/mediatek pull request/issue for mediatek target Official Image labels Mar 2, 2024
@mmisiewicz
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Reading the lspci output between the bpi and snapshot images, it seems that one of the pci controllers is not being detected under 6.1 kernel. Specifically this one:

0003:00:00.0 PCI bridge: MEDIATEK Corp. Device 7988 (rev 01) (prog-if 00 [Normal decode])

lspci snapshot.txt
lspci bpi image.txt

@mmisiewicz
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mmisiewicz commented Mar 2, 2024 •
edited

Using the command dtc -s -I fs /proc/device-tree -O dts I have diffed the device trees between the sinovoip image and the snapshot device tree. Looking in the PCI section there are some discrepancies. On the sinovoip:

	pcie@11280000 {
		#address-cells = <0x03>;
		#interrupt-cells = <0x01>;
		#size-cells = <0x02>;
		bus-range = <0x00 0xff>;
		clock-names = "pl_250m\0tl_26m\0peri_26m\0top_133m";
		clocks = <0x0d 0x59 0x0d 0x55 0x0d 0x61 0x0d 0x5d>;
		compatible = "mediatek,mt7988-pcie\0mediatek,mt7986-pcie";
		device_type = "pci";
		interrupt-map = <0x00 0x00 0x00 0x01 0x25 0x00 0x00 0x00 0x00 0x02 0x25 0x01 0x00 0x00 0x00 0x03 0x25 0x02 0x00 0x00 0x00 0x04 0x25 0x03>;
		interrupt-map-mask = <0x00 0x00 0x00 0x07>;
		interrupts = <0x00 0xaa 0x04>;
		linux,pci-domain = <0x03>;
		phy-names = "pcie-phy";
		phys = <0x24 0x02>;
		pinctrl-0 = <0x26>;
		pinctrl-names = "default";
		ranges = <0x81000000 0x00 0x20000000 0x00 0x20000000 0x00 0x200000 0x82000000 0x00 0x20200000 0x00 0x20200000 0x00 0x7e00000>;
		reg = <0x00 0x11280000 0x00 0x2000>;
		reg-names = "pcie-mac";
		status = "okay";

		interrupt-controller {
			#address-cells = <0x00>;
			#interrupt-cells = <0x01>;
			interrupt-controller;
			phandle = <0x25>;
		};
	};

On Snapshot:

pcie@11280000 {
			#address-cells = <0x03>;
			#interrupt-cells = <0x01>;
			#size-cells = <0x02>;
			bus-range = <0x00 0xff>;
			clock-names = "pl_250m\0tl_26m\0peri_26m\0top_133m";
			clocks = <0x09 0x5d 0x09 0x59 0x09 0x15 0x09 0x61>;
			compatible = "mediatek,mt7988-pcie\0mediatek,mt7986-pcie\0mediatek,mt8192-pcie";
			device_type = "pci";
			interrupt-map = <0x00 0x00 0x00 0x01 0x1e 0x00 0x00 0x00 0x00 0x02 0x1e 0x01 0x00 0x00 0x00 0x03 0x1e 0x02 0x00 0x00 0x00 0x04 0x1e 0x03>;
			interrupt-map-mask = <0x00 0x00 0x00 0x07>;
			interrupts = <0x00 0xaa 0x04>;
			linux,pci-domain = <0x03>;
			phandle = <0x7c>;
			phy-names = "pcie-phy";
			phys = <0x19 0x02>;
			pinctrl-0 = <0x1d>;
			pinctrl-names = "default";
			ranges = <0x81000000 0x00 0x20000000 0x00 0x20000000 0x00 0x200000 0x82000000 0x00 0x20200000 0x00 0x20200000 0x00 0x7e00000>;
			reg = <0x00 0x11280000 0x00 0x2000>;
			reg-names = "pcie-mac";
			status = "okay";

			interrupt-controller {
				#address-cells = <0x00>;
				#interrupt-cells = <0x01>;
				interrupt-controller;
				phandle = <0x1e>;
			};
		};

Some of the lines that changed seem like they might be the problem. On the sinovoip image:

		clocks = <0x0d 0x59 0x0d 0x55 0x0d 0x61 0x0d 0x5d>;
		compatible = "mediatek,mt7988-pcie\0mediatek,mt7986-pcie";
...
		interrupt-map = <0x00 0x00 0x00 0x01 0x25 0x00 0x00 0x00 0x00 0x02 0x25 0x01 0x00 0x00 0x00 0x03 0x25 0x02 0x00 0x00 0x00 0x04 0x25 0x03>;
...
		phys = <0x24 0x02>;
		pinctrl-0 = <0x26>;
...
			phandle = <0x25>;

these change to the following on snapshot:

			clocks = <0x09 0x5d 0x09 0x59 0x09 0x15 0x09 0x61>;
			compatible = "mediatek,mt7988-pcie\0mediatek,mt7986-pcie\0mediatek,mt8192-pcie";
...
			interrupt-map = <0x00 0x00 0x00 0x01 0x1e 0x00 0x00 0x00 0x00 0x02 0x1e 0x01 0x00 0x00 0x00 0x03 0x1e 0x02 0x00 0x00 0x00 0x04 0x1e 0x03>;
...
			phys = <0x19 0x02>;
			pinctrl-0 = <0x1d>;
...
				phandle = <0x1e>;

So the clocks seem different on the latest snapshot. That might explain the kernel log errors and why the card is not being detected. Specifically, snapshot is missing clock values 0x0d and 0x55. The interrupt map differ on all the pci devices as well, all in the same places with different values.

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bug issue report with a confirmed bug Official Image SNAPSHOT target/mediatek pull request/issue for mediatek target
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