Customize linker for cv32e40p

[saumeister]

Hi,

I'm trying to use the cv32e40p core in a customized system with individual 32 kB memory space for instruction and data memory. However, I do not manage to customize the linker script to create only use signals within this memory space. I use the linker script provided in the bsp folder of the verification core-v-verif repository. The program I intend to initial run is the provided dhrystone.

My inital try was change the MEMORY map to be within my memory size 0x65536
ram (rwxai) : ORIGIN = 0x00000000, LENGTH = 0x64100
dbg (rwxai) : ORIGIN = 0x64200, LENGTH = 0x800

However, when I look at the generated hex_file, some sections are still placed outside my memory map address scope. Does anyone have some pointers to what basics I'm missing to change in the linker script?

Br
Saumeister

[jeremybennett]

Hi @saumeister

Could you post the full linker script and compile command you are using.

Thanks, Jeremy

[saumeister]

Hi @jeremybennett ,

The linker script with my modified additions.
link.ld.tar.gz

I run the command make SIMULATOR=vcs hello-world where hello-world points at dhrystone code in the verif-project.
The useful commands that I find regarding the issue are the following:

/RISCVtoolchain/riscv32pulp/bin/riscv32-unknown-elf-gcc -Os -g -static -mabi=ilp32 -march=rv32imc -Wall -pedantic -o /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.elf \
	-nostartfiles \
	/core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.c -T /core-v-verif-master/cv32/sim/core/../../../cv32/bsp/link.ld -L /core-v-verif-master/cv32/sim/core/../../../cv32/bsp -lcv-verif

and then the following:

/RISCVtoolchain/riscv32pulp/bin/riscv32-unknown-elf-objcopy -O verilog /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.elf /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.hex \
	--change-section-address  .debugger=0x3FC000
/RISCVtoolchain/riscv32pulp/bin/riscv32-unknown-elf-objcopy: --change-section-vma .debugger=0x00000000003fc000 never used
/RISCVtoolchain/riscv32pulp/bin/riscv32-unknown-elf-objcopy: --change-section-lma .debugger=0x00000000003fc000 never used
/RISCVtoolchain/riscv32pulp/bin/riscv32-unknown-elf-readelf -a /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.elf > /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.readelf
/RISCVtoolchain/riscv32pulp/bin/riscv32-unknown-elf-objdump -D /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.elf > /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.objdump
rm /core-v-verif-master/cv32/sim/core/../../../cv32/tests/core/custom/dhrystone.elf

Not sure if this mess of copied commands make sense to you. I can try to make it more clear. The generated files dhrystone.hex, dhrystone.readelf and dhrystone.objdump.
dhrystone.tar.gz

[jeremybennett]

@saumeister Apologies for letting this languish. I can't immediately see the problem. You might find you can get an answer by asking on the TWG : Verification channel on Mattermost.