{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":121766405,"defaultBranch":"master","name":"pveclib","ownerLogin":"munroesj52","currentUserCanPush":false,"isFork":true,"isEmpty":false,"createdAt":"2018-02-16T15:28:52.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/34114849?v=4","public":true,"private":false,"isOrgOwned":false},"refInfo":{"name":"","listCacheKey":"v0:1716590162.0","currentOid":""},"activityList":{"items":[{"before":"910c3d7a6dd6a3c49b232188642a84204a71f367","after":"568b0d16ce8bb572c4d766739a7197194b3f93cc","ref":"refs/heads/master","pushedAt":"2024-05-31T15:44:04.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #192 from munroesj52/float128-divo\n\nPower9 provides round to odd versions for the QP arithmetic operations.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2317870448\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/192\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/192/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/192\">open-power-sdk#192</a> from munroesj52/float128-divo"}},{"before":"910c3d7a6dd6a3c49b232188642a84204a71f367","after":"c054b4d90fa7485bf6a8d043b8ed5b7cc93aeea6","ref":"refs/heads/float128-divo","pushedAt":"2024-05-26T18:02:50.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Power9 provides round to odd versions for the QP arithmetic operations.\nThis patch provides P9/8 implementation for Divide QP with round to\nodd. Includes compile, unit, and performance tests.\n\n\t* src/pveclib/vec_f128_ppc.h: Update into documentation for\n\tsoft-float implementation.\n\t[f128_softfloat_0_0_3_6]: New subsubsection for Divide QP.\n\t[f128_softfloat_0_0_3_6_0, f128_softfloat_0_0_3_6_1,\n\tf128_softfloat_0_0_3_6_2]: New paragraph for; Soft-float\n\tdivide QP, Special value handling, and custom divide\n\textended.\n\t(vec_diveuqo_inline): New inline implementation.\n\t(vec_xsdivqpo): New dynamic call IFUNC implementation.\n\t(vec_xsdivqpo_inline): New inline implementation.\n\n\t* src/vec_f128_runtime.c (vec_xsdivqpo):\n\tNew runtime implementation.\n\t* src/vec_runtime_DYN.c (vec_xsdivqpo):\n\tNew CPU impementation externs and resolver.\n\n\t* src/testsuite/arith128_test_f128.c (test_div_qpo,\n\ttest_div_qpo_xtra): Call new unit tests.\n\t* src/testsuite/arith128_test_qpo.c (db_vec_diveuqo):\n\tNew debug implementation.\n\t(test_div_qpo, test_div_qpo_xtra): New unit tests.\n\t* src/testsuite/arith128_test_qpo.h\n\t(test_div_qpo, test_div_qpo_xtra): New extern.\n\n\t* src/testsuite/vec_f128_dummy.c (test_vec_diveuqo,\n\ttest_vec_diveuqo_V0): New compile tests.\n\t(test_vec_xsdivqpo, test_vec_divqpo, test_vec_divqpo_V1,\n\ttest_vec_divqpo_V0): New compile tests.\n\t(test_gcc_divqpn_f128): Timed test kernel.\n\t* src/testsuite/vec_pwr10_dummy.c (test_diveuqo_PWR10,\n\ttest_vec_diveuqo_PWR10, test_divdqu_rto_PWR10):\n\tNew compile tests\n\n\t* testsuite/pveclib_perf.c (test_time_f128):\n\tAdd timed tests for timed_gcc_divqpn_f128, timed_lib_divqpo_f128.\n\t* src/testsuite/vec_perf_f128.c: Additional _Float128 constants.\n\t(test_lib_divqpo_f128): New Timed test kernel.\n\t(timed_lib_divqpo_f128, timed_gcc_divqpn_f128): New Timed tests.\n\t* src/testsuite/vec_perf_f128.h\n\t(timed_gcc_divqpn_f128, timed_lib_divqpo_f128):\n\tNew timed tests externs.\n\n\t* src/testsuite/arith128_test_i128.c: Wall source clean up.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Power9 provides round to odd versions for the QP arithmetic operations."}},{"before":null,"after":"910c3d7a6dd6a3c49b232188642a84204a71f367","ref":"refs/heads/float128-divo","pushedAt":"2024-05-24T22:36:02.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #191 from vidraj/swap-isalpha-docstring\n\nFix swapped docstrings of isalpha and isalnum","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2279478121\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/191\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/191/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/191\">open-power-sdk#191</a> from vidraj/swap-isalpha-docstring"}},{"before":"aca8b7428a9b94fea86b9fce5e46b36ea1f1497c","after":"910c3d7a6dd6a3c49b232188642a84204a71f367","ref":"refs/heads/master","pushedAt":"2024-05-24T20:22:53.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #191 from vidraj/swap-isalpha-docstring\n\nFix swapped docstrings of isalpha and isalnum","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2279478121\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/191\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/191/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/191\">open-power-sdk#191</a> from vidraj/swap-isalpha-docstring"}},{"before":"7cddb170a3582579b39c1b4d291fb3bc32b1e0be","after":"aca8b7428a9b94fea86b9fce5e46b36ea1f1497c","ref":"refs/heads/master","pushedAt":"2024-03-02T01:04:33.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #190 from munroesj52/intlib_div128\n\nAdd P7/8/9/10 divide/modulo quadword operations to libraries.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2139684621\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/190\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/190/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/190\">open-power-sdk#190</a> from munroesj52/intlib_div128"}},{"before":"7cddb170a3582579b39c1b4d291fb3bc32b1e0be","after":"a2a0317a8aa56c58eb49eee6bc3b28bd363afcd5","ref":"refs/heads/intlib_div128","pushedAt":"2024-02-17T00:38:02.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Add P7/8/9/10 divide/modulo quadword operations to libraries.\n\nPOWER10 added vector divide/divide-extended/modulo instructions.\nThis patch adds static and IFUNC enabled dynamic callable functions\nto the PVECLIB executable library. This is restricted to the subset\nof operations that have significant code size or runtime.\nThis is basically the divide/modulo operations; vec_divduq, vec_diveuq,\nvec_divdqu, vec_divuq, vec_modduq, vec_moduq.\n\n\t* src/Makefile.am: Add vec_int128_runtime.c to dependency for PWR\n\tlibrary builds. Add Automake regenerated.\n\t* src/Makefile.in: Automake regenerated.\n\n\t* src/pveclib/vec_int128_ppc.h: Update copyright dates.\n\tVarious doxygen text updates for POWER10. Includes correcting the\n\tspelling of vec_diveuq many times. Also renamed __VEC_U_128P to\n\tthe more descriptive __VEC_U_128RQ.\n\t[__VEC_U_128RQ]: Renamed from __VEC_U_128P.\n\t(vec_vmulhud_inline, vec_vmulld_inline):\n\tNew Forward function prototypes.\n\t(vec_divdqu, vec_divduq, vec_diveuq, vec_divuq, vec_modduq,\n\tvec_moduq):\n\tNew extern for dynamic library functions.\n\t(vec_divdqu_inline, vec_divduq_inline, vec_modduq_inline):\n\tRenamed static inline.\n\t(vec_msumcud): Use vec_vmsumcud_inline as primary implementation.\n\t(vec_msumudm): Use vec_vmsumudm_inline as primary implementation.\n\t(vec_mulhud): Use vec_vmulhud_inline as primary implementation.\n\t(vec_muludm): Use vec_vmulld_inline as primary implementation.\n\t(vec_rlqi, vec_srqi): Move octet (shb % 8) == 0) rotate code before\n\t_ARCH_PWR10 specific. Optimise for instruction immediate.\n\t(vec_sraqi): Wall clean up.\n\t(vec_vdiveuq_inline): Correct operation name.\n\t(vec_vmulld_inline): Replace shift/rotate by 32-bits with merge\n\tword to avoid rodata const loads.\n\t(vec_vmsumudm_inline): Use _ARCH_PWR10 enabled vec_vmuleud and\n\tvec_vmuloud.\n\n\t* src/testsuite/arith128_test_i128.c: Correcting spelling\n\tof vec_diveuq many times.\n\t[__VEC_PWR_IMP()]:\n\tDefine extern and map unit tests to library implementations.\n\t(__VEC_U_128RQ): Changes to use new typedef and R/Q fields.\n\n\t* src/testsuite/vec_int128_dummy.c\n\t(test_diveuq): Rename from test_divuqe.\n\t(test_divduq): Use vec_divduq_inline.\n\t(test_modduq): Use vec_modduq_inline.\n\t(test_vec_diveuq): Rename from test_vec_divuqe.\n\t(test_vec_divdqu): Rename return type to __VEC_U_128RQ and use R/Q\n\tfields.\n\t(test_vec_modduq): Replace test_vec_divuqe with test_vec_diveuq.\n\t* src/testsuite/vec_pwr10_dummy.c\n\t(test_diveuq_PWR10): Rename from test_divuqe_PWR10.\n\t(test_divdqu_PWR10, test_vec_moddivduq_PWR10): Rename return type\n\tto __VEC_U_128RQ and use R/Q fields.\n\t* src/testsuite/vec_pwr9_dummy.c\n\t(test_diveuq_PWR9): Rename from test_divuqe_PWR9.\n\t(test_divdqu_PWR9, test_vec_moddivduq_PWR9): Rename return type\n\tto __VEC_U_128RQ and use R/Q fields.\n\n\t* src/testsuite/vec_perf_i128.c\n\t(__VEC_U_128RQ): Changes to use new typedef and R/Q fields.\n\t[__VEC_PWR_IMP()]:\n\tDefine extern and map timed tests to library implementations.\n\n\t* src/vec_int128_runtime.c: New file.\n\t* src/vec_runtime_DYN.c: Include <pveclib/vec_int128_ppc.h>.\n\t[VEC_INT128_LIB_LIST(_TARGET)]:\n\tDefine list of int128 target specific functions.\n\t[PVECLIB_DISABLE_POWER7]: Add VEC_INT128_LIB_LIST (_PWR7).\n\tAdd VEC_INT128_LIB_LIST (_PWR8).\n\t[PVECLIB_DISABLE_POWER9]: Add VEC_INT128_LIB_LIST (_PWR9).\n\t[PVECLIB_DISABLE_POWER10]: Add VEC_INT128_LIB_LIST (_PWR10).\n\t[VEC_RESOLVER_2]: vec_diveuq, vec_divuq, vec_moduq.\n\t[VEC_RESOLVER_3]: vec_divdqu, vec_divduq, vec_modduq.\n\t* src/vec_runtime_PWR10.c: Include vec_int128_runtime.c.\n\t* src/vec_runtime_PWR7.c: Include vec_int128_runtime.c.\n\t* src/vec_runtime_PWR8.c: Include vec_int128_runtime.c.\n\t* src/vec_runtime_PWR9.c: Include vec_int128_runtime.c.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Add P7/8/9/10 divide/modulo quadword operations to libraries."}},{"before":null,"after":"7cddb170a3582579b39c1b4d291fb3bc32b1e0be","ref":"refs/heads/intlib_div128","pushedAt":"2024-02-16T18:42:49.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #188 from munroesj52/intlib_div64\n\nAdd P7/8/9/10 divide/modulo doubleword operations to libraries.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2111066717\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/188\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/188/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/188\">open-power-sdk#188</a> from munroesj52/intlib_div64"}},{"before":"06795e22b47477a902cd2d9b115eacb44d2dea2b","after":"7cddb170a3582579b39c1b4d291fb3bc32b1e0be","ref":"refs/heads/master","pushedAt":"2024-02-16T18:23:58.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #188 from munroesj52/intlib_div64\n\nAdd P7/8/9/10 divide/modulo doubleword operations to libraries.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2111066717\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/188\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/188/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/188\">open-power-sdk#188</a> from munroesj52/intlib_div64"}},{"before":"06795e22b47477a902cd2d9b115eacb44d2dea2b","after":"340ecff86ca05e39ebfe87d52975b3dfb1b6c4a2","ref":"refs/heads/intlib_div64","pushedAt":"2024-01-31T22:11:17.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Add P7/8/9/10 divide/modulo doubleword operations to libraries.\n\nPOWER10 added vector divide/divide-extended/modulo instructions.\nThis patch adds static and IFUNC enabled dynamic callable functions\nto the PVECLIB executable library. This is restricted to the subset\nof operations that have significant code size or runtime.\nThis is basically the divide/modulo operations; vec_divdud, vec_diveud,\nvec_divqud, vec_divud, vec_moddud, vec_modud.\n\n\t* configure: Autoreconf regenerated.\n\t* Makefile.in: Automake regenerated.\n\t* aclocal.m4: Automake regenerated.\n\t* src/Makefile.am: Add vec_int64_runtime.c to dependency for PWR\n\tlibrary builds. Add Automake regenerated.\n\t* src/Makefile.in: Automake regenerated.\n\n\t* src/pveclib/vec_int64_ppc.h: Update copyright dates.\n\tVarious doxygen text updates for POWER10.\n\t(vec_mrgahd, vec_mrgald): New Forward function prototypes.\n\t(vec_divdud, vec_diveud, vec_divqud):\n\tNew extern for dynamic library functions.\n\t(vec_divqud_inline): Doxygen text note about usage in quadword\n\tlong division implementations.\n\t(vec_divqud_inline [(_ARCH_PWR10) && (__GNUC__ >= 12)]):\n\tPOWER10 specific implementation using intrinsics.\n\t(vec_divud, vec_moddud, vec_modud):\n\tNew extern for dynamic library functions.\n\n\t* src/testsuite/arith128_test_i64.c [__VEC_PWR_IMP()]:\n\tDefine extern and map unit tests to library implementations.\n\t* src/testsuite/vec_int64_dummy.c: Update copyright dates.\n\t(test_vec_divqud [(_ARCH_PWR10) && (__GNUC__ >= 12)]):\n\tPOWER10 specific implementation using intrinsics.\n\t* src/testsuite/vec_perf_i128.c [__VEC_PWR_IMP()]:\n\tDefine extern and map timed tests to library implementations.\n\t* src/testsuite/vec_pwr10_dummy.c\n\t(test_vec_rlqi_64_PWR10, test_vec_slqi_64_PWR10,\n\ttest_vec_sraqi_64_PWR10, test_vec_srqi_64_PWR10):\n\tNew compile tests for doubleword shift/rotates special case.\n\t(test_vec_divqud_PWR10): New compile test.\n\tPOWER10 specific implementation using intrinsics.\n\n\t* src/vec_int64_runtime.c: New file.\n\t* src/vec_runtime_DYN.c: Include <pveclib/vec_int64_ppc.h>.\n\t[VEC_INT64_LIB_LIST(_TARGET)]:\n\tDefine list of int64 target specific functions.\n\t[PVECLIB_DISABLE_POWER7]: Add VEC_INT64_LIB_LIST (_PWR7).\n\tAdd VEC_INT64_LIB_LIST (_PWR8).\n\t[PVECLIB_DISABLE_POWER9]: Add VEC_INT64_LIB_LIST (_PWR9).\n\t[PVECLIB_DISABLE_POWER10]: Add VEC_INT64_LIB_LIST (_PWR10).\n\t[VEC_RESOLVER_2]: vec_diveud, vec_divqud, vec_divud, vec_modud.\n\t[VEC_RESOLVER_3]: vec_divdud, vec_moddud.\n\t* src/vec_runtime_PWR10.c: Include vec_int64_runtime.c.\n\t* src/vec_runtime_PWR7.c: Include vec_int64_runtime.c.\n\t* src/vec_runtime_PWR8.c: Include vec_int64_runtime.c.\n\t* src/vec_runtime_PWR9.c: Include vec_int64_runtime.c.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Add P7/8/9/10 divide/modulo doubleword operations to libraries."}},{"before":null,"after":"06795e22b47477a902cd2d9b115eacb44d2dea2b","ref":"refs/heads/intlib_div64","pushedAt":"2024-01-31T20:26:16.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #187 from munroesj52/power10-div128\n\nAdd P10 divide/modulo operations for quadword.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2098632665\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/187\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/187/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/187\">open-power-sdk#187</a> from munroesj52/power10-div128"}},{"before":"0a78426ce368eddc055491fb42c55ca415ae3f82","after":"06795e22b47477a902cd2d9b115eacb44d2dea2b","ref":"refs/heads/master","pushedAt":"2024-01-31T16:25:52.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #187 from munroesj52/power10-div128\n\nAdd P10 divide/modulo operations for quadword.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"2098632665\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/187\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/187/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/187\">open-power-sdk#187</a> from munroesj52/power10-div128"}},{"before":"0a78426ce368eddc055491fb42c55ca415ae3f82","after":"f0934f74794aa49c7a39e8dd4fab99d9881e7261","ref":"refs/heads/power10-div128","pushedAt":"2024-01-24T16:21:41.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Add P10 divide/modulo operations for quadword.\n\nPOWER10 added vector divde/divide-extended/modulo instructions.\nThis is the initial patch for the quadword implementations.\nAlso some general Wall fixups and latent compile error fixes.\nA later patch will add the platform specific implementations for\nstatic and IFUNC enabled dynamic libraries.\n\n\t* doc/pveclib-doxygen-pveclib.doxy [FORMULA_TRANSPARENT,\n\tLATEX_SOURCE_CODE, CLASS_DIAGRAMS, DOT_FONTNAME, DOT_FONTSIZE,\n\tDOT_TRANSPARENT]: Remove tags that are no longer support is recent\n\tdoxygen versions.\n\t* doc/pveclibmaindox.h: Escape \\# for pragma to fix formating.\n\n\t* src/pveclib/vec_int128_ppc.h: Update copyright year.\n\tGeneral doxygen text updates, mostly POWER10 related.\n\t[int128_multiply_0_1]: New Subsection Implementing Quadword\n\tMultiply.\n\t[int128_multiply_0_1_0_0]: New subsubsection POWER7/8\n\tImplementation of Quadword Multiply.\n\t[int128_multiply_0_1_0_1]: New subsubsection POWER9/10\n\tImplementation of Quadword Multiply.\n\t[int128_multiply_0_1_1]: New subsubsection Implementing\n\tQuadword Multiply High.\n\t[int128_multiply_0_1_2]: New subsubsection Implementing\n\tQuadword Multiply Low.\n\t[int128_multiply_0_1_3]: New subsubsection Implementing\n\tQuadword Multiply with double Quadword result.\n\t[int128_Divide_0_1]: New subsection Implementing Quadword\n\tDivide/Modulo.\n\t[int128_Divide_0_1_1]: New subsubsection Vectorizable Divide\n\timplementations.\n\t[int128_Divide_0_1_1_1]: New paragraph Vectorized Shift-Subtract\n\tQuadword Divide.\n\t[int128_Divide_0_1_1_2]: New paragraph Vectorized Quadword Long\n\tdivision.\n\t[int128_Divide_0_1_1_3]: New paragraph Divide Quadword\n\timplementation.\n\t[int128_Divide_0_1_1_4]: New paragraph Divide Extended Quadword\n\timplementation.\n\t[int128_Divide_0_1_1_5]: New paragraph Quadword Modulo\n\timplementation.\n\t[int128_Divide_0_1_1_6]: New paragraph Double Quadword Divide\n\timplementation.\n\t(__VEC_U_128P): New type quadword integer pair.\n\t(vec_vdivuqe_inline, vec_vdivuq_inline, vec_vmoduq_inline,\n\tvec_divdqu_inline, vec_seluq, vec_vmsumcud_inline,\n\tvec_vmsumudm_inline): New Forward function prototypes.\n\t(vec_divduq, vec_divuqe, vec_divuq): New functions.\n\t(vec_divdqu_inline, vec_modduq, vec_moduq): New functions.\n\t(vec_msumudm): Update brief description.\n\t(vec_mulhuq): Update brief description.\n\t(vec_mulhuq [_ARCH_PWR10]): Add POWER10 specific implementation.\n\t(vec_mulluq): Update brief description.\n\t(vec_mulhuq [_ARCH_PWR9]): Update POWER9 specific implementation.\n\t(vec_muludq): Update brief description.\n\t(vec_muludq [_ARCH_PWR10]): Add POWER10 specific implementation.\n\t(vec_muludq [_ARCH_PWR9]): Update POWER9 specific implementation.\n\t(vec_slqi [_ARCH_PWR10]): Fix for POWER10 specific implementation.\n\t(vec_vdivuqe_inline, vec_vdivuq_inline, vec_vmoduq_inline):\n\tNew functions.\n\t(vec_vmuleud): Update brief description.\n\t(vec_vmulhud_inline): New functions.\n\t(vec_vmulld_inline): Add POWER10 specific implementation.\n\t(vec_vmuloud): Update brief description.\n\t(vec_vmsumcud_inline, vec_vmsumudm_inline): New functions.\n\n\t* src/pveclib/vec_int64_ppc.h[i64_missing_ops_0_2_2_1]:\n\tAdd ref to doxygen description.\n\t(vec_divqud_inline [_ARCH_PWR9]):Fix for POWER9 specific compiler\n\tissue.\n\t(vec_moddud_inline): Fix Wall warning.\n\n\t* src/testsuite/arith128_test_i128.c (db_vec_divuqe, db_vec_divuq,\n\tdb_vec_divdqu, db_vec_moduq): New dubug functions.\n\t(test_vec_divide_QW, test_vec_modulo_QW, test_vec_moddiv_QW,\n\ttest_vec_divext_QW, est_vec_div1_QW, test_vec_div_QW):\n\tNew unit test functions.\n\t(test_vec_i128): Call new unit tests from driver.\n\n\t* src/testsuite/arith128_test_i512.c (test_mul512x128):\n\tAdditional cases for unit test.\n\n\t* src/testsuite/vec_f128_dummy.c (test_vec_msubqpo);\n\t Fix Wall warning.\n\t* src/testsuite/vec_int128_dummy.c (test_divuqe, test_divuq,\n\ttest_moduq, test_divduq, test_modduq, test_divdqu):\n\tInline expantion compile test.\n\t(test_vec_mulqud, test_vec_xxx; test_vec_xxx_V2, test_vec_xxx_V1,\n\ttest_vec_xxx_V0): compile tests.\n\t(test_vec_divuqe, test_vec_divuq, test_vec_divduq,\n\ttest_vec_divdqu): Implementation compile tests.\n\t(test_vec_udivqi3): compile tests.\n\t(test_vec_moduq, test_vec_modduq): Implementation compile tests.\n\t(__test_cmsumudm_V2): compile tests.\n\t* src/testsuite/vec_int64_dummy.c\n\t(test_vec_divude, test_vec_divdud_V1[_ARCH_PWR8]):\n\tFix Wall warnings.\n\t* src/testsuite/vec_pwr10_dummy.c (test_divuqe_PWR10,\n\tvec_vdivuqe_inline, test_divuq_PWR10, test_moduq_PWR10,\n\ttest_divduq_PWR10, test_modduq_PWR10, test_vec_mulqud_PWR10):\n\tImplementation compile tests.\n\t(__test_splatudi_12_PWR10 [_ARCH_PWR10 && (__GNUC__ > 11)]):\n\tGuard using intrinsic vec_splati for compiler support.\n\t(test_gcc_cmpsq_all_gt_PWR10, test_gcc_cmpsq_gt_PWR10\n\t[_ARCH_PWR10 && (__GNUC__ > 11)]):\n\tGuard using intrinsic ec_cmpgt for signed __int128\n\tfor compiler support.\n\t(__test_cmsumudm_V2_PWR10, test_vec_slqi_8_PWR10):\n\tImplementation compile tests.\n\t(__test_mulluq_V1_PWR10, __test_muludq_V1_PWR10,\n\ttest_vec_moddivduq_PWR10): Compile test for code generation.\n\t* src/testsuite/vec_pwr9_dummy.c (test_vec_msubqpo_PWR9):\n\tFix Wall warning.\n\t(__test_cmsumudm_V2_PWR10, __test_mulhuq_x_PWR9,\n\t__test_mulluq_V1_PWR9, __test_muludq_w_PWR9):\n\tCompile test for code generation.\n\t(test_divuqe_PWR9, test_divuq_PWR9, test_moduq_PWR9,\n\ttest_divduq_PWR9, test_modduq_PWR9, test_divdqu_PWR9):\n\tImplementation compile tests.\n\t(test_vec_moddivduq_PWR9):\n\tCompile test for code generation.\n\n\t* src/testsuite/pveclib_perf.c ()test_time_i128):\n\tAdd timed tests for quadword divide.\n\t* src/testsuite/vec_perf_i128.c (c152): Constant 10**152-1.\n\t(timed_vec_divdqu, timed_vec_divuqe, timed_vec_divuq,\n\ttimed_vec_divuq2): Timed test for new PVEVLIB functions.\n\t(timed_gcc_divuq, timed_gcc_divuq2): Timed libgcc functions\n\tfor comparison.\n\t(test_divdqu): Timed test for new PVEVLIB functions.\n\t(timed_divmodud): Fix Wall warnings.\n\t* src/testsuite/vec_perf_i128.h (timed_vec_divdqu,\n\ttimed_vec_divuqe, timed_vec_divuq, timed_vec_divuq2,\n\ttimed_gcc_divuq, timed_gcc_divuq2): New externs for timed tests.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Add P10 divide/modulo operations for quadword."}},{"before":null,"after":"0a78426ce368eddc055491fb42c55ca415ae3f82","ref":"refs/heads/power10-div128","pushedAt":"2024-01-23T21:01:02.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #184 from munroesj52/power10-div64\n\nAdd P10 divide/modulo operations for doubleword.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1923087061\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/184\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/184/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/184\">open-power-sdk#184</a> from munroesj52/power10-div64"}},{"before":"2fc8ae1f8ae17ed7814b8daa284e2a290bc4d223","after":"0a78426ce368eddc055491fb42c55ca415ae3f82","ref":"refs/heads/master","pushedAt":"2023-10-04T20:47:15.000Z","pushType":"push","commitsCount":4,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #184 from munroesj52/power10-div64\n\nAdd P10 divide/modulo operations for doubleword.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1923087061\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/184\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/184/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/184\">open-power-sdk#184</a> from munroesj52/power10-div64"}},{"before":"2fc8ae1f8ae17ed7814b8daa284e2a290bc4d223","after":"8b680753c44746a3ec75231a64db52a98bbb446a","ref":"refs/heads/power10-div64","pushedAt":"2023-10-03T01:03:10.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Add P10 divide/modulo operations for doubleword.\n\nPOWER10 added vector divde/divide-extended/modulo instrictions.\nThis is the initial patch for the doubleword implementations.\nA later patch will add the platform specific implementations for\nstatic and IFUNC enabled dynamic libraries.\n\n\t* src/pveclib/vec_int64_ppc.h: General updates.\n\t[i64_missing_ops_0_0_PWR8]: New subsection \"POWER8\" header.\n\t[i64_missing_ops_0_0_PWR9]: New subsection \"POWER9\" header.\n\t[i64_missing_ops_0_0_PWR10: New subsection \"POWER10\" header.\n\t[i64_missing_ops_0_1]: New subsection test\n\t\"Challenges and opportunities\".\n\t[i64_missing_ops_0_2_1]: Update subsubsection\n\t\"Doubleword integer multiplies\". General updates.\n\t[i64_missing_ops_0_2_2]: New subsubsection text\n\t\"Doubleword Integer Divide/Modulo\".\n\t[i64_missing_ops_0_2_2_0]: New paragraph text\n\t\"Vectorizable Divide implementations\".\n\t[i64_missing_ops_0_2_2_1]: New paragraph text\n\t\"Vectorized Shift-Subtract Divide\".\n\t[i64_missing_ops_0_2_2_2]: New paragraph text\n\t\"Transfer Vector elements for scalar divide\".\n\t[i64_missing_ops_0_2_2_3]: New paragraph text\n\t\"Special consideration for POWER7 and earlier\".\n\t(vec_divqud_inline, vec_muludm, vec_pasted, vec_mrghd, vec_mrgld,\n\tvec_swapd, vec_rldi, vec_selud, vec_setb_sd, vec_sldi,\n\tvec_splat_u64, vec_splatd, vec_vdiveud_inline, vec_vdivud_inline\n\t[@cond INTERNAL]): Forward declares added.\n\t(vec_divdud_inline, vec_divqud_inline): New inline functions.\n\t(vec_maxsd, vec_maxud [(__GNUC__ >= 10)]): Use vec_max intrinsic.\n\t(vec_minsd, vec_minud [(__GNUC__ >= 10)]): Use vec_min intrinsic.\n\t(vec_moddud_inline): New inline function.\n\t(vec_msumudm, vec_muleud, vec_mulhud, vec_muloud, vec_muludm):\n\tCorrect copybrief refs.\n\t(vec_setb_sd [(__GNUC__ >= 12)]): Use vec_expandm intrinsic.\n\t(vec_vdiveud_inline, vec_vdivud_inline): New inline functions.\n\t(vec_vmadd2eud, vec_vmaddeud, vec_vmadd2oud, vec_vmaddoud):\n\tCorrect copybrief refs.\n\t(vec_vmodud_inline): New inline function.\n\t(vec_vmuleud, vec_vmuloud, vec_vmsumeud, vec_vmsumoud):\n\tCorrect copybrief refs.\n\n\t* src/testsuite/arith128_test_i64.c\n\t(db_vec_modud, db_vec_divqud): New debug function.\n\t(test_vec_divide_dw, test_vec_modulo_dw, test_vec_divide_qud):\n\tNew unit test functions.\n\t(test_vec_i64): Add new unit test to driver.\n\n\t* src/testsuite/pveclib_perf.c (test_time_i128):\n\tAdd new timed tests to driver.\n\t* src/testsuite/vec_perf_i128.c (timed_divmodud,\n\ttimed_lib_divmodud, timed_divqud): New timed test functions.\n\t* src/testsuite/vec_perf_i128.h (timed_divmodud,\n\ttimed_lib_divmodud, timed_divqud): New timed test externs.\n\n\t* src/testsuite/vec_int64_dummy.c (test_divdud, test_moddud,\n\ttest_divqud, test_divud, test_divude, test_modud, test_divmodud,\n\ttest_divmoddud): New compile tests.\n\t(test_vec_divud, test_vec_divude, test_vec_modud,\n\ttest_vec_divmodud_V1, test_vec_divmodud_V0, test_vec_divdud,\n\ttest_vec_moddud, test_vec_divdud_V1, test_vec_divdud_V0,\n\ttest_vec_divqud, test_vec_divmoddud, test_vec_divmoddud_V0):\n\tExperimental compile tests.\n\n\t* src/testsuite/vec_pwr10_dummy.c (test_divmodud_PWR10,\n\ttest_divqud_PWR10, test_vec_divud_PWR10, test_vec_divude_PWR10,\n\ttest_vec_modud_PWR10, test_vec_divdud_PWR10): New compile tests.\n\n\t* src/testsuite/vec_pwr9_dummy.c (test_divmodud_PWR9,\n\ttest_divqud_PWR9, test_vec_divud_PWR9, test_vec_divude_PWR9,\n\ttest_vec_modud_PWR9, test_vec_divqud_PWR9, test_vec_divdud_PWR9):\n\tNew compile tests.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Add P10 divide/modulo operations for doubleword."}},{"before":null,"after":"2fc8ae1f8ae17ed7814b8daa284e2a290bc4d223","ref":"refs/heads/power10-div64","pushedAt":"2023-10-02T21:37:58.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #181 from munroesj52/float128-lib\n\nAdd QP round-to-odd operations to runtime library. Close #178.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1837893379\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/181\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/181/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/181\">open-power-sdk#181</a> from munroesj52/float128-lib"}},{"before":"2fc8ae1f8ae17ed7814b8daa284e2a290bc4d223","after":"16e25a09b0194c821d4cd56e346c7b9a728b2042","ref":"refs/heads/power10-intrin","pushedAt":"2023-10-02T21:34:45.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Update for POWER10 Intrinsic support.\n\nThe initial P10 code used inline asm as the GCC intrinsic support was\nnot complete. With the latest compilers vector intrinsic are (mostly)\ncomplete. It is better to use the vector instinsics when available.\n\n\t* src/pveclib/vec_char_ppc.h (vec_absdub): Use vec_absdb intrinsic,\n\tif defined.\n\t(vec_setb_sb [__GNUC__ >= 12]): Use vec_expandm intrinsic for\n\tGCC 12 and later.\n\n\t* src/pveclib/vec_f128_ppc.h (vec_xscvuqqp, vec_xsmaddqpo,\n\tvec_xsmaddqpo_inline, vec_xsmsubqpo): Update doxygen comments.\n\n\t* src/pveclib/vec_int128_ppc.h (vec_msumcud [__GNUC__ >= 12]):\n\tUse vec_msumc intrinsic for GCC 12 and later.\n\t(vec_msumudm [__GNUC__ >= 12]):\n\tUse vec_msum intrinsic for GCC 12 and later.\n\t(vec_mulhud [__GNUC__ >= 12]):\n\tUse vec_mulh intrinsic for GCC 12 and later.\n\t(vec_muloud): Update doxygen comments.\n\t(vec_muludm [__GNUC__ >= 12]):\n\tUse vec_mul intrinsic for GCC 12 and later.\n\t(vec_rlq [__GNUC__ >= 12]):\n\tUse vec_rl intrinsic for GCC 12 and later.\n\t(vec_rlqi [__GNUC__ >= 12]):\n\tUse vec_rl intrinsic for GCC 12 and later.\n\t(vec_setb_sq [__GNUC__ >= 12]): Use vec_expandm intrinsic for\n\tGCC 12 and later.\n\t(vec_slq [__GNUC__ >= 12]):\n\tUse vec_sl intrinsic for GCC 12 and later.\n\t(vec_slqi [__GNUC__ >= 12]):\n\tUse vec_sl intrinsic for GCC 12 and later.\n\t(vec_sraq [__GNUC__ >= 12]):\n\tUse vec_sra intrinsic for GCC 12 and later.\n\t(vec_sraqi [__GNUC__ >= 12]):\n\tUse vec_sra intrinsic for GCC 12 and later.\n\t(vec_srq [__GNUC__ >= 12]):\n\tUse vec_sr intrinsic for GCC 12 and later.\n\t(vec_srqi [__GNUC__ >= 12]):\n\tUse vec_sr intrinsic for GCC 12 and later.\n\t(vec_subcuq [__GNUC__ >= 12]):\n\tUse vec_subc intrinsic for GCC 12 and later.\n\t(vec_subecuq [__GNUC__ >= 12]):\n\tUse vec_subec intrinsic for GCC 12 and later.\n\t(vec_subeuqm [__GNUC__ >= 12]):\n\tUse vec_sube intrinsic for GCC 12 and later.\n\t(vec_subuqm [__GNUC__ >= 12]):\n\tUse vec_sub intrinsic for GCC 12 and later.\n\t(vec_vmuleud [_ARCH_PWR10  && (__GNUC__ >= 10]):\n\tUse vec_mule/vec_mulo intrinsic for GCC 12 and later.\n\t[_ARCH_PWR9  && (__GNUC__ >= 12]:\n\tUse vec_msub intrinsic for GCC 12 and later.\n\t(vec_vmuloud [_ARCH_PWR10  && (__GNUC__ >= 10]):\n\tUse vec_mule/vec_mulo intrinsic for GCC 12 and later.\n\t[_ARCH_PWR9  && (__GNUC__ >= 12]:\n\tUse vec_msub intrinsic for GCC 12 and later.\n\t(vec_vsldbi [__GNUC__ >= 12]):\n\tUse vec_sldb intrinsic for GCC 12 and later.\n\t(vec_vsrdbi [__GNUC__ >= 12]):\n\tUse vec_srdb intrinsic for GCC 12 and later.\n\n\t* src/pveclib/vec_int16_ppc.h\n\t(vec_setb_sh [__GNUC__ >= 12]): Use vec_expandm intrinsic for\n\tGCC 12 and later.\n\n\t* src/pveclib/vec_int32_ppc.h\n\t(vec_setb_sw [__GNUC__ >= 12]): Use vec_expandm intrinsic for\n\tGCC 12 and later.\n\t(vec_vmadd2euw, vec_vmadd2ouw, vec_vmaddeuw, vec_vmaddouw,\n\tvec_vmsumuwm): Correct doxygen syntax for copybrief.\n\n\t* src/pveclib/vec_int512_ppc.h: Update doxygen note.\n\n\t* src/testsuite/arith128_test_bcd.c (test_setb_bcdinv):\n\tAnnotate check failure text with testcase number.\n\t(test_bcd_cadde256):\n\tAnnotate check failure text with testcase number.\n\t(test_bcd_caddec256):\n\tAnnotate check failure text with testcase number.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Update for POWER10 Intrinsic support."}},{"before":null,"after":"2fc8ae1f8ae17ed7814b8daa284e2a290bc4d223","ref":"refs/heads/power10-intrin","pushedAt":"2023-10-02T20:21:57.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #181 from munroesj52/float128-lib\n\nAdd QP round-to-odd operations to runtime library. Close #178.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1837893379\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/181\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/181/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/181\">open-power-sdk#181</a> from munroesj52/float128-lib"}},{"before":"d6348b62545c59955e5a29620893ff706fdc7894","after":"2fc8ae1f8ae17ed7814b8daa284e2a290bc4d223","ref":"refs/heads/master","pushedAt":"2023-08-16T19:16:03.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #181 from munroesj52/float128-lib\n\nAdd QP round-to-odd operations to runtime library. Close #178.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1837893379\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/181\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/181/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/181\">open-power-sdk#181</a> from munroesj52/float128-lib"}},{"before":"d6348b62545c59955e5a29620893ff706fdc7894","after":"bf6cae3b37f8d0f1ab7da671b2183b5a15f495b4","ref":"refs/heads/float128-lib","pushedAt":"2023-08-05T18:38:43.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Add QP round-to-odd operations to runtime library. Issue #178.\n\nThe Float128 arithmetic operations xs[add|sub|mul|madd|msub|...] are\ngenerally too large for in-lining. So rename the static inline\noperations with the \"_inline\" suffix. Then create\nsrc/vec_f128_runtime.c to provide static implementations using the\nstatic inline operations from vec_f128_ppc.h for each operation.\nThe vec_f128_runtime.c file is #included in\nsrc/vec_runtime_PWR[7|8|9|10].c files to build the build the\nlibpvecstatic archive. Finally update src/vec_runtime_DYN.c to define\nthe resolvers and IFUNC aliases for each operation.\nWith library rebuilt we can update the unit/performance tests to call\nthe library implementations.\n\n\t* src/Makefile.am (vec_dynrt_PWR10.lo, vec_dynrt_PWR9.lo\n\tvec_dynrt_PWR8.lo, vec_dynrt_PWR7.lo):\n\tAdd depenency on vec_f128_runtime.c.\n\t(vec_staticrt_PWR10.lo, vec_staticrt_PWR9.lo\n\tvec_staticrt_PWR8.lo, vec_staticrt_PWR7.lo):\n\tAdd depenency on vec_f128_runtime.c.\n\t* src/Makefile.in: automake generated.\n\n\t* src/pveclib/vec_common_ppc.h:\n\tConditionally define __VEC_PWR_IMP().\n\n\t* src/pveclib/vec_f128_ppc.h [///@cond]: Declare externs for\n\tQuad-precision round-to-odd _ARCH_PWR# qualifiied operations.\n\t(vec_cmpeqtoqp, vec_cmpequzqp, vec_cmpequqp, vec_cmpgetoqp,\n\tvec_cmpgeuzqp, vec_cmpgeuqp, vec_cmpgttoqp, vec_cmpgtuzqp,\n\tvec_cmpgtuqp, vec_cmpletoqp, vec_cmpleuzqp, vec_cmpleuqp,\n\tvec_cmplttoqp, vec_cmpltuzqp, vec_cmpltuqp, vec_cmpnetoqp,\n\tvec_cmpneuzqp, vec_cmpneuqp): Doxygen update Power10 latency\n\tvalues.\n\t(vec_xsaddqpo, vec_xsaddqpo_inline) Rename for static inline.\n\tAdd extern for IFUNC enabled dynamic library.\n\t(vec_xssubqpo, vec_xssubqpo_inline) Rename for static inline.\n\tAdd extern for IFUNC enabled dynamic library.\n\t(vec_xsaddqpo, vec_xsaddqpo_inline) Rename for static inline.\n\tAdd extern for IFUNC enabled dynamic library.\n\t(vec_xscvsdqp, vec_xscvudqp, vec_xscvsqqp, vec_xscvuqqp):\n\tDoxygen update Power10 latency values.\n\t(vec_xsmaddqpo, vec_xsmaddqpo_inline) Rename for static inline.\n\tAdd extern for IFUNC enabled dynamic library.\n\t(vec_xsmsubqpo, vec_xsmsubqpo_inline) Rename for static inline.\n\tAdd extern for IFUNC enabled dynamic library.\n\t(vec_xsmulqpo, vec_xsmulqpo_inline) Rename for static inline.\n\tAdd extern for IFUNC enabled dynamic library.\n\n\t* src/pveclib/vec_int128_ppc.h (vec_cmpsq_all_gt,\n\tvec_cmpuq_all_gt):\n\tCorrect pasto, use vec_all_gt to match the operation.\n\n\t* src/pveclib/vec_int512_ppc.h [__VEC_PWR_IMP()]:\n\tMove define to vec_common_ppc.h\n\n\t* src/testsuite/arith128_test_qpo.c [test_xsaddqpo]:\n\tConditionally define to use vec_xsaddqpo_PWR[7|8|9|10].\n\t[test_xsmulqpo]:\n\tConditionally define to use vec_xsmulqpo_PWR[7|8|9|10].\n\t[test_xssubqpo]:\n\tConditionally define to use vec_xssubqpo_PWR[7|8|9|10].\n\t[test_xsmaddqpo]:\n\tConditionally define to use vec_xsmaddqpo_PWR[7|8|9|10].\n\t[test_xsmsubqpo]:\n\tConditionally define to use vec_xsmsubqpo_PWR[7|8|9|10].\n\n\t* src/testsuite/vec_f128_dummy.c (test_vec_xsaddqpo,\n\ttest_vec_xssubqpo): Use the static inline implementation.\n\t(test_vec_xsmulqpo, test_vec_xsmaddqpo, test_vec_xsmsubqpo):\n\tUse the static inline implementation.\n\t(test_vec_msubqpo): Use the static inline implementation\n\tof vec_xsmaddqpo_inline\n\n\t* src/testsuite/vec_perf_f128.c[test_vec_addqpo]:\n\tDefine to use the libpvecstatic implementation.\n\t[test_vec_subqpo]:\n\tDefine to use the libpvecstatic implementation.\n\t[test_vec_mulqpo]:\n\tDefine to use the libpvecstatic implementation.\n\t[test_vec_maddqpo]:\n\tDefine to use the libpvecstatic implementation.\n\n\t* src/vec_f128_runtime.c: New file.\n\n\t* src/vec_runtime_DYN.c [RESPASTE, VEC_RESOLVER_2,\n\tVEC_RESOLVER_3]: Define macros to generate the resolvers\n\tand IFUNC aliases.\n\t[VEC_F128_LIB_LIST]: Define macro to generate the extern list\n\tof F128 runtime operations with target suffix.\n\tGenerate extern lists using parameterized targets.\n\t[VEC_INT512_LIB_LIST]: Define macro to generate the extern list\n\tof int512 runtime operations with target suffix.\n\tReplace manual extern lists using parameterized target.\n\tReplace manually generated resolvers with\n\tVEC_RESOLVER_2, VEC_RESOLVER_3 where applicable.\n\tAdd resolvers for F128 operations.\n\n\t* src/vec_runtime_PWR10.c: #include \"vec_f128_runtime.c\"\n\t* src/vec_runtime_PWR9.c: #include \"vec_f128_runtime.c\"\n\t* src/vec_runtime_PWR8.c: #include \"vec_f128_runtime.c\"\n\t* src/vec_runtime_PWR7.c: #include \"vec_f128_runtime.c\"\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Add QP round-to-odd operations to runtime library. Issue <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1816361975\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/178\" data-hovercard-type=\"issue\" data-hovercard-url=\"/open-power-sdk/pveclib/issues/178/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/issues/178\">open-power-s…</a>"}},{"before":null,"after":"d6348b62545c59955e5a29620893ff706fdc7894","ref":"refs/heads/float128-lib","pushedAt":"2023-08-05T14:30:40.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #179 from munroesj52/test_qpo\n\nFactor arith128_test_f128.c for being too large. Closes #177.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1827003438\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/179\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/179/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/179\">open-power-sdk#179</a> from munroesj52/test_qpo"}},{"before":"c5c58b7031bf2302247a50a9b4ca05b12f7aab69","after":"d6348b62545c59955e5a29620893ff706fdc7894","ref":"refs/heads/master","pushedAt":"2023-08-01T21:10:48.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #179 from munroesj52/test_qpo\n\nFactor arith128_test_f128.c for being too large. Closes #177.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1827003438\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/179\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/179/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/179\">open-power-sdk#179</a> from munroesj52/test_qpo"}},{"before":"c5c58b7031bf2302247a50a9b4ca05b12f7aab69","after":"42ee47dba672671ee4b147f67a0c609379eae5a1","ref":"refs/heads/test_qpo","pushedAt":"2023-07-28T19:39:31.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Factor arith128_test_f128.c for being too large. Issue #177.\n\nAt over 31k+ lines arith128_test_f128.c is unwieldy to edit and slow\nto compile. This is mostly due the Quad-Precision round-to-add tests.\nEspecially for all the combinations associated with the non-finite\noperands as specified in the PowerISA \"Actions for ...\" tables.\nThis change factors the large qpo unit-tests into separate\narith128_test_qpo.c file.\n\n\t* Makefile.am [@INC_AMINCLUDE@] Corrected spelling in comment.\n\t* Makefile.in: automake.\n\t* aclocal.m4: automake.\n\t* configure: autoremake.\n\t* doc/pveclib-doxygen-pveclib.doxy\n\t[TCL_SUBST, COLS_IN_ALPHA_INDEX]: Removed,\n\t* src/Makefile.am [pveclib_test_SOURCES]:\n\tAdd testsuite/arith128_test_qpo.c and\n\ttestsuite/arith128_test_qpo.h.\n\t* Makefile.in: automake.\n\n\t* src/testsuite/arith128_test_f128.c\n\t(db_vec_xsmulqpo, db_vec_xsaddqpo, db_vec_xssubqpo,\n\tdb_vec_xsmaddqpo): Move unit-tests to arith128_test_qpo.c.\n\t(test_add_qpo, test_add_qpo_xtra, test_mul_qpo,\n\ttest_mul_qpo_xtra, test_sub_qpo, test_sub_qpo_xtra):\n\tMove unit-tests to arith128_test_qpo.c.\n\t(test_madd_qpo_xtra_c1, test_madd_qpo_xtra_c2,\n\ttest_madd_qpo_xtra_c3, test_madd_qpo_xtra_c4,\n\ttest_madd_qpo_xtra_c5, test_madd_qpo_xtra_c5,\n\ttest_madd_qpo_xtra_c7, test_madd_qpo_xtra_c8,\n\ttest_madd_qpo_zero_c, test_madd_qpo):\n\tMove unit-tests to arith128_test_qpo.c.\n\t(test_msub_qpo_xtra_c1, test_msub_qpo_xtra_c2,\n\ttest_msub_qpo_xtra_c3, test_msub_qpo_xtra_c4,\n\ttest_msub_qpo_xtra_c5, test_msub_qpo_xtra_c5,\n\ttest_msub_qpo_xtra_c7, test_msub_qpo_xtra_c8,\n\ttest_msub_qpo_zero_c, test_madd_qpo):\n\tMove unit-tests to arith128_test_qpo.c.\n\t(testsuite/arith128_test_qpo.h): Include header.\n\n\t* src/testsuite/arith128_test_f128.h\n\t(vf128_zero, vf128_nzero, vf128_one, vf128_none, vf128_two,\n\tvf128_ntwo, vf128_max, vf128_nmax, vf128_sub, vf128_nsub,\n\tvf128_inf, vf128_ninf, vf128_nan, vf128_snan): Add extern.\n\n\t* src/testsuite/arith128_test_qpo.c: New file.\n\t* src/testsuite/arith128_test_qpo.h: New file.\n\n\t* src/pveclib/vec_f128_ppc.h (vec_xsmaddqpo):\n\tMall cleanup.\n\t* src/testsuite/vec_pwr10_dummy.c\n\t(__test_splatisd_12_PWR10 [_ARCH_PWR10]):\n\tQuard use of P10 only code in case configure overrides -mcpu.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"Factor arith128_test_f128.c for being too large. Issue <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1816357544\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/177\" data-hovercard-type=\"issue\" data-hovercard-url=\"/open-power-sdk/pveclib/issues/177/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/issues/177\">open-power-sdk…</a>"}},{"before":null,"after":"c5c58b7031bf2302247a50a9b4ca05b12f7aab69","ref":"refs/heads/test_qpo","pushedAt":"2023-07-26T19:36:52.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #176 from munroesj52/float128-msubo\n\nP9 Float128 Multiply-Sub with round to odd, plus P8 equivalent.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1816352411\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/176\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/176/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/176\">open-power-sdk#176</a> from munroesj52/float128-msubo"}},{"before":"97dea18ee2b5c961304fc00595507987811c34d6","after":"c5c58b7031bf2302247a50a9b4ca05b12f7aab69","ref":"refs/heads/master","pushedAt":"2023-07-25T00:47:17.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #176 from munroesj52/float128-msubo\n\nP9 Float128 Multiply-Sub with round to odd, plus P8 equivalent.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1816352411\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/176\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/176/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/176\">open-power-sdk#176</a> from munroesj52/float128-msubo"}},{"before":"97dea18ee2b5c961304fc00595507987811c34d6","after":"8d68c08553562026dd4ee76e110d972dec7c3f14","ref":"refs/heads/float128-msubo","pushedAt":"2023-07-21T20:26:53.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"P9 Float128 Multiply-Sub with round to odd, plus P8 equivalent.\n\nPower9 provides round to odd versions for the QP arithmetic operations.\nThis patch provides P9/8 implementation for multiply-sub QP with round\nto odd. Includes compile, unit, and performance tests.\nAlso a small bug (issue #175) common to madd/msub was found and\nis included in this update.\n\n\t* src/pveclib/vec_f128_ppc.h [f128_softfloat_0_0_3_4_0]:\n\tUpdate doxygen code to match code changes.\n\t[f128_softfloat_0_0_3_5]: Add doxygen text for Multiply-Sub\n\tQuad-Precision with Round-to-Odd.\n\t[__clang_major__]: Try to fix Clang 15/16.\n\t(vec_xsmaddqpo): Small update to doxygen description.\n\tUpdate code to fix issue #175.\n\t(vec_xsmsubqpo): New PVECLIB operation.\n\n\t* src/testsuite/arith128_test_f128.c (db_vec_maddqpo):\n\tUpdate code to fix issue #175.\n\t[test_xsmaddqpo]: Define operation for unit-test.\n\t[test_madd_qpo_zero_c]: Add unit-test case for -0.0 addend.\n\t[test_xsmsubqpo]: New unit-test operation.\n\t(test_msub_qpo_xtra_c1, test_msub_qpo_xtra_c2,\n\ttest_msub_qpo_xtra_c3, test_msub_qpo_xtra_c4,\n\ttest_msub_qpo_xtra_c5, test_msub_qpo_xtra_c8,\n\ttest_msub_qpo_xtra_c7, test_msub_qpo_xtra_c8,\n\ttest_msub_qpo_xtra);\n\tNew unit-test for PowerISA 3.0 Table 80 Actions.\n\t(test_msub_qpo_zero_c):\n\tNew unit-test for msubqpo with 0.0 addends.\n\t(test_msub_qpo):\n\tNew unit-test for msubqpo general cases.\n\t(test_vec_f128): Update unit-test driver to call new\n\tunit-tests.\n\n\t* src/testsuite/vec_f128_dummy.c\n\t(test_scalargcc_exp_f128 [_ARCH_PWR9]): Declare f128_one.\n\t(test_vec_xsmsubqpo): New compile test for vec_f128_ppc.h.\n\t(test_vec_msubqpo): New compile test.\n\t(test_vec_maddqpo):\n\tUpdate code to fix issue #175.\n\n\t* src/testsuite/vec_pwr9_dummy.c (test_vec_msubqpo):\n\tNew compile test.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"P9 Float128 Multiply-Sub with round to odd, plus P8 equivalent."}},{"before":null,"after":"97dea18ee2b5c961304fc00595507987811c34d6","ref":"refs/heads/float128-msubo","pushedAt":"2023-07-21T19:40:41.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #174 from munroesj52/float128-maddo\n\nP9 Float128 Multiply-Add with round to odd, plus P8 equivalent.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1795578914\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/174\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/174/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/174\">open-power-sdk#174</a> from munroesj52/float128-maddo"}},{"before":"af48187edd192ef7b53ba9b1a88293186840c784","after":"97dea18ee2b5c961304fc00595507987811c34d6","ref":"refs/heads/master","pushedAt":"2023-07-17T19:40:03.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #174 from munroesj52/float128-maddo\n\nP9 Float128 Multiply-Add with round to odd, plus P8 equivalent.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1795578914\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/174\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/174/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/174\">open-power-sdk#174</a> from munroesj52/float128-maddo"}},{"before":"af48187edd192ef7b53ba9b1a88293186840c784","after":"faa2ce260587e67aa0f2ed45d7ed7794653aa219","ref":"refs/heads/float128-maddo","pushedAt":"2023-07-09T21:48:44.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"P9 Float128 Multiply-Add with round to odd, plus P8 equivalent.\n\nPower9 provide round to odd versions for the QP arithmetic operations.\nThis patch provides P9/8 implementation for multiply-add QP with round\nto odd. Includes compile, unit, and performance tests.\n\n\t* src/pveclib/vec_f128_ppc.h [f128_softfloat_IRRN_0_1_3]:\n\tUpdate doxygen \"IR for multiply\" with diagrams.\n\t[f128_softfloat_IRRN_0_1_4]: New \"IR for multiply add\".\n\t[f128_softfloat_0_0_3_4]: New subsection\n\t\"Multiply-Add Quad-Precision with Round-to-Odd\".\n\tGeneral doxygen improvements.\n\t(vec_xsmaddqpo): New inline operation.\n\t(vec_xsmulqpo): Clean up -Wall warnings for unused vars.\n\n\t* src/testsuite/arith128_test_f128.c (db_vec_maddqpo):\n\tNew debug function.\n\t(test_mask_f128): Add test for vec_const64_f128_112.\n\t(test_madd_qpo_xtra_c1, test_madd_qpo_xtra_c2,\n\ttest_madd_qpo_xtra_c3, test_madd_qpo_xtra_c4,\n\ttest_madd_qpo_xtra_c5, test_madd_qpo_xtra_c6,\n\ttest_madd_qpo_xtra_c7, test_madd_qpo_xtra_c8): New unit tests.\n\tExtra tests for non-finite operands per PowerISA 3.0C Table 71.\n\t(test_madd_qpo_xtra): New unit test combining xtra_c1-c8.\n\tComplete coverage for per PowerISA 3.0C Table 71.\n\t(test_madd_qpo_zero_c): New unit test.\n\tTest for madd with finite multiplicands and zero addend.\n\t(test_madd_qpo): New unit test.\n\tMore general madd  with finite operands.\n\t(test_vec_f128): Update f128 unit test driver. Add calls to\n\ttest_madd_qpo, test_madd_qpo_zero_c, test_madd_qpo_xtra.\n\n\t*src/testsuite/pveclib_perf.c (test_time_f128):\n\tAdd timed tests timed_gcc_maddqpo_f128, timed_lib_mulqpo_f128.\n\n\t* src/testsuite/vec_f128_dummy.c (test_vec_maddqpo,\n\ttest_scalarlib_exp_f128, test_scalargcc_exp_f128):\n\tNew timing cores for madd operations.\n\t(test_vec_xsmaddqpo, test_vec_maddqpo): New compiler tests.\n\n\t* src/testsuite/vec_perf_f128.c\n\t(test_lib_maddqpo_f128): Use test_vec_maddqpo to compute\n\t8 terms of e.\n\t(test_gcc_maddqpn_f128): Use __builtin_fmaf128 for P9,\n\totherwise softfloat multiple and add to compute 8 terms of e.\n\t* src/testsuite/vec_perf_f128.h\n\t(timed_gcc_maddqpn_f128, timed_lib_maddqpo_f128) New externs.\n\n\t* src/testsuite/vec_pwr9_dummy.c (test_scalarLib_exp_128_PWR9):\n\tCompile test for __builtin_fmaf128.\n\n\t* src/vec_runtime_DYN.c: Update comment to include POWER10.\n\nSigned-off-by: Steven Munroe <munroesj52@gmail.com>","shortMessageHtmlLink":"P9 Float128 Multiply-Add with round to odd, plus P8 equivalent."}},{"before":null,"after":"af48187edd192ef7b53ba9b1a88293186840c784","ref":"refs/heads/float128-maddo","pushedAt":"2023-07-09T20:16:06.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"munroesj52","name":"Steven Munroe","path":"/munroesj52","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/34114849?s=80&v=4"},"commit":{"message":"Merge pull request #172 from munroesj52/cleanup-20230706\n\nCleanup for -Mall reported error and add missing License text.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1792055633\" data-permission-text=\"Title is private\" data-url=\"https://github.com/open-power-sdk/pveclib/issues/172\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/open-power-sdk/pveclib/pull/172/hovercard\" href=\"https://github.com/open-power-sdk/pveclib/pull/172\">open-power-sdk#172</a> from munroesj52/cleanup-20230706"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAEWS4XWQA","startCursor":null,"endCursor":null}},"title":"Activity · munroesj52/pveclib"}