Wire Color implementation

[SteliosKaragiorgis]

Hello,

I am trying to implement MIPS simulation on Ripes. The simulation is almost finished but now I need to change the way that the vsrtl colors the wires. What I need to do is to color the active path and I want the color to stay active (like the signal wires).

Now some of the lines on the active path are colored with the correct color.
The issue now is that the lines that are on the active path, which the values are not changed, are not colored.
You told me that the pen color will be updated whenever the underlying port changes value:
(https://github.com/mortbopet/VSRTL/blob/8fd0bce6f5fcf27b89b33cf995b0428b8436ccdf/graphics/vsrtl_portgraphic.cpp#L295-L299)

Can we change this and send every line to the method updatePenColor()?

For example, the line(on the attached picture) "Instruction 20-16" is on the active path but because the value of this line did not change from the previous cycle, is not colored

Thank you in advance

[mortbopet]

Can we change this and send every line to the method updatePenColor()?

You can change whatever you want! My suggestion would be to feel free to dig in and change things to try out different ways of conditionally coloring the different wires based on your existing changes, and the wire-change-logic already present in VSRTL. Once prototyped, we can then consider how this kind of functionality can be upstreamed.

[SteliosKaragiorgis]

Thank you for your reply

Yes I change a lot of things on VSRTL.
I change this if statement there: https://github.com/mortbopet/VSRTL/blob/8fd0bce6f5fcf27b89b33cf995b0428b8436ccdf/core/vsrtl_port.h#L95-L100
Also I put some variables for the active path on vsrtl_port.h and vsrtl_interface.h

Now it is working fine but I want to color some part of the wire like the pictures below

Do you know if is it possible with VSRTL implementation to do this thing?

[mortbopet]

That is currently not possible - the entire wire will be colored with respect to the base port of that wire.

Furthermore, i am not sure that it would be a good thing to do (although you should do whatever you've decided is a success criteria for your project!). The diagrams you see in your book have been specifically colored wrt. the context in which they are presented in. Furthermore, while having been designed by arguably very smart and knowledgeable people, those diagrams are still just a representation of that given persons view on the given architecture at the given point in the book.
In Ripes, you'll probably want something more generic that in general provides the best possible way to illuminate the concept you want to highlight, while also allowing the viewer to think for themselves.

[SteliosKaragiorgis]

Okay thank you!!

[SteliosKaragiorgis]

Hello again Morten
The prototype of MIPS ISA is ready and we sent it to you via email.
For anything you need you can contact us.
Thanks