/
socket_prod.py
1873 lines (1629 loc) · 62 KB
/
socket_prod.py
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
# run from /home/apdlab/larpixv2/larpix-socket-testing
# after running env3
# cd ~/larpixv2/ ; source bin/activate
import subprocess,sys,os,signal
from subprocess import Popen,PIPE,CalledProcessError,STDOUT
import larpix
from larpix import Controller
#from larpix.io.zmq_io import ZMQ_IO
from larpix.io import PACMAN_IO
from larpix.logger.h5_logger import HDF5Logger
import time
import tkinter as tk
from tkinter import ttk
from tkinter import filedialog as fd
import h5py
import pandas as pd
import runpy
import numpy as np
import simpleaudio as sa
import tcp_server_prod as tsp
import csv
#import t
global SNList
global PacmanVersion
PacmanVersion = 'RevS1'
#PacmanVersion = 'pacman4'
SNList = []
#DumbFunc('another one')
sadSong = sa.WaveObject.from_wave_file('sounds/Sad_Trombone-Joe_Lamb-665429450.wav')
successSong = sa.WaveObject.from_wave_file('sounds/TaDaSoundBible.com-1884170640.wav')
doneSong = sa.WaveObject.from_wave_file('sounds/service-bell_daniel_simion.wav')
NumASICchannels = 64
def setv2channelmask():
DisabledChannels = [6,7,8,9,22,23,24,25,38,39,40,54,55,56,57]
for chan in DisabledChannels: TileChannelMask[chan]=0
TileChannelMask = [1] * NumASICchannels
#To enable only a few channels, set [0] above and list channel in EnabledChannels
# and uncomment the 2 lines below. To enable all channels do the reverse, set [1]
# and comment out the 2 lines below.
#EnabledChannels = [10,19,20,21,22,23,24,40]
#for chan in EnabledChannels: TileChannelMask[chan]=1
TileChannelMask
#[1, 1, 1, 1, 1, 1, 0, 0,
# 0, 0, 1, 1, 1, 1, 1, 1,
# 1, 1, 1, 1, 1, 1, 0, 0,
# 0, 0, 1, 1, 1, 1, 1, 1,
# 1, 1, 1, 1, 1, 1, 0, 0,
# 0, 1, 1, 1, 1, 1, 1, 1,
# 1, 1, 1, 1, 1, 1, 0, 0,
# 0, 0, 1, 1, 1, 1, 1, 1]
def init_controller():
c = Controller()
if PacmanVersion == 'RevS1' :
#c.io = ZMQ_IO('../configs/io/daq-srv1.json', miso_map={2:1})
print('Intializing pacman20 RevS1')
c.io = PACMAN_IO(config_filepath='/home/apdlab/larpixv2/configs/io/pacman20.json')
elif PacmanVersion == 'pacman4':
print('Intializing pacman4 ')
c.io = PACMAN_IO(config_filepath='/home/apdlab/larpixv2/configs/io/pacman4.json')
else:
exit('PacmanVersion not specified, exiting...')
c.io.ping()
return c
def init_board_unused(c,io_chan=1):
#c.load('../configs/controller/pcb-3_chip_info.json')
#c.load('../configs/controller/socket-board-v1.json')
if v2bState.get() == '0':
if io_chan==1:
c.load('/home/apdlab/larpixv2/configs/controller/v2_socket_channel_1.json')
elif io_chan==2:
c.load('/home/apdlab/larpixv2/configs/controller/v2_socket_channel_2.json')
elif io_chan==3:
c.load('/home/apdlab/larpixv2/configs/controller/v2_socket_channel_3.json')
elif io_chan==4:
c.load('/home/apdlab/larpixv2/configs/controller/v2_socket_channel_4.json')
else:
exit('bad IO channel specified')
elif v2bState.get() == '1':
_default_chip_id=2
_default_miso_ds = io_chan-1
_default_mosi = io_chan-1
#print('loading v2b json file')
c.add_chip(larpix.Key(1, io_chan, _default_chip_id),version='2b')
c.add_network_node(1, io_chan, c.network_names, 'ext', root=True)
c.add_network_link(1, io_chan, 'miso_us', ('ext',_default_chip_id), 0)
c.add_network_link(1, io_chan, 'miso_ds', (_default_chip_id,'ext'), _default_miso_ds)
c.add_network_link(1, io_chan, 'mosi', ('ext', _default_chip_id), _default_mosi)
'''
if io_chan==1:
c.load('/home/apdlab/larpixv2/configs/controller/v2b_socket_channel_1.json')
elif io_chan==2:
c.load('/home/apdlab/larpixv2/configs/controller/v2b_socket_channel_2.json')
elif io_chan==3:
c.load('/home/apdlab/larpixv2/configs/controller/v2b_socket_channel_3.json')
elif io_chan==4:
c.load('/home/apdlab/larpixv2/configs/controller/v2b_socket_channel_4.json')
else:
exit('bad IO channel specified')
'''
else :
exit('could not determine v2bState')
c.io.ping()
def init_board_base(c,_default_io_channel=1):
##### setup hydra network configuration
#if controller_config is None:
if PacmanVersion == 'RevS1' and v2bState.get() == '1':
Tile_ID = 2
else:
Tile_ID = 1
##### default network (single chip) if no hydra network provided
_default_io_group = 1
_default_chip_id = 2
_default_miso_ds = _default_io_channel -1 #0
_default_mosi = _default_io_channel -1 #0
_default_io_channel = 4*(Tile_ID-1) + _default_io_channel
if v2bState.get() == '0':
c.add_chip(larpix.Key(_default_io_group, _default_io_channel, _default_chip_id))
elif v2bState.get() == '1':
c.add_chip(larpix.Key(_default_io_group, _default_io_channel, _default_chip_id),version='2b')
c.add_network_node(_default_io_group, _default_io_channel, c.network_names, 'ext', root=True)
c.add_network_link(_default_io_group, _default_io_channel, 'miso_us', ('ext',_default_chip_id), 0)
c.add_network_link(_default_io_group, _default_io_channel, 'miso_ds', (_default_chip_id,'ext'),_default_miso_ds)
'''
if v2cState.get() == '0':
c.add_network_link(1, _default_io_channel, 'miso_ds', (_default_chip_id,'ext'),_default_miso_ds)
else:
for _default_miso_ds in [ 0xF ] :
print('configing for _default_miso_ds of ',_default_miso_ds)
c.add_network_link(1, _default_io_channel, 'miso_ds', (_default_chip_id,'ext'),_default_miso_ds)
'''
c.add_network_link(_default_io_group, _default_io_channel, 'mosi', ('ext', _default_chip_id), _default_mosi)
#else:
#c.load(controller_config)
def measure_currents(c):
loop=0
looplimit=2
while loop<looplimit :
vddd_meas=c.io.get_vddd()
vdda_meas=c.io.get_vdda()
print('read vddd =',vddd_meas)
print('read vdda =',vdda_meas)
loop=loop+1
def powerdown_exit(c):
#Disable chip power and interface at end
# Disable Tile
c.io.disable_tile()
#zero supply voltages
c.io.set_vddd(0) # set vddd 0V
c.io.set_vdda(0) # set vdda 0V
exit()
def powerdown(c):
#Disable chip power and interface at end
# Disable Tile
c.io.disable_tile()
#zero supply voltages
c.io.set_vddd(0) # set vddd 0V
c.io.set_vdda(0) # set vdda 0V
def wait_here():
trash=input('Hit <ENTER> key to proceed')
#test flipping bits in config register and see that they configure
def test_config_registers(c,chip):
#print(chip.config)
#invert chip config (for many registers)
# CSA GAIN
flipmask=0b1
chip.config.csa_gain=flipmask^chip.config.csa_gain
# CSA BYPASS ENABLE
flipmask=0b1
chip.config.csa_bypass_enable=flipmask^chip.config.csa_bypass_enable
# BYPASS CAPS EN
flipmask=0b1
chip.config.bypass_caps_en=flipmask^chip.config.bypass_caps_en
# PERIODIC RESET CYCLES
flipmask=0xFF_FFFF
chip.config.periodic_reset_cycles=flipmask^chip.config.periodic_reset_cycles
for chan in range(0,NumASICchannels):
# Pixel Trim DAC
#print('{:05b}'.format(chip.config.pixel_trim_dac[chan]))
#flipmask=int('11111',2)
flipmask=0b1_1111
chip.config.pixel_trim_dac[chan]=flipmask^chip.config.pixel_trim_dac[chan]
#print('{:05b}'.format(chip.config.pixel_trim_dac[chan]))
# CSA ENABLE
flipmask=0b1
chip.config.csa_enable[chan]=flipmask^chip.config.csa_enable[chan]
# CSA BYPASS SELECT
flipmask=0b1
chip.config.csa_bypass_select[chan]=flipmask^chip.config.csa_bypass_select[chan]
# CSA MONITOR SELECT
flipmask=0b1
chip.config.csa_monitor_select[chan]=flipmask^chip.config.csa_monitor_select[chan]
# CSA TESTPULSE ENABLE
flipmask=0b1
chip.config.csa_testpulse_enable[chan]=flipmask^chip.config.csa_testpulse_enable[chan]
# CHANNEL MASK
flipmask=0b1
chip.config.channel_mask[chan]=flipmask^chip.config.channel_mask[chan]
# EXTERNAL TRIGGER MASK
flipmask=0b1
chip.config.external_trigger_mask[chan]=flipmask^chip.config.external_trigger_mask[chan]
# CROSS TRIGGER MASK
flipmask=0b1
chip.config.cross_trigger_mask[chan]=flipmask^chip.config.cross_trigger_mask[chan]
# PERIODIC TRIGGER MASK
flipmask=0b1
chip.config.periodic_trigger_mask[chan]=flipmask^chip.config.periodic_trigger_mask[chan]
#print(chip.config)
#exit()
c.write_configuration(chip.chip_key)
verified,returnregisters=c.verify_configuration(chip.chip_key)
#print(verified)
if verified == False : # try again
print(returnregisters)
verified,returnregisters=c.verify_configuration(chip.chip_key)
if verified == False : # exit
#Disable chip power and interface at end
print("Verify config failed with flipped config")
#powerdown(c)
return 2
#invert chip config (for many registers) (returns to original)
# CSA GAIN
flipmask=0b1
chip.config.csa_gain=flipmask^chip.config.csa_gain
# CSA BYPASS ENABLE
flipmask=0b1
chip.config.csa_bypass_enable=flipmask^chip.config.csa_bypass_enable
# BYPASS CAPS EN
flipmask=0b1
chip.config.bypass_caps_en=flipmask^chip.config.bypass_caps_en
# PERIODIC RESET CYCLES
flipmask=0xFF_FFFF
chip.config.periodic_reset_cycles=flipmask^chip.config.periodic_reset_cycles
for chan in range(0,NumASICchannels):
# Pixel Trim DAC
#print('{:05b}'.format(chip.config.pixel_trim_dac[chan]))
#flipmask=int('11111',2)
flipmask=0b1_1111
chip.config.pixel_trim_dac[chan]=flipmask^chip.config.pixel_trim_dac[chan]
#print('{:05b}'.format(chip.config.pixel_trim_dac[chan]))
# CSA ENABLE
flipmask=0b1
chip.config.csa_enable[chan]=flipmask^chip.config.csa_enable[chan]
# CSA BYPASS SELECT
flipmask=0b1
chip.config.csa_bypass_select[chan]=flipmask^chip.config.csa_bypass_select[chan]
# CSA MONITOR SELECT
flipmask=0b1
chip.config.csa_monitor_select[chan]=flipmask^chip.config.csa_monitor_select[chan]
# CSA TESTPULSE ENABLE
flipmask=0b1
chip.config.csa_testpulse_enable[chan]=flipmask^chip.config.csa_testpulse_enable[chan]
# CHANNEL MASK
flipmask=0b1
chip.config.channel_mask[chan]=flipmask^chip.config.channel_mask[chan]
# EXTERNAL TRIGGER MASK
flipmask=0b1
chip.config.external_trigger_mask[chan]=flipmask^chip.config.external_trigger_mask[chan]
# CROSS TRIGGER MASK
flipmask=0b1
chip.config.cross_trigger_mask[chan]=flipmask^chip.config.cross_trigger_mask[chan]
# PERIODIC TRIGGER MASK
flipmask=0b1
chip.config.periodic_trigger_mask[chan]=flipmask^chip.config.periodic_trigger_mask[chan]
c.write_configuration(chip.chip_key)
# Global Threshold Has to be done when channels already masked off or floods the controller.
flipmask=0xFF
chip.config.threshold_global=flipmask^chip.config.threshold_global
c.write_configuration(chip.chip_key)
verified,returnregisters=c.verify_configuration(chip.chip_key)
#print(verified)
if verified == False : # try again
print(returnregisters)
verified,returnregisters=c.verify_configuration(chip.chip_key)
if verified == False : # exit
#Disable chip power and interface at end
print("Verify config failed with restored config")
#powerdown(c)
return 1
# Global Threshold
flipmask=0xFF
chip.config.threshold_global=flipmask^chip.config.threshold_global
print("config with flipped bits succeeded")
return 0
def conf_root(c,cm,cadd,iog,iochan):
I_TX_DIFF=0
TX_SLICE=15
R_TERM=2
I_RX=8
#REF_CURRENT_TRIM = 0
REF_CURRENT_TRIM = 15
c.add_chip(cm,version='2b')
# - - default larpix chip_id is '1'
default_key = larpix.key.Key(iog, iochan, 1) # '1-5-1'
c.add_chip(default_key,version='2b') # TODO, create v2c class
# - - rename to chip_id = cm
c[default_key].config.chip_id = cadd
c.write_configuration(default_key,'chip_id')
# - - remove default chip id from the controller
c.remove_chip(default_key)
# - - and add the new chip id
#print('cm = ',cm)
c[cm].config.chip_id=cadd
c[cm].config.i_rx0=I_RX
c.write_configuration(cm, 'i_rx0')
c[cm].config.r_term0=R_TERM
c.write_configuration(cm, 'r_term0')
c[cm].config.i_rx1=I_RX
c.write_configuration(cm, 'i_rx1')
c[cm].config.r_term1=R_TERM
c.write_configuration(cm, 'r_term1')
c[cm].config.i_rx2=I_RX
c.write_configuration(cm, 'i_rx2')
c[cm].config.r_term2=R_TERM
c.write_configuration(cm, 'r_term2')
c[cm].config.i_rx3=I_RX
c.write_configuration(cm, 'i_rx3')
c[cm].config.r_term3=R_TERM
c.write_configuration(cm, 'r_term3')
#c[cm].config.enable_posi=[1,1,1,1] # all
if iochan%4 == 1:
c[cm].config.enable_posi=[1,0,0,0] # posi1 ds for probe
elif iochan%4 == 2:
c[cm].config.enable_posi=[0,1,0,0] # posi2 ds for probe
elif iochan%4 ==3:
c[cm].config.enable_posi=[0,0,1,0] # posi3 ds for probe
elif iochan%4 ==0:
c[cm].config.enable_posi=[0,0,0,1] # posi4 ds for probe
else :
print('confused by iochan ',iochan)
#c[cm].config.enable_posi=[1,0,0,0] # posi 1
#c[cm].config.enable_posi=[0,1,0,0] # posi 2
#c[cm].config.enable_posi=[0,0,1,0] # posi 3
#c[cm].config.enable_posi=[0,0,0,1] # posi 4
c.write_configuration(cm, 'enable_posi')
c[cm].config.enable_piso_upstream=[0,0,0,0]
c.write_configuration(cm, 'enable_piso_upstream')
c[cm].config.i_tx_diff0=I_TX_DIFF
c.write_configuration(cm, 'i_tx_diff0')
c[cm].config.tx_slices0=TX_SLICE
c.write_configuration(cm, 'tx_slices0')
c[cm].config.i_tx_diff2=I_TX_DIFF
c.write_configuration(cm, 'i_tx_diff2')
c[cm].config.tx_slices2=TX_SLICE
c.write_configuration(cm, 'tx_slices2')
c[cm].config.i_tx_diff3=I_TX_DIFF
c.write_configuration(cm, 'i_tx_diff3')
c[cm].config.tx_slices3=TX_SLICE
c.write_configuration(cm, 'tx_slices3')
c[cm].config.i_tx_diff1=I_TX_DIFF
c.write_configuration(cm, 'i_tx_diff1')
c[cm].config.tx_slices1=TX_SLICE
c.write_configuration(cm, 'tx_slices1')
#c.io.set_reg(0x18, 1, io_group=1)
c[cm].config.enable_piso_downstream=[1,1,1,1] # krw adding May 8, 2023
c.write_configuration(cm, 'enable_piso_downstream')
time.sleep(0.1)
#c[cm].config.enable_piso_downstream=[1,0,0,1] # piso1 ds for probe
if iochan%4 == 1:
c[cm].config.enable_piso_downstream=[1,0,0,0] # piso1 ds for probe
elif iochan%4 == 2:
c[cm].config.enable_piso_downstream=[0,1,0,0] # piso2 ds for probe
elif iochan%4 ==3:
c[cm].config.enable_piso_downstream=[0,0,1,0] # piso3 ds for probe
elif iochan%4 ==0:
c[cm].config.enable_piso_downstream=[0,0,0,1] # piso4 ds for probe
else :
print('confused by iochan ',iochan)
c.write_configuration(cm, 'enable_piso_downstream')
time.sleep(0.1)
# enable pacman uart receiver
rx_en = c.io.get_reg(0x18, iog)
ch_set=pow(2,iochan-1)
#ch_set=15
print('enable pacman uart receiver', rx_en, ch_set, rx_en|ch_set)
c.io.set_reg(0x18, rx_en|ch_set, iog)
#rx_en = c.io.get_reg(0x18, iog)
#print('rx_en ',rx_en)
#print('c.chips')
#print(c.chips)
def init_chips_v2c(c,io_channel):
###########################################
IO_GROUP = 1
PACMAN_TILE = 2 # Assuming Pacman RevS1 (uses tile 2 for v2b,v2c and tile 1 for v2a)
IO_CHAN = (io_channel+(PACMAN_TILE-1)*4)
#VDDA_DAC= 44500 # ~1.8 V
#VDDD_DAC = 28500 # ~1.1 V
VDDA_DAC = 44500
VDDD_DAC = 30000
RESET_CYCLES = 300000 #5000000
REF_CURRENT_TRIM=0
###########################################
# create a larpix controller
# Already done in init_controller()
#c = larpix.Controller()
#c.io = larpix.io.PACMAN_IO(config_filepath='/home/apdlab/larpixv2/configs/io/pacman20.json', relaxed=True)
io_group=IO_GROUP
chip_id=2
do_power_cycle = True
if do_power_cycle:
#disable pacman rx uarts
#print('enable pacman power')
bitstring = list('00000000000000000000000000000000')
#print(int("".join(bitstring),2))
c.io.set_reg(0x18, int("".join(bitstring),2), io_group)
# disable tile power, LARPIX clock
c.io.set_reg(0x00000010, 0, io_group)
# set up mclk in pacman
c.io.set_reg(0x101c, 0x4, io_group)
# enable pacman power
c.io.set_reg(0x00000014, 1, io_group)
#set voltage dacs to 0V
c.io.set_reg(0x24010+(PACMAN_TILE-1), 0, io_group)
c.io.set_reg(0x24020+(PACMAN_TILE-1), 0, io_group)
#time.sleep(0.1)
time.sleep(1)
#set voltage dacs VDDD first
c.io.set_reg(0x24020+(PACMAN_TILE-1), VDDD_DAC, io_group)
c.io.set_reg(0x24010+(PACMAN_TILE-1), VDDA_DAC, io_group)
#print('reset the larpix for n cycles',RESET_CYCLES)
# - set reset cycles
c.io.set_reg(0x1014,RESET_CYCLES,io_group=IO_GROUP)
# - toggle reset bit
clk_ctrl = c.io.get_reg(0x1010, io_group=IO_GROUP)
c.io.set_reg(0x1010, clk_ctrl|4, io_group=IO_GROUP)
c.io.set_reg(0x1010, clk_ctrl, io_group=IO_GROUP)
#enable tile power
tile_enable_val=pow(2,PACMAN_TILE-1)+0x0200 #enable one tile at a time
c.io.set_reg(0x00000010,tile_enable_val,io_group)
time.sleep(0.03)
#print('enable tilereg 0x10 , ', tile_enable_val)
#readback=pacman_base.power_readback(c.io, io_group, pacman_version,pacman_tile)
# - toggle reset bit
RESET_CYCLES = 50000
c.io.set_reg(0x1014,RESET_CYCLES,io_group=IO_GROUP)
clk_ctrl = c.io.get_reg(0x1010, io_group=IO_GROUP)
c.io.set_reg(0x1010, clk_ctrl|4, io_group=IO_GROUP)
c.io.set_reg(0x1010, clk_ctrl, io_group=IO_GROUP)
time.sleep(0.01)
chip_key=larpix.key.Key(IO_GROUP,IO_CHAN,chip_id)
conf_root(c,chip_key,chip_id,IO_GROUP,IO_CHAN)
c.write_configuration(chip_key)
verified,returnregisters=c.verify_configuration(chip_key)
print(verified,returnregisters)
#print('list(c.chips.values()= ',list(c.chips.values()))
#print('list(c.chips.values())[0]= ',list(c.chips.values())[0])
#print('list(c.chips.items())[0]= ',list(c.chips.items())[0])
chip = list(c.chips.values())[0] # selects 1st chip in chain
return chip
def init_chips(c):
if PacmanVersion == 'RevS1' :
#c.io.set_reg(0x25014, 0) # enables analog monitor from tile 1 on SMA A
c.io.set_reg(0x25014, 0x10) # disables analog monitor from all tiles on SMA A
c.io.set_reg(0x25015, 0x10) # disables SMA B
#PACMAN RevS1 powerup settings
if v2cState.get() == '1' :
vddd = 29250
vdda = 43875
else :
vddd = 43785
vdda = 43875
if v2bState.get() == '1': # use tile 2 for v2b or v2c for RevS1 pacam
c.io.set_reg(0x00024132, vdda) # tile 2 VDDA
c.io.set_reg(0x00024133, vddd) # tile 2 VDDD
c.io.set_reg(0x00000014, 1) # enable global larpix power
c.io.set_reg(0x00000010, 0b00000010) # enable tile 2 to be powered
else: # use tile 1 for v2a for RevS1 pacman
c.io.set_reg(0x00024130, vdda) # tile 1 VDDA
c.io.set_reg(0x00024131, vddd) # tile 1 VDDD
c.io.set_reg(0x00000014, 1) # enable global larpix power
c.io.set_reg(0x00000010, 0b00000001) # enable tile 1 to be powered
else: # older pacman4 version
#zero supply voltages
c.io.set_vddd(0) # set vddd 0V
c.io.set_vdda(0) # set vdda 0V
time.sleep(1)
#Set correct voltages
if v2cState.get() == '1' :
c.io.set_vddd(vddd_dac=0x8E6C) # set low vddd for v2c(1.2V)
c.io.set_vdda() # set default vdda (~1.8V)
else:
c.io.set_vddd() # set default vddd (~1.8V)
c.io.set_vdda() # set default vdda (~1.8V)
# Disable Tile
c.io.disable_tile()
# Enable Tile
c.io.enable_tile()
time.sleep(1)
# measure_currents and voltage
vddd,iddd = c.io.get_vddd()[1]
vdda,idda = c.io.get_vdda()[1]
print('VDDD:',vddd,'mV')
print('IDDD:',iddd,'mA')
print('VDDA:',vdda,'mV')
print('IDDA:',idda,'mA')
# Is this a v2b setting? May have to bypass for v2a testing
_uart_phase = 0
for ch in range(1,5):
c.io.set_reg(0x1000*ch + 0x2014, _uart_phase)
print('set phase:',_uart_phase)
#reset larpix chips [set sw_rst_cycles to something long, i.e. 256,1024,
#set sw_rst_trig to 1, set sw_rst_trig to 0]
#(this issues hard reset and syncs the pacman and larpix clocks)
c.io.reset_larpix(length=10240)
# resets uart speeds on fpga
#print('c.network.items()= ',c.network.items())
#if v2bState.get() == '0':
for io_group, io_channels in c.network.items():
for io_channel in io_channels:
print('set uart speed on group ',io_group,' on channel',io_channel,'...')
c.io.set_uart_clock_ratio(io_channel, 2, io_group=io_group)
# First bring up the network using as few packets as possible
c.io.group_packets_by_io_group = False # this throttles the data rate to avoid FIFO collisions
c.network.items()
#if False:
for io_group, io_channels in c.network.items():
#io_channels
for io_channel in io_channels:
print("io_group,io_channel:",io_group,",",io_channel)
c.init_network(io_group, io_channel,differential='True')
#if v2bState.get() == '0':
#c.init_network(io_group, io_channel,differential='True')
#if v2bState.get() == '1':
#c.init_network(io_group, io_channel,differential=True)
print('Finished init_network')
if False: # A test for success of making init_network
io_group=1
io_channel=4
print("io_group,io_channel:",io_group,",",io_channel)
c.init_network(io_group, io_channel)
#print(list(c.network[1][4]['miso_ds'].edges()))
#print(list(c.network[1][4]['miso_us'].edges()))
#print(list(c.network[1][4]['mosi'].edges()))
#exit()
# Brooke Power_up_network.py
if v2bState.get() == '1' :
#c = larpix.Controller()
#print('here')
#c.io = larpix.io.PACMAN_IO(relaxed=True)
#print('make network')
#if controller_config is None:
# c.add_chip(larpix.Key(1, _default_io_channel, _default_chip_id),version='2b')
# c.add_network_node(1, _default_io_channel, c.network_names, 'ext', root=True)
# c.add_network_link(1, _default_io_channel, 'miso_us', ('ext',_default_chip_id), 0)
# c.add_network_link(1, _default_io_channel, 'miso_ds', (_default_chip_id,'ext'), _default_miso_ds)
# c.add_network_link(1, _default_io_channel, 'mosi', ('ext', _default_chip_id), _default_mosi)
#else:
# c.load(controller_config)
#if reset:
# c.io.reset_larpix(length=10240)
# resets uart speeds on fpga
#for io_group, io_channels in c.network.items():
# for io_channel in io_channels:
# c.io.set_uart_clock_ratio(io_channel, clk_ctrl_2_clk_ratio_map[0], io_group=io_group)
''' Was forced in Brooke's startup. No longer needed, as controller.py should do it.
for chip_key, chip in reversed(c.chips.items()):
c[chip_key].config.enable_piso_downstream = [0,0,0,1]
c[chip_key].config.i_tx_diff3=0
c[chip_key].config.tx_slices3=15
c.write_configuration(chip_key,125)
c.write_configuration(chip_key,'i_tx_diff3')
c.write_configuration(chip_key,'tx_slices3')
'''
#print('Brooke power up complete')
#print('Writing configuration')
#while True:
for chip in c.chips.values():
if v2cState.get() == '1' :
print(c[chip.chip_key].config.enable_piso_downstream)
c[chip.chip_key].config.enable_piso_downstream=[1]*4
print(c[chip.chip_key].config.enable_piso_downstream)
c.write_configuration(chip.chip_key,'enable_piso_downstream')
for chip in c.chips.values(): c.write_configuration(chip.chip_key)
for chip in c.chips.values():
verified,returnregisters=c.verify_configuration(chip.chip_key)
print(verified,returnregisters)
''' Used during setup, not needed regularly
while verified == False:
chip = list(c.chips.values())[0] # selects 1st chip in chain
print('Trying again on ',chip)
print('with config= ',chip.config)
#c[chip_key].config.enable_posi = [1,1,1,1]
#c[chip_key].config.test_mode_uart0 = 1
#c[chip_key].config.test_mode_uart1 = 1
#c[chip_key].config.test_mode_uart2 = 1
#c[chip_key].config.test_mode_uart3 = 1
#c[chip_key].config.v_cm_lvds_tx0 = 0
#c[chip_key].config.v_cm_lvds_tx1 = 0
#c[chip_key].config.v_cm_lvds_tx2 = 0
#c[chip_key].config.v_cm_lvds_tx3 = 0
c.io.reset_larpix(length=10240)
c.write_configuration(chip.chip_key)
verified,returnregisters=c.verify_configuration(chip.chip_key)
print(verified,returnregisters)
print('Tried at ',time.strftime("%H:%M:%S"))
#time.sleep(20)
wait_here()
'''
#exit()
#return c
if v2bState.get() == '0':
# Configure the IO for a slower UART and differential signaling
c.io.double_send_packets = True # double up packets to avoid 512 bug when configuring
for io_group, io_channels in c.network.items():
for io_channel in io_channels:
chip_keys = c.get_network_keys(io_group,io_channel,root_first_traversal=False)
chip_keys
for chip_key in chip_keys:
c[chip_key].config.clk_ctrl = 1
c[chip_key].config.enable_miso_differential = [1,1,1,1]
c.write_configuration(chip_key, 'enable_miso_differential')
c.write_configuration(chip_key, 'clk_ctrl')
#if v2bState.get() == '0':
for io_group, io_channels in c.network.items():
for io_channel in io_channels:
c.io.set_uart_clock_ratio(io_channel, 4, io_group=io_group)
c.io.double_send_packets = False
c.io.group_packets_by_io_group = True
#for chip in c.chips.values(): print(chip.config)
# Stolen from Brooke, power_up_network.py
if False:
for chip_key, chip in reversed(c.chips.items()):
c[chip_key].config.enable_piso_downstream = [0,0,0,1]
c[chip_key].config.i_tx_diff3=0
c[chip_key].config.tx_slices3=15
c.write_configuration(chip_key,125)
c.write_configuration(chip_key,'i_tx_diff3')
c.write_configuration(chip_key,'tx_slices3')
print('Writing configuration')
#while True:
print(c[chip.chip_key].config.enable_piso_downstream)
if v2cState.get() == '1' :
print(c[chip.chip_key].config.enable_piso_downstream)
c[chip.chip_key].config.enable_piso_downstream=[1]*4
print(c[chip.chip_key].config.enable_piso_downstream)
for chip in c.chips.values(): c.write_configuration(chip.chip_key)
for chip in c.chips.values(): c.verify_configuration(chip.chip_key)
chip = list(c.chips.values())[0] # selects 1st chip in chain
#chip = list(c.chips.values())[1] # selects 2nd chip in chain
#chip = list(c.chips.values())[2] # selects 3rd chip in chain
#chip = list(c.chips.values())[3] # selects 3rd chip in chain
print(chip)
print(chip.chip_key)
#print(chip.config)
c.write_configuration(chip.chip_key)
verified,returnregisters=c.verify_configuration(chip.chip_key)
if verified == False : # try again
print(verified,returnregisters)
verified,returnregisters=c.verify_configuration(chip.chip_key)
if verified == False : # exit
print(verified,returnregisters)
#Disable chip power and interface at end
print('Configuration failed, exiting')
#powerdown(c)
return
print('Finished configuring chip ',chip)
return chip
def enable_channel(chan):
# Configure one channel to be on.
chip.config.channel_mask = [1] * NumASICchannels # Turn off all channels
chip.config.channel_mask[chan]=0 # turn ON this channel
c.write_configuration(chip.chip_key)
c.verify_configuration(chip.chip_key)
# Set global threshold
def setGlobalThresh(c,chip,Thresh=50):
#print(chip.chip_key)
#print(id(chip.config))
chip.config.threshold_global=Thresh
c.write_configuration(chip.chip_key)
#c.verify_configuration(chip.chip_key)
# Turn on a series of channels (a list would be better) on analog
# monitor and loop to the next one every 5 seconds.
def AnalogDisplayLoop(c,chip,firstChan=0,lastChan=NumASICchannels-1):
for chan in range(firstChan,lastChan+1):
AnalogDisplay(c,chip,chan)
time.sleep(10)
wait_here()
# set a really long periodic reset (std=4096, this is 1M)
#chip.config.reset_cycles=1000000
# Turn on and display one channel on analog monitor
def AnalogDisplay(c,chip,chan):
# Configure one channel to be on.
chip.config.channel_mask = [1] * NumASICchannels # Turn off all channels
chip.config.channel_mask[chan]=0 # turn ON this channel
# Enable analog monitor on one channel at a time
c.enable_analog_monitor(chip.chip_key,chan)
print("Running Analog mon on channel ",chan)
c.write_configuration(chip.chip_key)
c.verify_configuration(chip.chip_key)
#time.sleep(5) # move to the loop
#c.disable_analog_monitor(chip.chip_key)
# Loop over approximately all channels and output analog mon for 5 seconds.
#AnalogDisplayLoop(0,NumASICchannels-1)
# Capture Data for channels in sequence
def ReadChannelLoop(c,chip,firstChan=0,lastChan=NumASICchannels-1,monitor=0):
#sleeptime=0.1
#c.start_listening()
#for chan in reversed(range(firstChan,lastChan+1)): # used for a test
for chan in range(firstChan,lastChan+1):
#print("Running chip ",chip," chan ",chan)
if TileChannelMask[chan]!=0:
ReadChannel(c,chip,chan,monitor)
#time.sleep(sleeptime)
#c.stop_listening()
chip.config.channel_mask = [1] * NumASICchannels # Turn off all channels
chip.config.periodic_trigger_mask = [1] * NumASICchannels # Turn off all channels
c.write_configuration(chip.chip_key)
def ReadChannel(c,chip,chan,monitor=0):
# Configure one channel to be on.
print("Running chip ",chip," chan ",chan)
chip.config.channel_mask = [1] * NumASICchannels # Turn off all channels
chip.config.channel_mask[chan]=0 # turn ON this channel
chip.config.periodic_trigger_mask = [1] * NumASICchannels
chip.config.periodic_trigger_mask[chan]=0 # turn ON this channel
#if chan < NumASICchannels-1 :
# chip.config.channel_mask[chan+1]= not TileChannelMask[chan+1]
#if chan < NumASICchannels-2 :
# chip.config.channel_mask[chan+2]= not TileChannelMask[chan+2]
#if chan < NumASICchannels-3 :
# chip.config.channel_mask[chan+3]= not TileChannelMask[chan+3]
#for thischan in range(0,NumASICchannels): # turn ON ALL channels (test 20210331)
# chip.config.channel_mask[thischan] = not TileChannelMask[thischan]
if monitor==1:
# Enable analog monitor on channel
c.enable_analog_monitor(chip.chip_key,chan)
print("Running Analog mon for Pulser on channel ",chan)
c.write_configuration(chip.chip_key)
print('***************************************')
print('**** READ CHANNEL ****')
print('***************************************')
#print(chip.config)
#c.verify_configuration(chip.chip_key)
loop=0
looplimit=1
while loop<looplimit :
# Read some Data (this also delays a bit)
c.run(0.1,'test')
#print(c.reads[-1])
print("read ",len(c.reads[-1])," packets")
#wait_here()
loop=loop+1
def get_baseline_selftrigger(c,chip):
# Capture Baseline for all channels one by one
# Turn on periodic_reset
chip.config.enable_periodic_reset = 1
# Reduce global threshold to get baseline data
chip.config.threshold_global=5
# Extend the time for conversion as long as possible
#chip.config.sample_cycles=150
#chip.config.sample_cycles=1 #(set to default starting 2/21/2020)
c.write_configuration(chip.chip_key)
c.verify_configuration(chip.chip_key)
subprocess.run(["rm","testing.h5"])
#logger declared and switched enabledc.
c.logger = HDF5Logger("testing.h5", buffer_length=1000000)
#c.logger = HDF5Logger("testing.h5", buffer_length=10000)
c.logger.enable()
c.logger.is_enabled()
c.verify_configuration(chip.chip_key)
print(chip.config)
ReadChannelLoop(c,chip,0,NumASICchannels-1,0)
print("the end")
c.logger.disable()
#c.logger.flush()
#c.logger.close()
import socket_baselines
def get_baseline_periodicselftrigger(c,chip):
# Capture Baseline for all channels one by one
# Turn on periodic_reset
chip.config.enable_periodic_reset = 1
#chip.config.periodic_reset_cycles = 1000000
# Reduce global threshold to get baseline data
chip.config.threshold_global=255
# Extend the time for conversion as long as possible
#chip.config.sample_cycles=150
#chip.config.sample_cycles=1 #(set to default starting 2/21/2020)
# for v2 sample_cycles -> adc_hold_delay
#chip.config.adc_hold_delay=150
#chip.config.adc_hold_delay=1 #(set to default starting 2/21/2020)
# enable periodic trigger
chip.config.enable_periodic_trigger=1
chip.config.periodic_trigger_mask= [1] * NumASICchannels # Turn off all channels
# swapped line above 0 (on) to 1 (off) on 17-NOV-2021 LMM
# I suspect this was causing the leakage. Different behavior v2 and v2b with masking.
chip.config.enable_hit_veto = 0
# set trigger period (100ns*period_trigger_cycles)
chip.config.periodic_trigger_cycles=1000 # 1k = 0.1ms
#chip.config.periodic_trigger_cycles=10000 # 10k = 1ms
#chip.config.periodic_trigger_cycles=20000 # 20k = 2ms
#chip.config.periodic_trigger_cycles=100000 # 100k = 10ms
#chip.config.periodic_trigger_cycles=7500000 # 750k = 75ms
#chip.config.periodic_trigger_cycles=1000000 # 1000k = 100ms
c.write_configuration(chip.chip_key)
c.verify_configuration(chip.chip_key)
subprocess.run(["rm","testing.h5"])
#logger declared and switched enabled.
c.logger = HDF5Logger("testing.h5", buffer_length=1000000)
#c.logger = HDF5Logger("testing.h5", buffer_length=10000)
c.logger.enable()
c.logger.is_enabled()
#c.verify_configuration(chip.chip_key)
#print(chip.config)
print("Starting ReadChannelLoop...")
Monitor = 0 # display analog mon (1) or not (0)
ReadChannelLoop(c,chip,0,NumASICchannels-1,Monitor)
print("the end")
textBox.config(bg="yellow")
doneSong.play()
window.update()
c.logger.disable()
#c.logger.flush()
#c.logger.close()
# turn off periodic trigger channels
chip.config.periodic_trigger_mask= [1] * NumASICchannels
chip.config.enable_periodic_trigger=0
c.write_configuration(chip.chip_key)
#import socket_baselines
run_Popen=True
if run_Popen :
# Run socket_baselines in subprocess to allow killing
#cmd=['python socket_baselines.py']
if v2bState.get() == '0':
cmd=['python socket_baselines_v2astd.py']
elif v2bState.get() == '1':
cmd=['python socket_baselines_v2bstd.py']
else:
print('*** Not running v2a or v2b specific baselines, No idea quality of results ***')
start_time=time.time()
with Popen(cmd, shell=True, stdout=PIPE, stderr=STDOUT, bufsize=1, universal_newlines=True) as p:
FirstLine=True
print('hopefully running socket_baselines.py')
for line in p.stdout:
if FirstLine :
mypid=line # first line should just be the PID from the subprocess
FirstLine=False
print(line, end='') # process line here
dt=time.time()-start_time
#print('dt=',dt)
if dt > 30 :
# PID of process sent as first output (set in socket_baselines.py)
print('mypid socket_baselines is ',mypid)
os.kill(int(mypid),signal.SIGKILL)
nBadBaselineChannels=p.returncode
#if p.returncode != 0:
#nBadBaselineChannels=p.returncode
#raise CalledProcessError(p.returncode, p.args)
else :
os.environ['socket_PlotBaselineChannels']=LoadHTMLplotsState.get()
runpy.run_module(mod_name='socket_baselines')
nBadBaselineChannels=os.getenv('socket_BadBaselineChannels')
print(nBadBaselineChannels)
if int(nBadBaselineChannels) == 0 :
textBox.config(bg="green")
successSong.play()
window.update()
else :
textBox.config(bg="red") # flashing?
sadSong.play()
window.update()
return nBadBaselineChannels