Invalid AVX512 mask mode for certain instructions with hardcoded zero masking

[flobernd]

Hey,

I just noticed XED indicates merge masking for certain instructions that have hardcoded zero masking like e.g. -64 62 F2 2D 2E 8F AD 45 96 88 6F (vpshufbitqmb).

Intel SDM says:

This instruction uses write masking (zeroing only).

In these cases XEDs xed_decoded_inst_zeroing() API incorrectly reports false. As well probably the decorator {z} should be printed regardless of EVEX.z.