[AMDGPU] Device Side Enqueue

[DiamondLovesYou]

Tracking issue for implementing device side enqueue for AMDGPU/Rocm/HSA accelerators.

• AOT Compilation of nested kernels
• Associate ^ w/ their respective HSA kernel image handles. A first draft of this TODO could just use specialization params, but long term it'll probably be a real drag to require separate enumeration of a nested kernels. Instead, we should use the compiler to find out this info and then just store it somewhere like we do for kernel instances.
• Make ArgsPool accessible in a LAP so that GPUs can bump the base pointer.
• Completion signals: should the current invocation's signal be incremented or should we allow usage of pre-created signals? Regardless, the signals themselves can't be created GPU-side.