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K007121: CK24/xx counter #3

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jotego opened this issue May 16, 2021 · 0 comments
Open

K007121: CK24/xx counter #3

jotego opened this issue May 16, 2021 · 0 comments

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@jotego
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jotego commented May 16, 2021

COUNTER3 and COUNTER2 outputs are labelled as CK24/xx, which seems to suggest a clock divider. This actually seems to be a pixel counter. COUNTER2 is the LSB, COUNTER3 is the MSB. It counts from $40 to $FF, a total of 192 H0 counts, which is 384 pixels.

I think that a line is made of 384 pixels, and that the pixel clock is 6MHz, (384/6MHz=64us, the expected value for the line period).

So this counter divides the line in two parts. I suggest renaming the outputs to

CK24/32 -> HN1
CK24/64 -> HN2
CK24/128 -> HN3
CK24/256 -> HN4
CK24/2 -> HN5
CK24/4 -> HN6
Q2 (unlabelled) -> HN7
CK24/16 -> HN8

I think this change will help understand the blanking shift register among other things. As HN8 (CK24/16) is its input.

Maybe we could just keep COUNTER3/2 as the cell name, but give the instances a more meaningful name too.

image

@jotego jotego changed the title CK24/xx counter K007121: CK24/xx counter May 16, 2021
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