diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 39f2d99b..1b1276a7 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -11,6 +11,26 @@ stages:
   - build_runtime
   - build_hw
 
+.test_tapasco_centos:
+  stage: test_scala_toolflow
+  retry: 2
+  dependencies: []
+  tags:
+    - High
+  script:
+    - yum -y install which java-openjdk findutils
+    - ./tapasco-init.sh && source tapasco-setup.sh
+    - cd ${TAPASCO_HOME_TOOLFLOW}/scala
+    - ./gradlew test
+
+test_tapasco_centos_7:
+  image: centos:7
+  extends: .test_tapasco_centos
+
+test_tapasco_centos_8:
+  image: centos:8
+  extends: .test_tapasco_centos
+
 .test_tapasco_ubuntu:
   stage: test_scala_toolflow
   retry: 2
@@ -31,14 +51,6 @@ test_tapasco_ubuntu_18_04:
   image: ubuntu:bionic
   extends: .test_tapasco_ubuntu
 
-test_tapasco_ubuntu_18_10:
-  image: ubuntu:cosmic
-  extends: .test_tapasco_ubuntu
-
-test_tapasco_ubuntu_19_04:
-  image: ubuntu:disco
-  extends: .test_tapasco_ubuntu
-
 .test_tapasco_fedora:
   stage: test_scala_toolflow
   retry: 2
@@ -51,32 +63,6 @@ test_tapasco_ubuntu_19_04:
     - cd ${TAPASCO_HOME_TOOLFLOW}/scala
     - ./gradlew test
 
-test_tapasco_fedora_24:
-  image: fedora:24
-  extends: .test_tapasco_fedora
-
-test_tapasco_fedora_25:
-  image: fedora:25
-  extends: .test_tapasco_fedora
-
-test_tapasco_fedora_26:
-  image: fedora:26
-  extends: .test_tapasco_fedora
-
-test_tapasco_fedora_27:
-  image: fedora:27
-  extends: .test_tapasco_fedora
-
-test_tapasco_fedora_28:
-  image: fedora:28
-  extends: .test_tapasco_fedora
-
-test_tapasco_fedora_29:
-  image: fedora:29
-  extends: .test_tapasco_fedora
-  before_script:
-    - dnf -y install which findutils java-11-openjdk
-
 test_tapasco_fedora_30:
   image: fedora:30
   extends: .test_tapasco_fedora
@@ -87,6 +73,27 @@ test_tapasco_fedora_31:
   image: fedora:31
   extends: .test_tapasco_fedora
 
+.build_scala_tapasco_centos:
+  stage: build_scala_toolflow
+  retry: 2
+  dependencies: []
+  tags:
+    - High
+  before_script:
+    - yum -y install which java-openjdk findutils
+  script:
+    - ./tapasco-init.sh && source tapasco-setup.sh
+    - cd ${TAPASCO_HOME_TOOLFLOW}/scala
+    - tapasco-build-toolflow
+
+build_scala_tapasco_centos_7:
+  image: centos:7
+  extends: .build_scala_tapasco_centos
+
+build_scala_tapasco_centos_8:
+  image: centos:8
+  extends: .build_scala_tapasco_centos
+
 .build_scala_tapasco_fedora:
   stage: build_scala_toolflow
   retry: 2
@@ -102,33 +109,7 @@ test_tapasco_fedora_31:
     - ./gradlew buildRPM
   artifacts:
     paths:
-      - toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm
-
-build_scala_tapasco_fedora_24:
-  image: fedora:24
-  extends: .build_scala_tapasco_fedora
-
-build_scala_tapasco_fedora_25:
-  image: fedora:25
-  extends: .build_scala_tapasco_fedora
-
-build_scala_tapasco_fedora_26:
-  image: fedora:26
-  extends: .build_scala_tapasco_fedora
-
-build_scala_tapasco_fedora_27:
-  image: fedora:27
-  extends: .build_scala_tapasco_fedora
-
-build_scala_tapasco_fedora_28:
-  image: fedora:28
-  extends: .build_scala_tapasco_fedora
-
-build_scala_tapasco_fedora_29:
-  image: fedora:29
-  extends: .build_scala_tapasco_fedora
-  before_script:
-    - dnf -y install which findutils java-11-openjdk
+      - toolflow/scala/build/distributions/tapasco-2020-04.x86_64.rpm
 
 build_scala_tapasco_fedora_30:
   image: fedora:30
@@ -155,7 +136,7 @@ build_scala_tapasco_fedora_31:
     - ./gradlew buildDEB
   artifacts:
     paths:
-      - toolflow/scala/build/distributions/tapasco_2019-10_amd64.deb
+      - toolflow/scala/build/distributions/tapasco_2020-04_amd64.deb
 
 build_scala_tapasco_ubuntu_16_04:
   image: ubuntu:xenial
@@ -165,14 +146,6 @@ build_scala_tapasco_ubuntu_18_04:
   image: ubuntu:bionic
   extends: .build_scala_tapasco_ubuntu
 
-build_scala_tapasco_ubuntu_18_10:
-  image: ubuntu:cosmic
-  extends: .build_scala_tapasco_ubuntu
-
-build_scala_tapasco_ubuntu_19_04:
-  image: ubuntu:disco
-  extends: .build_scala_tapasco_ubuntu
-
 # build kernel module
 # as we are running in a docker instance, we cannot use tapasco-build-libs
 .build_kernel_ubuntu:
@@ -184,7 +157,7 @@ build_scala_tapasco_ubuntu_19_04:
   tags:
     - Normal
   script:
-    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python libelf-dev
+    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python3 libelf-dev
     - ./tapasco-init.sh && source tapasco-setup.sh
     - for d in `ls /lib/modules`; do echo "Building for linux headers in $d"; pushd runtime/kernel; make LINUX_HOME="/lib/modules/$d/build" clean && make LINUX_HOME=/lib/modules/$d/build -j 1 $MODE; popd; done
   artifacts:
@@ -199,14 +172,6 @@ build_kernel_ubuntu_18_04:
   image: ubuntu:bionic
   extends: .build_kernel_ubuntu
 
-build_kernel_ubuntu_18_10:
-  image: ubuntu:cosmic
-  extends: .build_kernel_ubuntu
-
-build_kernel_ubuntu_19_04:
-  image: ubuntu:disco
-  extends: .build_kernel_ubuntu
-
 build_kernel_ubuntu_16_04_debug:
   variables:
     MODE: "all"
@@ -219,34 +184,19 @@ build_kernel_ubuntu_18_04_debug:
   image: ubuntu:bionic
   extends: .build_kernel_ubuntu
 
-build_kernel_ubuntu_18_10_debug:
-  variables:
-    MODE: "all"
-  image: ubuntu:cosmic
-  extends: .build_kernel_ubuntu
-
-build_kernel_ubuntu_19_04_debug:
+build_kernel_arm32v7_debug:
+  stage: build_kernel
   variables:
     MODE: "all"
-  image: ubuntu:disco
+  image: arm32v7/ubuntu:16.04
   extends: .build_kernel_ubuntu
 
-build_kernel_32bit_debug:
+build_kernel_arm64v8_debug:
   stage: build_kernel
   variables:
     MODE: "all"
-  image: i386/ubuntu
-  retry: 2
-  dependencies: []
-  tags:
-    - Normal
-  script:
-    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python libelf-dev
-    - ./tapasco-init.sh && source tapasco-setup.sh
-    - for d in `ls /lib/modules`; do echo "Building for linux headers in $d"; pushd runtime/kernel; make LINUX_HOME="/lib/modules/$d/build" clean && CPPFLAGS="-Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast" make LINUX_HOME=/lib/modules/$d/build -j 1 $MODE; popd; done
-  artifacts:
-    paths:
-      - runtime/kernel/tlkm.ko
+  image: arm64v8/ubuntu:16.04
+  extends: .build_kernel_ubuntu
 
 .build_kernel_fedora:
   stage: build_kernel
@@ -264,30 +214,6 @@ build_kernel_32bit_debug:
     paths:
       - runtime/kernel/tlkm.ko
 
-build_kernel_fedora_24:
-  image: fedora:24
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_25:
-  image: fedora:25
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_26:
-  image: fedora:26
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_27:
-  image: fedora:27
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_28:
-  image: fedora:28
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_29:
-  image: fedora:29
-  extends: .build_kernel_fedora
-
 build_kernel_fedora_30:
   image: fedora:30
   extends: .build_kernel_fedora
@@ -296,42 +222,6 @@ build_kernel_fedora_31:
   image: fedora:31
   extends: .build_kernel_fedora
 
-build_kernel_fedora_24_debug:
-  variables:
-    MODE: "all"
-  image: fedora:24
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_25_debug:
-  variables:
-    MODE: "all"
-  image: fedora:25
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_26_debug:
-  variables:
-    MODE: "all"
-  image: fedora:26
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_27_debug:
-  variables:
-    MODE: "all"
-  image: fedora:27
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_28_debug:
-  variables:
-    MODE: "all"
-  image: fedora:28
-  extends: .build_kernel_fedora
-
-build_kernel_fedora_29_debug:
-  variables:
-    MODE: "all"
-  image: fedora:29
-  extends: .build_kernel_fedora
-
 build_kernel_fedora_30_debug:
   variables:
     MODE: "all"
@@ -360,36 +250,12 @@ build_kernel_fedora_31_debug:
 
 .build_tapasco_fedora:
   before_script:
-    - dnf -y install kernel-devel make gcc gcc-c++ elfutils-libelf-devel cmake ncurses-devel python libatomic git rpm-build
+    - dnf -y install kernel-devel make gcc gcc-c++ elfutils-libelf-devel cmake ncurses-devel python3 libatomic git rpm-build
   artifacts:
     paths:
       - build/tapasco-*-Linux.rpm
   extends: .build_tapasco
 
-build_tapasco_fedora_24:
-  image: fedora:24
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_25:
-  image: fedora:25
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_26:
-  image: fedora:26
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_27:
-  image: fedora:27
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_28:
-  image: fedora:28
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_29:
-  image: fedora:29
-  extends: .build_tapasco_fedora
-
 build_tapasco_fedora_30:
   image: fedora:30
   extends: .build_tapasco_fedora
@@ -398,30 +264,6 @@ build_tapasco_fedora_31:
   image: fedora:31
   extends: .build_tapasco_fedora
 
-build_tapasco_fedora_26_debug:
-  variables:
-    MODE: "debug"
-  image: fedora:26
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_27_debug:
-  variables:
-    MODE: "debug"
-  image: fedora:27
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_28_debug:
-  variables:
-    MODE: "debug"
-  image: fedora:28
-  extends: .build_tapasco_fedora
-
-build_tapasco_fedora_29_debug:
-  variables:
-    MODE: "debug"
-  image: fedora:29
-  extends: .build_tapasco_fedora
-
 build_tapasco_fedora_30_debug:
   variables:
     MODE: "debug"
@@ -436,7 +278,7 @@ build_tapasco_fedora_31_debug:
 
 .build_tapasco_ubuntu:
   before_script:
-    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python cmake libelf-dev libncurses-dev git rpm
+    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python3 cmake libelf-dev libncurses-dev git rpm
   artifacts:
     paths:
       - build/tapasco-*-Linux.deb
@@ -450,28 +292,20 @@ build_tapasco_ubuntu_18_04:
   image: ubuntu:bionic
   extends: .build_tapasco_ubuntu
 
-build_tapasco_ubuntu_18_10:
-  image: ubuntu:cosmic
-  extends: .build_tapasco_ubuntu
-
-build_tapasco_ubuntu_19_04:
-  image: ubuntu:disco
-  extends: .build_tapasco_ubuntu
-
-build_tapasco_ubuntu_19_04_cross:
+build_tapasco_ubuntu_16_04_cross:
   variables:
     TARGET: "zynq"
-  image: ubuntu:disco
+  image: ubuntu:xenial
   before_script:
-    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python cmake libelf-dev libncurses-dev git rpm gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf
+    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python3 cmake libelf-dev libncurses-dev git rpm gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf
   extends: .build_tapasco_ubuntu
 
-build_tapasco_ubuntu_19_04_clang:
+build_tapasco_ubuntu_16_04_clang:
   variables:
     TARGET: "clang"
-  image: ubuntu:disco
+  image: ubuntu:xenial
   before_script:
-    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python cmake libelf-dev libncurses-dev git rpm clang
+    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python3 cmake libelf-dev libncurses-dev git rpm clang
   extends: .build_tapasco_ubuntu
 
 build_tapasco_ubuntu_16_04_debug:
@@ -486,43 +320,44 @@ build_tapasco_ubuntu_18_04_debug:
   image: ubuntu:bionic
   extends: .build_tapasco_ubuntu
 
-build_tapasco_ubuntu_18_10_debug:
+build_tapasco_arm32v7_debug:
   variables:
     MODE: "debug"
-  image: ubuntu:cosmic
+  image: arm32v7/ubuntu:16.04
   extends: .build_tapasco_ubuntu
 
-build_tapasco_ubuntu_19_04_debug:
+build_tapasco_arm64v8_debug:
   variables:
     MODE: "debug"
-  image: ubuntu:disco
+  image: arm64v8/ubuntu:16.04
   extends: .build_tapasco_ubuntu
 
-build_tapasco_ubuntu_19_04_cross_debug:
+build_tapasco_ubuntu_16_04_cross_debug:
   variables:
     MODE: "debug"
     TARGET: "zynq"
-  image: ubuntu:disco
+  image: ubuntu:xenial
   before_script:
-    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python cmake libelf-dev libncurses-dev git rpm gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf
+    - apt-get -y update && apt-get -y install build-essential linux-headers-generic python3 cmake libelf-dev libncurses-dev git rpm gcc-arm-linux-gnueabihf g++-arm-linux-gnueabihf
   extends: .build_tapasco_ubuntu
 
 tapasco_compose_ubuntu:
   stage: build_hw
+  retry: 2
   variables:
     VIVADO_VERSION: "2019.1"
     XILINX_VIVADO: "/opt/cad/xilinx/vivado/Vivado/${VIVADO_VERSION}"
     XILINXD_LICENSE_FILE: "/opt/cad/keys/xilinx"
   tags:
     - CAD
-  image: ubuntu:disco
+  image: ubuntu:bionic
   dependencies:
-    - build_scala_tapasco_ubuntu_19_04
+    - build_scala_tapasco_ubuntu_18_04
   script:
     - source $XILINX_VIVADO/settings64.sh
     - apt-get -y update
     - apt-get -y install libtinfo5 build-essential
-    - apt -y install ./toolflow/scala/build/distributions/tapasco_2019-10_amd64.deb
+    - apt -y install ./toolflow/scala/build/distributions/tapasco_2020-04_amd64.deb
     - /opt/tapasco/tapasco-init-toolflow.sh
     - source tapasco-setup-toolflow.sh
     - tapasco -v hls counter -p pynq
@@ -539,17 +374,17 @@ tapasco_compose_ubuntu:
   tags:
     - CAD
     - High
-  image: fedora:28
+  image: fedora:30
   dependencies:
-    - build_scala_tapasco_fedora_28
+    - build_scala_tapasco_fedora_30
   before_script:
-    - dnf -y install which unzip git zip tar findutils libX11 gcc gcc-c++ python
+    - dnf -y install which unzip git zip tar findutils libX11 gcc gcc-c++ python3
     - ln -s /lib64/libtinfo.so.6 /lib64/libtinfo.so.5
   script:
     - source $XILINX_VIVADO/settings64.sh
     - which vivado
     - which vivado_hls
-    - dnf -y install toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm
+    - dnf -y install toolflow/scala/build/distributions/tapasco-2020-04.x86_64.rpm
     - /opt/tapasco/tapasco-init-toolflow.sh
     - source tapasco-setup-toolflow.sh
     - tapasco hls counter -p $PLATFORM --skipEvaluation
@@ -580,6 +415,11 @@ tapasco_compose_19_1:
     VIVADO_VERSION: "2019.1"
   extends: .tapasco_compose
 
+tapasco_compose_19_2:
+  variables:
+    VIVADO_VERSION: "2019.2"
+  extends: .tapasco_compose
+
 tapasco_compose_pcie:
   variables:
     VIVADO_VERSION: "2018.3"
diff --git a/README.md b/README.md
index 926d5260..5923281d 100644
--- a/README.md
+++ b/README.md
@@ -11,7 +11,7 @@ TaPaSCo is known to work in this environment:
 
 *   Intel x86_64 arch
 *   Linux kernel 4.4+
-*   Fedora 26+, Ubuntu 16.04+
+*   Fedora 30+, Ubuntu 16.04+
 *   Fedora 24/25 does not support debug mode due to GCC bug
 *   Bash Shell 4.2.x+
 
@@ -95,7 +95,7 @@ Prerequisites for the Runtime
 
 *Ubuntu*:
 ```
-apt-get -y build-essential linux-headers-generic python cmake libelf-dev libncurses-dev git rpm
+apt-get -y install build-essential linux-headers-generic python cmake libelf-dev libncurses-dev git rpm
 ```
 
 *Fedora*:
@@ -176,62 +176,27 @@ We provided pre-compiled packages for many popular Linux distributions. All pack
 ### Ubuntu 16.04
 [Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_16_04)
 [Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_16_04_debug)
-[Runtime (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_16_04)
-[Runtime Debug (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_16_04_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco_2019-10_amd64.deb?job=build_scala_tapasco_ubuntu_16_04)
+[Runtime (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.deb?job=build_tapasco_ubuntu_16_04)
+[Runtime Debug (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.deb?job=build_tapasco_ubuntu_16_04_debug)
+[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco_2020-04_amd64.deb?job=build_scala_tapasco_ubuntu_16_04)
 
 ### Ubuntu 18.04
 [Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_18_04)
 [Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_18_04_debug)
-[Runtime (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_18_04)
-[Runtime Debug (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_18_04_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco_2019-10_amd64.deb?job=build_scala_tapasco_ubuntu_18_04)
-
-### Ubuntu 18.10
-[Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_18_10)
-[Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_18_10_debug)
-[Runtime (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_18_10)
-[Runtime Debug (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_18_10_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco_2019-10_amd64.deb?job=build_scala_tapasco_ubuntu_18_10)
-
-### Ubuntu 19.04
-[Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_19_04)
-[Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_ubuntu_19_04_debug)
-[Runtime (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_19_04)
-[Runtime Debug (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.deb?job=build_tapasco_ubuntu_19_04_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco_2019-10_amd64.deb?job=build_scala_tapasco_ubuntu_19_04)
-
-### Fedora 27
-[Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_27)
-[Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_27_debug)
-[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_27)
-[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_27_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm?job=build_scala_tapasco_fedora_27)
-
-### Fedora 28
-[Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_28)
-[Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_28_debug)
-[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_28)
-[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_28_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm?job=build_scala_tapasco_fedora_28)
-
-### Fedora 29
-[Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_29)
-[Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_29_debug)
-[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_29)
-[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_29_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm?job=build_scala_tapasco_fedora_29)
+[Runtime (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.deb?job=build_tapasco_ubuntu_18_04)
+[Runtime Debug (DEB)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.deb?job=build_tapasco_ubuntu_18_04_debug)
+[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco_2020-04_amd64.deb?job=build_scala_tapasco_ubuntu_18_04)
 
 ### Fedora 30
 [Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_30)
 [Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_30_debug)
-[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_30)
-[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_30_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm?job=build_scala_tapasco_fedora_30)
+[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.rpm?job=build_tapasco_fedora_30)
+[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.rpm?job=build_tapasco_fedora_30_debug)
+[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2020-04.x86_64.rpm?job=build_scala_tapasco_fedora_30)
 
 ### Fedora 31
 [Kernel Driver](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_31)
 [Kernel Driver Debug](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/runtime/kernel/tlkm.ko?job=build_kernel_fedora_31_debug)
-[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_31)
-[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2019.10.0-Linux.rpm?job=build_tapasco_fedora_31_debug)
-[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2019-10.x86_64.rpm?job=build_scala_tapasco_fedora_31)
+[Runtime (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.rpm?job=build_tapasco_fedora_31)
+[Runtime Debug (RPM)](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/build/tapasco-2020.04.0-Linux.rpm?job=build_tapasco_fedora_31_debug)
+[Toolflow](https://git.esa.informatik.tu-darmstadt.de/tapasco/tapasco/-/jobs/artifacts/master/raw/toolflow/scala/build/distributions/tapasco-2020-04.x86_64.rpm?job=build_scala_tapasco_fedora_31)
diff --git a/misc/documentation/memory-benchmark.md b/misc/documentation/memory-benchmark.md
new file mode 100644
index 00000000..b7c3a361
--- /dev/null
+++ b/misc/documentation/memory-benchmark.md
@@ -0,0 +1,61 @@
+Memory Benchmark
+=================
+
+TaPaSCo includes a PE and example programs which can be used to measure the
+memory performance.
+
+You first have to import this PE and build a bitstream:
+```
+tapasco import $TAPASCO_HOME_TOOLFLOW/examples/MemoryBenchmark.zip as 321
+tapasco compose [MemoryBenchmark x 1] @ 300MHz -p *your_platform*
+```
+You can also benchmark Non-DDR memory with this PE, e.g. HBM. For this you need to
+connect the PE to the HBM memory as explained [here](tapasco-features.md#HBM).
+Be aware that this PE includes two AXI Master Interfaces (M_AXI & M_AXI_BATCH),
+you should connect both to HBM.
+You can also include multiple MemoryBenchmark-PEs in your design, e.g. to test
+the performance of multiple HBM ports in parallel.
+
+## Example Programs
+
+There are two example programs you can use to measure the performance, once
+the bitstream is built and loaded onto your FPGA:
+
+### memtest
+
+This program requires one instance of the MemoryBenchmark-PE.
+It benchmarks the performance for random accesse and batch accesses, as well as
+the latency of read requests.
+
+#### Random Access
+
+For the random access performance the PE continously sends requests to the memory
+for a given time (by default 1 second). The requests can either be read requests,
+write requests or read and write requests in parallel.
+At the end the number of completed requests is used to compute the average IOPS
+and transfer rate.
+The size of each request is capped at 4096 Bytes.
+
+#### Batch Access
+
+For the batch access performance the PE sends one request to the memory.
+This can again be either a read request, a write request or a read and a write
+request in parallel.
+The time until the request is completed is measured and used to compute the
+transfer rate. The example program repeats this multiple times (by default 1.000)
+and calculates the average the transfer rate.
+The maximum size of the requests is only capped by the available memory.
+
+#### Read Latency
+
+The PE sends one read request to the memory and measures the latency between
+sending the request and receiving the first data packet.
+Again this is repeated multiple times (by default 100.000) and the minimum,
+average and maximum latency is computed.
+
+### memtest-parallel
+
+This program requires at least two instances of the MemoryBenchmark-PE.
+It is similar to the `memtest` program, but can use multiple instances
+of the PE to measure the performance when using them in parallel. This
+is e.g. useful when measuring the performance of HBM.
diff --git a/misc/documentation/tapasco-features.md b/misc/documentation/tapasco-features.md
index 26a6301f..70ed7542 100644
--- a/misc/documentation/tapasco-features.md
+++ b/misc/documentation/tapasco-features.md
@@ -77,3 +77,43 @@ Cache {
 
 #### ATS-PRI
 See [VC709](#VC709).
+
+### XUP-VVH
+
+#### HBM
+Allows to connect a subset of the AXI master interfaces of PEs to HBM memory instead of DDR. Each AXI master will be connected to its individual memory block (-> no data sharing possible) of size 256 MB. Up to 32 AXI masters can be connected to HBM. This is configured by specifying "groups" consisting of a PE-ID, a count and one or multiple interface names.
+
+```
+HBM {
+  "HBM0": {
+  	"ID": "PE1",
+  	"Count": "2",
+  	"Interfaces": "M_AXI"
+  },
+  "HBM1": {
+  	"ID:"PE2",
+  	"Count": "1",
+  	"Interfaces": "M_AXI M_AXI_2"
+  }
+}
+```
+
+This example connects the M_AXI interface of two PE1 instances and the M_AXI and M_AXI_2 interfaces of one PE2 instance to HBM. All other AXI masters are connected to DDR.
+
+#### Regslice
+Allows to enable or disable the optional AXI register slices. The register slices can help to achieve timing closure but introduce latency and may impact performance.
+
+```
+Regslice {
+  "DMA_HOST": true | false # used by DMA engine to access host memory
+  "DMA_MIGIC": false | true # used by DMA engine to access FPGA memory
+  "HOST_DMA": true | false # used to program DMA engine
+  "HOST_MEMCTRL": true | false # used to configure and query ECC
+  "HOST_ARCH": true | false # used to configure & start PEs
+  "ARCH_MEM": false | true # used by architecture for memory access; between interconnect network and memory
+  "PE": false | true # used by PEs for memory access; between PE and interconnect network (only for non HBM-memory)
+  "HBM_PE": false | true # used by PEs for memory access; between PE and smartconnect (only for HBM-memory)
+  "HBM_HBM": false | true # used by PEs for memory access; between smartconnect and HBM (only for HBM-memory)
+}
+```
+If no value is given for a register slice (or for all), a default value is used. The default value for each register slice is the first value in the example above.
diff --git a/misc/license/lgpl-v3.tmpl b/misc/license/lgpl-v3.tmpl
new file mode 100644
index 00000000..357d1051
--- /dev/null
+++ b/misc/license/lgpl-v3.tmpl
@@ -0,0 +1,17 @@
+Copyright (c) ${years} ${owner}.
+
+This file is part of ${projectname} 
+(see ${projecturl}).
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU Lesser General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU Lesser General Public License for more details.
+
+You should have received a copy of the GNU Lesser General Public License
+along with this program. If not, see <http://www.gnu.org/licenses/>.
diff --git a/misc/license/licenseheader.sh b/misc/license/licenseheader.sh
new file mode 100755
index 00000000..0238402e
--- /dev/null
+++ b/misc/license/licenseheader.sh
@@ -0,0 +1 @@
+licenseheaders -t lgpl-v3.tmpl -y 2014-2020 -o "Embedded Systems and Applications, TU Darmstadt" -n TaPaSCo -u "https://github.com/esa-tu-darmstadt/tapasco"
diff --git a/runtime/.clang-format b/runtime/.clang-format
index ae28a6af..838938dd 100644
--- a/runtime/.clang-format
+++ b/runtime/.clang-format
@@ -3,24 +3,29 @@ Language:        Cpp
 # BasedOnStyle:  LLVM
 AccessModifierOffset: -2
 AlignAfterOpenBracket: Align
+AlignConsecutiveMacros: false
 AlignConsecutiveAssignments: false
 AlignConsecutiveDeclarations: false
 AlignEscapedNewlines: Right
 AlignOperands:   true
 AlignTrailingComments: true
+AllowAllArgumentsOnNextLine: true
+AllowAllConstructorInitializersOnNextLine: true
 AllowAllParametersOfDeclarationOnNextLine: true
 AllowShortBlocksOnASingleLine: false
 AllowShortCaseLabelsOnASingleLine: false
 AllowShortFunctionsOnASingleLine: All
-AllowShortIfStatementsOnASingleLine: false
+AllowShortLambdasOnASingleLine: All
+AllowShortIfStatementsOnASingleLine: Never
 AllowShortLoopsOnASingleLine: false
 AlwaysBreakAfterDefinitionReturnType: None
 AlwaysBreakAfterReturnType: None
 AlwaysBreakBeforeMultilineStrings: false
-AlwaysBreakTemplateDeclarations: false
+AlwaysBreakTemplateDeclarations: MultiLine
 BinPackArguments: true
 BinPackParameters: true
-BraceWrapping:   
+BraceWrapping:
+  AfterCaseLabel:  false
   AfterClass:      false
   AfterControlStatement: false
   AfterEnum:       false
@@ -39,6 +44,7 @@ BraceWrapping:
 BreakBeforeBinaryOperators: None
 BreakBeforeBraces: Attach
 BreakBeforeInheritanceComma: false
+BreakInheritanceList: BeforeColon
 BreakBeforeTernaryOperators: true
 BreakConstructorInitializersBeforeComma: false
 BreakConstructorInitializers: BeforeColon
@@ -55,12 +61,12 @@ DerivePointerAlignment: false
 DisableFormat:   false
 ExperimentalAutoDetectBinPacking: false
 FixNamespaceComments: true
-ForEachMacros:   
+ForEachMacros:
   - foreach
   - Q_FOREACH
   - BOOST_FOREACH
 IncludeBlocks:   Preserve
-IncludeCategories: 
+IncludeCategories:
   - Regex:           '^"(llvm|llvm-c|clang|clang-c)/'
     Priority:        2
   - Regex:           '^(<|"(gtest|gmock|isl|json)/)'
@@ -79,6 +85,7 @@ MacroBlockBegin: ''
 MacroBlockEnd:   ''
 MaxEmptyLinesToKeep: 1
 NamespaceIndentation: None
+ObjCBinPackProtocolList: Auto
 ObjCBlockIndentWidth: 2
 ObjCSpaceAfterProperty: false
 ObjCSpaceBeforeProtocolList: true
@@ -87,20 +94,22 @@ PenaltyBreakBeforeFirstCallParameter: 19
 PenaltyBreakComment: 300
 PenaltyBreakFirstLessLess: 120
 PenaltyBreakString: 1000
+PenaltyBreakTemplateDeclaration: 10
 PenaltyExcessCharacter: 1000000
 PenaltyReturnTypeOnItsOwnLine: 60
 PointerAlignment: Right
-RawStringFormats: 
-  - Delimiter:       pb
-    Language:        TextProto
-    BasedOnStyle:    google
 ReflowComments:  true
 SortIncludes:    true
 SortUsingDeclarations: true
 SpaceAfterCStyleCast: false
+SpaceAfterLogicalNot: false
 SpaceAfterTemplateKeyword: true
 SpaceBeforeAssignmentOperators: true
+SpaceBeforeCpp11BracedList: false
+SpaceBeforeCtorInitializerColon: true
+SpaceBeforeInheritanceColon: true
 SpaceBeforeParens: ControlStatements
+SpaceBeforeRangeBasedForLoopColon: true
 SpaceInEmptyParentheses: false
 SpacesBeforeTrailingComments: 1
 SpacesInAngles:  false
@@ -109,6 +118,9 @@ SpacesInCStyleCastParentheses: false
 SpacesInParentheses: false
 SpacesInSquareBrackets: false
 Standard:        Cpp11
+StatementMacros:
+  - Q_UNUSED
+  - QT_REQUIRE_VERSION
 TabWidth:        8
 UseTab:          Never
 ...
diff --git a/runtime/CMakeLists.txt b/runtime/CMakeLists.txt
index 8efbb3c1..8f66de7b 100644
--- a/runtime/CMakeLists.txt
+++ b/runtime/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.0.0 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake)
 project(tapasco VERSION 1.0 LANGUAGES C CXX)
@@ -5,8 +22,8 @@ project(tapasco VERSION 1.0 LANGUAGES C CXX)
 SET(CPACK_GENERATOR "RPM" "DEB" "TGZ" "ZIP" "STGZ" "TBZ2")
 SET(CPACK_PACKAGE_CONTACT "tapasco@esa.tu-darmstadt.de")
 
-SET(CPACK_PACKAGE_VERSION_MAJOR 2019)
-SET(CPACK_PACKAGE_VERSION_MINOR 10)
+SET(CPACK_PACKAGE_VERSION_MAJOR 2020)
+SET(CPACK_PACKAGE_VERSION_MINOR 04)
 SET(CPACK_PACKAGE_VERSION_PATCH 0)
 
 INCLUDE(CPack)
@@ -15,6 +32,10 @@ include(GNUInstallDirs)
 
 set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -D__MY_FILE__='\"$(subst ${CMAKE_SOURCE_DIR}/,,$(abspath $<))\"'")
 
+install(FILES platform/pcie/module/program_pcie.tcl DESTINATION ${CMAKE_INSTALL_DATAROOTDIR}/Tapasco/platform/pcie/module/)
+install(PROGRAMS platform/pcie/module/bit_reload.sh DESTINATION ${CMAKE_INSTALL_DATAROOTDIR}/Tapasco/platform/pcie/module/)
+install(PROGRAMS bin/tapasco-load-bitstream DESTINATION ${CMAKE_INSTALL_DATAROOTDIR}/Tapasco/bin)
+
 add_subdirectory(kernel)
 add_subdirectory(common)
 add_subdirectory(platform)
diff --git a/runtime/arch/CMakeLists.txt b/runtime/arch/CMakeLists.txt
index a99cb50c..bdf635f7 100644
--- a/runtime/arch/CMakeLists.txt
+++ b/runtime/arch/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project(arch-axi4mm VERSION 1.0 LANGUAGES C CXX)
diff --git a/runtime/arch/axi4mm/src/tapasco_regs.c b/runtime/arch/axi4mm/src/tapasco_regs.c
index b2f1c10f..170a3a2e 100644
--- a/runtime/arch/axi4mm/src/tapasco_regs.c
+++ b/runtime/arch/axi4mm/src/tapasco_regs.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TAPASCO).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_address_map.c
 //! @brief	Resolves logical registers to concrete AXI addresses on the
 //!		Zynq platform (implementation of micro API).
diff --git a/runtime/arch/common/include/tapasco_context.h b/runtime/arch/common/include/tapasco_context.h
index d5bb4498..70cdc32c 100644
--- a/runtime/arch/common/include/tapasco_context.h
+++ b/runtime/arch/common/include/tapasco_context.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_context.h
 //! @brief	Global context helper methods.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/include/tapasco_delayed_transfers.h b/runtime/arch/common/include/tapasco_delayed_transfers.h
index 2c351aab..46228391 100644
--- a/runtime/arch/common/include/tapasco_delayed_transfers.h
+++ b/runtime/arch/common/include/tapasco_delayed_transfers.h
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TAPASCO).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/** @file	tapasco_delayed_transfers.c
- *  @brief	Functions for delayed memory transfers.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TAPASCO_DELAYED_TRANSFERS_H__
 #define TAPASCO_DELAYED_TRANSFERS_H__
 
diff --git a/runtime/arch/common/include/tapasco_device.h b/runtime/arch/common/include/tapasco_device.h
index 9630255a..ee0252cc 100644
--- a/runtime/arch/common/include/tapasco_device.h
+++ b/runtime/arch/common/include/tapasco_device.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_device.h
 //! @brief	Device context struct and helper methods.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/include/tapasco_jobs.h b/runtime/arch/common/include/tapasco_jobs.h
index 4fcb85e0..95b78f1c 100644
--- a/runtime/arch/common/include/tapasco_jobs.h
+++ b/runtime/arch/common/include/tapasco_jobs.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_jobs.h
 //! @brief	Defines a micro API for threadpool job management.
 //! @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/include/tapasco_local_mem.h b/runtime/arch/common/include/tapasco_local_mem.h
index 16476f1c..0eaed274 100644
--- a/runtime/arch/common/include/tapasco_local_mem.h
+++ b/runtime/arch/common/include/tapasco_local_mem.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_local_mem.h
 //! @brief	Helper methods to manage PE-local memories.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/include/tapasco_logging.h b/runtime/arch/common/include/tapasco_logging.h
index 434dea88..a6fe9118 100644
--- a/runtime/arch/common/include/tapasco_logging.h
+++ b/runtime/arch/common/include/tapasco_logging.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TAPASCO).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_logging.h
 //! @brief	libtapasco logging functions.
 //!		Internal logging functions to produce debug output; levels are
diff --git a/runtime/arch/common/include/tapasco_memory.h b/runtime/arch/common/include/tapasco_memory.h
index 72646577..8f54523a 100644
--- a/runtime/arch/common/include/tapasco_memory.h
+++ b/runtime/arch/common/include/tapasco_memory.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_memory.h
 //! @brief	Common TaPaSCo API implementation fragment:
 //!		Provides standard API to allocate and free memory.
diff --git a/runtime/arch/common/include/tapasco_pemgmt.h b/runtime/arch/common/include/tapasco_pemgmt.h
index 433c66dd..ffb10c74 100644
--- a/runtime/arch/common/include/tapasco_pemgmt.h
+++ b/runtime/arch/common/include/tapasco_pemgmt.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_pemgmt.h
 //! @brief	Defines a micro API to access the pes available in a
 //!             hardware threadpool, perform enumeration, locking etc.
diff --git a/runtime/arch/common/include/tapasco_perfc.h b/runtime/arch/common/include/tapasco_perfc.h
index 9f3f1e6c..ac409b47 100644
--- a/runtime/arch/common/include/tapasco_perfc.h
+++ b/runtime/arch/common/include/tapasco_perfc.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_perfc.h
 //! @brief	Performance counters interface for libtapasco.
 //!             Defines interface to diverse performance counters for the
diff --git a/runtime/arch/common/include/tapasco_regs.h b/runtime/arch/common/include/tapasco_regs.h
index 3af152e1..c0aa85e2 100644
--- a/runtime/arch/common/include/tapasco_regs.h
+++ b/runtime/arch/common/include/tapasco_regs.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_reg.h
 //! @brief	Register defines for TaPaSCo control registers.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/include/tapasco_scheduler.h b/runtime/arch/common/include/tapasco_scheduler.h
index e74a7426..79503212 100644
--- a/runtime/arch/common/include/tapasco_scheduler.h
+++ b/runtime/arch/common/include/tapasco_scheduler.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_scheduler.h
 //! @brief	Defines micro API for job scheduling on hardware threadpools.
 //! @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/src/tapasco_context.c b/runtime/arch/common/src/tapasco_context.c
index 8eb8d801..d2889223 100644
--- a/runtime/arch/common/src/tapasco_context.c
+++ b/runtime/arch/common/src/tapasco_context.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_context.c
 //! @brief	Global TaPaSCo context struct:
 //!             Holds references to device contexts as well as any Architecture-
diff --git a/runtime/arch/common/src/tapasco_delayed_transfers.c b/runtime/arch/common/src/tapasco_delayed_transfers.c
index 599701e2..29084951 100644
--- a/runtime/arch/common/src/tapasco_delayed_transfers.c
+++ b/runtime/arch/common/src/tapasco_delayed_transfers.c
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/** @file tapasco_delayed_transfers.c
- *  @brief  Functions for delayed memory transfers.
- *  @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <platform.h>
 #include <tapasco.h>
 #include <tapasco_context.h>
diff --git a/runtime/arch/common/src/tapasco_device.c b/runtime/arch/common/src/tapasco_device.c
index bb59c1ea..394d896e 100644
--- a/runtime/arch/common/src/tapasco_device.c
+++ b/runtime/arch/common/src/tapasco_device.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_device.c
 //! @brief	Device context struct and helper methods.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/src/tapasco_errors.c b/runtime/arch/common/src/tapasco_errors.c
index d5bd10be..c1c68035 100644
--- a/runtime/arch/common/src/tapasco_errors.c
+++ b/runtime/arch/common/src/tapasco_errors.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file tapasco_errors.c
 //! @brief Implementation of error-related messages.
 //! @authors J. Korinth (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/src/tapasco_jobs.c b/runtime/arch/common/src/tapasco_jobs.c
index 14d0d90e..f19d528c 100644
--- a/runtime/arch/common/src/tapasco_jobs.c
+++ b/runtime/arch/common/src/tapasco_jobs.c
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TAPASCO).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_jobs.c
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <gen_fixed_size_pool.h>
 #include <stdlib.h>
@@ -283,6 +280,9 @@ inline tapasco_job_id_t tapasco_jobs_acquire(tapasco_jobs_t *jobs) {
   tapasco_job_id_t j_id = tapasco_jobs_fsp_get(&jobs->q);
   if (j_id != INVALID_IDX) {
     jobs->q.elems[j_id].state = TAPASCO_JOB_STATE_REQUESTED;
+    jobs->q.elems[j_id].args_len = 0;
+    for (size_t i = 0; i < TAPASCO_JOB_MAX_ARGS; i++)
+      jobs->q.elems[j_id].transfers[i].len = 0;
     j_id = jobs->q.elems[j_id].id;
     if (j_id > jobs->job_id_high_watermark) {
       jobs->job_id_high_watermark = j_id;
diff --git a/runtime/arch/common/src/tapasco_local_mem.c b/runtime/arch/common/src/tapasco_local_mem.c
index 0a87cd0a..04187e49 100644
--- a/runtime/arch/common/src/tapasco_local_mem.c
+++ b/runtime/arch/common/src/tapasco_local_mem.c
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_local_mem.c
- *  @brief	Helper methods to manage PE-local memories.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <gen_mem.h>
 #include <platform.h>
 #include <platform_info.h>
@@ -108,8 +104,7 @@ tapasco_res_t tapasco_local_mem_alloc(tapasco_local_mem_t *lmem,
 }
 
 void tapasco_local_mem_dealloc(tapasco_local_mem_t *lmem,
-                               tapasco_slot_id_t slot_id,
-                               tapasco_handle_t h,
+                               tapasco_slot_id_t slot_id, tapasco_handle_t h,
                                size_t sz) {
   tapasco_slot_id_t slot_id_local =
       tapasco_local_mem_get_slot(lmem->devctx, slot_id);
diff --git a/runtime/arch/common/src/tapasco_logging.c b/runtime/arch/common/src/tapasco_logging.c
index 051e50e7..b2949b4e 100644
--- a/runtime/arch/common/src/tapasco_logging.c
+++ b/runtime/arch/common/src/tapasco_logging.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_logging.c
 //! @brief	Logging helper implementation. Initialization for debug output.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/src/tapasco_memory.c b/runtime/arch/common/src/tapasco_memory.c
index 4fb7dc7b..24149014 100644
--- a/runtime/arch/common/src/tapasco_memory.c
+++ b/runtime/arch/common/src/tapasco_memory.c
@@ -1,27 +1,22 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TAPASCO).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_memory.c
- *  @brief	Default implementation of memory functions: Pass-through to
- *  		Platform implementation.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <platform.h>
 #include <platform_info.h>
diff --git a/runtime/arch/common/src/tapasco_pemgmt.c b/runtime/arch/common/src/tapasco_pemgmt.c
index 7d4252ea..6e6e7e6c 100644
--- a/runtime/arch/common/src/tapasco_pemgmt.c
+++ b/runtime/arch/common/src/tapasco_pemgmt.c
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file tapasco_pemgmt.c
- *  @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <gen_stack.h>
 #include <khash.h>
diff --git a/runtime/arch/common/src/tapasco_perfc.c b/runtime/arch/common/src/tapasco_perfc.c
index 6001cb9a..c8346f91 100644
--- a/runtime/arch/common/src/tapasco_perfc.c
+++ b/runtime/arch/common/src/tapasco_perfc.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_perfc.c
 //! @brief	Performance counters interface for libtapasco.
 //!             Defines interface to diverse performance counters for the
diff --git a/runtime/arch/common/src/tapasco_scheduler.c b/runtime/arch/common/src/tapasco_scheduler.c
index 5bbdd5ac..bf5d58a3 100644
--- a/runtime/arch/common/src/tapasco_scheduler.c
+++ b/runtime/arch/common/src/tapasco_scheduler.c
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/** @file tapasco_scheduler.c
- *  @brief  Primitive scheduler.
- *  @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <platform.h>
 #include <tapasco_delayed_transfers.h>
diff --git a/runtime/arch/common/src/tapasco_version.c b/runtime/arch/common/src/tapasco_version.c
index 66fb2507..60dd69a8 100644
--- a/runtime/arch/common/src/tapasco_version.c
+++ b/runtime/arch/common/src/tapasco_version.c
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_version.c
- *  @brief	Common implementations of the TaPaSCo version info.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <string.h>
 #include <tapasco.h>
 #include <tapasco_errors.h>
diff --git a/runtime/arch/common/tests/platform_dummy.c b/runtime/arch/common/tests/platform_dummy.c
index c10eeab9..04f14e73 100644
--- a/runtime/arch/common/tests/platform_dummy.c
+++ b/runtime/arch/common/tests/platform_dummy.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_dummy.c
 //! @brief	Dummy implementations of Platform API calls to preven linker
 //!		errors.
diff --git a/runtime/arch/common/tests/tapasco-async-benchmark/CMakeLists.txt b/runtime/arch/common/tests/tapasco-async-benchmark/CMakeLists.txt
index f02d427e..8724e136 100644
--- a/runtime/arch/common/tests/tapasco-async-benchmark/CMakeLists.txt
+++ b/runtime/arch/common/tests/tapasco-async-benchmark/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 2.8)
 project(tapasco-async-benchmark)
 
diff --git a/runtime/arch/common/tests/tapasco-async-benchmark/tapasco_async_benchmark.c b/runtime/arch/common/tests/tapasco-async-benchmark/tapasco_async_benchmark.c
index 6599fdec..07a8b6b2 100644
--- a/runtime/arch/common/tests/tapasco-async-benchmark/tapasco_async_benchmark.c
+++ b/runtime/arch/common/tests/tapasco-async-benchmark/tapasco_async_benchmark.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	tapasco_async_benchmark.c
  *  @brief
diff --git a/runtime/arch/common/tests/tapasco-logging-benchmark/CMakeLists.txt b/runtime/arch/common/tests/tapasco-logging-benchmark/CMakeLists.txt
index a446a2c0..ecffa57a 100644
--- a/runtime/arch/common/tests/tapasco-logging-benchmark/CMakeLists.txt
+++ b/runtime/arch/common/tests/tapasco-logging-benchmark/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 2.6)
 project(tapasco-logging-benchmark)
 
diff --git a/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.c b/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.c
index 39706906..a57f2bc5 100644
--- a/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.c
+++ b/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.c
@@ -1,29 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_logging_benchmark.c
- *  @brief	Logging mechanism benchmark.
- *  		Starts a number of threads to produce random log messages as
- *  		fast as possible and report the average throughput.
- *  		Random data is preallocated in memory block to avoid L2 effects.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <errno.h>
 #include <pthread.h>
 #include <stdbool.h>
diff --git a/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.h b/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.h
index c09c2079..37e0a30e 100644
--- a/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.h
+++ b/runtime/arch/common/tests/tapasco-logging-benchmark/tapasco_logging_benchmark.h
@@ -1,29 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_logging_benchmark.h
- *  @brief	Logging mechanism benchmark.
- *  		Starts a number of threads to produce random log messages as
- *  		fast as possible and report the average throughput.
- *  		Random data is preallocated in memory block to avoid L2 effects.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TAPASCO_LOGGING_TEST_H__
 #define TAPASCO_LOGGING_TEST_H__
 #include <unistd.h>
diff --git a/runtime/arch/common/tests/tapasco_common_test.c b/runtime/arch/common/tests/tapasco_common_test.c
index 8f64cc45..561018f9 100644
--- a/runtime/arch/common/tests/tapasco_common_test.c
+++ b/runtime/arch/common/tests/tapasco_common_test.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_common_test.c
 //! @brief	Basic check test suite implementation for arch/common unit
 //! tests.
diff --git a/runtime/arch/common/tests/tapasco_jobs_test.c b/runtime/arch/common/tests/tapasco_jobs_test.c
index d5f8631d..c1c27685 100644
--- a/runtime/arch/common/tests/tapasco_jobs_test.c
+++ b/runtime/arch/common/tests/tapasco_jobs_test.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file 	tapasco_jobs_test.c
 //! @brief	Unit tests for jobs micro API implementations.
 //! @authors 	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/tests/tapasco_jobs_test.h b/runtime/arch/common/tests/tapasco_jobs_test.h
index 5a057ccb..b5a97ce1 100644
--- a/runtime/arch/common/tests/tapasco_jobs_test.h
+++ b/runtime/arch/common/tests/tapasco_jobs_test.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file 	tapasco_jobs_test.g
 //! @brief	Unit tests for jobs micro API implementations.
 //! @authors 	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/tests/tapasco_pemgmt_test.c b/runtime/arch/common/tests/tapasco_pemgmt_test.c
index d7590806..29f62a54 100644
--- a/runtime/arch/common/tests/tapasco_pemgmt_test.c
+++ b/runtime/arch/common/tests/tapasco_pemgmt_test.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_pemgmt_test.c
 //! @brief	Unit tests for functions micro API implementation.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/common/tests/tapasco_pemgmt_test.h b/runtime/arch/common/tests/tapasco_pemgmt_test.h
index 874a3e4c..231cf28f 100644
--- a/runtime/arch/common/tests/tapasco_pemgmt_test.h
+++ b/runtime/arch/common/tests/tapasco_pemgmt_test.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_pemgmt_test.h
 //! @brief	Unit tests for functions micro API implementation.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/include/tapasco.h b/runtime/arch/include/tapasco.h
index d85b94c5..3eef3d9c 100644
--- a/runtime/arch/include/tapasco.h
+++ b/runtime/arch/include/tapasco.h
@@ -1,3 +1,23 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 //! @file 	tapasco.h
 //! @brief	Tapasco API for hardware threadpool integration.
 //!		Low-level API to interface hardware accelerators programmed with
@@ -5,25 +25,7 @@
 //! @authors 	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
 //! @authors 	D. de la Chevallerie, TU Darmstadt (dc@esa.cs.tu-darmstadt.de)
 //! @version 	1.6
-//! @copyright  Copyright 2014-2018 J. Korinth, TU Darmstadt
-//!
-//!		This file is part of Tapasco (TAPASCO).
-//!
-//!  		Tapasco is free software: you can redistribute it
-//!		and/or modify it under the terms of the GNU Lesser General
-//!		Public License as published by the Free Software Foundation,
-//!		either version 3 of the License, or (at your option) any later
-//!		version.
-//!
-//!  		Tapasco is distributed in the hope that it will be
-//!		useful, but WITHOUT ANY WARRANTY; without even the implied
-//!		warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-//!		See the GNU Lesser General Public License for more details.
-//!
-//!  		You should have received a copy of the GNU Lesser General Public
-//!		License along with Tapasco.  If not, see
-//!		<http://www.gnu.org/licenses/>.
-//!
+
 #ifndef TAPASCO_H__
 #define TAPASCO_H__
 
diff --git a/runtime/arch/include/tapasco.hpp b/runtime/arch/include/tapasco.hpp
index 7febd476..4eaf4f72 100644
--- a/runtime/arch/include/tapasco.hpp
+++ b/runtime/arch/include/tapasco.hpp
@@ -1,27 +1,29 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 //! @file   tapasco.hpp
 //! @brief  C++ wrapper class for TAPASCO API: Simplifies calls to
 //!   FPGA and handling of device memory, jobs, etc.
 //! @authors  J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
 //! @version  1.6
-//! @copyright  Copyright 2015-2018 J. Korinth, TU Darmstadt
-//!
-//!   This file is part of Tapasco (TaPaSCo).
-//!
-//!     Tapasco is free software: you can redistribute it
-//!   and/or modify it under the terms of the GNU Lesser General
-//!   Public License as published by the Free Software Foundation,
-//!   either version 3 of the License, or (at your option) any later
-//!   version.
-//!
-//!     Tapasco is distributed in the hope that it will be
-//!   useful, but WITHOUT ANY WARRANTY; without even the implied
-//!   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-//!   See the GNU Lesser General Public License for more details.
-//!
-//!     You should have received a copy of the GNU Lesser General Public
-//!   License along with Tapasco.  If not, see
-//!   <http://www.gnu.org/licenses/>.
-//!
+
 #ifndef TAPASCO_HPP__
 #define TAPASCO_HPP__
 
diff --git a/runtime/arch/include/tapasco_errors.h b/runtime/arch/include/tapasco_errors.h
index d22835c4..05d61687 100644
--- a/runtime/arch/include/tapasco_errors.h
+++ b/runtime/arch/include/tapasco_errors.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tapasco_errors.h
 //! @brief	Error messages and codes.
 //! @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/include/tapasco_global.h b/runtime/arch/include/tapasco_global.h
index 9601e0e2..16348113 100644
--- a/runtime/arch/include/tapasco_global.h
+++ b/runtime/arch/include/tapasco_global.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2016 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tpc_global.h
 //! @brief	Global definitions for the TPC implementation.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/arch/include/tapasco_types.h b/runtime/arch/include/tapasco_types.h
index ff662e93..27d08ed5 100644
--- a/runtime/arch/include/tapasco_types.h
+++ b/runtime/arch/include/tapasco_types.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file 	tapasco_types.h
 //! @brief	Basic type definitions for TaPaSCo
 //! @authors 	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/bin/tapasco-build-libs b/runtime/bin/tapasco-build-libs
index f0ff52cb..a2799f6f 100755
--- a/runtime/bin/tapasco-build-libs
+++ b/runtime/bin/tapasco-build-libs
@@ -1,39 +1,92 @@
-#!/usr/bin/python
+#!/usr/bin/python3
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 import argparse
 import sys
 import subprocess
-from   socket import gethostname
+from socket import gethostname
 import os
 
-tools        = ['tapasco-debug', 'tapasco-benchmark']
-default_cmd  = 'mkdir -p {0} && cd {0} && cmake {1} {2} && make -j install DESTDIR={0}/install'
-tlkm_cmd     = 'cd {0} && make -j {1}'
+tools = ['tapasco-debug', 'tapasco-benchmark']
+default_cmd = 'mkdir -p {0} && cd {0} && cmake {1} {2} && make -j $(nproc) install DESTDIR={0}/install'
+tlkm_cmd = 'cd {0} && make -j $(nproc) {1}'
 
 parser = argparse.ArgumentParser()
-parser.add_argument('--mode', help='build mode (default: %(default)s)', default='release', choices=['clean', 'release', 'debug', 'driver_debug'])
-parser.add_argument('--rebuild', help='force rebuild libs (default: %(default)s)', action='store_true')
-parser.add_argument('--shared', help='build shared library instead of static', action='store_true')
-parser.add_argument('--package', help='build installation packages', action='store_true')
-parser.add_argument('--skip_driver', help='do not build the driver', action='store_true')
-parser.add_argument('--skip_runtime', help='do not build the tapasco runtime', action='store_true')
-parser.add_argument('--target', help='cross compile for other target (clang, zynq)', default='', choices=['', 'clang', 'zynq'])
+parser.add_argument(
+    '--mode',
+    help='build mode (default: %(default)s)',
+    default='release',
+    choices=[
+        'clean',
+        'release',
+        'debug',
+         'driver_debug'])
+parser.add_argument(
+    '--rebuild',
+    help='force rebuild libs (default: %(default)s)',
+    action='store_true')
+parser.add_argument(
+    '--shared',
+    help='build shared library instead of static',
+    action='store_true')
+parser.add_argument(
+    '--package',
+    help='build installation packages',
+    action='store_true')
+parser.add_argument(
+    '--skip_driver',
+    help='do not build the driver',
+    action='store_true')
+parser.add_argument(
+    '--skip_runtime',
+    help='do not build the tapasco runtime',
+    action='store_true')
+parser.add_argument(
+    '--target',
+    help='cross compile for other target (clang, zynq)',
+    default='',
+    choices=[
+        '',
+        'clang',
+         'zynq'])
 args = parser.parse_args()
 
-clean        = args.mode == 'clean'
-debug        = args.mode == 'debug' or args.mode == 'driver_debug'
+clean = args.mode == 'clean'
+debug = args.mode == 'debug' or args.mode == 'driver_debug'
 driver_debug = args.mode == 'driver_debug'
-debug_flags  = '-DCMAKE_BUILD_TYPE=Debug' if debug else '-DCMAKE_BUILD_TYPE=Release'
+debug_flags = '-DCMAKE_BUILD_TYPE=Debug' if debug else '-DCMAKE_BUILD_TYPE=Release'
 build_folder = 'build' if args.target == '' else 'build-' + args.target
 
 crosscompile_flags = ''
 if args.target == 'zynq':
     print('Build target: ' + args.target)
-    crosscompile_flags = '-DCMAKE_TOOLCHAIN_FILE=%s/cmake/zynq_cross_toolchain.cmake' % os.environ['TAPASCO_HOME_RUNTIME']
+    crosscompile_flags = '-DCMAKE_TOOLCHAIN_FILE=%s/cmake/zynq_cross_toolchain.cmake' % os.environ[
+        'TAPASCO_HOME_RUNTIME']
 if args.target == 'clang':
     print('Build target: ' + args.target)
-    crosscompile_flags = '-DCMAKE_TOOLCHAIN_FILE=%s/cmake/clang_toolchain.cmake' % os.environ['TAPASCO_HOME_RUNTIME']
+    crosscompile_flags = '-DCMAKE_TOOLCHAIN_FILE=%s/cmake/clang_toolchain.cmake' % os.environ[
+        'TAPASCO_HOME_RUNTIME']
 
-shared_flags = '-DBUILD_SHARED_LIBS:BOOL={}'.format('ON' if args.shared else 'OFF')
+shared_flags = '-DBUILD_SHARED_LIBS:BOOL={}'.format(
+    'ON' if args.shared else 'OFF')
 
 print('Build mode: {}'.format(args.mode))
 
@@ -42,7 +95,7 @@ pdir = '{}/platform/build'.format(os.environ['TAPASCO_HOME_RUNTIME'])
 adir = '{}/arch/build'.format(os.environ['TAPASCO_HOME_RUNTIME'])
 tdir = '{}/arch/tests/build'.format(os.environ['TAPASCO_HOME_RUNTIME'])
 ldir = '{}/lib'.format(os.environ['TAPASCO_HOME_RUNTIME'])
-bdir   = '{}/{}'.format(os.environ['TAPASCO_WORK_DIR'], build_folder)
+bdir = '{}/{}'.format(os.environ['TAPASCO_WORK_DIR'], build_folder)
 
 if clean or args.rebuild:
     subprocess.call(['rm -rf %s' % bdir], shell=True)
@@ -55,21 +108,30 @@ if not clean:
         print('Building release mode libraries...')
 
     if 'LINUX_HOME' in os.environ:
-        subprocess.call(['make -C ' + os.environ['LINUX_HOME'] + ' scripts'], shell=True)
+        subprocess.call(['make -C ' +
+                         os.environ['LINUX_HOME'] +
+                         ' scripts'], shell=True)
 
     if not args.skip_driver:
-        ret = subprocess.call([tlkm_cmd.format(mdir, '' if driver_debug else 'release')], shell=True)
+        ret = subprocess.call(
+            [tlkm_cmd.format(mdir, '' if driver_debug else 'release')], shell=True)
         if ret:
             print('Driver build failed!')
             sys.exit(ret)
     if not args.skip_runtime:
-        cmd = default_cmd.format(bdir, " ".join([crosscompile_flags, debug_flags, shared_flags]), os.environ['TAPASCO_HOME_RUNTIME'])
+        cmd = default_cmd.format(bdir,
+                                 " ".join([crosscompile_flags,
+                                           debug_flags,
+                                           shared_flags]),
+                                 os.environ['TAPASCO_HOME_RUNTIME'])
         ret = subprocess.call([cmd], shell=True)
         if ret:
             print('Tapasco build failed!')
             sys.exit(ret)
     if args.package:
-        ret = subprocess.call("cd {0} && make -j package".format(bdir), shell=True)
+        ret = subprocess.call(
+            "cd {0} && make -j package".format(bdir),
+            shell=True)
         if ret:
             print('Tapasco packaging failed!')
             sys.exit(ret)
diff --git a/runtime/bin/tapasco-load-bitstream b/runtime/bin/tapasco-load-bitstream
index d0605df8..6d842156 100755
--- a/runtime/bin/tapasco-load-bitstream
+++ b/runtime/bin/tapasco-load-bitstream
@@ -1,36 +1,98 @@
-#!/usr/bin/python
+#!/usr/bin/python3
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 import argparse
 import os
 import sys
 import subprocess
-from   socket import gethostname
+from socket import gethostname
+from pathlib import Path
+
+
+def running_on_ec2():
+    hyp_test = Path("/sys/hypervisor/uuid")
+    if hyp_test.is_file():
+        with hyp_test.open() as f:
+            uuid = f.read()
+            if uuid.startswith('ec2'):
+                return True
+    return False
+
 
 parser = argparse.ArgumentParser()
 parser.add_argument('bitstream', help='.bit file to load')
-parser.add_argument('--reload-driver', help='reload driver, if loaded (default: %(default)s)', action='store_true')
-parser.add_argument('--verbose', help='verbose output (default: %(default)s)', action='store_true')
-parser.add_argument('--mode', help='select the operation to be performed (default: %(default)s)', default='normal', choices=['normal', 'program', 'hotplug'])
+parser.add_argument(
+    '--reload-driver',
+    help='reload driver, if loaded (default: %(default)s)',
+    action='store_true')
+parser.add_argument(
+    '--verbose',
+    help='verbose output (default: %(default)s)',
+    action='store_true')
+parser.add_argument(
+    '--mode',
+    help='select the operation to be performed (default: %(default)s)',
+    default='normal',
+    choices=[
+        'normal',
+        'program',
+         'hotplug'])
 args = parser.parse_args()
 
-if not os.path.exists(args.bitstream):
-	sys.exit('ERROR: {} could not be opened'.format(args.bitstream))
+if 'TAPASCO_HOME_RUNTIME' not in os.environ:
+    sys.exit('ERROR: Environment variable TAPASCO_HOME_RUNTIME not set. Please source tapasco-setup.sh first or use -E flag to preserve pervious users environment if using sudo.')
+
+if 'TAPASCO_PLATFORM' not in os.environ:
+    print('Environment variable TAPASCO_PLATFORM is not set, guessing Platform ...')
+    if gethostname() in [
+        'zed',
+        'zedboard',
+        'zc706',
+        'zynq',
+        'pynq',
+        'zcu102',
+            'ultra96v2']:
+        os.environ['TAPASCO_PLATFORM'] = 'zynq'
+    elif running_on_ec2():
+        os.environ['TAPASCO_PLATFORM'] = 'f1'
+    else:
+        os.environ['TAPASCO_PLATFORM'] = 'pcie'
 
-if not 'TAPASCO_PLATFORM' in os.environ:
-	print('Environment variable TAPASCO_PLATFORM is not set, guessing Platform ...')
-	if gethostname() in ['zed', 'zedboard', 'zc706', 'zynq', 'pynq']:
-		os.environ['TAPASCO_PLATFORM'] = 'zynq'
-	else:
-		os.environ['TAPASCO_PLATFORM'] = 'pcie'
+if os.environ['TAPASCO_PLATFORM'] != 'f1' and not os.path.exists(
+        args.bitstream):
+    sys.exit('ERROR: {} could not be opened'.format(args.bitstream))
 
 if args.verbose:
-	print('Bitstream: {}'.format(args.bitstream))
-	print('Reload Driver: {}'.format(str(args.reload_driver)))
-	print('Platform: {}'.format(os.environ['TAPASCO_PLATFORM']))
+    print('Bitstream: {}'.format(args.bitstream))
+    print('Reload Driver: {}'.format(str(args.reload_driver)))
+    print('Platform: {}'.format(os.environ['TAPASCO_PLATFORM']))
+
+if 'TAPASCO_HOME_RUNTIME' not in os.environ:
+    os.environ['TAPASCO_HOME_RUNTIME'] = "{}/../".format(os.getcwd())
 
 path = 'module/'
 reld = '-d' if args.reload_driver else ''
 verb = '-v' if args.verbose else ''
 program = '-p' if args.mode == 'normal' or args.mode == 'program' else ''
 hotplug = '-h' if args.mode == 'normal' or args.mode == 'hotplug' else ''
-cmd = '$TAPASCO_HOME_RUNTIME/platform/$TAPASCO_PLATFORM/{0}bit_reload.sh {1} {2} {3} {4} {5}'.format(path, verb, reld, hotplug, program, args.bitstream)
+cmd = '$TAPASCO_HOME_RUNTIME/platform/$TAPASCO_PLATFORM/{0}bit_reload.sh {1} {2} {3} {4} {5}'.format(
+    path, verb, reld, hotplug, program, args.bitstream)
 subprocess.call([cmd], shell=True)
diff --git a/runtime/cmake/Tapasco.cmake b/runtime/cmake/Tapasco.cmake
index 13944ba3..4a1819ed 100644
--- a/runtime/cmake/Tapasco.cmake
+++ b/runtime/cmake/Tapasco.cmake
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 if(POLICY CMP0069)
   cmake_policy(SET CMP0069 NEW)
 endif()
diff --git a/runtime/cmake/clang_toolchain.cmake b/runtime/cmake/clang_toolchain.cmake
index 61e70839..4f71b23b 100644
--- a/runtime/cmake/clang_toolchain.cmake
+++ b/runtime/cmake/clang_toolchain.cmake
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.0.0 FATAL_ERROR)
 
 set(CMAKE_SYSTEM_NAME Linux)
diff --git a/runtime/cmake/zynq_cross_toolchain.cmake b/runtime/cmake/zynq_cross_toolchain.cmake
index 410c932b..0fb322b5 100644
--- a/runtime/cmake/zynq_cross_toolchain.cmake
+++ b/runtime/cmake/zynq_cross_toolchain.cmake
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.0.0 FATAL_ERROR)
 
 set(CMAKE_SYSTEM_NAME Linux)
diff --git a/runtime/common/CMakeLists.txt b/runtime/common/CMakeLists.txt
index 93b05c63..fa8363d8 100644
--- a/runtime/common/CMakeLists.txt
+++ b/runtime/common/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project(tapasco-common VERSION 1.0 LANGUAGES C)
diff --git a/runtime/common/include/gen_fixed_size_pool.h b/runtime/common/include/gen_fixed_size_pool.h
index 936faf87..8a5d190f 100644
--- a/runtime/common/include/gen_fixed_size_pool.h
+++ b/runtime/common/include/gen_fixed_size_pool.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	gen_fixed_size_pool.h
 //! @brief	Generic, header-only, lock-free implementation of a fixed size
 //!		pool of things based on statically allocated array.
diff --git a/runtime/common/include/gen_mem.h b/runtime/common/include/gen_mem.h
index 97b1a7ed..fa03cffd 100644
--- a/runtime/common/include/gen_mem.h
+++ b/runtime/common/include/gen_mem.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	gen_mem.h
 //! @brief	Generic, header-only memory management library. Can manage
 //!             address spaces with arbitrary size and base. Extremely light-
diff --git a/runtime/common/include/gen_queue.h b/runtime/common/include/gen_queue.h
index 5001ecfd..06b3e138 100644
--- a/runtime/common/include/gen_queue.h
+++ b/runtime/common/include/gen_queue.h
@@ -1,21 +1,23 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 /**
  *  @file	gen_queue.h
  *  @brief	Lock-free queue implementation based on the journal paper
diff --git a/runtime/common/include/gen_stack.h b/runtime/common/include/gen_stack.h
index 12861d4e..e59abdcb 100644
--- a/runtime/common/include/gen_stack.h
+++ b/runtime/common/include/gen_stack.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	gen_stack.h
 //! @brief	Generic, header-only, lock-free implementation of a dynamic
 //!		sized pool of things. Note: uses malloc, so not entirely
diff --git a/runtime/common/src/gen_mem.c b/runtime/common/src/gen_mem.c
index c0c65c80..ee061919 100644
--- a/runtime/common/src/gen_mem.c
+++ b/runtime/common/src/gen_mem.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	gen_mem.h
 //! @brief	Generic, header-only memory management library. Can manage
 //!             address spaces with arbitrary size and base. Extremely light-
diff --git a/runtime/common/src/gen_mem_test.c b/runtime/common/src/gen_mem_test.c
index 85ca3cec..66c32295 100644
--- a/runtime/common/src/gen_mem_test.c
+++ b/runtime/common/src/gen_mem_test.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	test.c
  *  @brief
diff --git a/runtime/common/src/gen_queue.c b/runtime/common/src/gen_queue.c
index cad6a547..4042959c 100644
--- a/runtime/common/src/gen_queue.c
+++ b/runtime/common/src/gen_queue.c
@@ -1,29 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	gen_queue.c
- *  @brief	Lock-free queue implementation based on the journal paper
- *  		"Nonblocking algorithms and preemption-safe locking on
- *  		multiprogrammed shared-memory multiprocessors." by M. Michael
- *  		and M. Scott (1998).
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 
 #include <stdbool.h>
 #include <stdlib.h>
diff --git a/runtime/common/src/gen_queue_test.c b/runtime/common/src/gen_queue_test.c
index 4eba9f0f..96262e13 100644
--- a/runtime/common/src/gen_queue_test.c
+++ b/runtime/common/src/gen_queue_test.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "gen_queue.h"
 #include <limits.h>
 #include <pthread.h>
diff --git a/runtime/common/src/gen_stack_test.c b/runtime/common/src/gen_stack_test.c
index 2266cc67..ccb608be 100644
--- a/runtime/common/src/gen_stack_test.c
+++ b/runtime/common/src/gen_stack_test.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "gen_stack.h"
 #include <limits.h>
 #include <pthread.h>
diff --git a/runtime/examples/CMakeLists.txt b/runtime/examples/CMakeLists.txt
index 50ff7c81..0052570d 100644
--- a/runtime/examples/CMakeLists.txt
+++ b/runtime/examples/CMakeLists.txt
@@ -1,16 +1,20 @@
-# Tapasco is free software: you can redistribute it and/or modify
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project(examples)
@@ -21,4 +25,7 @@ add_subdirectory(arrayupdate)
 add_subdirectory(memcheck)
 add_subdirectory(tapasco-benchmark)
 add_subdirectory(tapasco-debug)
-add_subdirectory(bandwidth)
\ No newline at end of file
+add_subdirectory(bandwidth)
+add_subdirectory(job_completion)
+add_subdirectory(start_latency)
+add_subdirectory(memtest)
\ No newline at end of file
diff --git a/runtime/examples/arrayinit/CMakeLists.txt b/runtime/examples/arrayinit/CMakeLists.txt
index 03116475..f369a2f8 100644
--- a/runtime/examples/arrayinit/CMakeLists.txt
+++ b/runtime/examples/arrayinit/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (arrayinit)
diff --git a/runtime/examples/arrayinit/arrayinit-example.c b/runtime/examples/arrayinit/arrayinit-example.c
index 3510d97e..00cb3929 100644
--- a/runtime/examples/arrayinit/arrayinit-example.c
+++ b/runtime/examples/arrayinit/arrayinit-example.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	arrayinit-example.c
 //! @brief	TPC API based example program exercising a hardware threadpool
 //!             containing instances of the arrayinit kernel.
diff --git a/runtime/examples/arrayinit/arrayinit-example.cpp b/runtime/examples/arrayinit/arrayinit-example.cpp
index 7ea1a3bf..3fe4df5f 100644
--- a/runtime/examples/arrayinit/arrayinit-example.cpp
+++ b/runtime/examples/arrayinit/arrayinit-example.cpp
@@ -1,16 +1,23 @@
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #include <array>
 #include <iostream>
 #include <tapasco.hpp>
diff --git a/runtime/examples/arraysum/CMakeLists.txt b/runtime/examples/arraysum/CMakeLists.txt
index ea15e5c5..678a19d6 100644
--- a/runtime/examples/arraysum/CMakeLists.txt
+++ b/runtime/examples/arraysum/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (arraysum)
diff --git a/runtime/examples/arraysum/arraysum-example.c b/runtime/examples/arraysum/arraysum-example.c
index 51a4cdae..cf144f85 100644
--- a/runtime/examples/arraysum/arraysum-example.c
+++ b/runtime/examples/arraysum/arraysum-example.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	arraysum-example.c
 //! @brief	TPC API based example program exercising a hardware threadpool
 //!             containing instances of the arraysum kernel.
diff --git a/runtime/examples/arraysum/arraysum-example.cpp b/runtime/examples/arraysum/arraysum-example.cpp
index eddd39a7..25f145d1 100644
--- a/runtime/examples/arraysum/arraysum-example.cpp
+++ b/runtime/examples/arraysum/arraysum-example.cpp
@@ -1,16 +1,23 @@
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #include <array>
 #include <iostream>
 #include <tapasco.hpp>
diff --git a/runtime/examples/arrayupdate/CMakeLists.txt b/runtime/examples/arrayupdate/CMakeLists.txt
index 44ccc40f..24239fe9 100644
--- a/runtime/examples/arrayupdate/CMakeLists.txt
+++ b/runtime/examples/arrayupdate/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (arrayupdate)
diff --git a/runtime/examples/arrayupdate/arrayupdate-example.c b/runtime/examples/arrayupdate/arrayupdate-example.c
index 3ed48cfc..abfa0bdc 100644
--- a/runtime/examples/arrayupdate/arrayupdate-example.c
+++ b/runtime/examples/arrayupdate/arrayupdate-example.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	arrayupdate-example.c
 //! @brief	TPC API based example program exercising a hardware threadpool
 //!             containing instances of the arrayupdate kernel.
diff --git a/runtime/examples/arrayupdate/arrayupdate-example.cpp b/runtime/examples/arrayupdate/arrayupdate-example.cpp
index 14da8955..94b301ba 100644
--- a/runtime/examples/arrayupdate/arrayupdate-example.cpp
+++ b/runtime/examples/arrayupdate/arrayupdate-example.cpp
@@ -1,16 +1,23 @@
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #include <array>
 #include <iostream>
 #include <tapasco.hpp>
diff --git a/runtime/examples/bandwidth/CMakeLists.txt b/runtime/examples/bandwidth/CMakeLists.txt
index e8c0c4c4..e94a8e6b 100644
--- a/runtime/examples/bandwidth/CMakeLists.txt
+++ b/runtime/examples/bandwidth/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (bandwidth)
diff --git a/runtime/examples/bandwidth/bandwidth.cpp b/runtime/examples/bandwidth/bandwidth.cpp
index 2adfcf93..3d58cede 100644
--- a/runtime/examples/bandwidth/bandwidth.cpp
+++ b/runtime/examples/bandwidth/bandwidth.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <algorithm>
 #include <chrono>
 #include <iostream>
diff --git a/runtime/examples/image_processing/CMakeLists.txt b/runtime/examples/image_processing/CMakeLists.txt
index 9ffb39ec..bc5f0710 100644
--- a/runtime/examples/image_processing/CMakeLists.txt
+++ b/runtime/examples/image_processing/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (image-processing)
diff --git a/runtime/examples/image_processing/cliparser.cpp b/runtime/examples/image_processing/cliparser.cpp
index 395809af..92a5d315 100644
--- a/runtime/examples/image_processing/cliparser.cpp
+++ b/runtime/examples/image_processing/cliparser.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "cliparser.h"
 
 CLIParser::CLIParser() {}
diff --git a/runtime/examples/image_processing/cliparser.h b/runtime/examples/image_processing/cliparser.h
index 3ae0b7fd..06f722e8 100644
--- a/runtime/examples/image_processing/cliparser.h
+++ b/runtime/examples/image_processing/cliparser.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef __CLIPARSER_H_
 #define __CLIPARSER_H_
 
diff --git a/runtime/examples/image_processing/hsa_aql_queue.h b/runtime/examples/image_processing/hsa_aql_queue.h
index f500d00a..53510a39 100644
--- a/runtime/examples/image_processing/hsa_aql_queue.h
+++ b/runtime/examples/image_processing/hsa_aql_queue.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef HSA_AQL_QUEUE_H
 #define HSA_AQL_QUEUE_H
 
diff --git a/runtime/examples/image_processing/hsa_dma.h b/runtime/examples/image_processing/hsa_dma.h
index aa92fbb7..1a350ffd 100644
--- a/runtime/examples/image_processing/hsa_dma.h
+++ b/runtime/examples/image_processing/hsa_dma.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef HSA_DMA_H
 #define HSA_DMA_H
 
diff --git a/runtime/examples/image_processing/hsa_types.h b/runtime/examples/image_processing/hsa_types.h
index ad9d821d..ae2093e8 100644
--- a/runtime/examples/image_processing/hsa_types.h
+++ b/runtime/examples/image_processing/hsa_types.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef HSA_TYPES_H
 #define HSA_TYPES_H
 
diff --git a/runtime/examples/image_processing/imgproc.cpp b/runtime/examples/image_processing/imgproc.cpp
index f445c4ea..95677fb1 100644
--- a/runtime/examples/image_processing/imgproc.cpp
+++ b/runtime/examples/image_processing/imgproc.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <CImg/CImg.h>
 #include <cstring> //png++ needs it (in this version)
 
diff --git a/runtime/examples/image_processing/print_status.cpp b/runtime/examples/image_processing/print_status.cpp
index df1c8f35..95b39bea 100644
--- a/runtime/examples/image_processing/print_status.cpp
+++ b/runtime/examples/image_processing/print_status.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <atomic>
 #include <chrono>
 #include <csignal>
diff --git a/runtime/examples/image_processing/stringtools.cpp b/runtime/examples/image_processing/stringtools.cpp
index af7e3c92..1cbe43b1 100644
--- a/runtime/examples/image_processing/stringtools.cpp
+++ b/runtime/examples/image_processing/stringtools.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "stringtools.h"
 
 void tokenize(std::string line, std::vector<std::string> &vec, char separator) {
diff --git a/runtime/examples/image_processing/stringtools.h b/runtime/examples/image_processing/stringtools.h
index 2778bcf1..22faa63f 100644
--- a/runtime/examples/image_processing/stringtools.h
+++ b/runtime/examples/image_processing/stringtools.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef __STRINGTOOLS_H_
 #define __STRINGTOOLS_H_
 
diff --git a/runtime/examples/job_completion/CMakeLists.txt b/runtime/examples/job_completion/CMakeLists.txt
new file mode 100644
index 00000000..84377ae9
--- /dev/null
+++ b/runtime/examples/job_completion/CMakeLists.txt
@@ -0,0 +1,41 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
+include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
+project (job_completion)
+
+if(NOT TARGET tapasco)
+find_package(TapascoTLKM REQUIRED)
+find_package(TapascoCommon REQUIRED)
+find_package(TapascoPlatform REQUIRED)
+find_package(Tapasco REQUIRED)
+endif(NOT TARGET tapasco)
+
+add_executable(job_completion job_completion.cpp)
+set_tapasco_defaults(job_completion)
+target_link_libraries(job_completion PRIVATE tapasco tlkm platform tapasco-common)
+
+find_package(OpenMP)
+if(OpenMP_CXX_FOUND)
+    target_link_libraries(job_completion PUBLIC OpenMP::OpenMP_CXX)
+endif()
+
+install(TARGETS job_completion
+        ARCHIVE  DESTINATION share/Tapasco/bin/
+        LIBRARY  DESTINATION share/Tapasco/bin/
+        RUNTIME  DESTINATION share/Tapasco/bin/)
\ No newline at end of file
diff --git a/runtime/examples/job_completion/job_completion.cpp b/runtime/examples/job_completion/job_completion.cpp
new file mode 100644
index 00000000..420d5454
--- /dev/null
+++ b/runtime/examples/job_completion/job_completion.cpp
@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <algorithm>
+#include <chrono>
+#include <iostream>
+#include <vector>
+
+#ifdef _OPENMP
+#include <omp.h>
+#include <sstream>
+#endif
+
+#include <tapasco.hpp>
+
+using namespace tapasco;
+
+int main(int argc, char **argv) {
+  Tapasco tapasco;
+
+  constexpr int max_pow = 30;
+  constexpr int repetitions = 1000;
+
+#ifdef _OPENMP
+  int threads = 1;
+
+  if (argc > 1) {
+    std::stringstream s(argv[1]);
+    s >> threads;
+  }
+  omp_set_num_threads(threads);
+#endif
+
+  static constexpr tapasco_kernel_id_t COUNTER_ID{14};
+  static constexpr tapasco_kernel_id_t LATENCY_ID{742};
+
+  uint64_t counter =
+      tapasco_device_kernel_pe_count(tapasco.device(), COUNTER_ID);
+  uint64_t latency =
+      tapasco_device_kernel_pe_count(tapasco.device(), LATENCY_ID);
+  if (!counter && !latency) {
+    std::cout << "Need at least one counter or latencycheck instance to run."
+              << std::endl;
+    exit(1);
+  }
+
+  tapasco_kernel_id_t pe_id = COUNTER_ID;
+  if (latency) {
+    pe_id = LATENCY_ID;
+  }
+
+  std::chrono::duration<double, std::nano> elapsed_seconds;
+
+  std::cout << "Byte,Nanoseconds" << std::endl;
+
+  for (size_t s = 3; s < max_pow; ++s) {
+    size_t len = 1 << s;
+
+    size_t elements = std::max((size_t)1, len / sizeof(int));
+    std::vector<int> arr_from(elements, -1);
+
+    // Wrap the array to be TaPaSCo compatible
+    auto result_buffer_pointer = tapasco::makeWrappedPointer(
+        arr_from.data(), arr_from.size() * sizeof(int));
+    // Data will be copied back from the device only, no data will be moved to
+    // the device
+    auto result_buffer_out = tapasco::makeOutOnly(result_buffer_pointer);
+    auto start = std::chrono::steady_clock::now();
+    auto end = std::chrono::steady_clock::now();
+
+#ifdef _OPENMP
+#pragma omp parallel for shared(elapsed_seconds)
+#endif
+    for (int i = 0; i < repetitions; ++i) {
+      if (len > 8) {
+        start = std::chrono::steady_clock::now();
+        tapasco.launch(pe_id, 1, result_buffer_out)();
+        end = std::chrono::steady_clock::now();
+      } else {
+        start = std::chrono::steady_clock::now();
+        tapasco.launch(pe_id, 1)();
+        end = std::chrono::steady_clock::now();
+      }
+      elapsed_seconds = end - start;
+      std::cout << std::fixed << len << "," << elapsed_seconds.count()
+                << std::endl;
+    }
+  }
+
+  return 0;
+}
diff --git a/runtime/examples/job_completion/plot_job_completions.py b/runtime/examples/job_completion/plot_job_completions.py
new file mode 100644
index 00000000..1b1f4f4b
--- /dev/null
+++ b/runtime/examples/job_completion/plot_job_completions.py
@@ -0,0 +1,107 @@
+#!/bin/python3
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+from math import sqrt
+import matplotlib as mpl
+import matplotlib.pyplot as plt
+import seaborn as sns
+import numpy as np
+import pandas as pd
+import json
+import re
+import sys
+
+import argparse
+
+parser = argparse.ArgumentParser()
+parser.add_argument('file', type=argparse.FileType('r'))
+args = parser.parse_args()
+
+textwidth=516.0 * 0.0138889
+columnwidth=252.0 * 0.0138889
+
+def latexify(fig_width=None, fig_height=None, columns=1):
+    """Set up matplotlib's RC params for LaTeX plotting.
+    Call this before plotting a figure.
+    Parameters
+    ----------
+    fig_width : float, optional, inches
+    fig_height : float,  optional, inches
+    columns : {1, 2}
+    """
+
+    # code adapted from http://www.scipy.org/Cookbook/Matplotlib/LaTeX_Examples
+
+    # Width and max height in inches for IEEE journals taken from
+    # computer.org/cms/Computer.org/Journal%20templates/transactions_art_guide.pdf
+
+    assert(columns in [1,2])
+
+    if fig_width is None:
+        fig_width = 3.39 if columns==1 else 6.9 # width in inches
+
+    if fig_height is None:
+        golden_mean = (sqrt(5)-1.0)/2.0    # Aesthetic ratio
+        fig_height = fig_width*golden_mean # height in inches
+
+    MAX_HEIGHT_INCHES = 8.0
+    if fig_height > MAX_HEIGHT_INCHES:
+        print("WARNING: fig_height too large:" + str(fig_height) +
+              "so will reduce to" + str(MAX_HEIGHT_INCHES) + "inches.")
+        fig_height = MAX_HEIGHT_INCHES
+
+    params = {'backend': 'ps',
+              'text.latex.preamble':
+                                     [r'\usepackage{gensymb}',
+                                      r'\usepackage[binary-units=true, per-mode=symbol,exponent-to-prefix=true]{siunitx}'],
+              'axes.labelsize': 8, # fontsize for x and y labels (was 10)
+              'axes.titlesize': 8,
+              'font.size': 8, # was 10
+              'legend.fontsize': 6, # was 10
+              'xtick.labelsize': 8,
+              'ytick.labelsize': 8,
+              'text.usetex': True,
+              'figure.figsize': [fig_width,fig_height],
+              'font.family': 'sans-serif'
+    }
+
+    mpl.rcParams.update(params)
+
+sns.set()
+latexify(columnwidth)
+
+import csv
+
+data_csv = csv.DictReader(args.file)
+data = pd.DataFrame(columns=("Byte", "Microseconds"))
+for k in data_csv:
+    data = data.append({'Byte':int(k["Byte"]), 'Microseconds': float(k["Nanoseconds"]) / 1000.0}, ignore_index=True)
+
+fig, ax = plt.subplots(1, 1)
+
+ax.set_yscale("log")
+ax.set_xscale("log")
+sns.lineplot(ax=ax, data=data, x="Byte", y="Microseconds", ci="sd")
+#data.plot(ax=ax, x="Byte", y="Microseconds")
+ax.set_xlabel(r'Transfer Size (\si{\byte})')
+ax.set_ylabel(r'Microseconds')
+
+plt.savefig('job_completion.pdf', format='pdf', bbox_inches='tight')
diff --git a/runtime/examples/memcheck/CMakeLists.txt b/runtime/examples/memcheck/CMakeLists.txt
index d7bf050d..3d0380bf 100644
--- a/runtime/examples/memcheck/CMakeLists.txt
+++ b/runtime/examples/memcheck/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (memcheck)
diff --git a/runtime/examples/memcheck/memcheck.cpp b/runtime/examples/memcheck/memcheck.cpp
index 8a5fb82f..8ffacf19 100644
--- a/runtime/examples/memcheck/memcheck.cpp
+++ b/runtime/examples/memcheck/memcheck.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <algorithm>
 #include <iostream>
 #include <vector>
diff --git a/runtime/examples/memtest/CMakeLists.txt b/runtime/examples/memtest/CMakeLists.txt
new file mode 100644
index 00000000..b0f9bc7c
--- /dev/null
+++ b/runtime/examples/memtest/CMakeLists.txt
@@ -0,0 +1,45 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
+include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
+project (memtest)
+
+if(NOT TARGET tapasco)
+find_package(TapascoTLKM REQUIRED)
+find_package(TapascoCommon REQUIRED)
+find_package(TapascoPlatform REQUIRED)
+find_package(Tapasco REQUIRED)
+endif(NOT TARGET tapasco)
+
+add_executable(memtest memtest.cpp)
+set_tapasco_defaults(memtest)
+target_link_libraries(memtest PRIVATE tapasco tlkm platform tapasco-common)
+
+install(TARGETS memtest
+        ARCHIVE  DESTINATION share/Tapasco/bin/
+        LIBRARY  DESTINATION share/Tapasco/bin/
+        RUNTIME  DESTINATION share/Tapasco/bin/)
+
+add_executable(memtest_parallel memtest_parallel.cpp)
+set_tapasco_defaults(memtest_parallel)
+target_link_libraries(memtest_parallel PRIVATE tapasco tlkm platform tapasco-common)
+
+install(TARGETS memtest_parallel
+	ARCHIVE DESTINATION share/Tapasco/bin/
+	LIBRARY DESTINATION share/Tapasco/bin/
+	RUNTIME DESTINATION share/Tapasco/bin/)
diff --git a/runtime/examples/memtest/memtest.cpp b/runtime/examples/memtest/memtest.cpp
new file mode 100644
index 00000000..a2ee49e6
--- /dev/null
+++ b/runtime/examples/memtest/memtest.cpp
@@ -0,0 +1,269 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <array>
+#include <climits>
+#include <iomanip>
+#include <iostream>
+#include <tapasco.hpp>
+
+using namespace tapasco;
+
+// runtime for random access benchmark in milliseconds
+constexpr int random_time_ms = 1000;
+// iterations for batch access benchmark
+constexpr int batch_iterations = 1000;
+// iterations for latency benchmark
+constexpr int latency_iterations = 100000;
+// whether to initialize the memory before the benchmarks (required for ECC
+// memory) should later be determined automatically when the status core
+// provides this information
+constexpr bool ecc_memory = true;
+
+constexpr int PE_ID = 321;
+// column width used for printing the results in a table
+constexpr int col_width = 20;
+constexpr char space = ' ';
+
+// determines smallest transfer size for batch; transfer size is
+// 2^batch_min_length Bytes
+constexpr int batch_min_length = 10;
+// determines biggest transfer size for batch; transfer size is
+// 2^batch_max_length Bytes
+constexpr int batch_max_length = 25;
+
+// number of different request sizes for random benchmark
+constexpr int random_byte_length_c = 10;
+// request sizes for random benchmark in bytes
+constexpr int random_byte_length[random_byte_length_c] = {
+    8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096};
+constexpr int random_read_seed = 1234;
+constexpr int random_write_seed = 5678;
+
+double calcSpeed(unsigned long amount, unsigned long cycles, float clock) {
+  // calculate transfer speed in GiB/s for given transfer amount (in bytes) and
+  // time in cycles; clock speed is given in MHz
+  return (amount / (cycles / (clock * 1000000.0))) / (1024 * 1024 * 1024);
+}
+
+void executeRandomBenchmark(tapasco::Tapasco &tapasco, int op,
+                            unsigned long cycles, int byte_length,
+                            float designclk) {
+  char text[20];
+  unsigned long ret = -1;
+  tapasco::RetVal<unsigned long> ret_val(ret);
+  // first argument is operation: 3 means Random Read, 4 Random Write, 5 Random
+  // Read/Write second argument is runtime in cycles third argument is request
+  // size in bytes (maximum 4096) fourth and fifth arguments are seeds for the
+  // read and write address generation respectively
+  auto job = tapasco.launch(PE_ID, ret_val, 3 + op, cycles, byte_length,
+                            random_read_seed, random_write_seed);
+  job();
+  // when job is finished use return value (completed requests) to calculate
+  // performance
+  unsigned long total_data = byte_length * ret;
+  double iops = ret / (cycles / (designclk * 1000000.0));
+  snprintf(text, 20, "%.2fMIOPS", iops / 1000000);
+  std::cout << left << setw(col_width) << setfill(space) << text;
+  snprintf(text, 20, "%#.2fGiB/s", calcSpeed(total_data, cycles, designclk));
+  std::cout << left << setw(col_width) << setfill(space) << text;
+}
+
+void benchmarkRandom(tapasco::Tapasco &tapasco, float designclk,
+                     unsigned long cycles) {
+  if (ecc_memory) {
+    std::cout << "Initializing memory (required for ECC memory)" << std::endl;
+    // To initialize memoryn write with biggest request size for double
+    // benchmark time one time with read-address-seed second time with
+    // write-address-seed this ensures all addresses which will later be
+    // accessed were already initialized
+    auto job = tapasco.launch(PE_ID, 4, 2 * cycles,
+                              random_byte_length[random_byte_length_c - 1],
+                              random_read_seed, random_read_seed);
+    job();
+    job = tapasco.launch(PE_ID, 4, 2 * cycles,
+                         random_byte_length[random_byte_length_c - 1],
+                         random_write_seed, random_write_seed);
+    job();
+  }
+  std::cout << std::endl << std::endl;
+
+  std::cout << "Random Access (" << cycles << " Cycles)" << std::endl
+            << std::endl;
+
+  // print table header
+  std::cout << left << setw(col_width) << setfill(space) << "Size";
+  std::cout << left << setw(2 * col_width) << setfill(space) << "Read";
+  std::cout << left << setw(2 * col_width) << setfill(space) << "Write";
+  std::cout << left << setw(2 * col_width) << setfill(space) << "Read/Write";
+  std::cout << std::endl;
+
+  // execute random benchmark for different request sizes
+  for (int count = 0; count < random_byte_length_c; count++) {
+    char text[20];
+    snprintf(text, 20, "%iB", random_byte_length[count]);
+    std::cout << left << setw(col_width) << setfill(space) << text;
+    // Random Read
+    executeRandomBenchmark(tapasco, 0, cycles, random_byte_length[count],
+                           designclk);
+    // Random Write
+    executeRandomBenchmark(tapasco, 1, cycles, random_byte_length[count],
+                           designclk);
+    // Random Read/write
+    executeRandomBenchmark(tapasco, 2, cycles, random_byte_length[count],
+                           designclk);
+    std::cout << std::endl;
+  }
+}
+
+void printAsNano(double cycles, float clock) {
+  // convert given number of cycles to nanoseconds and print; clock speed is in
+  // MHz
+  double nano = (cycles / clock) * 1000;
+  char text[20];
+  snprintf(text, 20, "%.2fns", nano);
+  std::cout << left << setw(col_width) << setfill(space) << text;
+}
+
+void benchmarkLatency(tapasco::Tapasco &tapasco, float designclk) {
+  std::cout << std::endl << std::endl;
+  if (ecc_memory) {
+    // Write to memory so the location is initialized
+    auto prejob = tapasco.launch(PE_ID, 6, 0, 64, 1234);
+    prejob();
+  }
+  std::cout << "Read Latency (" << latency_iterations << " Iterations)"
+            << std::endl;
+  std::cout << std::endl;
+  unsigned long min = ULONG_MAX;
+  unsigned long max = 0;
+  unsigned long acc = 0;
+  // execute given number of iterations
+  for (int t = 0; t < latency_iterations; t++) {
+    unsigned long ret = -1;
+    tapasco::RetVal<unsigned long> ret_val(ret);
+    // first argument is operation: 6 for Read Latency
+    // second argument is ignored
+    // third argument is request size
+    // fourth argument is used as seed for memory address
+    auto job = tapasco.launch(PE_ID, ret_val, 6, 0, 64, random_read_seed);
+    job();
+    // when job finished use return value (latency in cycles) to update
+    // accumulator, minimum and maximum
+    min = std::min(min, ret);
+    max = std::max(max, ret);
+    acc += ret;
+  }
+  // Calculate minimum, maximum and average latency in nanoseconds
+  std::cout << left << setw(col_width) << setfill(space) << "Average:";
+  printAsNano(((acc * 1.0) / latency_iterations), designclk);
+  std::cout << std::endl;
+  std::cout << left << setw(col_width) << setfill(space) << "Minimum:";
+  printAsNano(min, designclk);
+  std::cout << std::endl;
+  std::cout << left << setw(col_width) << setfill(space) << "Maximum:";
+  printAsNano(max, designclk);
+  std::cout << std::endl;
+}
+
+void executeBatchBenchmark(tapasco::Tapasco &tapasco, float designclk, int op,
+                           size_t size) {
+  // calculate transfer size (2^size)
+  size_t len = 1 << size;
+  // used to accumulate return values over all iterations
+  unsigned long acc = 0;
+  // execute given number of iterations
+  for (int i = 0; i < batch_iterations; i++) {
+    unsigned long ret = 0;
+    tapasco::RetVal<unsigned long> ret_val(ret);
+    // first argument is operation: 0 for Batch Read, 1 for Batch Write, 2 for
+    // Batch Read/Write second argument is unused third argument is transfer
+    // size
+    auto job = tapasco.launch(PE_ID, ret_val, op, 0, len);
+    job();
+    // when job finished add return value (transfer time in cycles) to
+    // accumulator
+    acc += ret;
+  }
+  // use accumulator to calculate performance
+  unsigned long total_data = len * batch_iterations;
+  // if operation is Read/Write len Bytes are read and len Bytes are written
+  if (op == 2)
+    total_data *= 2;
+  char text[20];
+  snprintf(text, 20, "%#.3fGiB/s", calcSpeed(total_data, acc, designclk));
+  std::cout << left << setw(col_width) << setfill(space) << text;
+}
+
+void benchmarkBatch(tapasco::Tapasco &tapasco, float designclk) {
+  std::cout << std::endl << std::endl;
+
+  std::cout << "Batch Access (" << batch_iterations << " Iterations)"
+            << std::endl
+            << std::endl;
+
+  // print table header
+  std::cout << left << setw(col_width) << setfill(space) << "Size";
+  std::cout << left << setw(col_width) << setfill(space) << "Read";
+  std::cout << left << setw(col_width) << setfill(space) << "Write";
+  std::cout << left << setw(col_width) << setfill(space) << "Read/Write";
+  std::cout << std::endl;
+
+  // execute batch benchmark for different transfer sizes
+  for (size_t s = batch_min_length; s <= batch_max_length; s++) {
+    char text[20];
+    snprintf(text, 20, "%iKib", ((1 << s) / 1024));
+    std::cout << left << setw(col_width) << setfill(space) << text;
+    // Batch Read
+    executeBatchBenchmark(tapasco, designclk, 0, s);
+    // Batch Write
+    executeBatchBenchmark(tapasco, designclk, 1, s);
+    // Batch Read/Write
+    executeBatchBenchmark(tapasco, designclk, 2, s);
+
+    std::cout << std::endl;
+  }
+}
+
+int main(int argc, char **argv) {
+  // Initialize TaPaSCo
+  tapasco::Tapasco tapasco;
+  platform_info_t info;
+  tapasco.info(&info);
+
+  // Check PE count
+  uint64_t instances = tapasco_device_kernel_pe_count(tapasco.device(), PE_ID);
+  std::cout << "Got " << instances << " instances @ " << info.clock.design
+            << "MHz" << std::endl;
+  if (!instances) {
+    std::cout << "Need at least one instance to run." << std::endl;
+    exit(1);
+  }
+
+  // runtime for random access benchmark
+  unsigned long cycles = random_time_ms * info.clock.design * 1000;
+
+  benchmarkRandom(tapasco, info.clock.design, cycles);
+
+  benchmarkBatch(tapasco, info.clock.design);
+
+  benchmarkLatency(tapasco, info.clock.design);
+
+  return 0;
+}
diff --git a/runtime/examples/memtest/memtest_parallel.cpp b/runtime/examples/memtest/memtest_parallel.cpp
new file mode 100644
index 00000000..182596fb
--- /dev/null
+++ b/runtime/examples/memtest/memtest_parallel.cpp
@@ -0,0 +1,252 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <array>
+#include <climits>
+#include <iomanip>
+#include <iostream>
+#include <tapasco.hpp>
+#include <vector>
+
+using namespace tapasco;
+
+// runtime for random access benchmark in milliseconds
+constexpr int random_time_ms = 1000;
+// iterations for batch access benchmark
+constexpr int batch_iterations = 1000;
+// iterations for latency benchmark
+constexpr int latency_iterations = 100000;
+// whether to initialize the memory before the benchmarks (required for ECC
+// memory) should later be determined automatically when the status core
+// provides this information
+constexpr bool ecc_memory = true;
+
+constexpr int PE_ID = 321;
+// column width used for printing the results in a table
+constexpr int col_width = 20;
+constexpr char space = ' ';
+
+// determines smallest transfer size for batch; transfer size is
+// 2^batch_min_length Bytes
+constexpr int batch_min_length = 10;
+// determines biggest transfer size for batch; transfer size is
+// 2^batch_max_length Bytes
+constexpr int batch_max_length = 25;
+
+// number of different request sizes for random benchmark
+constexpr int random_byte_length_c = 10;
+// request sizes for random benchmark in bytes
+constexpr int random_byte_length[random_byte_length_c] = {
+    8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096};
+constexpr int random_read_seed = 1234;
+constexpr int random_write_seed = 5678;
+
+double calcSpeed(unsigned long amount, unsigned long cycles, float clock) {
+  // calculate transfer speed in GiB/s for given transfer amount (in bytes) and
+  // time in cycles; clock speed is given in MHz
+  return (amount / (cycles / (clock * 1000000.0))) / (1024 * 1024 * 1024);
+}
+
+void executeRandomBenchmark(tapasco::Tapasco &tapasco, int op,
+                            unsigned long cycles, int byte_length,
+                            float designclk, int instances) {
+  char text[20];
+  // allocate vectors for jobs and return values
+  std::vector<tapasco::job_future> jobs;
+  std::vector<tapasco::RetVal<unsigned long>> retvals;
+  retvals.reserve(instances);
+  unsigned long rets[instances];
+
+  // start one job for each instance of the PE found
+  for (int instance = 0; instance < instances; instance++) {
+    rets[instance] = 0;
+    tapasco::RetVal<unsigned long> ret_val(rets[instance]);
+    retvals.push_back(ret_val);
+    // first argument is operation: 3 means Random Read, 4 Random Write, 5
+    // Random Read/Write second argument is runtime in cycles third argument is
+    // request size in bytes (maximum 4096) fourth and fifth arguments are seeds
+    // for the read and write address generation respectively
+    auto job = tapasco.launch(PE_ID, retvals[instance], 3 + op, cycles,
+                              byte_length, random_read_seed, random_write_seed);
+    jobs.push_back(job);
+  }
+
+  unsigned long acc = 0;
+  for (int instance = 0; instance < instances; instance++) {
+    // when job is finished use return value (completed requests) to calculate
+    // performance
+    jobs[instance]();
+    acc += retvals[instance].value;
+    double iops = retvals[instance].value / (cycles / (designclk * 1000000.0));
+    snprintf(text, 20, "%.2fMIOPS", iops / 1000000);
+    std::cout << left << setw(col_width) << setfill(space) << text;
+  }
+
+  double iops = acc / (cycles / (designclk * 1000000.0));
+  snprintf(text, 20, "%.2fMIOPS", iops / 1000000);
+  std::cout << left << setw(col_width) << setfill(space) << text;
+}
+
+void benchmarkRandom(tapasco::Tapasco &tapasco, float designclk,
+                     unsigned long cycles, int instances) {
+  if (ecc_memory) {
+    std::cout << "Initializing memory (required for ECC memory)" << std::endl;
+    // To initialize memoryn write with biggest request size for double
+    // benchmark time one time with read-address-seed second time with
+    // write-address-seed this ensures all addresses which will later be
+    // accessed were already initialized
+    auto job = tapasco.launch(PE_ID, 4, 2 * cycles, 4096, random_read_seed,
+                              random_read_seed);
+    job();
+    job = tapasco.launch(PE_ID, 4, 2 * cycles, 4096, random_write_seed,
+                         random_write_seed);
+    job();
+  }
+  char text[20];
+  std::cout << std::endl << std::endl;
+  std::cout << "Random Access Read/Write (" << cycles << " Cycles)" << std::endl
+            << std::endl;
+
+  // print table header
+  std::cout << left << setw(col_width) << setfill(space) << "Size";
+  for (int instance = 0; instance < instances; instance++) {
+    snprintf(text, 20, "Instance %i", instance);
+    std::cout << left << setw(col_width) << setfill(space) << text;
+  }
+  std::cout << left << setw(col_width) << setfill(space) << "Total";
+  std::cout << std::endl;
+
+  // execute random benchmark for different request sizes
+  for (int count = 0; count < random_byte_length_c; count++) {
+    snprintf(text, 20, "%iB", random_byte_length[count]);
+    std::cout << left << setw(col_width) << setfill(space) << text;
+    // execute Random Read/Write
+    executeRandomBenchmark(tapasco, 2, cycles, random_byte_length[count],
+                           designclk, instances);
+    std::cout << std::endl;
+  }
+}
+
+void executeBatchBenchmark(tapasco::Tapasco &tapasco, float designclk, int op,
+                           size_t size, int instances) {
+  // calculate transfer size (2^size)
+  size_t len = 1 << size;
+
+  // init one "global" accumulator and one accumulator for each PE
+  // will be used to accumulate the return values of the jobs over all
+  // iterations
+  unsigned long acc = 0;
+  unsigned long accs[instances];
+  for (int instance = 0; instance < instances; instance++)
+    accs[instance] = 0;
+
+  // execute given number of iterations
+  for (int i = 0; i < batch_iterations; i++) {
+    // allocate vectors for jobs and return values
+    std::vector<tapasco::job_future> jobs;
+    std::vector<tapasco::RetVal<unsigned long>> retvals;
+    retvals.reserve(instances);
+    unsigned long rets[instances];
+    // start one job for each instance of the PE found
+    for (int instance = 0; instance < instances; instance++) {
+      rets[instance] = 0;
+      tapasco::RetVal<unsigned long> ret_val(rets[instance]);
+      retvals.push_back(ret_val);
+      // first argument is operation: 0 for Batch Read, 1 for Batch Write, 2 for
+      // Batch Read/Write second argument is unused third argument is transfer
+      // size
+      auto job = tapasco.launch(PE_ID, retvals[instance], op, 0, len);
+      jobs.push_back(job);
+    }
+    for (int instance = 0; instance < instances; instance++) {
+      // when job finished add return value (transfer time in cycles) to
+      // accumulators
+      jobs[instance]();
+      accs[instance] += retvals[instance].value;
+      acc += retvals[instance].value;
+    }
+  }
+
+  // Use accumulators to compute individual and total performance values
+  unsigned long total_data = len * batch_iterations;
+  if (op == 2)
+    total_data *= 2;
+  char text[20];
+  for (int instance = 0; instance < instances; instance++) {
+    snprintf(text, 20, "%#.3fGiB/s",
+             calcSpeed(total_data, accs[instance], designclk));
+    std::cout << left << setw(col_width) << setfill(space) << text;
+  }
+  snprintf(text, 20, "%#.3fGiB/s",
+           calcSpeed(total_data * instances, acc / instances, designclk));
+  std::cout << left << setw(col_width) << setfill(space) << text;
+}
+
+void benchmarkBatch(tapasco::Tapasco &tapasco, float designclk, int instances) {
+  char text[20];
+  std::cout << std::endl << std::endl;
+
+  std::cout << "Batch Access Read/Write (" << batch_iterations << " Iterations)"
+            << std::endl
+            << std::endl;
+
+  // print table header
+  std::cout << left << setw(col_width) << setfill(space) << "Size";
+  for (int instance = 0; instance < instances; instance++) {
+    snprintf(text, 20, "Instance %i", instance);
+    std::cout << left << setw(col_width) << setfill(space) << text;
+  }
+  std::cout << left << setw(col_width) << setfill(space) << "Total";
+  std::cout << std::endl;
+
+  // execute batch benchmark for different transfer sizes
+  for (size_t s = batch_min_length; s <= batch_max_length; s++) {
+    snprintf(text, 20, "%iKib", ((1 << s) / 1024));
+    std::cout << left << setw(col_width) << setfill(space) << text;
+    // execute Batch Read/Write
+    executeBatchBenchmark(tapasco, designclk, 2, s, instances);
+
+    std::cout << std::endl;
+  }
+}
+
+int main(int argc, char **argv) {
+  // Initialize TaPaSCo
+  tapasco::Tapasco tapasco;
+  platform_info_t info;
+  tapasco.info(&info);
+
+  // Check PE count
+  uint64_t instances = tapasco_device_kernel_pe_count(tapasco.device(), PE_ID);
+  std::cout << "Got " << instances << " instances @ " << info.clock.design
+            << "MHz" << std::endl;
+  if (!instances || instances < 2) {
+    std::cout << "Need at least two instance to run." << std::endl;
+    exit(1);
+  }
+
+  // runtime for random access benchmark
+  unsigned long cycles = random_time_ms * info.clock.design * 1000;
+
+  benchmarkRandom(tapasco, info.clock.design, cycles, instances);
+
+  benchmarkBatch(tapasco, info.clock.design, instances);
+
+  return 0;
+}
diff --git a/runtime/examples/start_latency/CMakeLists.txt b/runtime/examples/start_latency/CMakeLists.txt
new file mode 100644
index 00000000..dba5e6c7
--- /dev/null
+++ b/runtime/examples/start_latency/CMakeLists.txt
@@ -0,0 +1,40 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
+include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
+project (start_latency)
+
+if(NOT TARGET tapasco)
+find_package(TapascoTLKM REQUIRED)
+find_package(TapascoCommon REQUIRED)
+find_package(TapascoPlatform REQUIRED)
+find_package(Tapasco REQUIRED)
+endif(NOT TARGET tapasco)
+
+add_executable(start_latency start_latency.cpp)
+set_tapasco_defaults(start_latency)
+target_link_libraries(start_latency PRIVATE tapasco tlkm platform tapasco-common)
+
+add_executable(read_latency read_latency.cpp)
+set_tapasco_defaults(read_latency)
+target_link_libraries(read_latency PRIVATE tapasco tlkm platform tapasco-common)
+
+install(TARGETS read_latency start_latency
+        ARCHIVE  DESTINATION share/Tapasco/bin/
+        LIBRARY  DESTINATION share/Tapasco/bin/
+        RUNTIME  DESTINATION share/Tapasco/bin/)
\ No newline at end of file
diff --git a/runtime/examples/start_latency/plot_start_latency.py b/runtime/examples/start_latency/plot_start_latency.py
new file mode 100644
index 00000000..7bfb2f88
--- /dev/null
+++ b/runtime/examples/start_latency/plot_start_latency.py
@@ -0,0 +1,122 @@
+#!/bin/python3
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+from math import sqrt
+import matplotlib as mpl
+import matplotlib.pyplot as plt
+import seaborn as sns
+import numpy as np
+import pandas as pd
+import json
+import re
+import sys
+
+import argparse
+
+parser = argparse.ArgumentParser()
+parser.add_argument('file', type=argparse.FileType('r'))
+args = parser.parse_args()
+
+textwidth=516.0 * 0.0138889
+columnwidth=252.0 * 0.0138889
+
+def latexify(fig_width=None, fig_height=None, columns=1):
+    """Set up matplotlib's RC params for LaTeX plotting.
+    Call this before plotting a figure.
+    Parameters
+    ----------
+    fig_width : float, optional, inches
+    fig_height : float,  optional, inches
+    columns : {1, 2}
+    """
+
+    # code adapted from http://www.scipy.org/Cookbook/Matplotlib/LaTeX_Examples
+
+    # Width and max height in inches for IEEE journals taken from
+    # computer.org/cms/Computer.org/Journal%20templates/transactions_art_guide.pdf
+
+    assert(columns in [1,2])
+
+    if fig_width is None:
+        fig_width = 3.39 if columns==1 else 6.9 # width in inches
+
+    if fig_height is None:
+        golden_mean = (sqrt(5)-1.0)/2.0    # Aesthetic ratio
+        fig_height = fig_width*golden_mean # height in inches
+
+    MAX_HEIGHT_INCHES = 8.0
+    if fig_height > MAX_HEIGHT_INCHES:
+        print("WARNING: fig_height too large:" + str(fig_height) +
+              "so will reduce to" + str(MAX_HEIGHT_INCHES) + "inches.")
+        fig_height = MAX_HEIGHT_INCHES
+
+    params = {'backend': 'ps',
+              'text.latex.preamble':
+                                     [r'\usepackage{gensymb}',
+                                      r'\usepackage[binary-units=true, per-mode=symbol,exponent-to-prefix=true]{siunitx}'],
+              'axes.labelsize': 8, # fontsize for x and y labels (was 10)
+              'axes.titlesize': 8,
+              'font.size': 8, # was 10
+              'legend.fontsize': 6, # was 10
+              'xtick.labelsize': 8,
+              'ytick.labelsize': 8,
+              'text.usetex': True,
+              'figure.figsize': [fig_width,fig_height],
+              'font.family': 'sans-serif'
+    }
+
+    mpl.rcParams.update(params)
+
+def format_axes(ax):
+    for spine in ['top', 'right']:
+        ax.spines[spine].set_visible(False)
+
+    for spine in ['left', 'bottom']:
+        ax.spines[spine].set_color(SPINE_COLOR)
+        ax.spines[spine].set_linewidth(0.5)
+
+    ax.xaxis.set_ticks_position('bottom')
+    ax.yaxis.set_ticks_position('left')
+
+    for axis in [ax.xaxis, ax.yaxis]:
+        axis.set_tick_params(direction='out', color=SPINE_COLOR)
+
+    return ax
+
+sns.set()
+latexify(columnwidth)
+
+import csv
+
+data_csv = csv.DictReader(args.file)
+data = pd.DataFrame(columns=("Byte", "Microseconds"))
+for k in data_csv:
+    data = data.append({'Byte':int(k["Byte"]), 'Microseconds': float(k["Nanoseconds"]) / 1000.0}, ignore_index=True)
+
+fig, ax = plt.subplots(1, 1)
+
+ax.set_yscale("log")
+ax.set_xscale("log")
+sns.lineplot(data=data, ax=ax, x="Byte", y="Microseconds", ci="sd")
+ax.set_xlabel(r'Transfer Size (\si{\byte})')
+ax.set_ylabel(r'Microseconds')
+
+plt.savefig('start_latency.pdf', format='pdf', bbox_inches='tight')
diff --git a/runtime/examples/start_latency/read_latency.cpp b/runtime/examples/start_latency/read_latency.cpp
new file mode 100644
index 00000000..779a5006
--- /dev/null
+++ b/runtime/examples/start_latency/read_latency.cpp
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <chrono>
+#include <iostream>
+
+#include <platform_types.h>
+#include <tapasco.hpp>
+
+using namespace tapasco;
+
+extern volatile void *
+device_regspace_status_ptr(const platform_devctx_t *devctx);
+
+int main(int argc, char **argv) {
+  Tapasco tapasco;
+
+  constexpr int repetitions = 1000000;
+
+  volatile void *status = device_regspace_status_ptr(tapasco.platform_device());
+
+  std::chrono::duration<double, std::nano> elapsed_seconds;
+
+  volatile uint64_t out;
+
+  auto start = std::chrono::steady_clock::now();
+  for (int i = 0; i < repetitions; ++i) {
+    out = ((volatile uint64_t *)status)[0];
+  }
+  auto end = std::chrono::steady_clock::now();
+
+  elapsed_seconds = end - start;
+  uint64_t read_delay = (uint64_t)(elapsed_seconds.count() / repetitions);
+  std::cout << std::fixed << "Single read takes " << read_delay
+            << "ns. V: " << out << std::endl;
+
+  start = std::chrono::steady_clock::now();
+  for (int i = 0; i < repetitions; ++i) {
+    ((volatile uint64_t *)status)[0] = 42;
+  }
+  end = std::chrono::steady_clock::now();
+
+  elapsed_seconds = end - start;
+  uint64_t write_delay = (uint64_t)(elapsed_seconds.count() / repetitions);
+  std::cout << std::fixed << "Single write takes " << write_delay
+            << "ns. V: " << out << std::endl;
+
+  return 0;
+}
diff --git a/runtime/examples/start_latency/start_latency.cpp b/runtime/examples/start_latency/start_latency.cpp
new file mode 100644
index 00000000..95ce864f
--- /dev/null
+++ b/runtime/examples/start_latency/start_latency.cpp
@@ -0,0 +1,167 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <chrono>
+#include <iostream>
+#include <vector>
+
+#include <platform_types.h>
+#include <tapasco.hpp>
+
+#ifdef _OPENMP
+#include <omp.h>
+#include <sstream>
+#endif
+
+using namespace tapasco;
+
+extern volatile void *
+device_regspace_status_ptr(const platform_devctx_t *devctx);
+
+int main(int argc, char **argv) {
+  Tapasco tapasco;
+
+  constexpr int max_pow = 30;
+  constexpr int repetitions = 1000;
+
+  static constexpr tapasco_kernel_id_t LATENCY_ID{742};
+
+  int threads = 1;
+
+#ifdef _OPENMP
+  if (argc > 1) {
+    std::stringstream s(argv[1]);
+    s >> threads;
+  }
+  omp_set_num_threads(threads);
+#endif
+
+  std::cout << "Using " << threads << " threads." << std::endl;
+
+  uint64_t instances =
+      tapasco_device_kernel_pe_count(tapasco.device(), LATENCY_ID);
+  if (instances != 1) {
+    std::cout << "Need exactly one latency instance to run." << std::endl;
+    exit(1);
+  }
+
+  platform_info_t info;
+  tapasco.info(&info);
+
+  platform_ctl_addr_t pe_addr = 0;
+
+  for (int i = 0; i < PLATFORM_NUM_SLOTS; ++i) {
+    if (info.composition.kernel[i] == LATENCY_ID) {
+      pe_addr = info.base.arch[i];
+    }
+  }
+
+  std::cout << "Found pe at 0x" << std::hex << pe_addr << std::dec << std::endl;
+  platform_ctl_addr_t pe_addr_reg = pe_addr + 0x20 + 9 * 0x10;
+  std::cout << "Using parameter 10 to set time at 0x" << std::hex << pe_addr_reg
+            << std::dec << std::endl;
+
+  volatile void *status = device_regspace_status_ptr(tapasco.platform_device());
+
+  std::chrono::duration<double, std::nano> elapsed_seconds;
+
+  volatile uint64_t out;
+
+  auto start = std::chrono::steady_clock::now();
+  for (int i = 0; i < repetitions; ++i) {
+    out = ((volatile uint64_t *)status)[0];
+  }
+  auto end = std::chrono::steady_clock::now();
+
+  elapsed_seconds = end - start;
+  uint64_t read_delay = (uint64_t)(elapsed_seconds.count() / repetitions);
+  std::cout << std::fixed << "Single read takes " << read_delay
+            << "ns. V: " << out << std::endl;
+
+  start = std::chrono::steady_clock::now();
+  for (int i = 0; i < repetitions; ++i) {
+    ((volatile uint64_t *)status)[0] = 42;
+  }
+  end = std::chrono::steady_clock::now();
+
+  elapsed_seconds = end - start;
+  uint64_t write_delay = (uint64_t)(elapsed_seconds.count() / repetitions);
+  std::cout << std::fixed << "Single write takes " << write_delay
+            << "ns. V: " << out << std::endl;
+
+  std::cout << "Starting experiment" << std::endl;
+
+  std::cout << "Byte,Nanoseconds" << std::endl;
+
+  for (size_t s = 3; s < max_pow; ++s) {
+    uint64_t elapsed_seconds = 0;
+
+    uint64_t ret = -1;
+    RetVal<uint64_t> ret_ts(ret);
+
+    size_t len = 1 << s;
+
+    size_t elements = std::max((size_t)1, len / sizeof(int));
+    std::vector<int> arr_from(elements, -1);
+
+    // Wrap the array to be TaPaSCo compatible
+    auto result_buffer_pointer = tapasco::makeWrappedPointer(
+        arr_from.data(), arr_from.size() * sizeof(int));
+    // Data will be copied back from the device only, no data will be moved to
+    // the device
+    auto result_buffer_in = tapasco::makeInOnly(result_buffer_pointer);
+
+#ifdef _OPENMP
+#pragma omp parallel for shared(elapsed_seconds)
+#endif
+    for (int i = 0; i < repetitions; ++i) {
+      auto sync = std::chrono::steady_clock::now();
+      uint64_t start_t = 1;
+      platform_write_ctl(tapasco.platform_device(), pe_addr_reg,
+                         sizeof(uint64_t), (void *)&start_t,
+                         PLATFORM_CTL_FLAGS_NONE);
+
+      // usleep(1);
+
+      start = std::chrono::steady_clock::now();
+      if (len > 8) {
+        tapasco.launch(LATENCY_ID, ret_ts, result_buffer_in)();
+      } else {
+        tapasco.launch(LATENCY_ID, ret_ts, 1)();
+      }
+      std::chrono::duration<double, std::nano> diff = start - sync;
+      double clock_period_ns = 1000.0 / info.clock.design;
+      uint64_t start_period_ns = clock_period_ns * ret;
+      elapsed_seconds = start_period_ns - diff.count() + (read_delay / 2);
+      std::cout << std::fixed << len << "," << elapsed_seconds << std::endl;
+    }
+  }
+
+  // Calculate the time it took from counter start (platform_write) to PE start
+  // in nanoseconds
+
+  // Assuming that the counter reset of the PE takes as long as the fetching of
+  // the clock - high uncertainty Hence, only the counter period is relevant.
+  /*
+    // Calculate the Timestamp of the start of the PE
+    //uint64_t start_ns = start.time_since_epoch().count() + start_period_ns;
+    //uint64_t diff = start_ns - start.time_since_epoch().count();
+  */
+  return 0;
+}
\ No newline at end of file
diff --git a/runtime/examples/tapasco-benchmark/CMakeLists.txt b/runtime/examples/tapasco-benchmark/CMakeLists.txt
index f9451f99..0408aac8 100644
--- a/runtime/examples/tapasco-benchmark/CMakeLists.txt
+++ b/runtime/examples/tapasco-benchmark/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (tapasco-benchmark)
diff --git a/runtime/examples/tapasco-benchmark/CumulativeAverage.hpp b/runtime/examples/tapasco-benchmark/CumulativeAverage.hpp
index d34b8808..f590822a 100644
--- a/runtime/examples/tapasco-benchmark/CumulativeAverage.hpp
+++ b/runtime/examples/tapasco-benchmark/CumulativeAverage.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	CumulativeAverage.hpp
  *  @brief	A class wrapping a lock-free cumulative (running) average.
diff --git a/runtime/examples/tapasco-benchmark/InterruptLatency.hpp b/runtime/examples/tapasco-benchmark/InterruptLatency.hpp
index 4f243745..7fd7548b 100644
--- a/runtime/examples/tapasco-benchmark/InterruptLatency.hpp
+++ b/runtime/examples/tapasco-benchmark/InterruptLatency.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file InterruptLatency.hpp
  *  @brief  Measures the software overhead, i.e., the roundtrip time that is
diff --git a/runtime/examples/tapasco-benchmark/JobThroughput.hpp b/runtime/examples/tapasco-benchmark/JobThroughput.hpp
index 4926c06a..31e3cbea 100644
--- a/runtime/examples/tapasco-benchmark/JobThroughput.hpp
+++ b/runtime/examples/tapasco-benchmark/JobThroughput.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file       JobThroughput.hpp
  *  @brief      Measures the maximal number of jobs per second.
diff --git a/runtime/examples/tapasco-benchmark/TransferSpeed.hpp b/runtime/examples/tapasco-benchmark/TransferSpeed.hpp
index 610b9ac9..99345b70 100644
--- a/runtime/examples/tapasco-benchmark/TransferSpeed.hpp
+++ b/runtime/examples/tapasco-benchmark/TransferSpeed.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file TransferSpeed.hpp
  *  @brief  Measures the transfer speed via TPC for a given chunk size.
diff --git a/runtime/examples/tapasco-benchmark/jobs/Jobs.cpp b/runtime/examples/tapasco-benchmark/jobs/Jobs.cpp
index 181fe0b3..6d1e78c3 100644
--- a/runtime/examples/tapasco-benchmark/jobs/Jobs.cpp
+++ b/runtime/examples/tapasco-benchmark/jobs/Jobs.cpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <atomic>
 #include <cstdint>
 #include <fstream>
diff --git a/runtime/examples/tapasco-benchmark/plotResults.py b/runtime/examples/tapasco-benchmark/plotResults.py
index 5d89ddfe..c34c9ed5 100755
--- a/runtime/examples/tapasco-benchmark/plotResults.py
+++ b/runtime/examples/tapasco-benchmark/plotResults.py
@@ -1,4 +1,23 @@
 #!/bin/python3
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
 
 import matplotlib as mpl
 import matplotlib.pyplot as plt
@@ -19,8 +38,7 @@
         print("Please specify the benchmarks as pairs of 'name filename'.")
         sys.exit(1)
 
-textwidth=516.0 * 0.0138889
-columnwidth=252.0 * 0.0138889
+columnwidth=1000 * 0.0138889
 
 def latexify(fig_width=None, fig_height=None, columns=1):
     """Set up matplotlib's RC params for LaTeX plotting.
@@ -116,9 +134,9 @@ def format_axes(ax):
         w_s = pd.Series([x * 1024 * 1024 for x in write], index)
         rw_s = pd.Series([x * 1024 * 1024 for x in readwrite], index)
 
-        benchmark_read["{} R".format(name)] = r_s
-        benchmark_write["{} W".format(name)] = w_s
-        benchmark_readwrite["{} RW".format(name)] = rw_s
+        benchmark_read["{}".format(name)] = r_s
+        benchmark_write["{}".format(name)] = w_s
+        benchmark_readwrite["{}".format(name)] = rw_s
 
         il = benchmark["Interrupt Latency"]
         index = []
@@ -155,29 +173,50 @@ def format_axes(ax):
 data_w = pd.DataFrame(benchmark_write)
 data_rw = pd.DataFrame(benchmark_readwrite)
 
-fig, ax = plt.subplots(3, 1)
+fig, ax = plt.subplots(5, 1)
 plt.subplots_adjust(hspace = 0.25)
 
+def sizeof_fmt(num, suffix='B'):
+    for unit in ['','Ki','Mi','Gi','Ti','Pi','Ei','Zi']:
+        if abs(num) < 1024.0:
+            return "%3.1f%s%s" % (num, unit, suffix)
+        num /= 1024.0
+    return "%.1f%s%s" % (num, 'Yi', suffix)
+
 ax[0].set_xscale("log")
+ax[0].get_yaxis().set_major_formatter(
+    mpl.ticker.FuncFormatter(lambda x, p: sizeof_fmt(x, suffix="B/s")))
 data_r.plot(ax=ax[0])
-data_w.plot(ax=ax[0])
-data_rw.plot(ax=ax[0])
-ax[0].set_xlabel(r'Transfer Size (\si{\byte})')
-ax[0].set_ylabel(r'Transfer Speed (\si{\byte\per\second})')
+ax[0].set_xlabel(r'Transfer Size (\si{\byte}) Reads')
+ax[0].set_ylabel(r'Transfer Speed')
+
+ax[1].set_xscale("log")
+ax[1].get_yaxis().set_major_formatter(
+    mpl.ticker.FuncFormatter(lambda x, p: sizeof_fmt(x, suffix="B/s")))
+data_w.plot(ax=ax[1])
+ax[1].set_xlabel(r'Transfer Size (\si{\byte}) Writes')
+ax[1].set_ylabel(r'Transfer Speed')
+
+ax[2].set_xscale("log")
+ax[2].get_yaxis().set_major_formatter(
+    mpl.ticker.FuncFormatter(lambda x, p: sizeof_fmt(x, suffix="B/s")))
+data_rw.plot(ax=ax[2])
+ax[2].set_xlabel(r'Transfer Size (\si{\byte}) Reads and Writes')
+ax[2].set_ylabel(r'Transfer Speed')
 
 for name, group in interrupt_latency.groupby("Device"):
-    group.plot(ax=ax[1], y="Avg", label=name)
+    group.plot(ax=ax[3], y="Avg", label=name)
     #group.plot(ax=ax[1], y="Max", label="{} Max".format(name))
     #group.plot(ax=ax[1], y="Min", label="{} Min".format(name))
 
-ax[1].set_xlabel(r'Cycle Count')
-ax[1].set_ylabel(r'Latency (\si{\micro\second})')
+ax[3].set_xlabel(r'Cycle Count')
+ax[3].set_ylabel(r'Latency (\si{\micro\second})')
 
 
 for name, group in job_throughput.groupby("Device"):
-    group.plot(ax=ax[2], y="Jobs", x="Threads", label=name)
+    group.plot(ax=ax[4], y="Jobs", x="Threads", label=name)
 
-ax[2].set_xlabel(r'Threads')
-ax[2].set_ylabel(r'Jobs Per Second')
+ax[4].set_xlabel(r'Threads')
+ax[4].set_ylabel(r'Jobs Per Second')
 
-plt.savefig('performance.pdf', format='pdf', bbox_inches='tight')
\ No newline at end of file
+plt.savefig('performance.pdf', format='pdf', bbox_inches='tight')
diff --git a/runtime/examples/tapasco-benchmark/tapasco_benchmark.cpp b/runtime/examples/tapasco-benchmark/tapasco_benchmark.cpp
index 16aad48c..d228564d 100644
--- a/runtime/examples/tapasco-benchmark/tapasco_benchmark.cpp
+++ b/runtime/examples/tapasco-benchmark/tapasco_benchmark.cpp
@@ -1,28 +1,22 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_benchmark.cpp
- *  @brief	Benchmark application that generates a JSON file containing
- *              parameters for design space exploration. Also gives an overview
- *              of system performance.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <chrono>
 #include <ctime>
 #include <fstream>
diff --git a/runtime/examples/tapasco-debug/CMakeLists.txt b/runtime/examples/tapasco-debug/CMakeLists.txt
index d1de72a3..440a2583 100644
--- a/runtime/examples/tapasco-debug/CMakeLists.txt
+++ b/runtime/examples/tapasco-debug/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project (tapasco-debug)
diff --git a/runtime/examples/tapasco-debug/debug-screens/AddressMapScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/AddressMapScreen.hpp
index 8e23d498..a09b3453 100644
--- a/runtime/examples/tapasco-debug/debug-screens/AddressMapScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/AddressMapScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	AddressMapScreen.hpp
  *  @brief	Reads address map from status core and displays base addresses.
diff --git a/runtime/examples/tapasco-debug/debug-screens/AtsPriScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/AtsPriScreen.hpp
index 4a2f0698..e2df991e 100644
--- a/runtime/examples/tapasco-debug/debug-screens/AtsPriScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/AtsPriScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	AtsPriScreen.hpp
  *  @brief	ATS/PRI check screen: Interfaces with ATScheck IP core.
diff --git a/runtime/examples/tapasco-debug/debug-screens/BlueDebugScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/BlueDebugScreen.hpp
index b3384067..9213d278 100644
--- a/runtime/examples/tapasco-debug/debug-screens/BlueDebugScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/BlueDebugScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file MonitorScreen.hpp
  *  @brief  Register monitor screen for the blue infrastructure of TPC.
@@ -256,4 +275,4 @@ class BlueDebugScreen : public MenuScreen {
   platform_ctl_addr_t intc_addr;
 };
 
-#endif
\ No newline at end of file
+#endif
diff --git a/runtime/examples/tapasco-debug/debug-screens/InterruptStressTestScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/InterruptStressTestScreen.hpp
index f524bde4..fa865ef8 100644
--- a/runtime/examples/tapasco-debug/debug-screens/InterruptStressTestScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/InterruptStressTestScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	InterruptStressTestScreen.hpp
  *  @brief	Interrupt stress test screen for tapasco-debug.
diff --git a/runtime/examples/tapasco-debug/debug-screens/LocalMemoryScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/LocalMemoryScreen.hpp
index 2c402bfa..14f4248b 100644
--- a/runtime/examples/tapasco-debug/debug-screens/LocalMemoryScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/LocalMemoryScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	LocalMemoryScreen.hpp
  *  @brief	Interface to local memories: read/write pe-local memory.
diff --git a/runtime/examples/tapasco-debug/debug-screens/MenuScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/MenuScreen.hpp
index 66ab60a6..3f070f46 100644
--- a/runtime/examples/tapasco-debug/debug-screens/MenuScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/MenuScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	MenuScreen.hpp
  *  @brief	Base class for menu screens in tapasco-debug.
diff --git a/runtime/examples/tapasco-debug/debug-screens/MonitorScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/MonitorScreen.hpp
index c42435d7..46361561 100644
--- a/runtime/examples/tapasco-debug/debug-screens/MonitorScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/MonitorScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file MonitorScreen.hpp
  *  @brief  Register monitor screen for tapasco-debug.
diff --git a/runtime/examples/tapasco-debug/debug-screens/Screen.hpp b/runtime/examples/tapasco-debug/debug-screens/Screen.hpp
index f203b58b..dc17d34a 100644
--- a/runtime/examples/tapasco-debug/debug-screens/Screen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/Screen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	Screen.hpp
  *  @brief	Base class of screens in tapasco-debug.
diff --git a/runtime/examples/tapasco-debug/debug-screens/TapascoDebugMenu.hpp b/runtime/examples/tapasco-debug/debug-screens/TapascoDebugMenu.hpp
index 3d272f91..12c45518 100644
--- a/runtime/examples/tapasco-debug/debug-screens/TapascoDebugMenu.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/TapascoDebugMenu.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file TapascoDebugMenu.hpp
  *  @brief  Main menu of tapasco-debug.
diff --git a/runtime/examples/tapasco-debug/debug-screens/TapascoStatusScreen.hpp b/runtime/examples/tapasco-debug/debug-screens/TapascoStatusScreen.hpp
index 74609433..fb06c9dc 100644
--- a/runtime/examples/tapasco-debug/debug-screens/TapascoStatusScreen.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/TapascoStatusScreen.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file TapascoStatusScreen.hpp
  *  @brief  Kernel map screen for tapasco-debug.
diff --git a/runtime/examples/tapasco-debug/debug-screens/WordManipulator.hpp b/runtime/examples/tapasco-debug/debug-screens/WordManipulator.hpp
index 0f0a3287..fce43104 100644
--- a/runtime/examples/tapasco-debug/debug-screens/WordManipulator.hpp
+++ b/runtime/examples/tapasco-debug/debug-screens/WordManipulator.hpp
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 /**
  *  @file	WordManipulator.hpp
  *  @brief	ATS/PRI check screen: Model of a 32bit register.
diff --git a/runtime/examples/tapasco-debug/tapasco_debug.cpp b/runtime/examples/tapasco-debug/tapasco_debug.cpp
index 51eda88a..5c8c5bc5 100644
--- a/runtime/examples/tapasco-debug/tapasco_debug.cpp
+++ b/runtime/examples/tapasco-debug/tapasco_debug.cpp
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	tapasco_debug.cpp
- *  @brief	A TPC Debugging application.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 
 #include "debug-screens/TapascoDebugMenu.hpp"
 #include <iostream>
diff --git a/runtime/kernel/CMakeLists.txt b/runtime/kernel/CMakeLists.txt
index 83c807ad..67d2ff65 100644
--- a/runtime/kernel/CMakeLists.txt
+++ b/runtime/kernel/CMakeLists.txt
@@ -1,3 +1,20 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
 project(tlkm VERSION 1.0 LANGUAGES C)
diff --git a/runtime/kernel/Makefile b/runtime/kernel/Makefile
index cd97e325..2ca4d0ff 100644
--- a/runtime/kernel/Makefile
+++ b/runtime/kernel/Makefile
@@ -14,7 +14,7 @@ endif
 
 MODULE_DIR := $(PWD)
 
-CPPFLAGS+=-Werror -I$(MODULE_DIR) \
+CPPFLAGS+=-Werror -Wno-missing-attributes -I$(MODULE_DIR) \
 				  -I$(MODULE_DIR)/device \
 				  -I$(MODULE_DIR)/tlkm \
 				  -I$(MODULE_DIR)/user \
@@ -25,10 +25,10 @@ CPPFLAGS+=-Werror -I$(MODULE_DIR) \
 .PHONY:	all clean
 
 all:
-	make KCPPFLAGS="$(CPPFLAGS)" -C $(LINUX_HOME) M=$(MODULE_DIR) modules
+	$(MAKE) KCPPFLAGS="$(CPPFLAGS)" -C $(LINUX_HOME) M=$(MODULE_DIR) modules
 
 release:
-	make KCPPFLAGS+="$(CPPFLAGS) -DNDEBUG -O3" -C $(LINUX_HOME) M=$(MODULE_DIR) modules
+	$(MAKE) KCPPFLAGS+="$(CPPFLAGS) -DNDEBUG -O3" -C $(LINUX_HOME) M=$(MODULE_DIR) modules
 
 clean:
-	make -C $(LINUX_HOME) M=$(MODULE_DIR) clean
+	$(MAKE) -C $(LINUX_HOME) M=$(MODULE_DIR) clean
diff --git a/runtime/kernel/device/tlkm_control.c b/runtime/kernel/device/tlkm_control.c
index c02a3331..efc55b93 100644
--- a/runtime/kernel/device/tlkm_control.c
+++ b/runtime/kernel/device/tlkm_control.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/slab.h>
 #include <linux/gfp.h>
 #include <linux/fs.h>
diff --git a/runtime/kernel/device/tlkm_control.h b/runtime/kernel/device/tlkm_control.h
index 09548658..e72bcad2 100644
--- a/runtime/kernel/device/tlkm_control.h
+++ b/runtime/kernel/device/tlkm_control.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_CONTROL_H__
 #define TLKM_CONTROL_H__
 
diff --git a/runtime/kernel/device/tlkm_device_ioctl.c b/runtime/kernel/device/tlkm_device_ioctl.c
index 28a5f55d..04a8fb40 100644
--- a/runtime/kernel/device/tlkm_device_ioctl.c
+++ b/runtime/kernel/device/tlkm_device_ioctl.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/uaccess.h>
 #include <linux/string.h>
 #include <linux/miscdevice.h>
diff --git a/runtime/kernel/device/tlkm_device_ioctl.h b/runtime/kernel/device/tlkm_device_ioctl.h
index d27bf4a1..d222ff0c 100644
--- a/runtime/kernel/device/tlkm_device_ioctl.h
+++ b/runtime/kernel/device/tlkm_device_ioctl.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_DEVICE_IOCTL_H__
 #define TLKM_DEVICE_IOCTL_H__
 
diff --git a/runtime/kernel/device/tlkm_device_mmap.c b/runtime/kernel/device/tlkm_device_mmap.c
index f8c1af67..659d0b5b 100644
--- a/runtime/kernel/device/tlkm_device_mmap.c
+++ b/runtime/kernel/device/tlkm_device_mmap.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/fs.h>
 #include "tlkm_logging.h"
 #include "tlkm_bus.h"
diff --git a/runtime/kernel/device/tlkm_device_mmap.h b/runtime/kernel/device/tlkm_device_mmap.h
index 169b2656..86331b4c 100644
--- a/runtime/kernel/device/tlkm_device_mmap.h
+++ b/runtime/kernel/device/tlkm_device_mmap.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_DEVICE_MMAP_H__
 #define TLKM_DEVICE_MMAP_H__
 
diff --git a/runtime/kernel/device/tlkm_device_rw.c b/runtime/kernel/device/tlkm_device_rw.c
index 38cd076d..e8a68752 100644
--- a/runtime/kernel/device/tlkm_device_rw.c
+++ b/runtime/kernel/device/tlkm_device_rw.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/uaccess.h>
 #include <linux/version.h>
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 11, 0)
diff --git a/runtime/kernel/device/tlkm_device_rw.h b/runtime/kernel/device/tlkm_device_rw.h
index d0846508..0808fdde 100644
--- a/runtime/kernel/device/tlkm_device_rw.h
+++ b/runtime/kernel/device/tlkm_device_rw.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_DEVICE_RW_H__
 #define TLKM_DEVICE_RW_H__
 
diff --git a/runtime/kernel/device/tlkm_perfc.c b/runtime/kernel/device/tlkm_perfc.c
index 7d1e3ff2..4e62b8ef 100644
--- a/runtime/kernel/device/tlkm_perfc.c
+++ b/runtime/kernel/device/tlkm_perfc.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_perfc.c
 //! @brief	Performance counters interface for TaPaSCo:
 //!             Defines interface to diverse performance counters for the
diff --git a/runtime/kernel/device/tlkm_perfc.h b/runtime/kernel/device/tlkm_perfc.h
index 8959069d..eaff7c4a 100644
--- a/runtime/kernel/device/tlkm_perfc.h
+++ b/runtime/kernel/device/tlkm_perfc.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_module.c
 //! @brief	Performance counters interface for TaPaSCo:
 //!             Defines interface to diverse performance counters for the
diff --git a/runtime/kernel/device/tlkm_perfc_miscdev.c b/runtime/kernel/device/tlkm_perfc_miscdev.c
index 41883e4a..827bea4a 100644
--- a/runtime/kernel/device/tlkm_perfc_miscdev.c
+++ b/runtime/kernel/device/tlkm_perfc_miscdev.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_perfc_miscdev.h
 //! @brief	Misc device interface to TaPaSCo performance counters.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/device/tlkm_perfc_miscdev.h b/runtime/kernel/device/tlkm_perfc_miscdev.h
index 8de66981..d570f260 100644
--- a/runtime/kernel/device/tlkm_perfc_miscdev.h
+++ b/runtime/kernel/device/tlkm_perfc_miscdev.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_perfc_miscdev.h
 //! @brief	Misc device interface to TaPaSCo performance counters.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/dma/blue_dma.c b/runtime/kernel/dma/blue_dma.c
index 901e7472..1d8dc716 100644
--- a/runtime/kernel/dma/blue_dma.c
+++ b/runtime/kernel/dma/blue_dma.c
@@ -1,21 +1,23 @@
-//
-// Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #include <linux/sched.h>
 #include "tlkm_dma.h"
 #include "tlkm_logging.h"
@@ -79,20 +81,19 @@ int blue_dma_init(struct dma_engine *dma)
 	}
 }
 
-ssize_t blue_dma_copy_from(struct dma_engine *dma, void *dma_handle,
+ssize_t blue_dma_copy_from(struct dma_engine *dma, dma_addr_t dma_handle,
 			   dev_addr_t dev_addr, size_t len)
 {
-	dma_addr_t handle = (dma_addr_t)dma_handle;
 	DEVLOG(dma->dev_id, TLKM_LF_DMA,
 	       "dev_addr = 0x%p, dma_handle = 0x%p, len: %zu bytes",
-	       (void *)dev_addr, dma_handle, len);
+	       (void *)dev_addr, (void *)dma_handle, len);
 	if (mutex_lock_interruptible(&dma->regs_mutex)) {
 		WRN("got killed while aquiring the mutex");
 		return len;
 	}
 
 	*(u64 *)(dma->regs + REG_FPGA_ADDR) = dev_addr;
-	*(u64 *)(dma->regs + REG_HOST_ADDR) = (u64)(handle);
+	*(u64 *)(dma->regs + REG_HOST_ADDR) = (u64)(dma_handle);
 	*(u64 *)(dma->regs + REG_BTT) = len;
 	wmb();
 	*(u64 *)(dma->regs + REG_CMD) = CMD_READ;
@@ -101,19 +102,18 @@ ssize_t blue_dma_copy_from(struct dma_engine *dma, void *dma_handle,
 }
 
 ssize_t blue_dma_copy_to(struct dma_engine *dma, dev_addr_t dev_addr,
-			 const void *dma_handle, size_t len)
+			 dma_addr_t dma_handle, size_t len)
 {
-	dma_addr_t handle = (dma_addr_t)dma_handle;
 	DEVLOG(dma->dev_id, TLKM_LF_DMA,
 	       "dev_addr = 0x%px, dma_handle = 0x%p, len: %zu bytes",
-	       (void *)dev_addr, dma_handle, len);
+	       (void *)dev_addr, (void *)dma_handle, len);
 	if (mutex_lock_interruptible(&dma->regs_mutex)) {
 		WRN("got killed while aquiring the mutex");
 		return len;
 	}
 
 	*(u64 *)(dma->regs + REG_FPGA_ADDR) = dev_addr;
-	*(u64 *)(dma->regs + REG_HOST_ADDR) = (u64)(handle);
+	*(u64 *)(dma->regs + REG_HOST_ADDR) = (u64)(dma_handle);
 	*(u64 *)(dma->regs + REG_BTT) = len;
 	wmb();
 	*(u64 *)(dma->regs + REG_CMD) = CMD_WRITE;
diff --git a/runtime/kernel/dma/blue_dma.h b/runtime/kernel/dma/blue_dma.h
index a65d7e3f..13080a3f 100644
--- a/runtime/kernel/dma/blue_dma.h
+++ b/runtime/kernel/dma/blue_dma.h
@@ -1,21 +1,23 @@
-//
-// Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #ifndef BLUE_DMA_H__
 #define BLUE_DMA_H__
 
@@ -26,9 +28,9 @@
 int blue_dma_init(struct dma_engine *dma);
 irqreturn_t blue_dma_intr_handler_read(int irq, void *dev_id);
 irqreturn_t blue_dma_intr_handler_write(int irq, void *dev_id);
-ssize_t blue_dma_copy_from(struct dma_engine *dma, void *krn_addr,
+ssize_t blue_dma_copy_from(struct dma_engine *dma, dma_addr_t krn_addr,
 			   dev_addr_t dev_addr, size_t len);
 ssize_t blue_dma_copy_to(struct dma_engine *dma, dev_addr_t dev_addr,
-			 const void *krn_addr, size_t len);
+			 dma_addr_t krn_addr, size_t len);
 
 #endif /* BLUE_DMA_H__ */
diff --git a/runtime/kernel/dma/tlkm_dma.c b/runtime/kernel/dma/tlkm_dma.c
index 9590526d..256698d2 100644
--- a/runtime/kernel/dma/tlkm_dma.c
+++ b/runtime/kernel/dma/tlkm_dma.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/gfp.h>
 #include <linux/uaccess.h>
 #include <linux/slab.h>
@@ -62,7 +81,7 @@ int tlkm_dma_init(struct tlkm_device *dev, struct dma_engine *dma, u64 dbase,
 
 	DEVLOG(dev_id, TLKM_LF_DMA, "I/O remapping 0x%px - 0x%px...", base,
 	       base + size - 1);
-	dma->regs = ioremap_nocache((resource_size_t)base, size);
+	dma->regs = ioremap((resource_size_t)base, size);
 	if (dma->regs == 0 || IS_ERR(dma->regs)) {
 		DEVERR(dev_id, "failed to map 0x%p - 0x%p: %lx", base,
 		       base + size - 1, PTR_ERR(dma->regs));
diff --git a/runtime/kernel/dma/tlkm_dma.h b/runtime/kernel/dma/tlkm_dma.h
index aea14346..29190899 100644
--- a/runtime/kernel/dma/tlkm_dma.h
+++ b/runtime/kernel/dma/tlkm_dma.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_DMA_H__
 #define TLKM_DMA_H__
 
@@ -14,26 +33,26 @@ struct tlkm_device;
 typedef int (*dma_init_fun)(struct dma_engine *);
 typedef irqreturn_t (*dma_intr_handler)(int, void *);
 typedef ssize_t (*dma_copy_to_func_t)(struct dma_engine *, dev_addr_t,
-				      const void *, size_t);
-typedef ssize_t (*dma_copy_from_func_t)(struct dma_engine *, void *, dev_addr_t,
+				      dma_addr_t, size_t);
+typedef ssize_t (*dma_copy_from_func_t)(struct dma_engine *, dma_addr_t, dev_addr_t,
 					size_t);
 
 typedef enum { TO_DEV, FROM_DEV } dma_direction_t;
 
 typedef int (*dma_allocate_buffer_func_t)(dev_id_t dev_id,
 					  struct tlkm_device *dev,
-					  void **buffer, void **dev_handle,
+					  void **buffer, dma_addr_t *dev_handle,
 					  dma_direction_t direction,
 					  size_t size);
 typedef void (*dma_free_buffer_func_t)(dev_id_t dev_id, struct tlkm_device *dev,
-				       void **buffer, void **dev_handle,
+				       void **buffer, dma_addr_t *dev_handle,
 				       dma_direction_t direction, size_t size);
 
 typedef int (*dma_buffer_cpu_func_t)(dev_id_t dev_id, struct tlkm_device *dev,
-				     void **buffer, void **dev_handle,
+				     void **buffer, dma_addr_t *dev_handle,
 				     dma_direction_t direction, size_t size);
 typedef int (*dma_buffer_dev_func_t)(dev_id_t dev_id, struct tlkm_device *dev,
-				     void **buffer, void **dev_handle,
+				     void **buffer, dma_addr_t *dev_handle,
 				     dma_direction_t direction, size_t size);
 
 struct dma_operations {
@@ -67,9 +86,9 @@ struct dma_engine {
 	atomic64_t wq_enqueued;
 	atomic64_t wq_processed;
 	void *dma_buf_read[TLKM_DMA_CHUNKS];
-	void *dma_buf_read_dev[TLKM_DMA_CHUNKS];
+	dma_addr_t dma_buf_read_dev[TLKM_DMA_CHUNKS];
 	void *dma_buf_write[TLKM_DMA_CHUNKS];
-	void *dma_buf_write_dev[TLKM_DMA_CHUNKS];
+	dma_addr_t dma_buf_write_dev[TLKM_DMA_CHUNKS];
 	struct tlkm_device *dev;
 	int alignment;
 	volatile uint32_t *ack_register;
diff --git a/runtime/kernel/hsa/char_device_hsa.c b/runtime/kernel/hsa/char_device_hsa.c
index 93300a31..bf382fc3 100644
--- a/runtime/kernel/hsa/char_device_hsa.c
+++ b/runtime/kernel/hsa/char_device_hsa.c
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
-//
-// This file is part of ThreadPoolComposer (TPC).
-//
-// ThreadPoolComposer is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// ThreadPoolComposer is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with ThreadPoolComposer.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- * @file char_device_dma.c
- * @brief TODO
- * */
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 
 /******************************************************************************/
 
@@ -200,7 +197,7 @@ static int hsa_initialize(void)
 	atomic64_set(&dev.device_opened, 0);
 	mutex_init(&dev.ioctl_mutex);
 
-	dev.arbiter_base = (uint64_t *)ioremap_nocache(
+	dev.arbiter_base = (uint64_t *)ioremap(
 		dev.dev->base_offset + HSA_ARBITER_BASE_ADDR, HSA_ARBITER_SIZE);
 	if (dev.arbiter_base == 0) {
 		DEVERR(dev.dev->dev_id, "could not map arbiter");
@@ -212,7 +209,7 @@ static int hsa_initialize(void)
 		goto arbiter_find_failed;
 	}
 
-	dev.signal_base = (uint64_t *)ioremap_nocache(
+	dev.signal_base = (uint64_t *)ioremap(
 		dev.dev->base_offset + HSA_SIGNAL_BASE_ADDR, HSA_SIGNAL_SIZE);
 	if (dev.signal_base == 0) {
 		DEVERR(dev.dev->dev_id, "could not map arbiter");
diff --git a/runtime/kernel/hsa/char_device_hsa.h b/runtime/kernel/hsa/char_device_hsa.h
index 2e9c7670..6e8c8d6d 100644
--- a/runtime/kernel/hsa/char_device_hsa.h
+++ b/runtime/kernel/hsa/char_device_hsa.h
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
-//
-// This file is part of ThreadPoolComposer (TPC).
-//
-// ThreadPoolComposer is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// ThreadPoolComposer is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with ThreadPoolComposer.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- * @file char_device_hsa.h
- * @brief TODO
- * */
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 
 #ifndef __CHAR_DEVICE_HSA_H
 #define __CHAR_DEVICE_HSA_H
diff --git a/runtime/kernel/hsa/hsa_ioctl_calls.h b/runtime/kernel/hsa/hsa_ioctl_calls.h
index b3217a0b..bd76106d 100644
--- a/runtime/kernel/hsa/hsa_ioctl_calls.h
+++ b/runtime/kernel/hsa/hsa_ioctl_calls.h
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
-//
-// This file is part of ThreadPoolComposer (TPC).
-//
-// ThreadPoolComposer is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// ThreadPoolComposer is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with ThreadPoolComposer.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- * @file hsa_ioctl_calls.c
- * @brief TODO
- * */
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 
 #ifndef __HSA_IOCTL_CALLS_H
 #define __HSA_IOCTL_CALLS_H
diff --git a/runtime/kernel/pcie/pcie.c b/runtime/kernel/pcie/pcie.c
index dd3ef5cc..5cc76688 100644
--- a/runtime/kernel/pcie/pcie.c
+++ b/runtime/kernel/pcie/pcie.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/pci.h>
 #include <linux/module.h>
 #include "tlkm_logging.h"
@@ -6,6 +25,7 @@
 
 static const struct pci_device_id tlkm_pcie_id[] = {
 	{ PCI_DEVICE(XILINX_VENDOR_ID, XILINX_DEVICE_ID) },
+	{ PCI_DEVICE(AWS_EC2_VENDOR_ID, AWS_EC2_DEVICE_ID) },
 	{},
 };
 
diff --git a/runtime/kernel/pcie/pcie.h b/runtime/kernel/pcie/pcie.h
index f7b56e06..a07b8f0b 100644
--- a/runtime/kernel/pcie/pcie.h
+++ b/runtime/kernel/pcie/pcie.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PCIE_H__
 #define PCIE_H__
 
@@ -7,6 +26,8 @@
 #define PCIE_CLS_NAME "pcie"
 #define XILINX_VENDOR_ID 0x10EE
 #define XILINX_DEVICE_ID 0x7038
+#define AWS_EC2_VENDOR_ID 0x1D0F
+#define AWS_EC2_DEVICE_ID 0xF000
 
 #define PCIE_DEF INIT_PLATFORM(0x0ULL, 0x00002000 /* status */)
 
diff --git a/runtime/kernel/pcie/pcie_device.c b/runtime/kernel/pcie/pcie_device.c
index d1890581..77738fff 100644
--- a/runtime/kernel/pcie/pcie_device.c
+++ b/runtime/kernel/pcie/pcie_device.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/pci.h>
 #include <linux/version.h>
 #include <linux/module.h>
@@ -16,6 +35,54 @@
 	(((struct tlkm_pcie_device *)dev_get_drvdata(&(pdev)->dev))            \
 		 ->parent->dev_id)
 
+uint32_t get_xdma_reg_addr(uint32_t target, uint32_t channel, uint32_t offset)
+{
+	return ((target << 12) | (channel << 8) | offset);
+}
+
+static int aws_ec2_configure_xdma(struct tlkm_pcie_device *pdev)
+{
+	dev_id_t const did = pdev->parent->dev_id;
+	struct pci_dev *dev = pdev->pdev;
+
+	void __iomem *bar2;
+	uint32_t val;
+
+	DEVLOG(did, TLKM_LF_PCIE, "Mapping BAR2 and configuring XDMA core");
+	bar2 = ioremap(pci_resource_start(dev, 2),
+			       pci_resource_len(dev, 2));
+
+	if (!bar2) {
+		DEVERR(did, "XDMA ioremap failed");
+		return -ENODEV;
+	}
+
+	DEVLOG(did, TLKM_LF_PCIE, "XDMA addr: %p", bar2);
+	DEVLOG(did, TLKM_LF_PCIE, "XDMA len: %x",
+	       (int)pci_resource_len(dev, 2));
+
+	val = ioread32(bar2 + get_xdma_reg_addr(2, 0, 0));
+	DEVLOG(did, TLKM_LF_PCIE, "XDMA IRQ block identifier: %x", val);
+
+	/* set user interrupt vectors */
+	iowrite32(0x03020100, bar2 + get_xdma_reg_addr(2, 0, 0x80));
+	iowrite32(0x07060504, bar2 + get_xdma_reg_addr(2, 0, 0x84));
+	iowrite32(0x0b0a0908, bar2 + get_xdma_reg_addr(2, 0, 0x88));
+	iowrite32(0x0f0e0d0c, bar2 + get_xdma_reg_addr(2, 0, 0x8c));
+
+	/* set user interrupt enable mask */
+	iowrite32(0xffff, bar2 + get_xdma_reg_addr(2, 0, 0x04));
+	wmb();
+
+	val = ioread32(bar2 + get_xdma_reg_addr(2, 0, 0x04));
+	DEVLOG(did, TLKM_LF_PCIE, "XDMA user IER: %x", val);
+
+	DEVLOG(did, TLKM_LF_PCIE,
+	       "Finished configuring XDMA core, unmapping BAR2");
+	iounmap(bar2);
+	return 0;
+}
+
 /**
  * @brief Enables pcie-device and claims/remaps neccessary bar resources
  * @param pdev Pointer to pci-device, which should be allocated
@@ -48,6 +115,15 @@ static int claim_device(struct tlkm_pcie_device *pdev)
 
 	dev_set_drvdata(&dev->dev, pdev);
 
+	/* set up XDMA user interrupts on AWS EC2 platform */
+	if (dev->vendor == AWS_EC2_VENDOR_ID &&
+	    dev->device == AWS_EC2_DEVICE_ID) {
+		err = aws_ec2_configure_xdma(pdev);
+		if (err) {
+			DEVERR(did, "failed to configure XDMA core");
+			goto error_pci_req;
+		}
+	}
 	/* read out pci bar 0 settings */
 	pdev->phy_addr_bar0 = pci_resource_start(dev, 0);
 	pdev->phy_len_bar0 = pci_resource_len(dev, 0);
@@ -122,14 +198,25 @@ static int claim_msi(struct tlkm_pcie_device *pdev)
 #endif
 	}
 
+	if (dev->vendor == AWS_EC2_VENDOR_ID &&
+	    dev->device == AWS_EC2_DEVICE_ID) {
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0)
-	err = pci_enable_msix_range(dev, pdev->msix_entries,
-				    REQUIRED_INTERRUPTS, REQUIRED_INTERRUPTS);
+		err = pci_enable_msix_range(dev, pdev->msix_entries, 16, 16);
 #else
-	/* set up MSI interrupt vector to max size */
-	err = pci_alloc_irq_vectors(dev, REQUIRED_INTERRUPTS,
-				    REQUIRED_INTERRUPTS, PCI_IRQ_MSIX);
+		/* set up MSI interrupt vector to max size */
+		err = pci_alloc_irq_vectors(dev, 16, 16, PCI_IRQ_MSIX);
 #endif
+	} else {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0)
+		err = pci_enable_msix_range(dev, pdev->msix_entries,
+					    REQUIRED_INTERRUPTS,
+					    REQUIRED_INTERRUPTS);
+#else
+		/* set up MSI interrupt vector to max size */
+		err = pci_alloc_irq_vectors(dev, REQUIRED_INTERRUPTS,
+					    REQUIRED_INTERRUPTS, PCI_IRQ_MSIX);
+#endif
+	}
 
 	if (err <= 0) {
 		DEVERR(did, "cannot set MSI vector (%d)", err);
@@ -138,7 +225,14 @@ static int claim_msi(struct tlkm_pcie_device *pdev)
 		DEVLOG(did, TLKM_LF_IRQ, "got %d MSI vectors", err);
 	}
 
-	if ((err = pcie_irqs_init(pdev->parent))) {
+	if (dev->vendor == AWS_EC2_VENDOR_ID &&
+	    dev->device == AWS_EC2_DEVICE_ID) {
+		err = aws_ec2_pcie_irqs_init(pdev->parent);
+	} else {
+		err = pcie_irqs_init(pdev->parent);
+	}
+
+	if (err) {
 		DEVERR(did, "failed to register interrupts: %d", err);
 		return -ENOSPC;
 	}
@@ -147,7 +241,12 @@ static int claim_msi(struct tlkm_pcie_device *pdev)
 
 static void release_msi(struct tlkm_pcie_device *pdev)
 {
-	pcie_irqs_exit(pdev->parent);
+	if (pdev->pdev->vendor == AWS_EC2_VENDOR_ID &&
+	    pdev->pdev->device == AWS_EC2_DEVICE_ID) {
+		aws_ec2_pcie_irqs_exit(pdev->parent);
+	} else {
+		pcie_irqs_exit(pdev->parent);
+	}
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0)
 	pci_disable_msix(pdev->pdev);
 #else
@@ -195,8 +294,8 @@ int tlkm_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 {
 	struct tlkm_device *dev;
 	LOG(TLKM_LF_PCIE, "found TaPaSCo PCIe device, registering ...");
-	dev = tlkm_bus_new_device((struct tlkm_class *)&pcie_cls,
-				  XILINX_VENDOR_ID, XILINX_DEVICE_ID, pdev);
+	dev = tlkm_bus_new_device((struct tlkm_class *)&pcie_cls, id->vendor,
+				  id->device, pdev);
 	if (!dev) {
 		ERR("could not add device to bus");
 		return -ENOMEM;
@@ -244,6 +343,7 @@ int pcie_device_create(struct tlkm_device *dev, void *data)
 		goto err_configure;
 	}
 	report_link_status(pdev);
+	memset(pdev->irq_mapping, -1, REQUIRED_INTERRUPTS * sizeof(pdev->irq_mapping[0]));
 	return 0;
 
 err_configure:
@@ -273,8 +373,24 @@ void pcie_device_destroy(struct tlkm_device *dev)
 int pcie_device_init_subsystems(struct tlkm_device *dev, void *data)
 {
 	int ret = 0;
+	uint32_t status, c;
 	struct tlkm_pcie_device *pdev =
 		(struct tlkm_pcie_device *)dev->private_data;
+
+	dev_addr_t gpio_base = tlkm_status_get_component_base(
+		dev, "PLATFORM_COMPONENT_MEM_GPIO");
+	if (gpio_base != -1) {
+		volatile uint32_t *ddr_ready = (dev->mmap.plat + gpio_base);
+		status = ddr_ready[0];
+		for (c = 0; c < 4; c++) {
+			if (!(status & (1 << c))) {
+				DEVWRN(dev->dev_id,
+				       "memory channel %c is not available or not ready",
+				       65 + c);
+			}
+		}
+	}
+
 	DEVLOG(dev->dev_id, TLKM_LF_PCIE, "claiming MSI-X interrupts ...");
 	if ((ret = claim_msi(pdev))) {
 		DEVERR(dev->dev_id, "failed to claim MSI-X interrupts: %d",
@@ -306,14 +422,11 @@ void pcie_device_exit_subsystems(struct tlkm_device *dev)
 }
 
 int pcie_device_dma_allocate_buffer(dev_id_t dev_id, struct tlkm_device *dev,
-				    void **buffer, void **dev_handle,
+				    void **buffer, dma_addr_t *dev_handle,
 				    dma_direction_t direction, size_t size)
 {
 	struct tlkm_pcie_device *pdev =
 		(struct tlkm_pcie_device *)dev->private_data;
-	// We should really allocate memory and not misuse the void* as dma_addr_t
-	// Should be the same size on most systems, however
-	dma_addr_t *handle = (dma_addr_t *)dev_handle;
 	int err = 0;
 	*buffer = kmalloc(size, 0);
 	DEVLOG(dev_id, TLKM_LF_DEVICE,
@@ -321,11 +434,11 @@ int pcie_device_dma_allocate_buffer(dev_id_t dev_id, struct tlkm_device *dev,
 	       size, *buffer);
 	if (*buffer) {
 		memset(*buffer, 0, size);
-		*handle =
+		*dev_handle =
 			dma_map_single(&pdev->pdev->dev, *buffer, size,
 				       direction == FROM_DEV ? DMA_FROM_DEVICE :
 							       DMA_TO_DEVICE);
-		if (dma_mapping_error(&pdev->pdev->dev, *handle)) {
+		if (dma_mapping_error(&pdev->pdev->dev, *dev_handle)) {
 			DEVERR(dev_id, "DMA Mapping error");
 			err = -EFAULT;
 		}
@@ -335,25 +448,24 @@ int pcie_device_dma_allocate_buffer(dev_id_t dev_id, struct tlkm_device *dev,
 	}
 
 	DEVLOG(dev_id, TLKM_LF_DEVICE, "Mapped buffer to device address %p",
-	       (void *)*handle);
+	       (void *)*dev_handle);
 
 	return err;
 }
 
 void pcie_device_dma_free_buffer(dev_id_t dev_id, struct tlkm_device *dev,
-				 void **buffer, void **dev_handle,
+				 void **buffer, dma_addr_t *dev_handle,
 				 dma_direction_t direction, size_t size)
 {
 	struct tlkm_pcie_device *pdev =
 		(struct tlkm_pcie_device *)dev->private_data;
-	dma_addr_t *handle = (dma_addr_t *)dev_handle;
 	DEVLOG(dev_id, TLKM_LF_DEVICE, "Mapped buffer to device address %p",
-	       (void *)*handle);
-	if (*handle) {
-		dma_unmap_single(&pdev->pdev->dev, *handle, size,
+	       (void *)*dev_handle);
+	if (*dev_handle) {
+		dma_unmap_single(&pdev->pdev->dev, *dev_handle, size,
 				 direction == FROM_DEV ? DMA_FROM_DEVICE :
 							 DMA_TO_DEVICE);
-		*handle = 0;
+		*dev_handle = 0;
 	}
 	if (*buffer) {
 		kfree(*buffer);
@@ -363,16 +475,15 @@ void pcie_device_dma_free_buffer(dev_id_t dev_id, struct tlkm_device *dev,
 
 inline int pcie_device_dma_sync_buffer_cpu(dev_id_t dev_id,
 					   struct tlkm_device *dev,
-					   void **buffer, void **dev_handle,
+					   void **buffer, dma_addr_t *dev_handle,
 					   dma_direction_t direction,
 					   size_t size)
 {
 	struct tlkm_pcie_device *pdev =
 		(struct tlkm_pcie_device *)dev->private_data;
-	dma_addr_t *handle = (dma_addr_t *)dev_handle;
 	DEVLOG(dev_id, TLKM_LF_DEVICE, "Mapping buffer %p for cpu",
-	       *dev_handle);
-	dma_sync_single_for_cpu(&pdev->pdev->dev, *handle, size,
+	       (void *)*dev_handle);
+	dma_sync_single_for_cpu(&pdev->pdev->dev, *dev_handle, size,
 				direction == FROM_DEV ? DMA_FROM_DEVICE :
 							DMA_TO_DEVICE);
 	return 0;
@@ -380,16 +491,15 @@ inline int pcie_device_dma_sync_buffer_cpu(dev_id_t dev_id,
 
 inline int pcie_device_dma_sync_buffer_dev(dev_id_t dev_id,
 					   struct tlkm_device *dev,
-					   void **buffer, void **dev_handle,
+					   void **buffer, dma_addr_t *dev_handle,
 					   dma_direction_t direction,
 					   size_t size)
 {
 	struct tlkm_pcie_device *pdev =
 		(struct tlkm_pcie_device *)dev->private_data;
-	dma_addr_t *handle = (dma_addr_t *)dev_handle;
 	DEVLOG(dev_id, TLKM_LF_DEVICE, "Mapping buffer %p for device",
-	       *dev_handle);
-	dma_sync_single_for_device(&pdev->pdev->dev, *handle, size,
+	       (void *)*dev_handle);
+	dma_sync_single_for_device(&pdev->pdev->dev, *dev_handle, size,
 				   direction == FROM_DEV ? DMA_FROM_DEVICE :
 							   DMA_TO_DEVICE);
 	return 0;
diff --git a/runtime/kernel/pcie/pcie_device.h b/runtime/kernel/pcie/pcie_device.h
index 2684c776..a8a8a5ab 100644
--- a/runtime/kernel/pcie/pcie_device.h
+++ b/runtime/kernel/pcie/pcie_device.h
@@ -1,21 +1,23 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #ifndef PCIE_DEVICE_H__
 #define PCIE_DEVICE_H__
 
@@ -28,6 +30,8 @@
 #define TLKM_SLOT_INTERRUPTS 128
 #define REQUIRED_INTERRUPTS (TLKM_PLATFORM_INTERRUPTS + TLKM_SLOT_INTERRUPTS)
 
+uint32_t get_xdma_reg_addr(uint32_t target, uint32_t channel, uint32_t offset);
+
 int tlkm_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id);
 void tlkm_pcie_remove(struct pci_dev *pdev);
 
@@ -37,17 +41,17 @@ int pcie_device_init_subsystems(struct tlkm_device *dev, void *data);
 void pcie_device_exit_subsystems(struct tlkm_device *dev);
 
 int pcie_device_dma_allocate_buffer(dev_id_t dev_id, struct tlkm_device *dev,
-				    void **buffer, void **dev_handle,
+				    void **buffer, dma_addr_t *dev_handle,
 				    dma_direction_t direction, size_t size);
 void pcie_device_dma_free_buffer(dev_id_t dev_id, struct tlkm_device *dev,
-				 void **buffer, void **dev_handle,
+				 void **buffer, dma_addr_t *dev_handle,
 				 dma_direction_t direction, size_t size);
 
 int pcie_device_dma_sync_buffer_cpu(dev_id_t dev_id, struct tlkm_device *dev,
-				    void **buffer, void **dev_handle,
+				    void **buffer, dma_addr_t *dev_handle,
 				    dma_direction_t direction, size_t size);
 int pcie_device_dma_sync_buffer_dev(dev_id_t dev_id, struct tlkm_device *dev,
-				    void **buffer, void **dev_handle,
+				    void **buffer, dma_addr_t *dev_handle,
 				    dma_direction_t direction, size_t size);
 
 /* struct to hold data related to the pcie device */
diff --git a/runtime/kernel/pcie/pcie_ioctl.c b/runtime/kernel/pcie/pcie_ioctl.c
index 4c551c4e..81081772 100644
--- a/runtime/kernel/pcie/pcie_ioctl.c
+++ b/runtime/kernel/pcie/pcie_ioctl.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/uaccess.h>
 #include "tlkm_logging.h"
 #include "tlkm_device.h"
diff --git a/runtime/kernel/pcie/pcie_ioctl.h b/runtime/kernel/pcie/pcie_ioctl.h
index 505130f3..a561dae3 100644
--- a/runtime/kernel/pcie/pcie_ioctl.h
+++ b/runtime/kernel/pcie/pcie_ioctl.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PCIE_IOCTL_H__
 #define PCIE_IOCTL_H__
 
diff --git a/runtime/kernel/pcie/pcie_irq.c b/runtime/kernel/pcie/pcie_irq.c
index 20bf1585..78c0fc3f 100644
--- a/runtime/kernel/pcie/pcie_irq.c
+++ b/runtime/kernel/pcie/pcie_irq.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/pci.h>
 #include <linux/interrupt.h>
 #include <linux/device.h>
@@ -42,7 +61,9 @@ int pcie_irqs_init(struct tlkm_device *dev)
 	struct tlkm_pcie_device *pdev =
 		(struct tlkm_pcie_device *)dev->private_data;
 
-	int ret = 0, irqn, err[NUMBER_OF_INTERRUPTS];
+	int ret = 0, irqn,
+	    err[NUMBER_OF_INTERRUPTS] = { [0 ... NUMBER_OF_INTERRUPTS - 1] =
+						  1 };
 	BUG_ON(!dev);
 	pdev->ack_register =
 		(volatile uint32_t *)(dev->mmap.plat +
@@ -52,8 +73,7 @@ int pcie_irqs_init(struct tlkm_device *dev)
 	DEVLOG(dev->dev_id, TLKM_LF_IRQ, "registering %d interrupts ...",
 	       NUMBER_OF_INTERRUPTS);
 #define _INTR(nr)                                                              \
-	irqn = nr + pcie_cls.npirqs;                                           \
-	pdev->irq_mapping[irqn] = -1;
+	irqn = nr + pcie_cls.npirqs;
 
 	TLKM_PCIE_SLOT_INTERRUPTS
 #undef _INTR
@@ -109,6 +129,115 @@ void pcie_irqs_exit(struct tlkm_device *dev)
 	DEVLOG(dev->dev_id, TLKM_LF_IRQ, "interrupts deactivated");
 }
 
+#define _INTR(nr)                                                                                                            \
+	void aws_ec2_tlkm_pcie_slot_irq_work_##nr(struct work_struct *work)                                                  \
+	{                                                                                                                    \
+		uint32_t isr;                                                                                                \
+		struct tlkm_pcie_device *dev =                                                                               \
+			(struct tlkm_pcie_device *)container_of(                                                             \
+				work, struct tlkm_pcie_device, irq_work[nr]);                                                \
+		/*struct platform *p = &dev->parent->cls->platform;*/                                                        \
+		/* read ISR (interrupt status register) */                                                                   \
+		isr = dev->ack_register[1 + nr];                                                                             \
+		if (unlikely(!isr)) {                                                                                        \
+			DEVERR(dev->parent->dev_id,                                                                          \
+			       "Interrupt received, but ISR %d is empty", nr);                                               \
+			return;                                                                                              \
+		}                                                                                                            \
+		do {                                                                                                         \
+			/* Returns one plus the index of the least significant 1-bit of x, or if x is zero, returns zero. */ \
+			const uint32_t slot = __builtin_ffs(isr) - 1;                                                        \
+			tlkm_control_signal_slot_interrupt(dev->parent->ctrl,                                                \
+							   nr * 32 + slot);                                                  \
+			isr ^= (1U << slot);                                                                                 \
+		} while (isr);                                                                                               \
+	}                                                                                                                    \
+                                                                                                                             \
+	irqreturn_t aws_ec2_tlkm_pcie_slot_irq_##nr(int irq, void *dev_id)                                                   \
+	{                                                                                                                    \
+		struct pci_dev *pdev = (struct pci_dev *)dev_id;                                                             \
+		struct tlkm_pcie_device *dev =                                                                               \
+			(struct tlkm_pcie_device *)dev_get_drvdata(                                                          \
+				&pdev->dev);                                                                                 \
+		if (!schedule_work(&dev->irq_work[nr]))                                                                      \
+			tlkm_perfc_irq_error_already_pending_inc(                                                            \
+				dev->parent->dev_id);                                                                        \
+		tlkm_perfc_total_irqs_inc(dev->parent->dev_id);                                                              \
+		return IRQ_HANDLED;                                                                                          \
+	}
+
+TLKM_AWS_EC2_SLOT_INTERRUPTS
+#undef _INTR
+
+int aws_ec2_pcie_irqs_init(struct tlkm_device *dev)
+{
+	struct tlkm_pcie_device *pdev =
+		(struct tlkm_pcie_device *)dev->private_data;
+
+	int ret = 0, irqn, err[4] = { [0 ... 3] = 1 };
+	BUG_ON(!dev);
+	pdev->ack_register =
+		(volatile uint32_t *)(dev->mmap.plat +
+				      tlkm_status_get_component_base(
+					      dev, "PLATFORM_COMPONENT_INTC0") +
+				      0x8120);
+	DEVLOG(dev->dev_id, TLKM_LF_IRQ, "registering %d interrupts ...", 4);
+#define _INTR(nr)                                                              \
+	irqn = nr + pcie_cls.npirqs;                                           \
+	if ((err[nr] = request_irq(pci_irq_vector(pdev->pdev, irqn),           \
+				   aws_ec2_tlkm_pcie_slot_irq_##nr,            \
+				   IRQF_EARLY_RESUME, TLKM_PCI_NAME,           \
+				   pdev->pdev))) {                             \
+		DEVERR(dev->dev_id, "could not request interrupt %d: %d",      \
+		       irqn, err[nr]);                                         \
+		goto irq_error;                                                \
+	} else {                                                               \
+		pdev->irq_mapping[irqn] = pci_irq_vector(pdev->pdev, irqn);    \
+		DEVLOG(dev->dev_id, TLKM_LF_IRQ,                               \
+		       "interrupt line %d/%d assigned with return value %d",   \
+		       irqn, pci_irq_vector(pdev->pdev, irqn), err[nr]);       \
+		INIT_WORK(&pdev->irq_work[nr],                                 \
+			  aws_ec2_tlkm_pcie_slot_irq_work_##nr);               \
+	}
+	TLKM_AWS_EC2_SLOT_INTERRUPTS
+#undef _INTR
+	return 0;
+
+irq_error:
+#define _INTR(nr)                                                              \
+	irqn = nr + pcie_cls.npirqs;                                           \
+	if (!err[nr]) {                                                        \
+		free_irq(pdev->irq_mapping[irqn], pdev->pdev);                 \
+		pdev->irq_mapping[irqn] = -1;                                  \
+	} else {                                                               \
+		ret = err[nr];                                                 \
+	}
+	TLKM_AWS_EC2_SLOT_INTERRUPTS
+#undef _INTR
+	return ret;
+}
+
+void aws_ec2_pcie_irqs_exit(struct tlkm_device *dev)
+{
+	struct tlkm_pcie_device *pdev =
+		(struct tlkm_pcie_device *)dev->private_data;
+	int irqn;
+
+#define _INTR(nr)                                                              \
+	irqn = nr + pcie_cls.npirqs;                                           \
+	if (pdev->irq_mapping[irqn] != -1) {                                   \
+		DEVLOG(dev->dev_id, TLKM_LF_IRQ,                               \
+		       "freeing interrupt %d with mappping %d", irqn,          \
+		       pdev->irq_mapping[irqn]);                               \
+		free_irq(pdev->irq_mapping[irqn], pdev->pdev);                 \
+		pdev->irq_mapping[irqn] = -1;                                  \
+	}
+	TLKM_AWS_EC2_SLOT_INTERRUPTS
+#undef _INTR
+
+	DEVLOG(dev->dev_id, TLKM_LF_IRQ, "interrupts deactivated");
+}
+
 int pcie_irqs_request_platform_irq(struct tlkm_device *dev, int irq_no,
 				   irq_handler_t intr_handler, void *data)
 {
diff --git a/runtime/kernel/pcie/pcie_irq.h b/runtime/kernel/pcie/pcie_irq.h
index 59cf2387..ac4bcd8d 100644
--- a/runtime/kernel/pcie/pcie_irq.h
+++ b/runtime/kernel/pcie/pcie_irq.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PCIE_IRQ_H__
 #define PCIE_IRQ_H__
 
@@ -139,6 +158,14 @@
 	_INTR(126)                                                             \
 	_INTR(127)
 
+#define TLKM_AWS_EC2_SLOT_INTERRUPTS                                           \
+	_INTR(0)                                                               \
+	_INTR(1)                                                               \
+	_INTR(2)                                                               \
+	_INTR(3)
+
+int aws_ec2_pcie_irqs_init(struct tlkm_device *dev);
+void aws_ec2_pcie_irqs_exit(struct tlkm_device *dev);
 int pcie_irqs_init(struct tlkm_device *dev);
 void pcie_irqs_exit(struct tlkm_device *dev);
 int pcie_irqs_request_platform_irq(struct tlkm_device *dev, int irq_no,
@@ -151,4 +178,10 @@ void pcie_irqs_release_platform_irq(struct tlkm_device *dev, int irq_no);
 TLKM_PCIE_SLOT_INTERRUPTS
 #undef _INTR
 
+#define _INTR(nr)                                                              \
+	irqreturn_t aws_ec2_tlkm_pcie_slot_irq_##nr(int irq, void *dev_id);    \
+	void aws_ec2_tlkm_pcie_slot_irq_work_##nr(struct work_struct *work);
+TLKM_AWS_EC2_SLOT_INTERRUPTS
+#undef _INTR
+
 #endif /* PCIE_IRQ_H__ */
diff --git a/runtime/kernel/test/tlkm_ioctl_test.c b/runtime/kernel/test/tlkm_ioctl_test.c
index d36080b6..325c6451 100644
--- a/runtime/kernel/test/tlkm_ioctl_test.c
+++ b/runtime/kernel/test/tlkm_ioctl_test.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <stdio.h>
 #include <fcntl.h>
 #include <unistd.h>
diff --git a/runtime/kernel/tlkm/tlkm.c b/runtime/kernel/tlkm/tlkm.c
index 17baf641..e8205d64 100644
--- a/runtime/kernel/tlkm/tlkm.c
+++ b/runtime/kernel/tlkm/tlkm.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/miscdevice.h>
 #include <linux/fs.h>
 #include <linux/module.h>
diff --git a/runtime/kernel/tlkm/tlkm.h b/runtime/kernel/tlkm/tlkm.h
index a6e5cc63..424c57ee 100644
--- a/runtime/kernel/tlkm/tlkm.h
+++ b/runtime/kernel/tlkm/tlkm.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_H__
 #define TLKM_H__
 
diff --git a/runtime/kernel/tlkm/tlkm_bus.c b/runtime/kernel/tlkm/tlkm_bus.c
index bb3d76c4..f399e14a 100644
--- a/runtime/kernel/tlkm/tlkm_bus.c
+++ b/runtime/kernel/tlkm/tlkm_bus.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/list.h>
 #include <linux/slab.h>
 #include <linux/gfp.h>
@@ -11,6 +30,7 @@
 #include "tlkm_logging.h"
 #include "pcie/pcie.h"
 #include "zynq/zynq.h"
+#include "zynq/zynqmp.h"
 #include "pcie/pcie_device.h"
 
 static DEFINE_MUTEX(_tlkm_bus_mtx);
@@ -24,6 +44,7 @@ static struct tlkm_bus {
 
 static struct tlkm_class *const _tlkm_class[] = {
 	(struct tlkm_class *)&zynq_cls,
+	(struct tlkm_class *)&zynqmp_cls,
 	(struct tlkm_class *)&pcie_cls,
 };
 
diff --git a/runtime/kernel/tlkm/tlkm_bus.h b/runtime/kernel/tlkm/tlkm_bus.h
index bbd3874b..4c44e6e3 100644
--- a/runtime/kernel/tlkm/tlkm_bus.h
+++ b/runtime/kernel/tlkm/tlkm_bus.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_BUS_H__
 #define TLKM_BUS_H__
 
diff --git a/runtime/kernel/tlkm/tlkm_class.h b/runtime/kernel/tlkm/tlkm_class.h
index 93b39af0..fa232e80 100644
--- a/runtime/kernel/tlkm/tlkm_class.h
+++ b/runtime/kernel/tlkm/tlkm_class.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_CLASS_H__
 #define TLKM_CLASS_H__
 
diff --git a/runtime/kernel/tlkm/tlkm_device.c b/runtime/kernel/tlkm/tlkm_device.c
index a753039e..e4200ef1 100644
--- a/runtime/kernel/tlkm/tlkm_device.c
+++ b/runtime/kernel/tlkm/tlkm_device.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/gfp.h>
 #include <linux/slab.h>
 #include "tlkm_logging.h"
diff --git a/runtime/kernel/tlkm/tlkm_device.h b/runtime/kernel/tlkm/tlkm_device.h
index a453c8a9..afdab7fe 100644
--- a/runtime/kernel/tlkm/tlkm_device.h
+++ b/runtime/kernel/tlkm/tlkm_device.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_DEVICE_H__
 #define TLKM_DEVICE_H__
 
diff --git a/runtime/kernel/tlkm/tlkm_ioctl.c b/runtime/kernel/tlkm/tlkm_ioctl.c
index 8d31992a..ac17b5dc 100644
--- a/runtime/kernel/tlkm/tlkm_ioctl.c
+++ b/runtime/kernel/tlkm/tlkm_ioctl.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_ioctl.c
 //! @brief	Implementations of ioctl commands for control.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/tlkm/tlkm_ioctl.h b/runtime/kernel/tlkm/tlkm_ioctl.h
index db32c914..de1de7c1 100644
--- a/runtime/kernel/tlkm/tlkm_ioctl.h
+++ b/runtime/kernel/tlkm/tlkm_ioctl.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_IOCTL_H__
 #define TLKM_IOCTL_H__
 
diff --git a/runtime/kernel/tlkm/tlkm_logging.c b/runtime/kernel/tlkm/tlkm_logging.c
index 66c48fc8..ca14a9df 100644
--- a/runtime/kernel/tlkm/tlkm_logging.c
+++ b/runtime/kernel/tlkm/tlkm_logging.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_logging.h
 //! @brief	Kernel logging for TaPaSCo unified loadable kernel module.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/tlkm/tlkm_logging.h b/runtime/kernel/tlkm/tlkm_logging.h
index abf26e22..cc4022a8 100644
--- a/runtime/kernel/tlkm/tlkm_logging.h
+++ b/runtime/kernel/tlkm/tlkm_logging.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_logging.h
 //! @brief	Kernel logging for TaPaSCo unified loadable kernel module.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/tlkm/tlkm_platform.c b/runtime/kernel/tlkm/tlkm_platform.c
index beb5a14c..888ab78c 100644
--- a/runtime/kernel/tlkm/tlkm_platform.c
+++ b/runtime/kernel/tlkm/tlkm_platform.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/slab.h>
@@ -7,6 +26,9 @@
 #include "tlkm_logging.h"
 #include "user/tlkm_device_ioctl_cmds.h"
 
+#define AWS_EC2_VENDOR_ID 0x1D0F
+#define AWS_EC2_DEVICE_ID 0xF000
+
 int tlkm_platform_status_init(struct tlkm_device *dev,
 			      struct platform_mmap *mmap)
 {
@@ -16,7 +38,7 @@ int tlkm_platform_status_init(struct tlkm_device *dev,
 	       "I/O mapping 0x%px-0x%px for status",
 	       (void *)(dev->base_offset + p->status.base),
 	       (void *)(dev->base_offset + p->status.high));
-	mmap->status = ioremap_nocache(dev->base_offset + p->status.base,
+	mmap->status = ioremap(dev->base_offset + p->status.base,
 				       p->status.size);
 	if (!mmap->status) {
 		DEVERR(dev->dev_id,
@@ -54,7 +76,7 @@ int tlkm_platform_mmap_init(struct tlkm_device *dev, struct platform_mmap *mmap)
 	       "I/O mapping 0x%px-0x%px for architecture",
 	       (void *)(dev->base_offset + dev->arch.base),
 	       (void *)(dev->base_offset + dev->arch.high));
-	mmap->arch = ioremap_nocache(dev->base_offset + dev->arch.base,
+	mmap->arch = ioremap(dev->base_offset + dev->arch.base,
 				     dev->arch.size);
 	if (!mmap->arch) {
 		DEVERR(dev->dev_id,
@@ -69,7 +91,7 @@ int tlkm_platform_mmap_init(struct tlkm_device *dev, struct platform_mmap *mmap)
 	       "I/O mapping 0x%px-0x%px for platform",
 	       (void *)(dev->base_offset + dev->plat.base),
 	       (void *)(dev->base_offset + dev->plat.high));
-	mmap->plat = ioremap_nocache(dev->base_offset + dev->plat.base,
+	mmap->plat = ioremap(dev->base_offset + dev->plat.base,
 				     dev->plat.size);
 	if (!mmap->plat) {
 		DEVERR(dev->dev_id,
diff --git a/runtime/kernel/tlkm/tlkm_slots.h b/runtime/kernel/tlkm/tlkm_slots.h
index 54249949..f7a95bd4 100644
--- a/runtime/kernel/tlkm/tlkm_slots.h
+++ b/runtime/kernel/tlkm/tlkm_slots.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_SLOT_H__
 #define TLKM_SLOT_H__
 
diff --git a/runtime/kernel/tlkm/tlkm_status.c b/runtime/kernel/tlkm/tlkm_status.c
index 20041cd5..cd28df59 100644
--- a/runtime/kernel/tlkm/tlkm_status.c
+++ b/runtime/kernel/tlkm/tlkm_status.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include "tlkm_logging.h"
 #include "tlkm_status.h"
 #include "tlkm_device.h"
diff --git a/runtime/kernel/tlkm/tlkm_status.h b/runtime/kernel/tlkm/tlkm_status.h
index a4ac4b32..9211dcf8 100644
--- a/runtime/kernel/tlkm/tlkm_status.h
+++ b/runtime/kernel/tlkm/tlkm_status.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_STATUS_H__
 #define TLKM_STATUS_H__
 
diff --git a/runtime/kernel/tlkm_module.c b/runtime/kernel/tlkm_module.c
index 2a7c8aec..acb49efb 100644
--- a/runtime/kernel/tlkm_module.c
+++ b/runtime/kernel/tlkm_module.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_module.c
 //! @brief	Unified driver as a loadable kernel module (LKM) for Linux.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/tlkm_module.h b/runtime/kernel/tlkm_module.h
index 42775017..bc69e7b7 100644
--- a/runtime/kernel/tlkm_module.h
+++ b/runtime/kernel/tlkm_module.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_module.h
 //! @brief	Unified driver as a loadable kernel module (LKM) for Linux.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/user/tlkm_access.h b/runtime/kernel/user/tlkm_access.h
index fad86a50..f83e6783 100644
--- a/runtime/kernel/user/tlkm_access.h
+++ b/runtime/kernel/user/tlkm_access.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_ACCESS_H__
 #define TLKM_ACCESS_H__
 
diff --git a/runtime/kernel/user/tlkm_device_ioctl_cmds.h b/runtime/kernel/user/tlkm_device_ioctl_cmds.h
index a94ed4a7..490ae472 100644
--- a/runtime/kernel/user/tlkm_device_ioctl_cmds.h
+++ b/runtime/kernel/user/tlkm_device_ioctl_cmds.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_device_ioctl.h
 //! @brief	Defines ioctl commands for the TLKM device control files.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/user/tlkm_ioctl_cmds.h b/runtime/kernel/user/tlkm_ioctl_cmds.h
index cd2d1ee5..12ba51ca 100644
--- a/runtime/kernel/user/tlkm_ioctl_cmds.h
+++ b/runtime/kernel/user/tlkm_ioctl_cmds.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_ioctl.h
 //! @brief	Defines ioctl commands for the top-level TLKM device file.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/user/tlkm_platform.h b/runtime/kernel/user/tlkm_platform.h
index dc83a209..eec29384 100644
--- a/runtime/kernel/user/tlkm_platform.h
+++ b/runtime/kernel/user/tlkm_platform.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	tlkm_platform.h
 //! @brief	Global configuration parameters for TLKM devices.
 //! authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/user/tlkm_types.h b/runtime/kernel/user/tlkm_types.h
index 2bc26015..24ef10fe 100644
--- a/runtime/kernel/user/tlkm_types.h
+++ b/runtime/kernel/user/tlkm_types.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef TLKM_TYPES_H__
 #define TLKM_TYPES_H__
 
diff --git a/runtime/kernel/zynq/gen_fixed_size_pool.h b/runtime/kernel/zynq/gen_fixed_size_pool.h
index df9495f2..8b6a6a9d 100644
--- a/runtime/kernel/zynq/gen_fixed_size_pool.h
+++ b/runtime/kernel/zynq/gen_fixed_size_pool.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	gen_fixed_size_pool.h
 //! @brief	Generic, header-only, lock-free implementation of a fixed size
 //!		pool of things based on statically allocated array.
diff --git a/runtime/kernel/zynq/zynq.h b/runtime/kernel/zynq/zynq.h
index 6737f306..efdc73fd 100644
--- a/runtime/kernel/zynq/zynq.h
+++ b/runtime/kernel/zynq/zynq.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef ZYNQ_H__
 #define ZYNQ_H__
 
diff --git a/runtime/kernel/zynq/zynq_device.c b/runtime/kernel/zynq/zynq_device.c
index e70bb425..855e07d3 100644
--- a/runtime/kernel/zynq/zynq_device.c
+++ b/runtime/kernel/zynq/zynq_device.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/of.h>
 #include <linux/fs.h>
 #include <linux/io.h>
@@ -5,6 +24,7 @@
 #include "tlkm_types.h"
 #include "tlkm_bus.h"
 #include "zynq.h"
+#include "zynqmp.h"
 #include "zynq_device.h"
 #include "zynq_irq.h"
 #include "zynq_dmamgmt.h"
@@ -16,6 +36,13 @@ static const struct of_device_id zynq_ids[] = {
 	{},
 };
 
+static const struct of_device_id zynqmp_ids[] = {
+	{
+		.compatible = ZYNQMP_NAME,
+	},
+	{},
+};
+
 static struct zynq_device _zynq_dev; // there is at most one Zynq
 
 int zynq_device_init(struct tlkm_device *inst, void *data)
@@ -66,14 +93,14 @@ int zynq_device_init_subsystems(struct tlkm_device *dev, void *data)
 	return ret;
 
 err_irq:
-	zynq_dmamgmt_exit();
+	zynq_dmamgmt_exit(dev);
 	return ret;
 }
 
 void zynq_device_exit_subsystems(struct tlkm_device *dev)
 {
 	zynq_irq_exit(&_zynq_dev);
-	zynq_dmamgmt_exit();
+	zynq_dmamgmt_exit(dev);
 	DEVLOG(dev->dev_id, TLKM_LF_DEVICE, "exited subsystems");
 }
 
@@ -92,3 +119,18 @@ int zynq_device_probe(struct tlkm_class *cls)
 	}
 	return 0;
 }
+
+int zynqmp_device_probe(struct tlkm_class *cls)
+{
+	struct tlkm_device *inst;
+	LOG(TLKM_LF_DEVICE, "searching for Xilinx Zynq-MP series devices ...");
+	if (of_find_matching_node(NULL, zynqmp_ids)) {
+		LOG(TLKM_LF_DEVICE, "found Xilinx Zynq-MP");
+		inst = tlkm_bus_new_device(cls, 0, 0, NULL);
+		if (!inst)
+			return -EFAULT;
+	} else {
+		LOG(TLKM_LF_DEVICE, "no Xilinx Zynq-MP series device found");
+	}
+	return 0;
+}
diff --git a/runtime/kernel/zynq/zynq_device.h b/runtime/kernel/zynq/zynq_device.h
index 8e3f5dd2..2c86d8dc 100644
--- a/runtime/kernel/zynq/zynq_device.h
+++ b/runtime/kernel/zynq/zynq_device.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef ZYNQ_DEVICE_H__
 #define ZYNQ_DEVICE_H__
 
@@ -15,5 +34,6 @@ int zynq_device_init_subsystems(struct tlkm_device *dev, void *data);
 void zynq_device_exit_subsystems(struct tlkm_device *dev);
 
 int zynq_device_probe(struct tlkm_class *cls);
+int zynqmp_device_probe(struct tlkm_class *cls);
 
 #endif /* ZYNQ_DEVICE_H__ */
diff --git a/runtime/kernel/zynq/zynq_dmamgmt.c b/runtime/kernel/zynq/zynq_dmamgmt.c
index 75a764c2..3411036b 100644
--- a/runtime/kernel/zynq/zynq_dmamgmt.c
+++ b/runtime/kernel/zynq/zynq_dmamgmt.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	zynq_dmamgmt.c
 //! @brief	Tapasco Platform Zynq: DMA buffer management.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.esa.tu-darmstadt.de)
@@ -24,6 +25,8 @@
 #include "tlkm_logging.h"
 #include "zynq_dmamgmt.h"
 #include "gen_fixed_size_pool.h"
+#include <linux/of_device.h>
+#include <linux/version.h>
 
 static inline void init_dma_buf_t(struct dma_buf_t *buf, fsp_idx_t const idx)
 {
@@ -56,29 +59,39 @@ int zynq_dmamgmt_init(void)
 	return 0;
 }
 
-void zynq_dmamgmt_exit()
+void zynq_dmamgmt_exit(struct tlkm_device *inst)
 {
 	int i;
 	for (i = 0; i < ZYNQ_DMAMGMT_POOLSZ; ++i) {
 		if (_dmabuf.elems[i].kvirt_addr) {
 			WRN("buffer %d in use, releasing memory!", i);
-			zynq_dmamgmt_dealloc(i);
+			zynq_dmamgmt_dealloc(inst, i);
 		}
 	}
 	LOG(TLKM_LF_DMAMGMT, "DMA buffer management exited");
 }
 
-dma_addr_t zynq_dmamgmt_alloc(size_t const len, handle_t *hid)
+dma_addr_t zynq_dmamgmt_alloc(struct tlkm_device *inst, size_t const len, handle_t *hid)
 {
 	fsp_idx_t id;
+	int mask;
 	id = dmabuf_fsp_get(&_dmabuf);
 	LOG(TLKM_LF_DMAMGMT, "len = %zu, id = %u", len, id);
 	if (id == INVALID_IDX) {
 		WRN("internal pool depleted: could not allocate a buffer!");
 		return 0;
 	}
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 18, 0)
+	of_dma_configure(inst->ctrl->miscdev.this_device, NULL, true);
+#else
+	of_dma_configure(inst->ctrl->miscdev.this_device, NULL);
+#endif
+	mask = dma_set_coherent_mask(inst->ctrl->miscdev.this_device, 0xFFFFFFFF);
+	if(mask) {
+		WRN("could not set DMA mask");
+	}
 	_dmabuf.elems[id].kvirt_addr =
-		dma_alloc_coherent(NULL, len, &_dmabuf.elems[id].dma_addr,
+		dma_alloc_coherent(inst->ctrl->miscdev.this_device, len, &_dmabuf.elems[id].dma_addr,
 				   GFP_KERNEL | __GFP_MEMALLOC);
 	if (!_dmabuf.elems[id].kvirt_addr) {
 		WRN("could not allocate DMA buffer of size %zu byte!", len);
@@ -95,7 +108,7 @@ dma_addr_t zynq_dmamgmt_alloc(size_t const len, handle_t *hid)
 	return _dmabuf.elems[id].dma_addr;
 }
 
-int zynq_dmamgmt_dealloc(handle_t const id)
+int zynq_dmamgmt_dealloc(struct tlkm_device *inst, handle_t const id)
 {
 	if (id < ZYNQ_DMAMGMT_POOLSZ && _dmabuf.elems[id].kvirt_addr) {
 		LOG(TLKM_LF_DMAMGMT,
@@ -103,7 +116,7 @@ int zynq_dmamgmt_dealloc(handle_t const id)
 		    id, _dmabuf.elems[id].len,
 		    (unsigned long)_dmabuf.elems[id].kvirt_addr,
 		    (unsigned long)_dmabuf.elems[id].dma_addr);
-		dma_free_coherent(NULL, _dmabuf.elems[id].len,
+		dma_free_coherent(inst->ctrl->miscdev.this_device, _dmabuf.elems[id].len,
 				  _dmabuf.elems[id].kvirt_addr,
 				  _dmabuf.elems[id].dma_addr);
 		init_dma_buf_t(&_dmabuf.elems[id], id);
@@ -115,9 +128,9 @@ int zynq_dmamgmt_dealloc(handle_t const id)
 	return 0;
 }
 
-int zynq_dmamgmt_dealloc_dma(dma_addr_t const addr)
+int zynq_dmamgmt_dealloc_dma(struct tlkm_device *inst, dma_addr_t const addr)
 {
-	return zynq_dmamgmt_dealloc(find_dma_addr(addr));
+	return zynq_dmamgmt_dealloc(inst, find_dma_addr(addr));
 }
 
 inline struct dma_buf_t *zynq_dmamgmt_get(handle_t const id)
diff --git a/runtime/kernel/zynq/zynq_dmamgmt.h b/runtime/kernel/zynq/zynq_dmamgmt.h
index fd3aba93..d70db2fd 100644
--- a/runtime/kernel/zynq/zynq_dmamgmt.h
+++ b/runtime/kernel/zynq/zynq_dmamgmt.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	zynq_dmamgmt.h
 //! @brief	Tapasco Platform Zynq: DMA buffer management.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.esa.tu-darmstadt.de)
@@ -24,6 +25,8 @@
 #define ZYNQ_DMAMGMT_H__
 
 #include "tlkm_types.h"
+#include "tlkm_device.h"
+#include "tlkm_control.h"
 
 #define ZYNQ_DMAMGMT_POOLSZ 1024U
 
@@ -37,10 +40,10 @@ struct dma_buf_t {
 };
 
 int zynq_dmamgmt_init(void);
-void zynq_dmamgmt_exit(void);
-dma_addr_t zynq_dmamgmt_alloc(size_t const len, handle_t *hid);
-int zynq_dmamgmt_dealloc(handle_t const id);
-int zynq_dmamgmt_dealloc_dma(dma_addr_t const addr);
+void zynq_dmamgmt_exit(struct tlkm_device *inst);
+dma_addr_t zynq_dmamgmt_alloc(struct tlkm_device *inst, size_t const len, handle_t *hid);
+int zynq_dmamgmt_dealloc(struct tlkm_device *inst, handle_t const id);
+int zynq_dmamgmt_dealloc_dma(struct tlkm_device *inst, dma_addr_t const addr);
 struct dma_buf_t *zynq_dmamgmt_get(handle_t const id);
 ssize_t zynq_dmamgmt_get_id(dma_addr_t const addr);
 
diff --git a/runtime/kernel/zynq/zynq_ioctl.c b/runtime/kernel/zynq/zynq_ioctl.c
index ec994468..f499a384 100644
--- a/runtime/kernel/zynq/zynq_ioctl.c
+++ b/runtime/kernel/zynq/zynq_ioctl.c
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	zynq_ioctl.c
- *  @brief	Zynq-specific implementation of ioctl interface.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <linux/uaccess.h>
 #include <linux/io.h>
 #include <linux/slab.h>
@@ -62,7 +58,7 @@ static inline long zynq_ioctl_alloc(struct tlkm_device *inst,
 		return -EINVAL;
 	}
 
-	dma_addr = zynq_dmamgmt_alloc(cmd->sz, NULL);
+	dma_addr = zynq_dmamgmt_alloc(inst, cmd->sz, NULL);
 	if (!dma_addr) {
 		DEVWRN(inst->dev_id, "allocation failed: len = %zu", cmd->sz);
 		return -ENOMEM;
@@ -80,7 +76,7 @@ static inline long zynq_ioctl_free(struct tlkm_device *inst,
 	DEVLOG(inst->dev_id, TLKM_LF_IOCTL, "free: len = %zu, dma = %pad",
 	       cmd->sz, &cmd->dev_addr);
 	if (cmd->dev_addr >= 0) {
-		zynq_dmamgmt_dealloc_dma(cmd->dev_addr);
+		zynq_dmamgmt_dealloc_dma(inst, cmd->dev_addr);
 		cmd->dev_addr = -1;
 		tlkm_perfc_total_freed_mem_add(inst->dev_id, cmd->sz);
 	}
diff --git a/runtime/kernel/zynq/zynq_ioctl.h b/runtime/kernel/zynq/zynq_ioctl.h
index 0df67ff6..e512a9b8 100644
--- a/runtime/kernel/zynq/zynq_ioctl.h
+++ b/runtime/kernel/zynq/zynq_ioctl.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef ZYNQ_IOCTL_H__
 #define ZYNQ_IOCTL_H__
 
diff --git a/runtime/kernel/zynq/zynq_irq.c b/runtime/kernel/zynq/zynq_irq.c
index 9f61859d..20335fa4 100644
--- a/runtime/kernel/zynq/zynq_irq.c
+++ b/runtime/kernel/zynq/zynq_irq.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //
 // Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
 //
@@ -21,11 +40,12 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/sched.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 #include "tlkm_logging.h"
 #include "tlkm_slots.h"
 #include "zynq_irq.h"
 
-#define ZYNQ_IRQ_BASE_IRQ 45
 #define ZYNQ_MAX_NUM_INTCS 4
 
 #define INTERRUPT_CONTROLLERS                                                  \
@@ -51,6 +71,7 @@ typedef struct {
 
 static struct {
 	struct tlkm_control *ctrl;
+	int requested_irq_num;
 #define _INTC(N) intc_t intc_##N;
 	INTERRUPT_CONTROLLERS
 #undef _INTC
@@ -113,13 +134,14 @@ static void zynq_init_intc(struct zynq_device *zynq_dev, u32 const base)
 
 int zynq_irq_init(struct zynq_device *zynq_dev)
 {
-	int retval = 0, irqn = 0, rirq = 0;
+	int retval = 0, rirq = 0;
 	u32 base;
+	zynq_irq.requested_irq_num = 0;
 
 	init_work_structs();
-
 #define _INTC(N)                                                               \
-	rirq = ZYNQ_IRQ_BASE_IRQ + zynq_dev->parent->cls->npirqs + irqn;       \
+	rirq = irq_of_parse_and_map(of_find_node_by_name(NULL, "tapasco"),     \
+				    zynq_irq.requested_irq_num);               \
 	base = tlkm_status_get_component_base(zynq_dev->parent,                \
 					      "PLATFORM_COMPONENT_INTC" #N);   \
 	LOG(TLKM_LF_IRQ, "INTC%d base is %d", N, base);                        \
@@ -133,7 +155,7 @@ int zynq_irq_init(struct zynq_device *zynq_dev)
 		retval = request_irq(rirq, zynq_irq_handler_##N,               \
 				     IRQF_EARLY_RESUME,                        \
 				     "tapasco_zynq_" STR(N), zynq_dev);        \
-		++irqn;                                                        \
+		++zynq_irq.requested_irq_num;                                  \
 		if (retval) {                                                  \
 			ERR("could not register IRQ #%d!", rirq);              \
 			goto err;                                              \
@@ -146,7 +168,7 @@ int zynq_irq_init(struct zynq_device *zynq_dev)
 	return retval;
 
 err:
-	while (--irqn >= 0) {
+	while (--zynq_irq.requested_irq_num >= 0) {
 		disable_irq(rirq);
 		free_irq(rirq, zynq_dev);
 	}
@@ -155,10 +177,12 @@ int zynq_irq_init(struct zynq_device *zynq_dev)
 
 void zynq_irq_exit(struct zynq_device *zynq_dev)
 {
-	int irqn = ZYNQ_MAX_NUM_INTCS, rirq = 0;
-	while (irqn) {
-		--irqn;
-		rirq = ZYNQ_IRQ_BASE_IRQ + zynq_dev->parent->cls->npirqs + irqn;
+	int rirq = 0;
+	while (zynq_irq.requested_irq_num) {
+		--zynq_irq.requested_irq_num;
+		rirq = irq_of_parse_and_map(of_find_node_by_name(NULL,
+								 "tapasco"),
+					    zynq_irq.requested_irq_num);
 		LOG(TLKM_LF_IRQ, "releasing IRQ #%d", rirq);
 		disable_irq(rirq);
 		free_irq(rirq, zynq_dev);
@@ -169,6 +193,8 @@ int zynq_irq_request_platform_irq(struct tlkm_device *dev, int irq_no,
 				  irq_handler_t h, void *data)
 {
 	int err = 0;
+	int rirq = irq_of_parse_and_map(of_find_node_by_name(NULL, "tapasco"),
+					irq_no);
 	if (irq_no >= dev->cls->npirqs) {
 		DEVERR(dev->dev_id,
 		       "invalid platform interrupt number: %d (must be < %zd",
@@ -176,10 +202,10 @@ int zynq_irq_request_platform_irq(struct tlkm_device *dev, int irq_no,
 		return -ENXIO;
 	}
 	DEVLOG(dev->dev_id, TLKM_LF_IRQ, "requesting platform irq #%d", irq_no);
-	if ((err = request_irq(ZYNQ_IRQ_BASE_IRQ + irq_no, h, IRQF_EARLY_RESUME,
+	if ((err = request_irq(rirq, h, IRQF_EARLY_RESUME,
 			       "tapasco_zynq_platform", data))) {
-		DEVERR(dev->dev_id, "could not request interrupt #%d: %d",
-		       ZYNQ_IRQ_BASE_IRQ + irq_no, err);
+		DEVERR(dev->dev_id, "could not request interrupt #%d: %d", rirq,
+		       err);
 		return err;
 	}
 	DEVLOG(dev->dev_id, TLKM_LF_IRQ, "registered platform irq #%d", irq_no);
@@ -188,6 +214,8 @@ int zynq_irq_request_platform_irq(struct tlkm_device *dev, int irq_no,
 
 void zynq_irq_release_platform_irq(struct tlkm_device *dev, int irq_no)
 {
+	int rirq = irq_of_parse_and_map(of_find_node_by_name(NULL, "tapasco"),
+					irq_no);
 	struct zynq_device *zdev = (struct zynq_device *)dev->private_data;
 	if (irq_no >= dev->cls->npirqs) {
 		DEVERR(dev->dev_id,
@@ -196,7 +224,6 @@ void zynq_irq_release_platform_irq(struct tlkm_device *dev, int irq_no)
 		return;
 	}
 	DEVLOG(dev->dev_id, TLKM_LF_IRQ,
-	       "freeing platform interrupt #%d with mapping %d", irq_no,
-	       ZYNQ_IRQ_BASE_IRQ + irq_no);
-	free_irq(ZYNQ_IRQ_BASE_IRQ + irq_no, zdev);
+	       "freeing platform interrupt #%d with mapping %d", irq_no, rirq);
+	free_irq(rirq, zdev);
 }
diff --git a/runtime/kernel/zynq/zynq_irq.h b/runtime/kernel/zynq/zynq_irq.h
index 9b62048d..62c4f0bf 100644
--- a/runtime/kernel/zynq/zynq_irq.h
+++ b/runtime/kernel/zynq/zynq_irq.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	zynq_irq.c
 //! @brief	IRQ handlers.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/kernel/zynq/zynqmp.h b/runtime/kernel/zynq/zynqmp.h
new file mode 100644
index 00000000..694a9a54
--- /dev/null
+++ b/runtime/kernel/zynq/zynqmp.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo 
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef ZYNQMP_H__
+#define ZYNQMP_H__
+
+#include "tlkm_platform.h"
+
+#define ZYNQMP_NAME "xlnx,zynqmp"
+#define ZYNQMP_CLASS_NAME "zynqmp"
+
+#define ZYNQMP_DEF INIT_PLATFORM(0xB0000000, 0x0002000 /* status */)
+
+static const struct platform zynqmp_def = ZYNQMP_DEF;
+
+#ifdef __KERNEL__
+#include "tlkm_class.h"
+#include "zynq_device.h"
+#include "zynq_ioctl.h"
+#include "zynq_irq.h"
+
+static inline void zynqmp_remove(struct tlkm_class *cls)
+{
+}
+
+static const struct tlkm_class zynqmp_cls = {
+	.name = ZYNQMP_CLASS_NAME,
+	.create = zynq_device_init,
+	.destroy = zynq_device_exit,
+	.init_subsystems = zynq_device_init_subsystems,
+	.exit_subsystems = zynq_device_exit_subsystems,
+	.probe = zynqmp_device_probe,
+	.remove = zynq_remove,
+	.ioctl = zynq_ioctl,
+	.pirq = zynq_irq_request_platform_irq,
+	.rirq = zynq_irq_release_platform_irq,
+	.npirqs = 16,
+	.platform = ZYNQMP_DEF,
+	.private_data = NULL,
+};
+#endif /* __KERNEL__ */
+
+#endif /* ZYNQMP_H__ */
diff --git a/runtime/platform/CMakeLists.txt b/runtime/platform/CMakeLists.txt
index 5c950edd..ea06b766 100644
--- a/runtime/platform/CMakeLists.txt
+++ b/runtime/platform/CMakeLists.txt
@@ -1,5 +1,23 @@
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cmake_minimum_required(VERSION 3.5.1 FATAL_ERROR)
 include($ENV{TAPASCO_HOME_RUNTIME}/cmake/Tapasco.cmake NO_POLICY_SCOPE)
+
 project(platform VERSION 1.0 LANGUAGES C)
 
 add_library(platform "common/src/platform_addr_map.c"
@@ -21,6 +39,10 @@ add_library(platform "common/src/platform_addr_map.c"
 
 target_compile_definitions(platform PRIVATE -DNPERFC)
 target_compile_definitions(platform PRIVATE -DLOG_USE_COLOR)
+if(CMAKE_BUILD_TYPE MATCHES "Release" AND (CMAKE_SYSTEM_PROCESSOR MATCHES "arm" OR CMAKE_SYSTEM_PROCESSOR MATCHES "aarch64"))
+  message("Reducing optimization for nanopb on zynq plattform.")
+  target_compile_options(platform PRIVATE -O2)
+endif()
 
 set_tapasco_defaults(platform)
 
diff --git a/runtime/platform/common/include/gen_fixed_size_pool.h b/runtime/platform/common/include/gen_fixed_size_pool.h
index 6499cb8c..960ce373 100644
--- a/runtime/platform/common/include/gen_fixed_size_pool.h
+++ b/runtime/platform/common/include/gen_fixed_size_pool.h
@@ -1,40 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
 /*
-This file is part of gen_fixed_size_pool.
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 
-(C) Copyright 2015 Jens Korinth
-
-gen_fixed_size_pool is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-gen_fixed_size_pool is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with gen_fixed_size_pool.  If not, see <http://www.gnu.org/licenses/>.
 */
-
 //! @file	gen_fixed_size_pool.h
 //! @brief	Generic, header-only, lock-free implementation of a fixed size
 //!		pool of things based on statically allocated array.
diff --git a/runtime/platform/common/include/platform_addr_map.h b/runtime/platform/common/include/platform_addr_map.h
index 9677d079..e409a5cc 100644
--- a/runtime/platform/common/include/platform_addr_map.h
+++ b/runtime/platform/common/include/platform_addr_map.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_addr_map.h
 //! @brief	Supporting code for dynamic addr map.
 //! @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/platform/common/include/platform_ctx.h b/runtime/platform/common/include/platform_ctx.h
index b2f82189..01d0d7b9 100644
--- a/runtime/platform/common/include/platform_ctx.h
+++ b/runtime/platform/common/include/platform_ctx.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_CTX_H__
 #define PLATFORM_CTX_H__
 
diff --git a/runtime/platform/common/include/platform_devfiles.h b/runtime/platform/common/include/platform_devfiles.h
index e006e6ca..3a67de72 100644
--- a/runtime/platform/common/include/platform_devfiles.h
+++ b/runtime/platform/common/include/platform_devfiles.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_DEVFILES_H__
 #define PLATFORM_DEVFILES_H__
 
diff --git a/runtime/platform/common/include/platform_logging.h b/runtime/platform/common/include/platform_logging.h
index 075b9405..41a3d905 100644
--- a/runtime/platform/common/include/platform_logging.h
+++ b/runtime/platform/common/include/platform_logging.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_logging.h
 //! @brief	libplatform logging functions.
 //!		Internal logging functions to produce debug output; levels are
diff --git a/runtime/platform/common/include/platform_perfc.h b/runtime/platform/common/include/platform_perfc.h
index f2ad9874..3804f27a 100644
--- a/runtime/platform/common/include/platform_perfc.h
+++ b/runtime/platform/common/include/platform_perfc.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_perfc.h
 //! @brief	Performance counters interface for libplatform.
 //!             Defines interface to diverse performance counters for the
diff --git a/runtime/platform/common/include/platform_signaling.h b/runtime/platform/common/include/platform_signaling.h
index 30d6e6c8..2bc7463c 100644
--- a/runtime/platform/common/include/platform_signaling.h
+++ b/runtime/platform/common/include/platform_signaling.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_ASYNC_H__
 #define PLATFORM_ASYNC_H__
 
diff --git a/runtime/platform/common/src/platform_addr_map.c b/runtime/platform/common/src/platform_addr_map.c
index de7476f1..515122ee 100644
--- a/runtime/platform/common/src/platform_addr_map.c
+++ b/runtime/platform/common/src/platform_addr_map.c
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	platform_addr_map.c
- *  @brief	Supporting code for dynamic addr map.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <platform.h>
 #include <platform_addr_map.h>
diff --git a/runtime/platform/common/src/platform_components.c b/runtime/platform/common/src/platform_components.c
index f322ea59..3208e502 100644
--- a/runtime/platform/common/src/platform_components.c
+++ b/runtime/platform/common/src/platform_components.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 const char *platform_component_t_str[] = {
     /** TaPaSCo Status Core: bitstream information. **/
     "PLATFORM_COMPONENT_STATUS",
diff --git a/runtime/platform/common/src/platform_ctx.c b/runtime/platform/common/src/platform_ctx.c
index 02a6eb92..fa63f190 100644
--- a/runtime/platform/common/src/platform_ctx.c
+++ b/runtime/platform/common/src/platform_ctx.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <errno.h>
 #include <fcntl.h>
diff --git a/runtime/platform/common/src/platform_devctx.c b/runtime/platform/common/src/platform_devctx.c
index df798484..1a6b3dc1 100644
--- a/runtime/platform/common/src/platform_devctx.c
+++ b/runtime/platform/common/src/platform_devctx.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <errno.h>
 #include <fcntl.h>
@@ -20,12 +39,16 @@
 #define PCIE_MEM_SZ (1ULL << 32)
 
 #define ZYNQ_CLS_NAME "zynq"
+#define ZYNQMP_CLS_NAME "zynqmp"
 
 static platform_res_t platform_specific_init(platform_devctx_t *devctx) {
   if (!strncmp(PCIE_CLS_NAME, devctx->dev_info.name, TLKM_DEVNAME_SZ)) {
     return default_init(devctx, (platform_mem_addr_t)PCIE_MEM_SZ);
   } else if (!strncmp(ZYNQ_CLS_NAME, devctx->dev_info.name, TLKM_DEVNAME_SZ)) {
     return default_init(devctx, 0);
+  } else if (!strncmp(ZYNQMP_CLS_NAME, devctx->dev_info.name,
+                      TLKM_DEVNAME_SZ)) {
+    return default_init(devctx, 0);
   } else {
     DEVERR(devctx->dev_id, "unknown device type: '%s'", devctx->dev_info.name);
     return PERR_UNKNOWN_DEVICE;
diff --git a/runtime/platform/common/src/platform_device_operations.c b/runtime/platform/common/src/platform_device_operations.c
index 982bb421..a2d264f1 100644
--- a/runtime/platform/common/src/platform_device_operations.c
+++ b/runtime/platform/common/src/platform_device_operations.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <errno.h>
 #include <gen_mem.h>
 #include <platform_devctx.h>
@@ -362,7 +381,8 @@ platform_res_t request_device_size(platform_devctx_t const *devctx) {
   return PLATFORM_SUCCESS;
 }
 
-platform_res_t default_init(platform_devctx_t *devctx, platform_mem_addr_t offboard_memory) {
+platform_res_t default_init(platform_devctx_t *devctx,
+                            platform_mem_addr_t offboard_memory) {
   default_platform_t *pp =
       (default_platform_t *)malloc(sizeof(default_platform_t));
   if (!pp)
diff --git a/runtime/platform/common/src/platform_errors.c b/runtime/platform/common/src/platform_errors.c
index 35ce5583..a1a4127c 100644
--- a/runtime/platform/common/src/platform_errors.c
+++ b/runtime/platform/common/src/platform_errors.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_errors.c
 //! @brief	Error messages and codes.
 //! @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/platform/common/src/platform_info.c b/runtime/platform/common/src/platform_info.c
index 061fdf68..682a6030 100644
--- a/runtime/platform/common/src/platform_info.c
+++ b/runtime/platform/common/src/platform_info.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //
 // Copyright (C) 2018 Jens Korinth, TU Darmstadt
 //
diff --git a/runtime/platform/common/src/platform_logging.c b/runtime/platform/common/src/platform_logging.c
index ed269bdb..ed88328a 100644
--- a/runtime/platform/common/src/platform_logging.c
+++ b/runtime/platform/common/src/platform_logging.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_logging.c
 //! @brief	Logging helper implementation. Initialization for debug output.
 //! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/platform/common/src/platform_perfc.c b/runtime/platform/common/src/platform_perfc.c
index b36547be..8ab6a833 100644
--- a/runtime/platform/common/src/platform_perfc.c
+++ b/runtime/platform/common/src/platform_perfc.c
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_perfc.c
 //! @brief	Performance counters interface for libplatform.
 //!             Defines interface to diverse performance counters for the
diff --git a/runtime/platform/common/src/platform_signaling.c b/runtime/platform/common/src/platform_signaling.c
index d1ae4b18..53460a4f 100644
--- a/runtime/platform/common/src/platform_signaling.c
+++ b/runtime/platform/common/src/platform_signaling.c
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <assert.h>
 #include <errno.h>
 #include <fcntl.h>
diff --git a/runtime/platform/common/src/platform_version.c b/runtime/platform/common/src/platform_version.c
index e59b1939..843c64bf 100644
--- a/runtime/platform/common/src/platform_version.c
+++ b/runtime/platform/common/src/platform_version.c
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	platform_version.c
- *  @brief	Common implementations of the PAPI version info functions.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #include <platform.h>
 #include <platform_errors.h>
 #include <string.h>
diff --git a/runtime/platform/f1/module/bit_reload.sh b/runtime/platform/f1/module/bit_reload.sh
new file mode 100755
index 00000000..4f471a43
--- /dev/null
+++ b/runtime/platform/f1/module/bit_reload.sh
@@ -0,0 +1,100 @@
+#!/bin/bash
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# init paths
+DRIVER=tlkm
+DRIVERPATH="$TAPASCO_HOME_RUNTIME/kernel"
+
+show_usage() {
+	cat << EOF
+Usage: ${0##*/} [-v|--verbose] [--d|--drv-reload] AGFI-ID
+Program FPGA on an F1 cloud instance.
+
+	-v	enable verbose output
+	-d	reload device driver
+	-p	program the device
+EOF
+}
+
+# init vars
+BITSTREAM=""
+VERBOSE=0
+RELOADD=0
+PROGRAM=0
+
+OPTIND=1
+while getopts vdhp opt; do
+	case $opt in
+		v)
+			VERBOSE=1
+			;;
+		d)
+			RELOADD=1
+			;;
+		p)
+			PROGRAM=1
+			;;
+		h)
+			;;
+		*)
+			echo "unknown option: $opt"
+			show_usage
+			exit 1
+			;;
+	esac
+done
+shift "$((OPTIND-1))"
+
+BITSTREAM="$1"
+if [ -n $BITSTREAM ] && [[ $BITSTREAM == agfi* ]]
+then
+	echo "AGFI = $BITSTREAM"
+
+	if ! type -P "fpga-load-local-image" ; then
+		echo "Command 'fpga-load-local-image' not found."
+		echo "Please download the AWS F1 HDK and run 'source sdk_setup.sh'."
+		exit 1
+	fi
+
+	# unload driver, if reload_driver was set
+	if [ $RELOADD -gt 0 ]; then
+		sudo rmmod $DRIVER
+	fi
+
+	# program the device
+	if [ $PROGRAM -gt 0 ]; then
+		sudo fpga-load-local-image -S 0 -I "$BITSTREAM" -H
+	fi
+
+	# reload driver?
+	if [ $RELOADD -gt 0 ]; then
+		sudo insmod $DRIVERPATH/${DRIVER}.ko
+		sudo chown $USER /dev/tlkm*
+	fi
+
+	# output tail of dmesg in verbose mode
+	if [ $VERBOSE -gt 0 ]; then
+		dmesg | tail -7
+	fi
+else
+	show_usage
+	exit 1
+fi
diff --git a/runtime/platform/include/platform.h b/runtime/platform/include/platform.h
index 1a651aa7..369f7b21 100644
--- a/runtime/platform/include/platform.h
+++ b/runtime/platform/include/platform.h
@@ -1,32 +1,22 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/** @file 	platform.h
- *  @brief 	API for low-level FPGA integration. Provides basic methods to
- *  		interact with two different address spaces on the device: The
- *  		memory address space refers to device-local memories, the
- *  		register address space refers to the AXI (or similar) address
- *  		space in which IP core registers reside. Furthermore there are
- *  		methods to wait for a signal from the device (usually
- *  		interrupt-based).
- *  @authors 	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- *  @version 	1.6
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_API_H__
 #define PLATFORM_API_H__
 
diff --git a/runtime/platform/include/platform_caps.h b/runtime/platform/include/platform_caps.h
index 3077cede..c9ac8de4 100644
--- a/runtime/platform/include/platform_caps.h
+++ b/runtime/platform/include/platform_caps.h
@@ -1,25 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (PLATFORM).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	platform_status.h
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_CAPS_H__
 #define PLATFORM_CAPS_H__
 
@@ -34,6 +31,7 @@ typedef enum {
   PLATFORM_CAP0_ATSCHECK = (1 << 1),
   PLATFORM_CAP0_PE_LOCAL_MEM = (1 << 2),
   PLATFORM_CAP0_DYNAMIC_ADDRESS_MAP = (1 << 3),
+  PLATFORM_CAP0_AWS_EC2_PLATFORM = (1 << 6),
 } platform_capabilities_0_t;
 
 #define PLATFORM_VERSION_MAJOR(v) ((v) >> 16)
diff --git a/runtime/platform/include/platform_components.h b/runtime/platform/include/platform_components.h
index 14fc2aa4..8a4db8e0 100644
--- a/runtime/platform/include/platform_components.h
+++ b/runtime/platform/include/platform_components.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_COMPONENTS_H__
 #define PLATFORM_COMPONENTS_H__
 
@@ -36,6 +55,12 @@ typedef enum {
   PLATFORM_COMPONENT_DMA2,
   /** DMA engine #3. **/
   PLATFORM_COMPONENT_DMA3,
+  /** AXI GPIO controller for memory status (on EC2) **/
+  PLATFORM_COMPONENT_MEM_GPIO,
+  /** Dummy component indicating the AWS EC2 platform **/
+  PLATFORM_COMPONENT_AWS_EC2,
+  /** ECC Configuration + Status. **/
+  PLATFORM_COMPONENT_ECC,
 } platform_component_t;
 
 #endif /* PLATFORM_COMPONENTS_H__ */
diff --git a/runtime/platform/include/platform_devctx.h b/runtime/platform/include/platform_devctx.h
index dcf1940f..a9a3d1d0 100644
--- a/runtime/platform/include/platform_devctx.h
+++ b/runtime/platform/include/platform_devctx.h
@@ -1,26 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file   platform_devctx.h
- *  @brief  Device context management.
- *  @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_DEVCTX_H__
 #define PLATFORM_DEVCTX_H__
 
diff --git a/runtime/platform/include/platform_device_operations.h b/runtime/platform/include/platform_device_operations.h
index 1acfbc56..1cdb590b 100644
--- a/runtime/platform/include/platform_device_operations.h
+++ b/runtime/platform/include/platform_device_operations.h
@@ -1,3 +1,22 @@
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_DEVICE_OPERATIONS_H__
 #define PLATFORM_DEVICE_OPERATIONS_H__
 
@@ -28,7 +47,8 @@ typedef struct platform_device_operations {
                               platform_ctl_addr_t const addr,
                               size_t const length, void const *data,
                               platform_ctl_flags_t const flags);
-  platform_res_t (*init)(platform_devctx_t *devctx, platform_mem_addr_t offboard_memory);
+  platform_res_t (*init)(platform_devctx_t *devctx,
+                         platform_mem_addr_t offboard_memory);
   platform_res_t (*deinit)(platform_devctx_t const *devctx);
 } platform_device_operations_t;
 
@@ -76,7 +96,8 @@ platform_res_t default_write_ctl(platform_devctx_t const *devctx,
                                  size_t const length, void const *data,
                                  platform_ctl_flags_t const flags);
 
-platform_res_t default_init(platform_devctx_t *devctx, platform_mem_addr_t offboard_memory);
+platform_res_t default_init(platform_devctx_t *devctx,
+                            platform_mem_addr_t offboard_memory);
 platform_res_t default_deinit(platform_devctx_t const *devctx);
 
 static inline void default_dops(platform_device_operations_t *dops) {
diff --git a/runtime/platform/include/platform_errors.h b/runtime/platform/include/platform_errors.h
index 0a0ec7a0..7f670075 100644
--- a/runtime/platform/include/platform_errors.h
+++ b/runtime/platform/include/platform_errors.h
@@ -1,21 +1,22 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 //! @file	platform_errors.h
 //! @brief	Error messages and codes.
 //! @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de)
diff --git a/runtime/platform/include/platform_global.h b/runtime/platform/include/platform_global.h
index 840fe453..bdfca985 100644
--- a/runtime/platform/include/platform_global.h
+++ b/runtime/platform/include/platform_global.h
@@ -1,27 +1,22 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/** @file 	platform_globals.h
- *  @brief 	Global defines for libplatform.
- *  @authors 	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- *  @version 	1.0
- *  @copyright	Copyright 2014-2018 J. Korinth
- **/
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
 #ifndef PLATFORM_API_GLOBAL_H__
 #define PLATFORM_API_GLOBAL_H__
 
diff --git a/runtime/platform/include/platform_info.h b/runtime/platform/include/platform_info.h
index d94f66d1..77745ba4 100644
--- a/runtime/platform/include/platform_info.h
+++ b/runtime/platform/include/platform_info.h
@@ -1,21 +1,23 @@
-//
-// Copyright (C) 2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (PLATFORM).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #ifndef PLATFORM_INFO_H__
 #define PLATFORM_INFO_H__
 
@@ -61,4 +63,4 @@ inline size_t platform_info_pe_count(platform_info_t const *info,
 void log_device_info(platform_dev_id_t const dev_id,
                      platform_info_t const *info);
 
-#endif /* PLATFORM_INFO_H__ */
+#endif /* PLATFORM_INFO_H__ */
\ No newline at end of file
diff --git a/runtime/platform/include/platform_types.h b/runtime/platform/include/platform_types.h
index bb8f01e6..bb036890 100644
--- a/runtime/platform/include/platform_types.h
+++ b/runtime/platform/include/platform_types.h
@@ -1,21 +1,23 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TAPASCO).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
 #ifndef PLATFORM_TYPES_H__
 #define PLATFORM_TYPES_H__
 
diff --git a/runtime/platform/pcie/module/bit_reload.sh b/runtime/platform/pcie/module/bit_reload.sh
index 33ca85b4..f5d230bb 100755
--- a/runtime/platform/pcie/module/bit_reload.sh
+++ b/runtime/platform/pcie/module/bit_reload.sh
@@ -1,22 +1,23 @@
 #!/bin/bash
-#
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
-#
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
-# it under the terms of the GNU Lesser General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# Tapasco is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU Lesser General Public License for more details.
-#
-# You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
+##
+## Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+##
+## This file is part of TaPaSCo 
+## (see https://github.com/esa-tu-darmstadt/tapasco).
+##
+## This program is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this program. If not, see <http://www.gnu.org/licenses/>.
+##
 
 # Script can run without parameters, use verbose as second for output and
 # drv_load/drv_reload driver, when driver should be inserted
diff --git a/runtime/platform/pcie/module/program_pcie.tcl b/runtime/platform/pcie/module/program_pcie.tcl
index fa2ed179..3228f070 100644
--- a/runtime/platform/pcie/module/program_pcie.tcl
+++ b/runtime/platform/pcie/module/program_pcie.tcl
@@ -21,7 +21,7 @@
 
 #set default values
 set wait 1000
-set dev {xc7vx690t_0|xcvu9p_0|xcvu095_0|xcu250_0}
+set dev {xc7vx690t_0|xcvu9p_0|xcvu095_0|xcu250_0|xcvu37p_0}
 set probes_file {}
 set program_file {}
 set devid -1
diff --git a/runtime/platform/zynq/module/bit_reload.sh b/runtime/platform/zynq/module/bit_reload.sh
index 44217927..a2e12e43 100755
--- a/runtime/platform/zynq/module/bit_reload.sh
+++ b/runtime/platform/zynq/module/bit_reload.sh
@@ -1,27 +1,31 @@
 #!/bin/bash
-#
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
-#
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
-# it under the terms of the GNU Lesser General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# Tapasco is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU Lesser General Public License for more details.
-#
-# You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-# Script can run without parameters, use verbose as second for output and
-# drv_load/drv_reload driver, when driver should be inserted
-# Script usage e.g. ./bit_reload 'path_to_bitstream' drv_reload verbose
+##
+## Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+##
+## This file is part of TaPaSCo 
+## (see https://github.com/esa-tu-darmstadt/tapasco).
+##
+## This program is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this program. If not, see <http://www.gnu.org/licenses/>.
+##
+
+# Script can run without parameters, use verbose as second for output,
+# partial if you want to use a partial bitstream or reload if you want
+# to reload the driver.
+# Hotplug and program parameter are only for compatability with pcie bit_reload.sh and do nothing.
+# Script usage e.g. ./bit_reload 'path_to_bitstream' --verbose
 # Pathes '*_path' have to be adapted to specific location
+# Works for Zynq and ZynqMP
 
 # init paths
 DRIVER=tlkm
@@ -29,19 +33,25 @@ DRIVERPATH="$TAPASCO_HOME_RUNTIME/kernel"
 
 show_usage() {
 	cat << EOF
-Usage: ${0##*/} [-v|--verbose] [--d|--drv-reload] BITSTREAM
-Program Zynq PL via /dev/xdevcfg.
+Usage: ${0##*/} [-v|--verbose] [--d|drv_reload] [-pb|--partial] BITSTREAM.{bit,bin}
+Program Zynq PL via /sys/class/fpga_manager/.
 
 	-v	enable verbose output
 	-d	reload device driver
+	-pb	partial bitstream
 EOF
 }
 
+error_exit() {
+	echo ${1:-"unknown error"} >&2 && exit 1
+}
+
 # init vars
 BITSTREAM=""
 VERBOSE=0
 RELOADD=0
 HOTPLUG=0
+PARTIAL=0
 PROGRAM=0
 
 OPTIND=1
@@ -53,6 +63,9 @@ while getopts vdhp opt; do
 		d)
 			RELOADD=1
 			;;
+		pb)
+			PARTIAL=1
+			;;
 		h)
 			HOTPLUG=1
 			;;
@@ -66,32 +79,63 @@ while getopts vdhp opt; do
 			;;
 	esac
 done
-shift "$((OPTIND-1))"
+shift "$((OPTIND - 1))"
 
 BITSTREAM="$1"
-if [ -n $BITSTREAM ] && [[ $BITSTREAM == *.bit ]]
-then
-	echo "bitstream = $BITSTREAM"
+if [ -n $BITSTREAM ] && [[ $BITSTREAM == *.bit || $BITSTREAM == *.bin ]]; then
+	echo "Starting FPGA programming..."
+	echo "Bitstream = $BITSTREAM"
 
-	if [ $RELOADD -gt 0 ]; then
+	# check if pga_manager framework is installed and a fpga instance exists
+	if ! ls /sys/class/fpga_manager/fpga* 1> /dev/null 2>&1; then
+		error_exit "Could not find fpga_manager instance under /sys/class/fpga_manager/fpga*."
+	fi
+
+	#if reload: unload driver if already running
+	if [[ $RELOADD -gt 0 ]]; then
 		(lsmod | grep $DRIVER > /dev/null) && sudo rmmod $DRIVER 2> /dev/null
 	fi
 
+	# set flag for partial/full bitstream. 0 == full, 1 == partial
+	echo $PARTIAL | sudo tee /sys/class/fpga_manager/fpga0/flags > /dev/null
+
+	# copy bitstream to make it available to fpga_manager
+	sudo mkdir -p /lib/firmware
+	sudo cp $BITSTREAM /lib/firmware/
+
 	# program the device
-	cat $BITSTREAM > /dev/xdevcfg
-	XDEVCFG_RET=$?
+	basename $BITSTREAM | sudo tee /sys/class/fpga_manager/fpga0/firmware > /dev/null
+	FPGA_MANAGER_RET=$?
 
 	# check return code
-	if [ $XDEVCFG_RET -ne 0 ]; then
-		echo "programming failed, returned non-zero exit code $XDEVCFG_RET"
-		exit $XDEVCFG_RET
+	if [ $FPGA_MANAGER_RET -ne 0 ]; then
+		echo "programming failed, returned non-zero exit code $FPGA_MANAGER_RET"
+		exit $FPGA_MANAGER
 	fi
-	echo "bitstream programmed successfully!"
+	echo "Bitstream programmed successfully!"
 
-	if [ $RELOADD -gt 0 ]; then
-		# load driver
+	# load driver if not already running
+	if ! lsmod | grep $DRIVER > /dev/null; then
 		sudo insmod $DRIVERPATH/${DRIVER}.ko
+		INSMOD_RET=$?
+		sudo chown $USER /dev/tlkm*
+
+		# check return code
+		if [ $INSMOD_RET -ne 0 ]; then
+			echo "Loading driver failed, returned non-zero exit code $INSMOD_RET"
+		else
+			echo "Driver loaded sucessfully!"
+		fi
+	fi
+
+	# remove copied .bit
+	sudo rm /lib/firmware/$(basename $BITSTREAM)
+
+	# output tail of dmesg in verbose mode
+	if [ $VERBOSE -gt 0 ]; then
+		dmesg | tail -7
 	fi
+
 else
 	show_usage
 	exit 1
diff --git a/runtime/platform/zynqmp/module/bit_reload.sh b/runtime/platform/zynqmp/module/bit_reload.sh
deleted file mode 100755
index 3c3d9287..00000000
--- a/runtime/platform/zynqmp/module/bit_reload.sh
+++ /dev/null
@@ -1,73 +0,0 @@
-#!/bin/bash
-#
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
-#
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
-# it under the terms of the GNU Lesser General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# Tapasco is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU Lesser General Public License for more details.
-#
-# You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-show_usage() {
-	cat << EOF
-Usage: ${0##*/} [-v|--verbose] [--d|--drv-reload] BITSTREAM
-Program FPGA via /dev/xdevcfg.
-
-	-v	enable verbose output
-	-d	reload device driver
-EOF
-}
-
-# init vars
-BITSTREAM=""
-VERBOSE=0
-RELOADD=1
-
-OPTIND=1
-while getopts vd opt; do
-	case $opt in
-		v)
-			VERBOSE=1
-			;;
-		d)
-			RELOADD=1
-			;;
-		*)
-			echo "unknown option: $opt"
-			show_usage
-			exit 1
-			;;
-	esac
-done
-shift "$((OPTIND-1))"
-
-BITSTREAM="$1"
-if [ -n $BITSTREAM ] && [[ $BITSTREAM == *.bit ]] && [[ -e $BITSTREAM ]]
-then
-	pushd $TAPASCO_HOME_RUNTIME/platform/zynqmp/module &> /dev/null
-	if [[ `lsmod | grep tapasco | wc -l` -eq 1 ]]; then
-	sudo ./unload.sh
-	fi
-	popd &> /dev/null
-	echo "Loading bitstream $BITSTREAM ..."
-	sudo sh -c "cat $BITSTREAM > /dev/xdevcfg"
-	echo "Done!"
-	pushd $TAPASCO_HOME_RUNTIME/platform/zynqmp/module &> /dev/null
-	echo "Loading kernel module ..."
-	sudo ./load.sh
-	popd &> /dev/null
-	echo "Done."
-else
-	show_usage
-	exit 1
-fi
diff --git a/runtime/platform/zynqmp/module/load.sh b/runtime/platform/zynqmp/module/load.sh
deleted file mode 100755
index 724aca42..00000000
--- a/runtime/platform/zynqmp/module/load.sh
+++ /dev/null
@@ -1,27 +0,0 @@
-#!/bin/bash
-#
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
-#
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
-# it under the terms of the GNU Lesser General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# Tapasco is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU Lesser General Public License for more details.
-#
-# You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-# Helper script to load zynqmp TPC Platform device driver.
-# Must be run as superuser.
-
-# insmod tapasco-platform-zynqmp.ko logging_level=132
-insmod tapasco-platform-zynqmp.ko logging_level=0x7fffffff
-#insmod tapasco-platform-zynqmp.ko
-
diff --git a/runtime/platform/zynqmp/module/unload.sh b/runtime/platform/zynqmp/module/unload.sh
deleted file mode 100755
index 277961c2..00000000
--- a/runtime/platform/zynqmp/module/unload.sh
+++ /dev/null
@@ -1,24 +0,0 @@
-#!/bin/bash
-#
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
-#
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
-# it under the terms of the GNU Lesser General Public License as published by
-# the Free Software Foundation, either version 3 of the License, or
-# (at your option) any later version.
-#
-# Tapasco is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU Lesser General Public License for more details.
-#
-# You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-
-# Helper script to load zynqmp TPC Platform device driver.
-# Must be run as superuser.
-
-rmmod tapasco-platform-zynqmp.ko
diff --git a/toolflow/bin/afihelper b/toolflow/bin/afihelper
new file mode 100755
index 00000000..2f2b43e9
--- /dev/null
+++ b/toolflow/bin/afihelper
@@ -0,0 +1,155 @@
+#!/usr/bin/env python3
+
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+"""
+Helper script for creating AFIs
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+This script allows the user to upload a given .tar-file to an Amazon S3
+bucket and to create an AFI (Amazon FPGA Image) from that file.
+
+The AWS environment must be configured, for example by using the AWS CLI
+and running `aws configure`, where the required credentials can be entered.
+For more information see: https://aws.amazon.com/de/cli/
+"""
+
+import boto3
+
+import os
+import sys
+import uuid
+import shutil
+import logging
+import argparse
+import datetime
+import threading
+import subprocess
+
+# https://boto3.amazonaws.com/v1/documentation/api/latest/_modules/boto3/s3/transfer.html
+
+
+class ProgressPercentage(object):
+    def __init__(self, filename):
+        self._filename = filename
+        self._size = float(os.path.getsize(filename))
+        self._seen_so_far = 0
+        self._lock = threading.Lock()
+
+    def __call__(self, bytes_amount):
+        # To simplify we'll assume this is hooked up
+        # to a single filename.
+        with self._lock:
+            self._seen_so_far += bytes_amount
+            percentage = (self._seen_so_far / self._size) * 100
+            sys.stdout.write(
+                "\r%s  %s / %s  (%.2f%%)" % (
+                    self._filename, self._seen_so_far, self._size,
+                    percentage))
+            sys.stdout.flush()
+
+
+default_region = boto3.session.Session().region_name
+
+parser = argparse.ArgumentParser(description='Helper script for creating AFIs')
+parser.add_argument(
+    'bucket',
+    help='name of the target S3 bucket (created when not existing)')
+parser.add_argument('tarfile',
+                    help='filename of the tar file to create an AFI from')
+parser.add_argument('name', help='name of the AFI')
+parser.add_argument('--dry-run', default=False, action='store_true',
+                    help='dry run operation')
+parser.add_argument('--no-wait', default=False, action='store_true',
+                    help='do not wait for AFI generation to complete')
+parser.add_argument('--verbose', default=False, action='store_true',
+                    help='be more talkative')
+parser.add_argument('--description', default=False,
+                    help='description of the AFI')
+parser.add_argument(
+    '--region',
+    default=default_region,
+    help='region to use (currently configured: {})'.format(default_region))
+
+args = parser.parse_args()
+
+if args.verbose:
+    boto3.set_stream_logger('boto3.resources', logging.DEBUG)
+
+if not os.path.isfile(args.tarfile):
+    print('ERROR: File does not exist')
+    exit(1)
+
+s3 = boto3.resource('s3')
+
+try:
+    if args.region == 'us-east-1':
+        s3.create_bucket(Bucket=args.bucket)
+    else:
+        s3.create_bucket(
+            Bucket=args.bucket,
+            CreateBucketConfiguration={'LocationConstraint': args.region}
+        )
+except s3.meta.client.exceptions.BucketAlreadyOwnedByYou:
+    pass
+
+s3.Object(args.bucket, 'logs/').put()
+
+fname = os.path.basename(args.tarfile)
+transfer = boto3.s3.transfer.S3Transfer(s3.meta.client)
+transfer.upload_file(args.tarfile, args.bucket, fname,
+                     callback=ProgressPercentage(args.tarfile))
+print('\nUpload finished')
+
+ec2 = boto3.resource('ec2')
+
+token = uuid.uuid4().hex
+description = args.description or 'Created from {} at {}'.format(
+    fname, datetime.datetime.now().isoformat())
+
+response = ec2.meta.client.create_fpga_image(
+    DryRun=args.dry_run,
+    InputStorageLocation={
+        'Bucket': args.bucket,
+        'Key': fname
+    },
+    LogsStorageLocation={
+        'Bucket': args.bucket,
+        'Key': 'logs'
+    },
+    Description=description,
+    Name=args.name,
+    ClientToken=token
+)
+
+print('FpgaImageGlobalId = {}'.format(response['FpgaImageGlobalId']))
+print('FpgaImageId       = {}'.format(response['FpgaImageId']))
+
+if not args.no_wait:
+    if shutil.which('wait_for_afi.py') is None:
+        print(
+            'Cannot wait for AFI generation because `wait_for_afi.py` ' +
+            'is not in PATH.'
+        )
+    else:
+        subprocess.call(['wait_for_afi.py', '--afi', response['FpgaImageId']])
+
+# vim: set expandtab ts=4 sw=4:
diff --git a/toolflow/bin/afilist b/toolflow/bin/afilist
new file mode 100755
index 00000000..33532a0d
--- /dev/null
+++ b/toolflow/bin/afilist
@@ -0,0 +1,85 @@
+#!/usr/bin/env python3
+
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+"""
+Helper script for listing own AFIs
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Prints out a table with all (max. 100) AFIs that were
+generated using the currenlty logged in AWS account.
+"""
+
+import argparse
+from tabulate import tabulate
+import boto3
+
+ec2 = boto3.client('ec2')
+
+parser = argparse.ArgumentParser(
+    description='Helper script to list generated AFIs')
+parser.add_argument('--name', help='Filter AFIs by name.')
+args = parser.parse_args()
+
+filters = []
+if args.name is not None:
+    filters.extend([
+        {
+            'Name': 'name',
+            'Values': [
+                '*{}*'.format(args.name)
+            ]
+        },
+    ])
+
+response = ec2.describe_fpga_images(
+    DryRun=False,
+    Owners=[
+        'self',
+    ],
+    Filters=filters,
+    MaxResults=100
+)
+
+if not response.get('FpgaImages', False):
+    print('No AFIs found.')
+    exit()
+
+data = [[d['FpgaImageId'],
+         d['FpgaImageGlobalId'],
+         d['State']['Code'],
+         (d['Name'][:30] + '..') if len(d['Name']) > 30 else d['Name'],
+         d.get('ShellVersion', 'n/a'),
+         d['CreateTime'].strftime('%Y-%m-%d'),
+         d['Public']
+         ] for d in response['FpgaImages']]
+
+header = [
+    'FpgaImageId',
+    'FpgaImageGlobalId',
+    'State',
+    'Name',
+    'ShellVer',
+    'Created',
+    'Public']
+
+data.sort(key=lambda k: k[3])
+print(tabulate(data, header, tablefmt='github'))
diff --git a/toolflow/bin/vivado_progress b/toolflow/bin/vivado_progress
index 72f29402..1ddb49ea 100755
--- a/toolflow/bin/vivado_progress
+++ b/toolflow/bin/vivado_progress
@@ -1,24 +1,62 @@
 #!/usr/bin/python
+#
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
 
+import time
+from tqdm import tqdm
+import sys
+import re
+import argparse
 default_version = "v2017.4"
 
-stages = {"v2017.4": ["Calling pre-header plugins", "Subsystem tapasco complete.", "Event pre-wrapper finished.", "Starting RTL Elaboration",
-                      "Finished RTL Component Statistics ", "Starting Routing Task", "Phase 1", "Phase 2", "Phase 3", "Phase 4", "Phase 5", "Phase 6", "Phase 7", "Phase 8", "Phase 9", "Phase 10", "Routing Is Done.", "write_bitstream completed successfully"]}
+stages = {
+    "v2017.4": [
+        "Calling pre-header plugins",
+        "Subsystem tapasco complete.",
+        "Event pre-wrapper finished.",
+        "Starting RTL Elaboration",
+        "Finished RTL Component Statistics ",
+        "Starting Routing Task",
+        "Phase 1",
+        "Phase 2",
+        "Phase 3",
+        "Phase 4",
+        "Phase 5",
+        "Phase 6",
+        "Phase 7",
+        "Phase 8",
+        "Phase 9",
+        "Phase 10",
+        "Routing Is Done.",
+        "write_bitstream completed successfully"]}
 
-import argparse
 
-parser = argparse.ArgumentParser(description='Parse Vivado log and show progress information')
+parser = argparse.ArgumentParser(
+    description='Parse Vivado log and show progress information')
 parser.add_argument('log_file', type=str, help='A Vivado log file')
 args = parser.parse_args()
 
-import re
-import sys
-from tqdm import tqdm
-import time
 
 def fetch_vivado_version(filename):
     with open(filename, 'r') as f:
-        pattern = re.compile("# Vivado (v[0-9]+\.[0-9])")
+        pattern = re.compile(r"# Vivado (v[0-9]+\.[0-9])")
         for line in f:
             m = pattern.search(line)
             if m:
@@ -27,10 +65,14 @@ def fetch_vivado_version(filename):
             print("Failed to determine Vivado version in {}".format(filename))
             sys.exit(1)
 
+
 version = fetch_vivado_version(args.log_file)
 print("Found Vivado Version {}".format(version))
 if version not in stages:
-    print("Vivado version {} is unknown. Resetting to default version {}".format(version, default_version))
+    print(
+        "Vivado version {} is unknown. Resetting to default version {}".format(
+            version,
+            default_version))
     version = default_version
 
 current_line = 0
@@ -42,20 +84,20 @@ with tqdm(total=len(stage)) as pbar:
         searching = True
         pattern = re.compile(".*" + p + ".*")
         while searching:
+            line = f.readline()
+            while line == '':  # Poor mans iNotify...
+                pos = f.tell()
+                f.close()
+                time.sleep(0.1)
+                f = open(args.log_file, 'r')
+                f.seek(pos)
                 line = f.readline()
-                while line == '': # Poor mans iNotify...
-                    pos = f.tell()
-                    f.close()
-                    time.sleep(0.1)
-                    f = open(args.log_file, 'r')
-                    f.seek(pos)
-                    line = f.readline()
-                current_line += 1
-                pbar.set_description('Line {}'.format(current_line))
-                m = pattern.search(line)
-                if m:
-                    searching = False
-                    pbar.update(1)
-                    break
-
-f.close()
\ No newline at end of file
+            current_line += 1
+            pbar.set_description('Line {}'.format(current_line))
+            m = pattern.search(line)
+            if m:
+                searching = False
+                pbar.update(1)
+                break
+
+f.close()
diff --git a/toolflow/boot/configs/tapasco_zynq_defconfig b/toolflow/boot/configs/tapasco_zynq_defconfig
index 4a898d9e..efb9b6fd 100644
--- a/toolflow/boot/configs/tapasco_zynq_defconfig
+++ b/toolflow/boot/configs/tapasco_zynq_defconfig
@@ -1,6 +1,7 @@
 CONFIG_SYSVIPC=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -12,11 +13,6 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_EMBEDDED=y
 CONFIG_PERF_EVENTS=y
 CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-# CONFIG_BLK_DEV_BSG is not set
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_PL310_ERRATA_588369=y
@@ -28,19 +24,14 @@ CONFIG_ARM_ERRATA_764369=y
 CONFIG_ARM_ERRATA_775420=y
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
-CONFIG_PCI_REALLOC_ENABLE_AUTO=y
 CONFIG_PCIE_XILINX=y
 CONFIG_SMP=y
 CONFIG_SCHED_MC=y
 CONFIG_SCHED_SMT=y
-CONFIG_PREEMPT=y
-CONFIG_AEABI=y
 CONFIG_HIGHMEM=y
-CONFIG_CMA=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
 CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_STAT_DETAILS=y
 CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
@@ -50,7 +41,14 @@ CONFIG_CPU_IDLE=y
 CONFIG_ARM_ZYNQ_CPUIDLE=y
 CONFIG_VFP=y
 CONFIG_NEON=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_COMPACTION is not set
+CONFIG_CMA=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_UNIX=y
@@ -79,12 +77,13 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_M25P80=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_PL35X=y
+CONFIG_MTD_NAND_PL353=y
 CONFIG_MTD_SPI_NOR=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_CONFIGFS=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=16384
-CONFIG_SRAM=y
 CONFIG_XILINX_TRAFGEN=y
 CONFIG_EEPROM_AT24=y
 CONFIG_EEPROM_AT25=y
@@ -108,21 +107,17 @@ CONFIG_R8169=y
 # CONFIG_NET_VENDOR_WIZNET is not set
 CONFIG_XILINX_EMACLITE=y
 CONFIG_XILINX_AXI_EMAC=y
-CONFIG_XILINX_PS_EMAC=y
+CONFIG_MDIO_BITBANG=y
 CONFIG_MARVELL_PHY=y
 CONFIG_VITESSE_PHY=y
-CONFIG_REALTEK_PHY=y
-CONFIG_MDIO_BITBANG=y
 CONFIG_INPUT_SPARSEKMAP=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
 CONFIG_KEYBOARD_GPIO_POLLED=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_XILINX_PS_UART=y
 CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
-CONFIG_XILINX_DEVCFG=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MUX=y
 CONFIG_I2C_MUX_PCA954x=y
@@ -132,6 +127,7 @@ CONFIG_SPI_CADENCE=y
 CONFIG_SPI_XILINX=y
 CONFIG_SPI_ZYNQ_QSPI=y
 CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_XILINX=y
 CONFIG_GPIO_ZYNQ=y
 CONFIG_PMBUS=y
 CONFIG_SENSORS_UCD9000=y
@@ -157,8 +153,6 @@ CONFIG_VIDEO_XILINX_SWITCH=y
 CONFIG_VIDEO_XILINX_TPG=y
 # CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
 CONFIG_VIDEO_ADV7604=y
-# CONFIG_DVB_TUNER_DIB0070 is not set
-# CONFIG_DVB_TUNER_DIB0090 is not set
 CONFIG_DRM=y
 CONFIG_DRM_XILINX=y
 CONFIG_FRAMEBUFFER_CONSOLE=y
@@ -201,11 +195,9 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 CONFIG_LEDS_TRIGGER_TRANSIENT=y
 CONFIG_LEDS_TRIGGER_CAMERA=y
 CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
 CONFIG_EDAC_SYNOPSYS=y
 CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PCF8563=y
-CONFIG_DMADEVICES=y
 CONFIG_PL330_DMA=y
 CONFIG_XILINX_DMA_ENGINES=y
 CONFIG_XILINX_DMA=y
@@ -213,10 +205,19 @@ CONFIG_UIO=y
 CONFIG_UIO_PDRV_GENIRQ=y
 CONFIG_UIO_XILINX_APM=y
 CONFIG_COMMON_CLK_SI570=y
+CONFIG_REMOTEPROC=y
+CONFIG_ZYNQ_REMOTEPROC=m
 CONFIG_MEMORY=y
 CONFIG_IIO=y
 CONFIG_XILINX_XADC=y
-CONFIG_EXT2_FS=y
+CONFIG_RAS=y
+CONFIG_FPGA=y
+CONFIG_FPGA_MGR_ZYNQ_FPGA=y
+CONFIG_FPGA_MGR_ZYNQ_AFI_FPGA=y
+CONFIG_FPGA_BRIDGE=y
+CONFIG_XILINX_PR_DECOUPLER=y
+CONFIG_FPGA_REGION=y
+CONFIG_OF_FPGA_REGION=y
 CONFIG_EXT3_FS=y
 # CONFIG_DNOTIFY is not set
 CONFIG_MSDOS_FS=y
@@ -229,27 +230,13 @@ CONFIG_ROOT_NFS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=y
-# CONFIG_SCHED_DEBUG is not set
-CONFIG_TIMER_STATS=y
-# CONFIG_DEBUG_PREEMPT is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
 CONFIG_FONTS=y
 CONFIG_FONT_8x8=y
 CONFIG_FONT_8x16=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_DEBUG_PREEMPT is not set
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+# CONFIG_FTRACE is not set
 # TaPaSCO specific
-CONFIG_FORCE_MAX_ZONEORDER=14
 CONFIG_LOCALVERSION="-tapasco"
 CONFIG_DEFAULT_HOSTNAME="$BOARD"
-CONFIG_KALLSYMS=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_PROFILING=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_CMDLINE="console=ttyPS0,115200n8 root=/dev/mmcblk0p2 rw earlyprintk"
-CONFIG_CMA_SIZE_MBYTES=128
-CONFIG_CMA_SIZE_SEL_MBYTES=y
-CONFIG_CMA_ALIGNMENT=8
-CONFIG_CMA_AREAS=9
-CONFIG_COMPACTION=y
-CONFIG_PRINTK_TIME=y
-CONFIG_FTRACE=y
-CONFIG_FTRACE_SYSCALLS=y
diff --git a/toolflow/boot/configs/tapasco_zynqmp_defconfig b/toolflow/boot/configs/tapasco_zynqmp_defconfig
new file mode 100644
index 00000000..5c826d17
--- /dev/null
+++ b/toolflow/boot/configs/tapasco_zynqmp_defconfig
@@ -0,0 +1,400 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_AUDIT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_TASKSTATS=y
+CONFIG_TASK_DELAY_ACCT=y
+CONFIG_TASK_XACCT=y
+CONFIG_TASK_IO_ACCOUNTING=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CGROUPS=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EMBEDDED=y
+# CONFIG_COMPAT_BRK is not set
+CONFIG_SLAB=y
+CONFIG_PROFILING=y
+CONFIG_ARCH_ZYNQMP=y
+CONFIG_PCI=y
+CONFIG_PCIE_XILINX_NWL=y
+CONFIG_NR_CPUS=8
+# CONFIG_DMI is not set
+CONFIG_COMPAT=y
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
+CONFIG_CPUFREQ_DT=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_TRANSPARENT_HUGEPAGE=y
+CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y
+CONFIG_CMA=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_NET_KEY_MIGRATE=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_SYN_COOKIES=y
+CONFIG_NETWORK_SECMARK=y
+CONFIG_NETFILTER=y
+CONFIG_NETFILTER_NETLINK_LOG=y
+CONFIG_NF_CONNTRACK=m
+CONFIG_NF_CT_NETLINK=m
+CONFIG_NETFILTER_XT_MARK=y
+CONFIG_NETFILTER_XT_TARGET_CHECKSUM=y
+CONFIG_NETFILTER_XT_TARGET_LOG=y
+CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
+CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
+CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
+CONFIG_NETFILTER_XT_MATCH_LIMIT=y
+CONFIG_NETFILTER_XT_MATCH_MAC=y
+CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y
+CONFIG_NETFILTER_XT_MATCH_STATE=m
+CONFIG_NF_NAT_IPV4=m
+CONFIG_IP_NF_IPTABLES=y
+CONFIG_IP_NF_FILTER=y
+CONFIG_IP_NF_TARGET_REJECT=y
+CONFIG_IP_NF_MANGLE=y
+CONFIG_NF_NAT_IPV6=m
+CONFIG_IP6_NF_IPTABLES=y
+CONFIG_IP6_NF_FILTER=y
+CONFIG_IP6_NF_TARGET_REJECT=y
+CONFIG_IP6_NF_MANGLE=y
+CONFIG_BRIDGE_NF_EBTABLES=y
+CONFIG_BRIDGE_EBT_T_FILTER=y
+CONFIG_BRIDGE_EBT_T_NAT=y
+CONFIG_BRIDGE_EBT_MARK_T=y
+CONFIG_BRIDGE=y
+CONFIG_NET_PKTGEN=y
+CONFIG_CAN=y
+CONFIG_CAN_XILINXCAN=y
+CONFIG_BT=y
+CONFIG_BT_RFCOMM=y
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=y
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=y
+CONFIG_BT_LEDS=y
+CONFIG_BT_HCIBTUSB=y
+CONFIG_BT_HCIBTSDIO=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_ATH3K=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIUART_3WIRE=y
+CONFIG_BT_HCIUART_INTEL=y
+CONFIG_BT_HCIUART_QCA=y
+CONFIG_BT_HCIBCM203X=y
+CONFIG_BT_HCIBPA10X=y
+CONFIG_BT_HCIBFUSB=y
+CONFIG_BT_HCIVHCI=y
+CONFIG_BT_MRVL=y
+CONFIG_BT_MRVL_SDIO=y
+CONFIG_BT_ATH3K=y
+CONFIG_BT_WILINK=y
+CONFIG_CFG80211=y
+CONFIG_NL80211_TESTMODE=y
+CONFIG_CFG80211_CERTIFICATION_ONUS=y
+CONFIG_CFG80211_REG_CELLULAR_HINTS=y
+CONFIG_CFG80211_REG_RELAX_NO_IR=y
+CONFIG_CFG80211_WEXT=y
+CONFIG_MAC80211=y
+CONFIG_MAC80211_LEDS=y
+CONFIG_MAC80211_MESSAGE_TRACING=y
+CONFIG_MAC80211_DEBUG_MENU=y
+CONFIG_RFKILL=y
+CONFIG_RFKILL_INPUT=y
+CONFIG_RFKILL_GPIO=y
+CONFIG_NET_9P=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=256
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_TESTS=m
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_OOPS=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ARASAN=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_CONFIGFS=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_XILINX_SDFEC=y
+CONFIG_XILINX_JESD204B=y
+CONFIG_XILINX_JESD204B_PHY=y
+CONFIG_EEPROM_AT24=y
+CONFIG_EEPROM_AT25=y
+CONFIG_TI_ST=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_SATA_AHCI_PLATFORM=y
+CONFIG_AHCI_CEVA=y
+# CONFIG_ATA_SFF is not set
+CONFIG_NETDEVICES=y
+CONFIG_TUN=y
+CONFIG_MACB=y
+CONFIG_XILINX_EMACLITE=y
+CONFIG_XILINX_AXI_EMAC=y
+CONFIG_AMD_PHY=y
+CONFIG_AT803X_PHY=y
+CONFIG_BCM7XXX_PHY=y
+CONFIG_BCM87XX_PHY=y
+CONFIG_BROADCOM_PHY=y
+CONFIG_CICADA_PHY=y
+CONFIG_DAVICOM_PHY=y
+CONFIG_DP83867_PHY=y
+CONFIG_ICPLUS_PHY=y
+CONFIG_LSI_ET1011C_PHY=y
+CONFIG_LXT_PHY=y
+CONFIG_MARVELL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_NATIONAL_PHY=y
+CONFIG_QSEMI_PHY=y
+CONFIG_REALTEK_PHY=y
+CONFIG_SMSC_PHY=y
+CONFIG_STE10XP=y
+CONFIG_VITESSE_PHY=y
+CONFIG_XILINX_GMII2RGMII=y
+CONFIG_USB_RTL8152=y
+CONFIG_USB_USBNET=y
+CONFIG_WL18XX=y
+CONFIG_WLCORE_SPI=y
+CONFIG_WLCORE_SDIO=y
+CONFIG_INPUT_EVDEV=y
+CONFIG_KEYBOARD_GPIO=y
+CONFIG_KEYBOARD_GPIO_POLLED=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_MAX310X=y
+CONFIG_SERIAL_UARTLITE=y
+CONFIG_SERIAL_UARTLITE_CONSOLE=y
+CONFIG_SERIAL_XILINX_PS_UART=y
+CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
+CONFIG_SERIAL_DEV_BUS=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_MUX_PCA9541=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_I2C_CADENCE=y
+CONFIG_I2C_XILINX=y
+CONFIG_SPI=y
+CONFIG_SPI_CADENCE=y
+CONFIG_SPI_XILINX=y
+CONFIG_SPI_ZYNQMP_GQSPI=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_SYSFS=y
+CONFIG_GPIO_XILINX=y
+CONFIG_GPIO_ZYNQ=y
+CONFIG_GPIO_PCA953X=y
+CONFIG_GPIO_TPS65086=y
+CONFIG_POWER_RESET_LTC2952=y
+CONFIG_SENSORS_IIO_HWMON=y
+CONFIG_PMBUS=y
+CONFIG_SENSORS_MAX20751=y
+CONFIG_SENSORS_INA2XX=y
+CONFIG_WATCHDOG=y
+CONFIG_XILINX_WATCHDOG=y
+CONFIG_CADENCE_WATCHDOG=y
+CONFIG_MFD_TPS65086=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_TPS65086=y
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_MEDIA_CAMERA_SUPPORT=y
+CONFIG_MEDIA_CONTROLLER=y
+CONFIG_VIDEO_V4L2_SUBDEV_API=y
+CONFIG_MEDIA_USB_SUPPORT=y
+CONFIG_USB_VIDEO_CLASS=y
+CONFIG_V4L_PLATFORM_DRIVERS=y
+CONFIG_VIDEO_XILINX=y
+CONFIG_VIDEO_XILINX_AXI4S_SWITCH=y
+CONFIG_VIDEO_XILINX_CFA=y
+CONFIG_VIDEO_XILINX_CRESAMPLE=y
+CONFIG_VIDEO_XILINX_DEMOSAIC=y
+CONFIG_VIDEO_XILINX_GAMMA=y
+CONFIG_VIDEO_XILINX_HLS=y
+CONFIG_VIDEO_XILINX_REMAPPER=y
+CONFIG_VIDEO_XILINX_RGB2YUV=y
+CONFIG_VIDEO_XILINX_SCALER=y
+CONFIG_VIDEO_XILINX_MULTISCALER=y
+CONFIG_VIDEO_XILINX_SDIRXSS=y
+CONFIG_VIDEO_XILINX_SWITCH=y
+CONFIG_VIDEO_XILINX_TPG=y
+CONFIG_VIDEO_XILINX_VPSS_CSC=y
+CONFIG_VIDEO_XILINX_VPSS_SCALER=y
+CONFIG_VIDEO_XILINX_CSI2RXSS=y
+CONFIG_VIDEO_XILINX_SCD=y
+CONFIG_VIDEO_XILINX_M2M=y
+# CONFIG_VGA_ARB is not set
+CONFIG_DRM=y
+CONFIG_DRM_XILINX=y
+CONFIG_DRM_XILINX_SDI=y
+CONFIG_DRM_XLNX=y
+CONFIG_DRM_XLNX_BRIDGE=y
+CONFIG_DRM_XLNX_BRIDGE_DEBUG_FS=y
+CONFIG_DRM_ZYNQMP_DPSUB=y
+CONFIG_DRM_XLNX_DSI=y
+CONFIG_DRM_XLNX_MIXER=y
+CONFIG_DRM_XLNX_PL_DISP=y
+CONFIG_DRM_XLNX_SDI=y
+CONFIG_DRM_XLNX_BRIDGE_CSC=y
+CONFIG_DRM_XLNX_BRIDGE_SCALER=y
+CONFIG_FB_XILINX=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_PCI is not set
+CONFIG_SND_USB_AUDIO=y
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_XILINX_DP=y
+CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER=y
+CONFIG_SND_SOC_XILINX_SDI=y
+CONFIG_SND_SOC_XILINX_I2S=y
+CONFIG_SND_SOC_XILINX_SPDIF=y
+CONFIG_SND_SOC_XILINX_PL_SND_CARD=y
+CONFIG_USB=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+# CONFIG_USB_DEFAULT_PERSIST is not set
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_UAS=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_XILINX=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_EEM=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_EEM=y
+CONFIG_USB_MASS_STORAGE=m
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_OF_ARASAN=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_ONESHOT=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+CONFIG_LEDS_TRIGGER_CPU=y
+CONFIG_LEDS_TRIGGER_GPIO=y
+CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+CONFIG_LEDS_TRIGGER_TRANSIENT=y
+CONFIG_LEDS_TRIGGER_CAMERA=y
+CONFIG_EDAC=y
+CONFIG_EDAC_SYNOPSYS=y
+CONFIG_EDAC_ZYNQMP_OCM=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_ZYNQMP=y
+CONFIG_XILINX_DMA=y
+CONFIG_XILINX_ZYNQMP_DMA=y
+CONFIG_DMATEST=y
+CONFIG_UIO=y
+CONFIG_UIO_PDRV_GENIRQ=m
+CONFIG_UIO_DMEM_GENIRQ=m
+CONFIG_UIO_XILINX_APM=y
+CONFIG_STAGING=y
+CONFIG_ION=y
+CONFIG_ION_SYSTEM_HEAP=y
+CONFIG_ION_CARVEOUT_HEAP=y
+CONFIG_ION_CHUNK_HEAP=y
+CONFIG_ION_CMA_HEAP=y
+CONFIG_COMMON_CLK_XLNX_CLKWZRD=y
+CONFIG_XILINX_FCLK=y
+CONFIG_XLNX_CTRL_FRMBUF=y
+CONFIG_XLNX_CTRL_VPSS=y
+CONFIG_COMMON_CLK_SI570=y
+CONFIG_COMMON_CLK_SI5324=y
+# CONFIG_COMMON_CLK_XGENE is not set
+CONFIG_COMMON_CLK_ZYNQMP=y
+CONFIG_ARM_SMMU=y
+CONFIG_REMOTEPROC=y
+CONFIG_ZYNQMP_R5_REMOTEPROC=m
+CONFIG_XILINX_VCU=m
+CONFIG_IIO=y
+CONFIG_XILINX_XADC=y
+CONFIG_XILINX_AMS=y
+CONFIG_XILINX_INTC=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_RAS=y
+CONFIG_ANDROID=y
+CONFIG_NVMEM_ZYNQMP=y
+CONFIG_FPGA=y
+CONFIG_XILINX_AFI_FPGA=y
+CONFIG_FPGA_BRIDGE=y
+CONFIG_XILINX_PR_DECOUPLER=y
+CONFIG_FPGA_REGION=y
+CONFIG_OF_FPGA_REGION=y
+CONFIG_FPGA_MGR_ZYNQMP_FPGA=y
+CONFIG_EXT3_FS=y
+CONFIG_EXT4_FS_POSIX_ACL=y
+CONFIG_EXT4_FS_SECURITY=y
+CONFIG_BTRFS_FS=y
+CONFIG_QUOTA=y
+CONFIG_QFMT_V2=y
+CONFIG_AUTOFS4_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_HUGETLBFS=y
+CONFIG_ECRYPT_FS=y
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_XATTR=y
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RUBIN=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_NFS_V4_2=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+CONFIG_CRYPTO_CRCT10DIF=y
+CONFIG_CRYPTO_USER_API_SKCIPHER=y
+CONFIG_CRYPTO_DEV_ZYNQMP_SHA3=y
+CONFIG_CRYPTO_DEV_XILINX_RSA=y
+CONFIG_CRYPTO_DEV_ZYNQMP_AES=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
+CONFIG_DEBUG_FS=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_FTRACE is not set
+# TaPaSCO specific
+CONFIG_LOCALVERSION="-tapasco"
+CONFIG_DEFAULT_HOSTNAME="$BOARD"
diff --git a/toolflow/boot/generate_boot_image.sh b/toolflow/boot/generate_boot_image.sh
index 09fcac34..e0c0bb21 100755
--- a/toolflow/boot/generate_boot_image.sh
+++ b/toolflow/boot/generate_boot_image.sh
@@ -1,292 +1,303 @@
 #!/bin/bash
 BOARD=${1:-zedboard}
-VERSION=${2:-2019.1}
-IMGSIZE=${3:-7534}
+VERSION=${2:-2019.2}
+IMGSIZE=${3:-5120}
 SDCARD=${4:-}
 JOBCOUNT=4
 SCRIPTDIR="$(dirname $(readlink -f $0))"
 DIR="$SCRIPTDIR/$BOARD/$VERSION"
 LOGDIR="$DIR/logs"
-CROSS_COMPILE=${CROSS_COMPILE:=arm-linux-gnueabihf-}
-ROOTFS_IMG="$SCRIPTDIR/rootfs.img"
-PYNQ_VERSION="pynq_z1_v2.1"
-PYNQ_IMAGE="$SCRIPTDIR/pynq/$PYNQ_VERSION.zip"
-PYNQ_IMAGE_URL="http://files.digilent.com/Products/PYNQ/$PYNQ_VERSION.img.zip"
+LINUX_XLNX_URL="https://github.com/xilinx/linux-xlnx.git"
+UBOOT_URL="https://github.com/xilinx/u-boot-xlnx.git"
+ATF_URL="https://github.com/Xilinx/arm-trusted-firmware.git"
+ARTYZ7_DTS_URL="https://raw.githubusercontent.com/Digilent/linux-digilent/master/arch/arm/boot/dts/zynq-artyz7.dts"
+ROOTFS_URL="http://cdimage.ubuntu.com/ubuntu-base/releases/20.04/release/ubuntu-base-20.04-base-armhf.tar.gz"
+ROOTFS64_URL="http://cdimage.ubuntu.com/ubuntu-base/releases/20.04/release/ubuntu-base-20.04-base-arm64.tar.gz"
+ROOTFS_TAR_GZ="$DIR/ubuntu_armhf_20.04.tar.gz"
+ROOTFS64_TAR_GZ="$DIR/ubuntu_arm64_20.04.tar.gz"
 UDEV_RULES="$TAPASCO_HOME/platform/zynq/module/99-tapasco.rules"
 OUTPUT_IMAGE="$DIR/${BOARD}_${VERSION}.img"
-OPENSSL_URL="https://www.openssl.org/source/old/1.0.2/openssl-1.0.2n.tar.gz"
-OPENSSL="$SCRIPTDIR/oldopenssl"
-OPENSSL_TAR="$OPENSSL/openssl.tar.gz"
 ### LOGFILES ###################################################################
 FETCH_LINUX_LOG="$LOGDIR/fetch-linux.log"
 FETCH_UBOOT_LOG="$LOGDIR/fetch-uboot.log"
-FETCH_PYNQ_IMG_LOG="$SCRIPTDIR/pynq/fetch-pynq-img.log"
-FETCH_OPENSSL_LOG="$LOGDIR/fetch-openssl.log"
+FETCH_ARM_TRUSTED_FIRMWARE_LOG="$LOGDIR/fetch-atfw.log"
+FETCH_ROOTFS_LOG="$LOGDIR/fetch-rootfs.log"
 BUILD_LINUX_LOG="$LOGDIR/build-linux.log"
 BUILD_UBOOT_LOG="$LOGDIR/build-uboot.log"
+BUILD_ARM_TRUSTED_FIRMWARE_LOG="$LOGDIR/build-atfw.log"
 BUILD_SSBL_LOG="$LOGDIR/build-ssbl.log"
 BUILD_UIMAGE_LOG="$LOGDIR/build-uimage.log"
 BUILD_FSBL_LOG="$LOGDIR/build-fsbl.log"
+BUILD_PMUFW_LOG="$LOGDIR/build-PMUFW.log"
 BUILD_BOOTBIN_LOG="$LOGDIR/build-bootbin.log"
 BUILD_DEVICETREE_LOG="$LOGDIR/build-devicetree.log"
 BUILD_OUTPUT_IMAGE_LOG="$LOGDIR/build-output-image.log"
 PREPARE_SD_LOG="$LOGDIR/prepare-sd.log"
-EXTRACT_BL_LOG="$SCRIPTDIR/pynq/extract-bl.log"
-EXTRACT_RFS_LOG="$SCRIPTDIR/pynq/extract-rfs.log"
 
-HOSTCFLAGS=-I$OPENSSL/include
-HOSTLDFLAGS="-L$OPENSSL/lib -lssl -lcrypto -ldl"
-HOSTLOADLIBES=$HOSTLDFLAGS
-
-print_usage () {
+print_usage() {
 	cat << EOF
 Usage: ${0##*/} BOARD VERSION [DISK SIZE] [DEVICE]
 Build a boot image for the given BOARD and VERSION (git tag). If DEVICE is
 given, repartition the device as a bootable SD card (WARNING: all data will
 be lost).
-	BOARD		one of zc706, zedboard, pyng or zcu102
-	VERSION		Vivado Design Suite version, e.g., 2016.4
-	DISK SIZE	Size of the image in MiB (optional, default: 7534)
+	BOARD		one of zc706, zedboard, pyng, zcu102 or ultra96v2
+	VERSION		Vivado Design Suite version, e.g., 2019.2
+	DISK SIZE	Size of the image in MiB (optional, default: 5120)
 	DEVICE		SD card device, e.g., /dev/sdb (optional)
 EOF
 	exit 1
 }
 
-dusudo () {
+dusudo() {
 	[[ -z $1 ]] || echo $SUDOPW | sudo --stdin "$@"
 }
 
-error_exit () {
+error_exit() {
 	echo ${1:-"unknown error"} >&2 && exit 1
 }
 
-error_ret () {
+error_ret() {
 	echo ${1:-"error in script"} >&2 && return 1
 }
 
-check_board () {
+check_board() {
 	case $BOARD in
-		"zedboard")
-			;;
-		"zc706")
-			;;
-		"pynq")
-			;;
-		"zcu102")
-			;;
+		"zedboard") ;;
+
+		"zc706") ;;
+
+		"pynq") ;;
+
+		"zcu102") ;;
+
+		"ultra96v2") ;;
+
 		*)
 			echo "unknown board: $BOARD"
-			echo "select one of zedboard, zc706 or pynq"
+			echo "select one of zedboard, zc706, pynq, zcu102 or ultra96v2"
 			print_usage
 			;;
 	esac
 }
 
-check_compiler () {
+check_compiler() {
 	which ${CROSS_COMPILE}gcc &> /dev/null ||
-	error_exit "Compiler ${CROSS_COMPILE}gcc not found in path."
+		error_exit "Compiler ${CROSS_COMPILE}gcc not found in path."
 }
 
-check_hsi () {
-	which hsi &> /dev/null ||
-	error_exit "Xilinx hsi tool is not in PATH, please source Vivado settings."
+check_xsct() {
+	which xsct &> /dev/null ||
+		error_exit "Xilinx xcst tool is not in PATH, please source Vitis settings."
 }
 
-check_vivado () {
+check_vivado() {
 	which vivado &> /dev/null ||
-	error_exit "Xilinx Vivado is not in PATH, please source Vivado settings."
+		error_exit "Xilinx Vivado is not in PATH, please source Vivado settings."
 }
 
-check_tapasco () {
+check_tapasco() {
 	[[ -n $TAPASCO_HOME ]] ||
-	error_exit "TAPASCO_HOME is not set, please source setup.sh from TaPaSCo."
+		error_exit "TAPASCO_HOME is not set, please source tapasco-setup.sh from TaPaSCo."
 }
 
-check_bootgen () {
+check_bootgen() {
 	which bootgen &> /dev/null ||
-	error_exit "Xilinx bootgen tool is not in PATH, please source Vivado settings."
+		error_exit "Xilinx bootgen tool is not in PATH, please source Vivado settings."
 }
 
-check_image_tools () {
+check_image_tools() {
 	which kpartx &> /dev/null ||
-	error_exit "Partitioning helper 'kpartx' not found, please install package."
+		error_exit "Partitioning helper 'kpartx' not found, please install package."
 }
 
-check_sdcard () {
+check_sdcard() {
 	[[ -z $SDCARD || -e $SDCARD ]] ||
-	error_exit "SD card device $SDCARD does not exist!"
+		error_exit "SD card device $SDCARD does not exist!"
+}
+
+check_chroot() {
+	[[ -x /usr/bin/qemu-arm-static && -x /usr/bin/qemu-aarch64-static ]] ||
+		error_exit "QEMU user emulation is missing, please install package qemu-user-static."
 }
 
-fetch_linux () {
+fetch_linux() {
 	if [[ ! -d $DIR/linux-xlnx ]]; then
-		echo "Fetching linux $VERSION ..."
-		git clone -b xilinx-v$VERSION --depth 1 https://github.com/xilinx/linux-xlnx.git $DIR/linux-xlnx ||
-		return $(error_ret "$LINENO: could not clone linux git")
+		#handling of xilinx sudden change in name convention
+		if [[ $VERSION == 2019.2 ]]; then
+			LINUX_VERSION=2019.2.01
+		else
+			LINUX_VERSION=$VERSION
+		fi
+		echo "Fetching linux $LINUX_VERSION ..."
+		git clone -b xilinx-v$LINUX_VERSION --depth 1 $LINUX_XLNX_URL $DIR/linux-xlnx ||
+			return $(error_ret "$LINENO: could not clone linux git")
 	else
-		echo "$DIR/linux-xln already exists, skipping."
+		echo "$DIR/linux-xlnx already exists, skipping."
 	fi
 }
 
-fetch_u-boot () {
+fetch_u-boot() {
 	if [[ ! -d $DIR/u-boot-xlnx ]]; then
 		echo "Fetching u-boot $VERSION ..."
-		git clone -b xilinx-v$VERSION --depth 1 https://github.com/xilinx/u-boot-xlnx.git $DIR/u-boot-xlnx ||
-		return $(error_ret "$LINENO: could not clone u-boot git")
+		git clone -b xilinx-v$VERSION --depth 1 $UBOOT_URL $DIR/u-boot-xlnx ||
+			return $(error_ret "$LINENO: could not clone u-boot git")
 	else
 		echo "$DIR/u-boot-xlnx already exists, skipping."
 	fi
 }
 
-fetch_openssl () {
-	if [[ ! -f $OPENSSL_TAR ]]; then
-		echo "Fetching ancient OpenSSL 1.0.2 for U-Boot ..."
-		mkdir -p $OPENSSL || return $(error_ret "$LINENO: could not create $OPENSSL")
-		curl -s $OPENSSL_URL -o $OPENSSL_TAR ||
-			return $(error_ret "$LINENO: could not fetch $OPENSSL_URL")
-		cd $OPENSSL && tar xvzf $OPENSSL_TAR
-	fi
-}
-
-fetch_pynq_image () {
-	IMG=${PYNQ_VERSION}.img
-	BD=`dirname $PYNQ_IMAGE`
-	if [[ ! -f $PYNQ_IMAGE ]]; then
-		echo "Fetching PyNQ standard image ..."
-		mkdir -p $BD || return $(error_ret "$LINENO: could not create $BD")
-		curl -s $PYNQ_IMAGE_URL -o $PYNQ_IMAGE ||
-		return $(error_ret "$LINENO: could not fetch $PYNQ_IMAGE_URL")
-	fi
-	if [[ ! -f $SCRIPTDIR/pynq/$IMG ]]; then
-		echo "Unzipping $PYNQ_IMAGE to extract $IMG ..."
-		pushd $SCRIPTDIR/pynq &&
-		unzip -u $PYNQ_IMAGE &&
-		popd > /dev/null
-	fi
-}
-
-extract_pynq_bl () {
-	IMG=${PYNQ_VERSION}.img
-	if [[ ! -f $SCRIPTDIR/pynq/BOOT.BIN ]]; then
-		pushd $SCRIPTDIR/pynq &> /dev/null
-		mkdir -p img ||
-			return $(error_ret "$LINENO: could not create img dir")
-		dusudo mount -oloop,offset=1M $IMG img ||
-			return $(error_ret "$LINENO: could not mount $IMAGE")
-		dusudo cp img/BOOT.BIN $VERSION/BOOT.BIN ||
-			return $(error_ret "$LINENO: could not copy img/BOOT.BIN")
-		dusudo chown $USER $VERSION/BOOT.BIN ||
-			return $(error_ret "$LINENO: could not chown $USER $VERSION/BOOT.BIN")
-		dusudo cp img/uEnv.txt ../uenv/uEnv-pynq.txt ||
-			return $(error_ret "$LINENO: could not cp img/uEnv.txt")
-		dusudo chown $USER ../uenv/uEnv-pynq.txt ||
-			return $(error_ret "$LINENO: could not chown $USER uenv/uEnv-pynq.txt")
-		dusudo umount img ||
-			return $(error_ret "$LINENO: could not umount img")
-		rmdir img ||
-			return $(error_ret "$LINENO: could not remove img")
-		popd &> /dev/null
-	else
-		echo "$DIR/BOOT.BIN already exists, skipping."
-	fi
-	if [[ ! -f $DIR/devicetree.dtb ]]; then
-		$DIR/linux-xlnx/scripts/dtc/dtc -I dts -O dtb -o $DIR/devicetree.dtb $SCRIPTDIR/pynq/devicetree.dts ||
-			return $(error_ret "$LINENO: could not build devicetree")
+fetch_arm_trusted_firmware() {
+	if [[ ! -d $DIR/arm-trusted-firmware ]]; then
+		echo "Fetching arm-trusted-firmware ..."
+		git clone --depth 1 $ATF_URL $DIR/arm-trusted-firmware ||
+			return $(error_ret "$LINENO: could not clone arm-trusted-firmware")
 	else
-		echo "$DIR/devicetree.dtb already exists, skipping."
-	fi
-	echo "BOOT.BIN and devicetree.dtb are ready in $DIR."
-}
-
-extract_pynq_rootfs () {
-	IMG=${PYNQ_VERSION}.img
-	if [[ ! -f $ROOTFS_IMG ]]; then
-		IMG=$SCRIPTDIR/pynq/${PYNQ_VERSION}.img
-		START=$(fdisk -l $IMG | awk 'END { print $2 }')
-		COUNT=$(fdisk -l $IMG | awk 'END { print $4 }')
-		echo "Extracting root image from $IMG, start=$START and count = $COUNT"
-		dd if=$IMG of=$ROOTFS_IMG skip=$START count=$COUNT ||
-			return $(error_ret "$LINENO: extracting rootfs via dd failed")
-	else
-		echo "$ROOTFS_IMG already exists, skipping."
+		echo "$DIR/arm-trusted-firmware already exists, skipping."
 	fi
 }
 
-build_openssl () {
-	if [[ ! -f $OPENSSL/lib/libssl.a ]]; then
-		cd $OPENSSL/openssl-1.0.2n
-		make distclean
-		./config --prefix=$OPENSSL || return $(error_ret "$LINENO: could not configure OpenSSL")
-		make -j $JOBCOUNT || return $(error_ret "$LINENO: could not build OpenSSL")
-		make install || return $(error_ret "$LINENO: could not install OpenSSL")
+fetch_rootfs() {
+	case $ARCH in
+		"arm")
+			URL=$ROOTFS_URL
+			LOCAL_FILE=$ROOTFS_TAR_GZ
+			;;
+		"arm64")
+			URL=$ROOTFS64_URL
+			LOCAL_FILE=$ROOTFS64_TAR_GZ
+			;;
+	esac
+	if [[ ! -f $LOCAL_FILE ]]; then
+		echo "Fetching arch linux rootfs..."
+		curl -L -s $URL -o $LOCAL_FILE ||
+			return $(error_ret "$LINENO: could not fetch $URL")
 	else
-		echo "$OPENSSL/libssl.a already exists, skipping"
+		echo "$LOCAL_FILE already exists, skipping."
 	fi
 }
 
-build_u-boot () {
-	build_openssl
+build_u-boot() {
 	if [[ ! -e $DIR/u-boot-xlnx/tools/mkimage ]]; then
 		echo "Building u-boot $VERSION ..."
 		case $BOARD in
+			"pynq")
+				# based on zybo z7, but requires a few changes
+				DEFCONFIG=zynq_zybo_z7_defconfig
+				echo "CONFIG_DEBUG_UART_BASE=0xe0000000" >> $DIR/u-boot-xlnx/configs/$DEFCONFIG
+				# modify devicetree
+				# change uart1 to uart0
+				sed -i 's/uart1/uart0/' $DIR/u-boot-xlnx/arch/arm/dts/zynq-zybo-z7.dts
+				# change clock frequency to 50 MHz
+				sed -i 's/33333333/50000000/' $DIR/u-boot-xlnx/arch/arm/dts/zynq-zybo-z7.dts
+				# set memory size to 512 MB
+				sed -i 's/40000000/20000000/' $DIR/u-boot-xlnx/arch/arm/dts/zynq-zybo-z7.dts
+				;;
 			"zedboard")
 				DEFCONFIG=zynq_zed_defconfig
 				;;
 			"zc706")
 				DEFCONFIG=zynq_zc706_defconfig
 				;;
-			"pynq")
-				DEFCONFIG=zynq_zed_defconfig
+			"ultra96v2")
+				DEFCONFIG=avnet_ultra96_rev1_defconfig
+				;;
+			"zcu102")
+				DEFCONFIG=xilinx_zynqmp_zcu102_rev1_0_defconfig
 				;;
 			*)
 				return $(error_ret "unknown board: $BOARD")
 				;;
 		esac
 		cd $DIR/u-boot-xlnx
-		make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm $DEFCONFIG ||
-			return $(error_ret "$LINENO: could make defconfig $DEFCONFIG")
-		make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm HOSTCFLAGS=$HOSTCFLAGS HOSTLDFLAGS="$HOSTLDFLAGS" tools -j $JOBCOUNT ||
-			return $(error_ret "$LINENO: could not build u-boot tools")
+		# disable network boot for all devices
+		echo "# CONFIG_CMD_NET is not set" >> configs/$DEFCONFIG
+		if [[ $ARCH == arm ]]; then
+			echo "CONFIG_OF_EMBED=y" >> $DIR/u-boot-xlnx/configs/$DEFCONFIG
+			echo "# CONFIG_OF_SEPARATE is not set" >> $DIR/u-boot-xlnx/configs/$DEFCONFIG
+		fi
+		make CROSS_COMPILE=$CROSS_COMPILE $DEFCONFIG ||
+			return $(error_ret "$LINENO: could not make defconfig $DEFCONFIG")
+		if [[ $ARCH != arm64 ]]; then
+			make CROSS_COMPILE=$CROSS_COMPILE HOSTCFLAGS=$HOSTCFLAGS HOSTLDFLAGS="$HOSTLDFLAGS" tools -j $JOBCOUNT ||
+				return $(error_ret "$LINENO: could not build u-boot tools")
+		fi
 	else
+
 		echo "$DIR/u-boot-xlnx/tools/mkimage already exists, skipping."
 	fi
 }
 
-build_linux () {
-	if [[ ! -e $DIR/linux-xlnx/arch/arm/boot/Image ]]; then
-		echo "Building linux $VERSION .."
-		DEFCONFIG=tapasco_zynq_defconfig
-		CONFIGFILE="$SCRIPTDIR/configs/tapasco_zynq_defconfig"
-		cp $CONFIGFILE $DIR/linux-xlnx/arch/arm/configs/ ||
-			return $(error_ret "$LINENO: could not copy config")
-		cd $DIR/linux-xlnx
-		make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm $DEFCONFIG ||
-			return $(error_ret "$LINENO: could not make defconfig")
-		make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm -j $JOBCOUNT ||
-			return $(error_ret "$LINENO: could not build kernel")
+build_linux() {
+	if [[ $ARCH != arm64 ]]; then
+		if [[ ! -e $DIR/linux-xlnx/arch/arm/boot/Image ]]; then
+			echo "Building linux $VERSION .."
+			DEFCONFIG=tapasco_zynq_defconfig
+			CONFIGFILE="$SCRIPTDIR/configs/tapasco_zynq_defconfig"
+			cp $CONFIGFILE $DIR/linux-xlnx/arch/arm/configs/ ||
+				return $(error_ret "$LINENO: could not copy config")
+			cd $DIR/linux-xlnx
+			make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm $DEFCONFIG ||
+				return $(error_ret "$LINENO: could not make defconfig")
+			make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm -j $JOBCOUNT ||
+				return $(error_ret "$LINENO: could not build kernel")
+		else
+			echo "$DIR/linux-xlnx/arch/arm/boot/Image already exists, skipping."
+		fi
 	else
-		echo "$DIR/linux-xlnx/arch/arm/boot/Image already exists, skipping."
+		if [[ ! -e $DIR/linux-xlnx/arch/arm64/boot/Image ]]; then
+			echo "Building linux $VERSION for arm64.."
+			DEFCONFIG=tapasco_zynqmp_defconfig
+			CONFIGFILE="$SCRIPTDIR/configs/tapasco_zynqmp_defconfig"
+			cp $CONFIGFILE $DIR/linux-xlnx/arch/arm64/configs/ ||
+				return $(error_ret "$LINENO: could not copy config")
+			cd $DIR/linux-xlnx
+			make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm64 $DEFCONFIG ||
+				return $(error_ret "$LINENO: could not make defconfig")
+			make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm64 -j $JOBCOUNT ||
+				return $(error_ret "$LINENO: could not build kernel")
+			case $BOARD in
+				"ultra96v2")
+					cp $DIR/linux-xlnx/arch/arm64/boot/dts/xilinx/avnet-ultra96-rev1.dtb $DIR/devicetree.dtb ||
+						return $(error_ret "$LINENO: could not copy device tree")
+					;;
+				"zcu102")
+					cp $DIR/linux-xlnx/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dtb $DIR/devicetree.dtb ||
+						return $(error_ret "$LINENO: could not copy device tree")
+					;;
+			esac
+		else
+			echo "$DIR/linux-xlnx/arch/arm64/boot/Image already exists, skipping."
+		fi
 	fi
 }
 
-build_ssbl () {
+build_ssbl() {
 	if [[ ! -e $DIR/u-boot-xlnx/u-boot ]]; then
 		echo "Building second stage boot loader ..."
-		DTC=$DIR/linux-xlnx/scripts/dtc/dtc
 		cd $DIR/u-boot-xlnx
-			make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm DTC=$DTC HOSTCFLAGS=$HOSTCFLAGS HOSTLDFLAGS="$HOSTLDFLAGS" u-boot ||
-			return $(error_ret "$LINENO: could not build u-boot")
+		if [[ $ARCH != arm64 ]]; then
+			DTC=$DIR/linux-xlnx/scripts/dtc/dtc
+			make CROSS_COMPILE=$CROSS_COMPILE DTC=$DTC HOSTCFLAGS=$HOSTCFLAGS HOSTLDFLAGS="$HOSTLDFLAGS" u-boot -j $JOBCOUNT ||
+				return $(error_ret "$LINENO: could not build u-boot")
+		else
+			make CROSS_COMPILE=$CROSS_COMPILE -j $JOBCOUNT ||
+				return $(error_ret "$LINENO: could not build u-boot")
+		fi
 	else
 		echo "$DIR/u-boot-xlnx/u-boot already exists, skipping."
 	fi
-	cp $DIR/u-boot-xlnx/u-boot $DIR/u-boot-xlnx/u-boot.elf ||
-		return $(error_ret "$LINENO: could not copy to $DIR/u-boot-xlnx/u-boot.elf failed")
+
+	if [[ $ARCH != arm64 ]]; then
+		cp $DIR/u-boot-xlnx/u-boot $DIR/u-boot-xlnx/u-boot.elf ||
+			return $(error_ret "$LINENO: could not copy to $DIR/u-boot-xlnx/u-boot.elf failed")
+	fi
 }
 
-build_uimage () {
+build_uimage() {
 	if [[ ! -e $DIR/linux-xlnx/arch/arm/boot/uImage ]]; then
 		echo "Building uImage ..."
 		cd $DIR/linux-xlnx
-		export PATH=$PATH:$DIR/u-boot-xlnx/tools 
+		export PATH=$PATH:$DIR/u-boot-xlnx/tools
 		make CROSS_COMPILE=$CROSS_COMPILE ARCH=arm UIMAGE_LOADADDR=0x8000 uImage -j $JOBCOUNT ||
 			return $(error_ret "$LINENO: could not build uImage")
 	else
@@ -294,25 +305,27 @@ build_uimage () {
 	fi
 }
 
-build_fsbl () {
+build_fsbl() {
 	if [[ ! -f $DIR/fsbl/executable.elf ]]; then
 		mkdir -p $DIR/fsbl || return $(error_ret "$LINENO: could not create $DIR/fsbl")
-		pushd $DIR/fsbl > /dev/null &&
-		cat > project.tcl << EOF
+		if [[ $ARCH != arm64 ]]; then
+			pushd $DIR/fsbl > /dev/null &&
+				cat > project.tcl << EOF
 package require json
 
-set platform_file [open "\$env(TAPASCO_HOME)/platform/$BOARD/platform.json" r]
+set platform_file [open "\$env(TAPASCO_HOME_TCL)/platform/$BOARD/platform.json" r]
 set json [read \$platform_file]
 close \$platform_file
 set platform [::json::json2dict \$json]
 
-source "\$env(TAPASCO_HOME)/common/common.tcl"
-source "\$env(TAPASCO_HOME)/platform/common/platform.tcl"
-source "\$env(TAPASCO_HOME)/platform/$BOARD/$BOARD.tcl"
+source "\$env(TAPASCO_HOME_TCL)/common/common.tcl"
+source "\$env(TAPASCO_HOME_TCL)/platform/common/platform.tcl"
+source "\$env(TAPASCO_HOME_TCL)/platform/$BOARD/$BOARD.tcl"
 create_project $BOARD $BOARD -part [dict get \$platform "Part"] -force
 set board_part ""
 if {[dict exists \$platform "BoardPart"]} {
-	set board_part [dict get \$platform "BoardPart"]
+	set parts [get_board_parts -filter [format {NAME =~ "%s*"} [dict get \$platform "BoardPart"]]]
+	set board_part [lindex \$parts [expr [llength \$parts] - 1]]
 	set_property board_part \$board_part [current_project]
 }
 create_bd_design -quiet "system"
@@ -355,61 +368,159 @@ write_hwdef -force  -file $BOARD.hdf
 puts "HDF in $BOARD.hdf, done."
 exit
 EOF
-		cat > hsi.tcl << EOF
-generate_app -hw [open_hw_design $BOARD.hdf] -os standalone -proc ps7_cortexa9_0 -app zynq_fsbl -compile -sw fsbl -dir .
+			cat > hsi.tcl << EOF
+hsi generate_app -hw [hsi open_hw_design $BOARD.hdf] -os standalone -proc ps7_cortexa9_0 -app zynq_fsbl -compile -sw fsbl -dir .
 EOF
+		else
+			pushd $DIR/fsbl > /dev/null &&
+				cat > project.tcl << EOF
+package require json
+
+set platform_file [open "\$env(TAPASCO_HOME_TCL)/platform/$BOARD/platform.json" r]
+set json [read \$platform_file]
+close \$platform_file
+set platform [::json::json2dict \$json]
+
+source "\$env(TAPASCO_HOME_TCL)/common/common.tcl"
+source "\$env(TAPASCO_HOME_TCL)/platform/common/platform.tcl"
+source "\$env(TAPASCO_HOME_TCL)/platform/$BOARD/$BOARD.tcl"
+
+create_project -force $BOARD $BOARD -part [dict get \$platform "Part"]
+set board_part ""
+if {[dict exists \$platform "BoardPart"]} {
+	set parts [get_board_parts -filter [format {NAME =~ "%s*"} [dict get \$platform "BoardPart"]]]
+	set board_part [lindex \$parts [expr [llength \$parts] - 1]]
+	set_property board_part \$board_part [current_project]
+}
+create_bd_design -quiet "system"
+set board_preset {}
+if {[dict exists \$platform "BoardPreset"]} {
+	set board_preset [dict get \$platform "BoardPreset"]
+}
+set ps [tapasco::ip::create_ultra_ps "zynqmp" \$board_preset 100]
+apply_bd_automation -rule xilinx.com:bd_rule:zynq_ultra_ps_e -config {apply_board_preset "1" } \$ps
+set clk [lindex [get_bd_pins -of_objects \$ps -filter { TYPE == clk && DIR == O }] 0]
+connect_bd_net \$clk [get_bd_pins -of_objects \$ps -filter { TYPE == clk && DIR == I}]
+validate_bd_design
+make_wrapper -files [get_files $DIR/fsbl/$BOARD/$BOARD.srcs/sources_1/bd/system/system.bd] -top -import
+update_compile_order -fileset sources_1
+generate_target all [get_files $DIR/fsbl/$BOARD/$BOARD.srcs/sources_1/bd/system/system.bd]
+write_hw_platform -fixed -force  -file $BOARD.xsa
+puts "XSA in $BOARD.xsa, done"
+exit
+EOF
+			cat > hsi.tcl << EOF
+hsi generate_app -hw [hsi open_hw_design $BOARD.xsa] -proc psu_cortexa53_0 -os standalone -app zynqmp_fsbl -compile -sw fsbl -dir .
+EOF
+		fi
+
 		vivado -nolog -nojournal -notrace -mode batch -source project.tcl ||
-			return $(error_ret "$LINENO: Vivado could not build FSBL project")
-		hsi -nolog -nojournal -notrace -mode batch -source hsi.tcl ||
+			return $(error_ret "$LINENO: Vivado could not build project")
+		xsct hsi.tcl ||
 			return $(error_ret "$LINENO: hsi could not build FSBL")
+		popd &> /dev/null
 	else
 		echo "$BOARD/fsbl/executable.elf already exists, skipping."
 	fi
 }
 
-build_bootbin () {
-	echo "Building BOOT.BIN ..."
-	cat > $DIR/bootimage.bif << EOF
-image : {
-	[bootloader]$DIR/fsbl/executable.elf
-	$DIR/u-boot-xlnx/u-boot.elf
+build_pmufw() {
+	if [[ ! -f $DIR/pmufw/executable.elf ]]; then
+		mkdir -p $DIR/pmufw || return $(error_ret "$LINENO: could not create $DIR/pmufw")
+		pushd $DIR/pmufw > /dev/null &&
+			cat > pmufw.tcl << EOF
+hsi generate_app -hw [hsi open_hw_design $DIR/fsbl/$BOARD.xsa] -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -compile -sw pmufw -dir .
+EOF
+		xsct pmufw.tcl ||
+			return $(error_ret "$LINENO: hsi could not build pmu firmware")
+		popd &> /dev/null
+	else
+		echo "$BOARD/pmufw/executable.elf already exists, skipping."
+	fi
 }
+
+build_arm_trusted_firmware() {
+	if [[ ! -f $DIR/arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf ]]; then
+		echo "Building Arm Trusted Firmware for ZynqMP ..."
+		cd $DIR/arm-trusted-firmware
+		make CROSS_COMPILE=$CROSS_COMPILE PLAT=zynqmp RESET_TO_BL31=1
+	else
+		echo "$BOARD/arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf already exists, skipping."
+	fi
+}
+
+build_bootbin() {
+	if [[ ! -f $DIR/BOOT.BIN ]]; then
+		echo "Building BOOT.BIN ..."
+		if [[ $ARCH == arm64 ]]; then
+			cat > $DIR/bootimage.bif << EOF
+                image: {
+                    [bootloader,destination_cpu=a53-0] $DIR/fsbl/executable.elf
+                    [pmufw_image] $DIR/pmufw/executable.elf
+                    [destination_cpu=a53-0, exception_level=el-3,trustzone] $DIR/arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf
+                    [destination_cpu=a53-0, exception_level=el-2] $DIR/u-boot-xlnx/u-boot.elf
+                }
 EOF
-	bootgen -image $DIR/bootimage.bif -w on -o $DIR/BOOT.BIN ||
-		return $(error_ret "$LINENO: could not generate BOOT.bin")
-	echo "$DIR/BOOT.BIN ready."
+			bootgen -arch zynqmp -image $DIR/bootimage.bif -w on -o $DIR/BOOT.BIN ||
+				return $(error_ret "$LINENO: could not generate BOOT.bin")
+		else
+			cat > $DIR/bootimage.bif << EOF
+                image : {
+    	            [bootloader]$DIR/fsbl/executable.elf
+    	            $DIR/u-boot-xlnx/u-boot.elf
+                }
+EOF
+			bootgen -image $DIR/bootimage.bif -w on -o $DIR/BOOT.BIN ||
+				return $(error_ret "$LINENO: could not generate BOOT.bin")
+		fi
+		echo "$DIR/BOOT.BIN ready."
+	else
+		echo "$DIR/BOOT.BIN already exists, skipping."
+	fi
 }
 
-build_devtree () {
+build_devtree() {
 	echo "Building devicetree ..."
 	case $BOARD in
+		"pynq")
+			cp $DIR/linux-xlnx/arch/arm/boot/dts/zynq-7000.dtsi $DIR/ &&
+				cp $DIR/linux-xlnx/arch/arm/boot/dts/skeleton.dtsi $DIR/ &&
+				curl -L -s $ARTYZ7_DTS_URL | sed 's/#include/\/include\//' > $DIR/devicetree.dts
+			;;
 		"zedboard")
 			cp $DIR/linux-xlnx/arch/arm/boot/dts/zynq-7000.dtsi $DIR/ &&
-			cat $SCRIPTDIR/misc/zynq-7000.dtsi.patch | patch $DIR/zynq-7000.dtsi &&
-			cp $DIR/linux-xlnx/arch/arm/boot/dts/skeleton.dtsi $DIR/ &&
-			cat $DIR/linux-xlnx/arch/arm/boot/dts/zynq-zed.dts | sed 's/#include/\/include\//' > $DIR/devicetree.dts
-			echo >> $DIR/devicetree.dts
-			echo "/include/ \"$SCRIPTDIR/misc/tapasco.dtsi\"" >> $DIR/devicetree.dts
+				cat $SCRIPTDIR/misc/zynq-7000.dtsi.patch | patch $DIR/zynq-7000.dtsi &&
+				cp $DIR/linux-xlnx/arch/arm/boot/dts/skeleton.dtsi $DIR/ &&
+				cat $DIR/linux-xlnx/arch/arm/boot/dts/zynq-zed.dts | sed 's/#include/\/include\//' > $DIR/devicetree.dts
 			;;
 		"zc706")
 			cp $DIR/linux-xlnx/arch/arm/boot/dts/zynq-7000.dtsi $DIR/ &&
-			cat $SCRIPTDIR/misc/zynq-7000.dtsi.patch | patch $DIR/zynq-7000.dtsi &&
-			cp $DIR/linux-xlnx/arch/arm/boot/dts/skeleton.dtsi $DIR/ &&
-			cat $DIR/linux-xlnx/arch/arm/boot/dts/zynq-zed.dts | sed 's/#include/\/include\//' > $DIR/devicetree.dts
-			echo >> $DIR/devicetree.dts
-			echo "/include/ \"$SCRIPTDIR/misc/tapasco.dtsi\"" >> $DIR/devicetree.dts
+				cat $DIR/linux-xlnx/arch/arm/boot/dts/zynq-zc706.dts | sed 's/#include/\/include\//' > $DIR/devicetree.dts
+			;;
+		"ultra96v2")
+			#work around: Re-compile dts from dtb generated by linux-build and add tapasco related interrupts
+			$DIR/linux-xlnx/scripts/dtc/dtc -I dtb -O dts -o $DIR/devicetree.dts $DIR/devicetree.dtb
+			;;
+		"zcu102")
+			$DIR/linux-xlnx/scripts/dtc/dtc -I dtb -O dts -o $DIR/devicetree.dts $DIR/devicetree.dtb
 			;;
 	esac
+	echo >> $DIR/devicetree.dts
+	if [[ $ARCH == arm64 ]]; then
+		echo "/include/ \"$SCRIPTDIR/misc/tapasco_zynqmp.dtsi\"" >> $DIR/devicetree.dts
+	else
+		echo "/include/ \"$SCRIPTDIR/misc/tapasco.dtsi\"" >> $DIR/devicetree.dts
+	fi
 	$DIR/linux-xlnx/scripts/dtc/dtc -I dts -O dtb -o $DIR/devicetree.dtb $DIR/devicetree.dts ||
 		return $(error_ret "$LINENO: could not build devicetree.dtb")
 	echo "$DIR/devicetree.dtb ready."
 }
 
-build_output_image () {
+build_output_image() {
 	# size of image (in MiB)
 	IMGSIZE=${1:-7534}
 	# default root size: MAX - 358 MiB (converted to 512B sectors)
-	ROOTSZ=${2:-$((($IMGSIZE - 358) * 1024 * 1024 / 512))}
+	ROOTSZ=${2:-$(((IMGSIZE - 358) * 1024 * 1024 / 512))}
 	if [[ ! -f $OUTPUT_IMAGE ]]; then
 		echo "Building $OUTPUT_IMAGE ($IMGSIZE MiB, rootfs $ROOTSZ sectors)..."
 		echo "Creating empty disk image ..."
@@ -437,7 +548,7 @@ EOF
 		dusudo kpartx -av $OUTPUT_IMAGE ||
 			return $(error_ret "$LINENO: could not kpartx -a $OUTPUT_IMAGE")
 		sleep 3
-		LD=`basename $LOOPDEV`
+		LD=$(basename $LOOPDEV)
 		LD1=${LD}p1
 		LD2=${LD}p2
 		echo "Making BOOT partition in /dev/mapper/$LD1 ..."
@@ -466,121 +577,165 @@ EOF
 		fi
 		echo "Unmounting partitions ..."
 		dusudo kpartx -d $OUTPUT_IMAGE &&
-		echo "Done, $OUTPUT_IMAGE is ready!"
+			echo "Done, $OUTPUT_IMAGE is ready!"
 	else
 		echo "$OUTPUT_IMAGE already exists, skipping."
 	fi
 }
 
-prepare_sd () {
+prepare_sd() {
 	echo "dd'ing $OUTPUT_IMAGE to $SDCARD, this will take a while ..."
 	dusudo dd if=$OUTPUT_IMAGE of=$SDCARD bs=10M ||
 		return $(error_ret "$LINENO: could not dd $OUTPUT_IMAGE to $SDCARD")
 	echo "$SDCARD ready."
 }
 
-copy_files_to_boot () {
+copy_files_to_boot() {
 	DEV=${1:-${SDCARD}1}
-	TO="$DIR/`basename $DEV`"
+	TO="$DIR/$(basename $DEV)"
 	echo "Preparing BOOT partition $TO ..."
 	mkdir -p $TO || return $(error_ret "$LINENO: could not create $TO")
 	dusudo mount $DEV $TO || return $(error_ret "$LINENO: could not mount $DEV -> $TO")
 	echo "Copying $DIR/BOOT.BIN to $TO ..."
 	dusudo cp $DIR/BOOT.BIN $TO || echo >&2 "$LINENO: WARNING: could not copy BOOT.BIN"
-	echo "Copying $DIR/linux-xlnx/arch/arm/boot/uImage to $TO ..."
-	dusudo cp $DIR/linux-xlnx/arch/arm/boot/uImage $TO ||
-		echo >&2 "$LINENO: WARNING: could not copy uImage"
-	echo "Copying $DIR/devicetree.dtb to $TO ..."
-	dusudo cp $DIR/devicetree.dtb $TO || echo >&2 "$LINENO: WARNING: could copy devicetree"
-	echo "Copying uenv/uEnv-$BOARD.txt to $TO/uEnv.txt ..."
-	dusudo cp uenv/uEnv-$BOARD.txt $TO/uEnv.txt ||
-		echo >&2 "$LINENO: WARNING: could not copy uEnv.txt"
+	if [[ $ARCH == arm64 ]]; then
+		echo "Copying $DIR/linux-xlnx/arch/arm64/boot/Image to $TO ..."
+		dusudo cp $DIR/linux-xlnx/arch/arm64/boot/Image $TO ||
+			echo >&2 "$LINENO: WARNING: could not copy Image"
+		echo "Copying $DIR/devicetree.dtb to $TO/system.dtb ..."
+		dusudo cp $DIR/devicetree.dtb $TO/system.dtb || echo >&2 "$LINENO: WARNING: could not copy devicetree"
+	else
+		echo "Copying $DIR/linux-xlnx/arch/arm/boot/uImage to $TO ..."
+		dusudo cp $DIR/linux-xlnx/arch/arm/boot/uImage $TO ||
+			echo >&2 "$LINENO: WARNING: could not copy uImage"
+		echo "Copying uenv/uEnv-$BOARD.txt to $TO/uEnv.txt ..."
+		dusudo cp uenv/uEnv-$BOARD.txt $TO/uEnv.txt ||
+			echo >&2 "$LINENO: WARNING: could not copy uEnv.txt"
+		echo "Copying $DIR/devicetree.dtb to $TO ..."
+		dusudo cp $DIR/devicetree.dtb $TO || echo >&2 "$LINENO: WARNING: could not copy devicetree"
+	fi
 	dusudo umount $TO
 	rmdir $TO 2> /dev/null &&
-	echo "Boot partition ready."
+		echo "Boot partition ready."
 }
 
-copy_files_to_root () {
+copy_files_to_root() {
+	case $ARCH in
+		"arm")
+			LOCAL_FILE=$ROOTFS_TAR_GZ
+			;;
+		"arm64")
+			LOCAL_FILE=$ROOTFS64_TAR_GZ
+			;;
+	esac
 	DEV=${1:-${SDCARD}2}
-	TO="$DIR/`basename $DEV`"
-	echo "dd'ing rootfs onto second partition $TO, this will take a while ..."
-	dusudo dd if=$ROOTFS_IMG of=$DEV bs=10M ||
-		return $(error_ret "$LINENO: could not copy $ROOTFS_IMG to $DEV")
-	dusudo resize2fs $DEV ||
-		return $(error_ret "$LINENO: could not resize $DEV")
+	TO="$DIR/$(basename $DEV)"
 	mkdir -p $TO || return $(error_ret "$LINENO: could not create $TO")
 	dusudo mount -onoacl $DEV $TO ||
 		return $(error_ret "$LINENO: could not mount $DEV -> $TO")
+	echo "Extracting rootfs"
+	dusudo sh -c "tar -xpf $LOCAL_FILE -C $TO" ||
+		echo >&2 "$LINENO: WARNING: could not extract rootfs"
 	echo "Setting hostname to $BOARD ... "
 	dusudo sh -c "echo $BOARD > $TO/etc/hostname" ||
 		echo >&2 "$LINENO: WARNING: could not set hostname"
-	echo "Updating /etc/hosts ..."
-	dusudo sh -c "sed -i "s/pynq/$BOARD/g" $TO/etc/hosts" ||
-		echo >&2 "$LINENO: WARNING: could not update /etc/hosts"
-	echo "Setting env vars ... "
-	dusudo sh -c "echo export LINUX_HOME=/linux-xlnx >> $TO/home/xilinx/.bashrc" ||
-		echo >&2 "$LINENO: WARNING: could not set env var LINUX_HOME"
-	dusudo sh -c "echo export TAPASCO_HOME=~/tapasco >> $TO/home/xilinx/.bashrc" ||
-		echo >&2 "$LINENO: WARNING: could not set env var TAPASCO_HOME"
-	dusudo sh -c "echo export PATH=\\\$PATH:\\\$TAPASCO_HOME/bin >> $TO/home/xilinx/.bashrc" ||
-		echo >&2 "$LINENO: WARNING: could not set env PATH."
-	echo "Replacing rc.local ... "
-	dusudo sh -c "cp --no-preserve=ownership $SCRIPTDIR/misc/rc.local $TO/etc/rc.local" ||
-		echo >&2 "$LINENO: WARNING: could not copy rc.local"
-	if [[ $IMGSIZE -gt 4096 ]]; then
-		echo "Copying linux tree to /linux-xlnx ..."
-		dusudo sh -c "cp -r --no-preserve=ownership,timestamps $DIR/linux-xlnx $TO/linux-xlnx" ||
-			echo >&2 "$LINENO: WARNING: could not copy linux-xlnx"
-	else
-		echo >&2 "$LINENO: WARNING: image size $IMGSIZE < 4096 MiB, not enough space to copy linux tree"
-	fi
-	echo "Copying udev rules ..."
-	dusudo sh -c "cat $UDEV_RULES | sed 's/OWNER\"tapasco\"/OWNER=\"xilinx\"/g' | sed 's/GROUP=\"tapasco\"/GROUP=\"xilinx\"/g' | sed 's/tapasco:tapasco/xilinx:xilinx/g' > $TO/etc/udev/rules.d/99-tapasco.rules" ||
-		echo >&2 "$LINENO: WARNING: could not write udev rules"
-	echo "Removing Jupyter stuff from home ..."
-	dusudo sh -c "find $TO/home/xilinx/* -maxdepth 0 | xargs rm -rf" ||
-		echo >&2 "$LINENO: WARNING: could not delete Jupyter stuff"
+	echo "Installing linux headers ..."
+	dusudo sh -c "cp -r $DIR/linux-xlnx $TO/usr/src/linux-headers-$(make -C $DIR/linux-xlnx kernelrelease -s)" ||
+		echo >&2 "$LINENO: WARNING: could not copy linux-xlnx"
+	echo "Preparing chroot environment"
+	dusudo sh -c "cp /usr/bin/qemu-arm-static $TO/usr/bin/"
+	dusudo sh -c "cp /usr/bin/qemu-aarch64-static $TO/usr/bin/"
+	dusudo sh -c "mount --bind /dev $TO/dev/"
+	dusudo sh -c "chroot $TO << EOF
+echo 'nameserver 8.8.8.8' > /etc/resolv.conf
+echo 'nameserver 1.1.1.1' >> /etc/resolv.conf
+apt-get update
+apt-get -y upgrade
+# runtime dependencies (without linux-headers)
+DEBIAN_FRONTEND=noninteractive apt-get install -y build-essential python cmake libelf-dev libncurses-dev git rpm
+# additional tools
+apt-get install -y vim-tiny sudo iproute2 ssh kmod ifupdown net-tools jitterentropy-rngd haveged
+systemctl enable ssh
+systemctl enable getty@ttyPS0.service
+useradd -G sudo -m -s /bin/bash tapasco
+echo 'root:root' | chpasswd
+echo 'tapasco:tapasco' | chpasswd
+echo 'set nocompatible' > /root/.vimrc
+echo 'set nocompatible' > /home/tapasco/.vimrc
+# setup network
+echo 'auto eth0' >> /etc/network/interfaces
+echo 'iface eth0 inet dhcp' >> /etc/network/interfaces
+
+# prepare header files
+cd /usr/src/linux-headers-*-tapasco/
+make scripts
+make modules_prepare
+make headers_install
+make modules_install
+make clean
+rm -rf source
+
+sudo -u tapasco git clone https://github.com/esa-tu-darmstadt/tapasco.git /home/tapasco/tapasco
+echo '' /etc/resolv.conf
+EOF"
+	dusudo rm $TO/usr/bin/qemu-*
+	dusudo cp $SCRIPTDIR/misc/resizefs $TO/home/tapasco/
+	dusudo umount $TO/dev
 	dusudo umount $TO
 	rmdir $TO 2> /dev/null &&
-	echo "RootFS partition ready."
+		echo "RootFS partition ready."
 }
 
 ################################################################################
 ################################################################################
+
+if [ -z ${CROSS_COMPILE+x} ]; then
+	if [[ $BOARD == ultra96v2 ]] || [[ $BOARD == zcu102 ]]; then
+		CROSS_COMPILE=aarch64-linux-gnu-
+		ARCH=arm64
+	else
+		CROSS_COMPILE=arm-linux-gnueabihf-
+		ARCH=arm
+	fi
+fi
+echo "Processor architecture is set to $ARCH. "
 echo "Cross compiler ABI is set to $CROSS_COMPILE."
 echo "Board is $BOARD."
 echo "Version is $VERSION."
 echo "SD card device is $SDCARD."
 echo "Image size: $IMGSIZE MiB"
-echo "OpenSSL dir: $OPENSSL"
 check_board
 check_compiler
-check_hsi
+check_xsct
 check_vivado
+check_tapasco
 check_image_tools
+check_chroot
 check_sdcard
 read -p "Enter sudo password: " -s SUDOPW
-[[ -n $SUDOPW ]] || error_exit "dusudo password may not be empty"
+[[ -n $SUDOPW ]] || error_exit "sudo password may not be empty"
 dusudo true || error_exit "sudo password seems to be wrong?"
 mkdir -p $LOGDIR 2> /dev/null
-mkdir -p `dirname $PYNQ_IMAGE` 2> /dev/null
-echo "And so it begins ..."
+printf "\nAnd so it begins ...\n"
 ################################################################################
-echo "Fetching Linux kernel, U-Boot sources, PyNQ default image and OpenSSL ..."
-mkdir -p `dirname $FETCH_PYNQ_IMG_LOG` &> /dev/null
+echo "Fetching Linux kernel, U-Boot sources, rootfs and additional tools ..."
 fetch_linux &> $FETCH_LINUX_LOG &
 FETCH_LINUX_OK=$!
 fetch_u-boot &> $FETCH_UBOOT_LOG &
 FETCH_UBOOT_OK=$!
-fetch_pynq_image &> $FETCH_PYNQ_IMG_LOG &
-FETCH_PYNQ_OK=$!
-fetch_openssl &> $FETCH_OPENSSL_LOG &
-FETCH_OPENSSL_OK=$!
+fetch_rootfs &> $FETCH_ROOTFS_LOG &
+FETCH_ARCH_LINUX_OK=$!
+if [[ $ARCH == arm64 ]]; then
+	fetch_arm_trusted_firmware &> $FETCH_ARM_TRUSTED_FIRMWARE_LOG &
+	FETCH_ARM_TRUSTED_FIRMWARE_OK=$!
+fi
 
-wait $FETCH_LINUX_OK   || error_exit "Fetching Linux failed, check log: $FETCH_LINUX_LOG"
-wait $FETCH_UBOOT_OK   || error_exit "Fetching U-Boot failed, check logs: $FETCH_UBOOT_LOG"
-wait $FETCH_PYNQ_OK    || error_exit "Fetching PyNQ failed, check log: $FETCH_PYNQ_IMG_LOG"
-wait $FETCH_OPENSSL_OK || error_exit "Fetching OpenSSL failed, check log: $FETCH_OPENSSL_LOG"
+wait $FETCH_LINUX_OK || error_exit "Fetching Linux failed, check log: $FETCH_LINUX_LOG"
+wait $FETCH_UBOOT_OK || error_exit "Fetching U-Boot failed, check logs: $FETCH_UBOOT_LOG"
+wait $FETCH_ARCH_LINUX_OK || error_exit "Fetching Arch Linux Rootfs failed, check log: $FETCH_ARCH_LINUX_LOG"
+if [[ $ARCH == arm64 ]]; then
+	wait $FETCH_ARM_TRUSTED_FIRMWARE_OK || error_exit "Fetching ARM Trusted Firmware failed, check log: $FETCH_ARM_TRUSTED_FIRMWARE_LOG"
+fi
 
 ################################################################################
 echo "Ok, got the sources, will build now ..."
@@ -591,51 +746,48 @@ build_u-boot &> $BUILD_UBOOT_LOG &
 BUILD_UBOOT_OK=$!
 wait $BUILD_LINUX_OK || error_exit "Building Linux failed, check log: $BUILD_LINUX_LOG"
 wait $BUILD_UBOOT_OK || error_exit "Building U-Boot failed, check log: $BUILD_UBOOT_LOG"
+
 ################################################################################
-if [[ $BOARD != "pynq" ]]; then
-	echo "Building U-Boot SSBL (output in $BUILD_SSBL_LOG) and uImage (output in $BUILD_UIMAGE_LOG) ..."
+if [[ $ARCH == arm64 ]]; then
+	echo "Building U-Boot SSBL (output in $BUILD_SSBL_LOG) and Arm Trusted Firmware (output in $BUILD_ARM_TRUSTED_FIRMWARE_LOG) ... "
+	build_arm_trusted_firmware &> $BUILD_ARM_TRUSTED_FIRMWARE_LOG &
+	BUILD_ARM_TRUSTED_FIRMWARE_OK=$!
+	wait $BUILD_ARM_TRUSTED_FIRMWARE || error_exit "Building Arm Trusted Firmware failed, check log: $ARM_TRUSTED_FIRMWARE_LOG"
 else
-	echo "Building uImage (output in $BUILD_UIMAGE_LOG) ..."
+	echo "Building U-Boot SSBL (output in $BUILD_SSBL_LOG) and uImage (output in $BUILD_UIMAGE_LOG) ..."
+	build_uimage &> $BUILD_UIMAGE_LOG &
+	BUILD_UIMAGE_OK=$!
+	wait $BUILD_UIMAGE_OK || error_exit "Building uImage failed, check log: $BUILD_UIMAGE_LOG"
 fi
-build_uimage &> $BUILD_UIMAGE_LOG &
-BUILD_UIMAGE_OK=$!
-if [[ $BOARD != "pynq" ]]; then build_ssbl &> $BUILD_SSBL_LOG; fi &
+
+build_ssbl &> $BUILD_SSBL_LOG &
 BUILD_SSBL_OK=$!
-wait $BUILD_UIMAGE_OK || error_exit "Building uImage failed, check log: $BUILD_UIMAGE_LOG"
 wait $BUILD_SSBL_OK || error_exit "Building U-Boot SSBL failed, check log: $BUILD_SSBL_LOG"
-################################################################################
-if [[ $BOARD != "pynq" ]]; then
-	echo "Build FSBL (output in $BUILD_FSBL_LOG) ..."
-	build_fsbl &> $BUILD_FSBL_LOG &
-	BUILD_FSBL_OK=$!
-	wait $BUILD_FSBL_OK || error_exit "Building FSBL failed, check log: $BUILD_FSBL_LOG"
 
-	echo "Building devicetree (output in $BUILD_DEVICETREE_LOG) and generating BOOT.BIN (output in $BUILD_BOOTBIN_LOG) ..."
-
-	build_bootbin &> $BUILD_BOOTBIN_LOG &
-	BUILD_BOOTBIN_OK=$!
-	build_devtree &> $BUILD_DEVICETREE_LOG &
-	BUILD_DEVICETREE_OK=$!
-	wait $BUILD_BOOTBIN_OK || error_exit "Building BOOT.BIN failed, check log: $BUILD_BOOTBIN_LOG"
-	echo "Done - find BOOT.BIN is here: $DIR/BOOT.BIN."
-	wait $BUILD_DEVICETREE_OK || error_exit "Building devicetree failed, check log: $BUILD_DEVICETREE_LOG"
+################################################################################
+echo "Build FSBL (output in $BUILD_FSBL_LOG) ..."
+build_fsbl &> $BUILD_FSBL_LOG &
+BUILD_FSBL_OK=$!
+wait $BUILD_FSBL_OK || error_exit "Building FSBL failed, check log: $BUILD_FSBL_LOG"
+
+if [[ $ARCH == arm64 ]]; then
+	echo "Building pmufw (output in $BUILD_PMUFW_LOG), devicetree (output in $BUILD_DEVICETREE_LOG) and generating BOOT.BIN (output in $BUILD_BOOTBIN_LOG) ..."
+	build_pmufw &> $BUILD_PMUFW_LOG &
+	BUILD_PMUFW_OK=$!
+	wait $BUILD_PMUFW_OK || error_exit "Building PMUFW failed, check log: $BUILD_PMUFW_LOG"
 else
-	echo "Extract FSBL and devicetree from $PYNQ_IMAGE (output in $EXTRACT_BL_LOG) ..."
-	extract_pynq_bl &> $EXTRACT_BL_LOG &
-	wait || error_exit "Extraction of FSBL and devicetree from $PYNQ_IMAGE failed, check log: $EXTRACT_BL_LOG"
-	if [[ ! -f $DIR/BOOT.BIN ]]; then
-		echo "Extracting FSBL failed, check log: $EXTRACT_BL_LOG"
-		exit 1
-	fi
-	if [[ ! -f $DIR/devicetree.dtb ]]; then
-		echo "Extracting devicetree.dtb failed, check log: $EXTRACT_BL_LOG"
-		exit 1
-	fi
+	echo "Building devicetree (output in $BUILD_DEVICETREE_LOG) and generating BOOT.BIN (output in $BUILD_BOOTBIN_LOG) ..."
 fi
-################################################################################
-echo "Extracting root FS (output in $EXTRACT_RFS_LOG) ..."
-extract_pynq_rootfs &> $EXTRACT_RFS_LOG
-[[ $? -eq 0 ]] || error_exit "Extracting root FS failed, check log: $EXTRACT_RFS_LOG"
+
+build_devtree &> $BUILD_DEVICETREE_LOG &
+BUILD_DEVICETREE_OK=$!
+
+build_bootbin &> $BUILD_BOOTBIN_LOG &
+BUILD_BOOTBIN_OK=$!
+
+wait $BUILD_DEVICETREE_OK || error_exit "Building devicetree failed, check log: $BUILD_DEVICETREE_LOG"
+wait $BUILD_BOOTBIN_OK || error_exit "Building BOOT.BIN failed, check log: $BUILD_BOOTBIN_LOG"
+echo "Done - find BOOT.BIN here: $DIR/BOOT.BIN."
 ################################################################################
 echo "Building image in $OUTPUT_IMAGE (output in $BUILD_OUTPUT_IMAGE_LOG) ..."
 build_output_image $IMGSIZE &> $BUILD_OUTPUT_IMAGE_LOG
@@ -650,5 +802,5 @@ if [[ -n $SDCARD ]]; then
 	prepare_sd &> $PREPARE_SD_LOG
 	[[ $? -eq 0 ]] || error_exit "Preparing SD card failed, check log: $PREPARE_SD_LOG"
 	sync &&
-	echo "SD card $SDCARD successfully prepared, ready to boot!"
+		echo "SD card $SDCARD successfully prepared, ready to boot!"
 fi
diff --git a/toolflow/boot/misc/rc.local b/toolflow/boot/misc/rc.local
deleted file mode 100755
index 0a010280..00000000
--- a/toolflow/boot/misc/rc.local
+++ /dev/null
@@ -1,24 +0,0 @@
-#!/bin/sh -e
-#
-# rc.local
-#
-# This script is executed at the end of each multiuser runlevel.
-# Make sure that the script will "exit 0" on success or any other
-# value on error.
-#
-# In order to enable or disable this script just change the execution
-# bits.
-#
-# By default this script does nothing.
-
-chown -R xilinx /linux-xlnx >/dev/null 2>&1
-chown xilinx /dev/xdevcfg >/dev/null 2>&1
-
-dhclient eth0
-ifconfig eth0:0 down
-# Force ntp update
-systemctl stop ntp
-ntpdate 0.ubuntu.pool.ntp.org 1.ubuntu.pool.ntp.org\
-        2.ubuntu.pool.ntp.org 3.ubuntu.pool.ntp.org
-systemctl start ntp
-exit 0
diff --git a/toolflow/boot/misc/resizefs b/toolflow/boot/misc/resizefs
new file mode 100755
index 00000000..40ce54d4
--- /dev/null
+++ b/toolflow/boot/misc/resizefs
@@ -0,0 +1,14 @@
+sudo fdisk /dev/mmcblk0 <<EOF
+p
+d
+
+n
+p
+
+
+
+n
+p
+w
+EOF
+sudo resize2fs /dev/mmcblk0p2
diff --git a/toolflow/boot/misc/tapasco_zynqmp.dtsi b/toolflow/boot/misc/tapasco_zynqmp.dtsi
new file mode 100644
index 00000000..7725e8c2
--- /dev/null
+++ b/toolflow/boot/misc/tapasco_zynqmp.dtsi
@@ -0,0 +1,20 @@
+/ {
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		reserved: buffer@0 {
+			compatible = "shared-dma-pool";
+			reusable;
+			reg = <0x0 0x60000000 0x0 0x20000000>;
+			linux,cma-default;
+		};
+	};
+
+	tapasco {
+		compatible = "tapasco";
+		interrupt-parent = <0x4>;
+		interrupts = <0x0 0x59 0x4 0x0 0x5a 0x4 0x0 0x5b 0x4 0x0 0x5c 0x4 0x0 0x5d 0x4 0x0 0x5e 0x4 0x0 0x5f 0x4 0x0 0x60 0x4 0x0 0x68 0x4 0x0 0x69 0x4 0x0 0x6a 0x4 0x0 0x6b 0x4 0x0 0x6c 0x4 0x0 0x6d 0x4 0x0 0x6e 0x4 0x0 0x6f 0x4>;
+	};
+};
diff --git a/toolflow/boot/pynq/devicetree.dts b/toolflow/boot/pynq/devicetree.dts
deleted file mode 100644
index 75253025..00000000
--- a/toolflow/boot/pynq/devicetree.dts
+++ /dev/null
@@ -1,444 +0,0 @@
-/dts-v1/;
-
-/ {
-	#address-cells = <0x1>;
-	#size-cells = <0x1>;
-	compatible = "xlnx,zynq-7000";
-
-	chosen {
-		bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=1 uio_pdrv_genirq.of_id=\"generic-uio\"";
-		linux,stdout-path = "/amba@0/serial@E0001000";
-	};
-
-	aliases {
-		ethernet0 = "/amba/ethernet@e000b000";
-		serial0 = "/amba/serial@e0000000";
-		spi0 = "/amba/spi@e000d000";
-	};
-
-	memory {
-		device_type = "memory";
-		reg = <0x0 0x20000000>;
-	};
-
-	cpus {
-		#address-cells = <0x1>;
-		#size-cells = <0x0>;
-
-		cpu@0 {
-			compatible = "arm,cortex-a9";
-			device_type = "cpu";
-			reg = <0x0>;
-			clocks = <0x1 0x3>;
-			clock-latency = <0x3e8>;
-			cpu0-supply = <0x2>;
-			operating-points = <0x9eb10 0xf4240 0x4f588 0xf4240>;
-		};
-
-		cpu@1 {
-			compatible = "arm,cortex-a9";
-			device_type = "cpu";
-			reg = <0x1>;
-			clocks = <0x1 0x3>;
-		};
-	};
-
-	pmu {
-		compatible = "arm,cortex-a9-pmu";
-		interrupts = <0x0 0x5 0x4 0x0 0x6 0x4>;
-		interrupt-parent = <0x3>;
-		reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
-	};
-
-	fixedregulator@0 {
-		compatible = "regulator-fixed";
-		regulator-name = "VCCPINT";
-		regulator-min-microvolt = <0xf4240>;
-		regulator-max-microvolt = <0xf4240>;
-		regulator-boot-on;
-		regulator-always-on;
-		linux,phandle = <0x2>;
-		phandle = <0x2>;
-	};
-
-	amba {
-		compatible = "simple-bus";
-		#address-cells = <0x1>;
-		#size-cells = <0x1>;
-		interrupt-parent = <0x3>;
-		ranges;
-
-		adc@f8007100 {
-			compatible = "xlnx,zynq-xadc-1.00.a";
-			reg = <0xf8007100 0x20>;
-			interrupts = <0x0 0x7 0x4>;
-			interrupt-parent = <0x3>;
-			clocks = <0x1 0xc>;
-		};
-
-		can@e0008000 {
-			compatible = "xlnx,zynq-can-1.0";
-			status = "disabled";
-			clocks = <0x1 0x13 0x1 0x24>;
-			clock-names = "can_clk", "pclk";
-			reg = <0xe0008000 0x1000>;
-			interrupts = <0x0 0x1c 0x4>;
-			interrupt-parent = <0x3>;
-			tx-fifo-depth = <0x40>;
-			rx-fifo-depth = <0x40>;
-		};
-
-		can@e0009000 {
-			compatible = "xlnx,zynq-can-1.0";
-			status = "disabled";
-			clocks = <0x1 0x14 0x1 0x25>;
-			clock-names = "can_clk", "pclk";
-			reg = <0xe0009000 0x1000>;
-			interrupts = <0x0 0x33 0x4>;
-			interrupt-parent = <0x3>;
-			tx-fifo-depth = <0x40>;
-			rx-fifo-depth = <0x40>;
-		};
-
-		i2c@e0004000 {
-			compatible = "cdns,i2c-r1p10";
-			status = "disabled";
-			clocks = <0x1 0x26>;
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x19 0x4>;
-			reg = <0xe0004000 0x1000>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		i2c@e0005000 {
-			compatible = "cdns,i2c-r1p10";
-			status = "disabled";
-			clocks = <0x1 0x27>;
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x30 0x4>;
-			reg = <0xe0005000 0x1000>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		interrupt-controller@f8f01000 {
-			compatible = "arm,cortex-a9-gic";
-			#interrupt-cells = <0x3>;
-			interrupt-controller;
-			reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
-			num_cpus = <0x2>;
-			num_interrupts = <0x60>;
-			linux,phandle = <0x3>;
-			phandle = <0x3>;
-		};
-
-		cache-controller@f8f02000 {
-			compatible = "arm,pl310-cache";
-			reg = <0xf8f02000 0x1000>;
-			interrupts = <0x0 0x2 0x4>;
-			arm,data-latency = <0x3 0x2 0x2>;
-			arm,tag-latency = <0x2 0x2 0x2>;
-			cache-unified;
-			cache-level = <0x2>;
-		};
-
-		memory-controller@f8006000 {
-			compatible = "xlnx,zynq-ddrc-a05";
-			reg = <0xf8006000 0x1000>;
-		};
-
-		ocmc@f800c000 {
-			compatible = "xlnx,zynq-ocmc-1.0";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x3 0x4>;
-			reg = <0xf800c000 0x1000>;
-		};
-
-		serial@e0000000 {
-			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
-			status = "okay";
-			clocks = <0x1 0x17 0x1 0x28>;
-			clock-names = "uart_clk", "pclk";
-			reg = <0xe0000000 0x1000>;
-			interrupts = <0x0 0x1b 0x4>;
-			device_type = "serial";
-			port-number = <0x0>;
-		};
-
-		serial@e0001000 {
-			compatible = "xlnx,xuartps", "cdns,uart-r1p8";
-			status = "disabled";
-			clocks = <0x1 0x18 0x1 0x29>;
-			clock-names = "uart_clk", "pclk";
-			reg = <0xe0001000 0x1000>;
-			interrupts = <0x0 0x32 0x4>;
-		};
-
-		spi@e0006000 {
-			compatible = "xlnx,zynq-spi-r1p6";
-			reg = <0xe0006000 0x1000>;
-			status = "disabled";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x1a 0x4>;
-			clocks = <0x1 0x19 0x1 0x22>;
-			clock-names = "ref_clk", "pclk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		spi@e0007000 {
-			compatible = "xlnx,zynq-spi-r1p6";
-			reg = <0xe0007000 0x1000>;
-			status = "disabled";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x31 0x4>;
-			clocks = <0x1 0x1a 0x1 0x23>;
-			clock-names = "ref_clk", "pclk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		spi@e000d000 {
-			clock-names = "ref_clk", "pclk";
-			clocks = <0x1 0xa 0x1 0x2b>;
-			compatible = "xlnx,zynq-qspi-1.0";
-			status = "okay";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x13 0x4>;
-			reg = <0xe000d000 0x1000>;
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-			is-dual = <0x0>;
-			num-cs = <0x1>;
-		};
-
-		memory-controller@e000e000 {
-			#address-cells = <0x1>;
-			#size-cells = <0x1>;
-			status = "disabled";
-			clock-names = "memclk", "aclk";
-			clocks = <0x1 0xb 0x1 0x2c>;
-			compatible = "arm,pl353-smc-r2p1";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x12 0x4>;
-			ranges;
-			reg = <0xe000e000 0x1000>;
-
-			flash@e1000000 {
-				status = "disabled";
-				compatible = "arm,pl353-nand-r2p1";
-				reg = <0xe1000000 0x1000000>;
-				#address-cells = <0x1>;
-				#size-cells = <0x1>;
-			};
-
-			flash@e2000000 {
-				status = "disabled";
-				compatible = "cfi-flash";
-				reg = <0xe2000000 0x2000000>;
-				#address-cells = <0x1>;
-				#size-cells = <0x1>;
-			};
-		};
-
-		ethernet@e000b000 {
-			compatible = "cdns,zynq-gem", "cdns,gem";
-			reg = <0xe000b000 0x1000>;
-			status = "okay";
-			interrupts = <0x0 0x16 0x4>;
-			clocks = <0x1 0x1e 0x1 0x1e 0x1 0xd>;
-			clock-names = "pclk", "hclk", "tx_clk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-			enet-reset = <0x4 0x9 0x0>;
-			local-mac-address = [00 0a 35 00 00 00];
-			phy-mode = "rgmii-id";
-			xlnx,ptp-enet-clock = <0x6750918>;
-		};
-
-		ethernet@e000c000 {
-			compatible = "cdns,zynq-gem", "cdns,gem";
-			reg = <0xe000c000 0x1000>;
-			status = "disabled";
-			interrupts = <0x0 0x2d 0x4>;
-			clocks = <0x1 0x1f 0x1 0x1f 0x1 0xe>;
-			clock-names = "pclk", "hclk", "tx_clk";
-			#address-cells = <0x1>;
-			#size-cells = <0x0>;
-		};
-
-		sdhci@e0100000 {
-			compatible = "arasan,sdhci-8.9a";
-			status = "okay";
-			clock-names = "clk_xin", "clk_ahb";
-			clocks = <0x1 0x15 0x1 0x20>;
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x18 0x4>;
-			reg = <0xe0100000 0x1000>;
-			broken-adma2;
-			xlnx,has-cd = <0x1>;
-			xlnx,has-power = <0x0>;
-			xlnx,has-wp = <0x0>;
-		};
-
-		sdhci@e0101000 {
-			compatible = "arasan,sdhci-8.9a";
-			status = "disabled";
-			clock-names = "clk_xin", "clk_ahb";
-			clocks = <0x1 0x16 0x1 0x21>;
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x2f 0x4>;
-			reg = <0xe0101000 0x1000>;
-			broken-adma2;
-		};
-
-		slcr@f8000000 {
-			#address-cells = <0x1>;
-			#size-cells = <0x1>;
-			compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
-			reg = <0xf8000000 0x1000>;
-			ranges;
-			linux,phandle = <0x5>;
-			phandle = <0x5>;
-
-			clkc@100 {
-				#clock-cells = <0x1>;
-				compatible = "xlnx,ps7-clkc";
-				fclk-enable = <0xf>;
-				clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", "lqspi", "smc", "pcap", "gem0", "gem1", "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", "swdt", "dbg_trc", "dbg_apb";
-				reg = <0x100 0x100>;
-				ps-clk-frequency = <0x2faf080>;
-				linux,phandle = <0x1>;
-				phandle = <0x1>;
-			};
-
-			rstc@200 {
-				compatible = "xlnx,zynq-reset";
-				reg = <0x200 0x48>;
-				#reset-cells = <0x1>;
-				syscon = <0x5>;
-			};
-
-			pinctrl@700 {
-				compatible = "xlnx,pinctrl-zynq";
-				reg = <0x700 0x200>;
-				syscon = <0x5>;
-			};
-		};
-
-		dmac@f8003000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0xf8003000 0x1000>;
-			interrupt-parent = <0x3>;
-			interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", "dma4", "dma5", "dma6", "dma7";
-			interrupts = <0x0 0xd 0x4 0x0 0xe 0x4 0x0 0xf 0x4 0x0 0x10 0x4 0x0 0x11 0x4 0x0 0x28 0x4 0x0 0x29 0x4 0x0 0x2a 0x4 0x0 0x2b 0x4>;
-			#dma-cells = <0x1>;
-			#dma-channels = <0x8>;
-			#dma-requests = <0x4>;
-			clocks = <0x1 0x1b>;
-			clock-names = "apb_pclk";
-		};
-
-		devcfg@f8007000 {
-			compatible = "xlnx,zynq-devcfg-1.0";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x8 0x4>;
-			reg = <0xf8007000 0x100>;
-			clocks = <0x1 0xc 0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x12>;
-			clock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
-			syscon = <0x5>;
-		};
-
-		efuse@f800d000 {
-			compatible = "xlnx,zynq-efuse";
-			reg = <0xf800d000 0x20>;
-		};
-
-		timer@f8f00200 {
-			compatible = "arm,cortex-a9-global-timer";
-			reg = <0xf8f00200 0x20>;
-			interrupts = <0x1 0xb 0x301>;
-			interrupt-parent = <0x3>;
-			clocks = <0x1 0x4>;
-		};
-
-		timer@f8001000 {
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0xa 0x4 0x0 0xb 0x4 0x0 0xc 0x4>;
-			compatible = "cdns,ttc";
-			clocks = <0x1 0x6>;
-			reg = <0xf8001000 0x1000>;
-		};
-
-		timer@f8002000 {
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x25 0x4 0x0 0x26 0x4 0x0 0x27 0x4>;
-			compatible = "cdns,ttc";
-			clocks = <0x1 0x6>;
-			reg = <0xf8002000 0x1000>;
-		};
-
-		timer@f8f00600 {
-			interrupt-parent = <0x3>;
-			interrupts = <0x1 0xd 0x301>;
-			compatible = "arm,cortex-a9-twd-timer";
-			reg = <0xf8f00600 0x20>;
-			clocks = <0x1 0x4>;
-		};
-
-		usb@e0002000 {
-			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
-			status = "okay";
-			clocks = <0x1 0x1c>;
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x15 0x4>;
-			reg = <0xe0002000 0x1000>;
-			phy_type = "ulpi";
-			dr_mode = "host";
-			usb-reset = <0x4 0x2e 0x0>;
-			usb-phy = <0x6>;
-		};
-
-		usb@e0003000 {
-			compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
-			status = "disabled";
-			clocks = <0x1 0x1d>;
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x2c 0x4>;
-			reg = <0xe0003000 0x1000>;
-			phy_type = "ulpi";
-		};
-
-		watchdog@f8005000 {
-			clocks = <0x1 0x2d>;
-			compatible = "cdns,wdt-r1p2";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x9 0x1>;
-			reg = <0xf8005000 0x1000>;
-			timeout-sec = <0xa>;
-		};
-
-		tapasco {
-			compatible = "tapasco";
-			interrupt-parent = <0x3>;
-			interrupts = <0x0 0x1d 0x4>, <0x0 0x1e 0x4>, <0x0 0x1f 0x4>, <0x0 0x20 0x4>, <0x0 0x21 0x4>, <0x0 0x22 0x4>, <0x0 0x23 0x4>, <0x0 0x24 0x4>, <0x0 0x34 0x4>, <0x0 0x35 0x4>, <0x0 0x36 0x4>, <0x0 0x37 0x4>, <0x0 0x38 0x4>, <0x0 0x39 0x4>, <0x0 0x3A 0x4>, <0x0 0x3B 0x4>;
-		};
-	};
-
-	xlnk {
-		compatible = "xlnx,xlnk-1.0";
-		clock-names = "xclk0", "xclk1", "xclk2", "xclk3";
-		clocks = <0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x12>;
-	};
-
-	phy0 {
-		compatible = "ulpi-phy";
-		#phy-cells = <0x0>;
-		reg = <0xe0002000 0x1000>;
-		view-port = <0x170>;
-		drv-vbus;
-		linux,phandle = <0x6>;
-		phandle = <0x6>;
-	};
-};
diff --git a/toolflow/boot/uenv/uEnv-pynq.txt b/toolflow/boot/uenv/uEnv-pynq.txt
new file mode 100644
index 00000000..943194b0
--- /dev/null
+++ b/toolflow/boot/uenv/uEnv-pynq.txt
@@ -0,0 +1,6 @@
+bootargs=console=ttyPS0,115200 root=/dev/mmcblk0p2 rootwait rw earlyprintk
+kernel_load_address=0x3000000
+kernel_image=uImage
+devicetree_load_address=0x2A00000
+devicetree_image=devicetree.dtb
+sdboot=if mmcinfo; then load mmc 0 ${kernel_load_address} ${kernel_image} && load mmc 0 ${devicetree_load_address} ${devicetree_image} && bootm ${kernel_load_address} - ${devicetree_load_address}; fi
diff --git a/toolflow/examples/MemoryBenchmark.zip b/toolflow/examples/MemoryBenchmark.zip
new file mode 100644
index 00000000..4efc40df
Binary files /dev/null and b/toolflow/examples/MemoryBenchmark.zip differ
diff --git a/toolflow/examples/kernel-examples/latency/LatencyCheck.zip b/toolflow/examples/kernel-examples/latency/LatencyCheck.zip
new file mode 100644
index 00000000..be6b294e
Binary files /dev/null and b/toolflow/examples/kernel-examples/latency/LatencyCheck.zip differ
diff --git a/toolflow/os-package/tapasco-init-toolflow.sh b/toolflow/os-package/tapasco-init-toolflow.sh
index 99753749..5cc0d251 100755
--- a/toolflow/os-package/tapasco-init-toolflow.sh
+++ b/toolflow/os-package/tapasco-init-toolflow.sh
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo 
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 if [ -f "tapasco-setup-toolflow.sh" ]; then
     echo "tapasco-setup-toolflow.sh already exists."
 else
diff --git a/toolflow/scala/build.gradle b/toolflow/scala/build.gradle
index ee827d1a..e657b923 100644
--- a/toolflow/scala/build.gradle
+++ b/toolflow/scala/build.gradle
@@ -1,3 +1,25 @@
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
 import com.netflix.gradle.plugins.deb.control.MultiArch
 
 /*
@@ -13,7 +35,7 @@ plugins {
     id 'scala'
     id 'application'
     // Netflix provided plug-in for OS packaging
-    id "nebula.ospackage" version "7.6.3"
+    id "nebula.ospackage" version "8.3.0"
 }
 
 repositories {
@@ -49,8 +71,8 @@ application {
 
 ospackage {
     packageName = "tapasco"
-    version = "2019"
-    release = "10"
+    version = "2020"
+    release = "04"
     license = "GNU Lesser General Public License v3.0"
     vendor = "Embedded Systems and Applications Group, TU Darmstadt"
     url = "https://github.com/esa-tu-darmstadt/tapasco"
diff --git a/toolflow/scala/gradle/wrapper/gradle-wrapper.jar b/toolflow/scala/gradle/wrapper/gradle-wrapper.jar
index 87b738cb..5c2d1cf0 100644
Binary files a/toolflow/scala/gradle/wrapper/gradle-wrapper.jar and b/toolflow/scala/gradle/wrapper/gradle-wrapper.jar differ
diff --git a/toolflow/scala/gradle/wrapper/gradle-wrapper.properties b/toolflow/scala/gradle/wrapper/gradle-wrapper.properties
index 5028f28f..a4b44297 100644
--- a/toolflow/scala/gradle/wrapper/gradle-wrapper.properties
+++ b/toolflow/scala/gradle/wrapper/gradle-wrapper.properties
@@ -1,5 +1,5 @@
 distributionBase=GRADLE_USER_HOME
 distributionPath=wrapper/dists
-distributionUrl=https\://services.gradle.org/distributions/gradle-5.6.4-bin.zip
+distributionUrl=https\://services.gradle.org/distributions/gradle-6.3-bin.zip
 zipStoreBase=GRADLE_USER_HOME
 zipStorePath=wrapper/dists
diff --git a/toolflow/scala/gradlew b/toolflow/scala/gradlew
index af6708ff..83f2acfd 100755
--- a/toolflow/scala/gradlew
+++ b/toolflow/scala/gradlew
@@ -1,5 +1,21 @@
 #!/usr/bin/env sh
 
+#
+# Copyright 2015 the original author or authors.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
 ##############################################################################
 ##
 ##  Gradle start up script for UN*X
@@ -28,7 +44,7 @@ APP_NAME="Gradle"
 APP_BASE_NAME=`basename "$0"`
 
 # Add default JVM options here. You can also use JAVA_OPTS and GRADLE_OPTS to pass JVM options to this script.
-DEFAULT_JVM_OPTS='"-Xmx64m"'
+DEFAULT_JVM_OPTS='"-Xmx64m" "-Xms64m"'
 
 # Use the maximum available, or set MAX_FD != -1 to use that value.
 MAX_FD="maximum"
@@ -109,8 +125,8 @@ if $darwin; then
     GRADLE_OPTS="$GRADLE_OPTS \"-Xdock:name=$APP_NAME\" \"-Xdock:icon=$APP_HOME/media/gradle.icns\""
 fi
 
-# For Cygwin, switch paths to Windows format before running java
-if $cygwin ; then
+# For Cygwin or MSYS, switch paths to Windows format before running java
+if [ "$cygwin" = "true" -o "$msys" = "true" ] ; then
     APP_HOME=`cygpath --path --mixed "$APP_HOME"`
     CLASSPATH=`cygpath --path --mixed "$CLASSPATH"`
     JAVACMD=`cygpath --unix "$JAVACMD"`
diff --git a/toolflow/scala/gradlew.bat b/toolflow/scala/gradlew.bat
index 0f8d5937..24467a14 100644
--- a/toolflow/scala/gradlew.bat
+++ b/toolflow/scala/gradlew.bat
@@ -1,3 +1,19 @@
+@rem
+@rem Copyright 2015 the original author or authors.
+@rem
+@rem Licensed under the Apache License, Version 2.0 (the "License");
+@rem you may not use this file except in compliance with the License.
+@rem You may obtain a copy of the License at
+@rem
+@rem      https://www.apache.org/licenses/LICENSE-2.0
+@rem
+@rem Unless required by applicable law or agreed to in writing, software
+@rem distributed under the License is distributed on an "AS IS" BASIS,
+@rem WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+@rem See the License for the specific language governing permissions and
+@rem limitations under the License.
+@rem
+
 @if "%DEBUG%" == "" @echo off
 @rem ##########################################################################
 @rem
@@ -14,7 +30,7 @@ set APP_BASE_NAME=%~n0
 set APP_HOME=%DIRNAME%
 
 @rem Add default JVM options here. You can also use JAVA_OPTS and GRADLE_OPTS to pass JVM options to this script.
-set DEFAULT_JVM_OPTS="-Xmx64m"
+set DEFAULT_JVM_OPTS="-Xmx64m" "-Xms64m"
 
 @rem Find java.exe
 if defined JAVA_HOME goto findJavaFromJavaHome
diff --git a/toolflow/scala/scalastyle-config.xml b/toolflow/scala/scalastyle-config.xml
index b79e6a03..cc49d82d 100644
--- a/toolflow/scala/scalastyle-config.xml
+++ b/toolflow/scala/scalastyle-config.xml
@@ -1,3 +1,25 @@
+<!--
+  ~
+  ~ Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+  ~
+  ~ This file is part of TaPaSCo
+  ~ (see https://github.com/esa-tu-darmstadt/tapasco).
+  ~
+  ~ This program is free software: you can redistribute it and/or modify
+  ~ it under the terms of the GNU Lesser General Public License as published by
+  ~ the Free Software Foundation, either version 3 of the License, or
+  ~ (at your option) any later version.
+  ~
+  ~ This program is distributed in the hope that it will be useful,
+  ~ but WITHOUT ANY WARRANTY; without even the implied warranty of
+  ~ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  ~ GNU Lesser General Public License for more details.
+  ~
+  ~ You should have received a copy of the GNU Lesser General Public License
+  ~ along with this program. If not, see <http://www.gnu.org/licenses/>.
+  ~
+  -->
+
 <scalastyle>
     <name>Scalastyle standard configuration</name>
     <check level="warning" class="org.scalastyle.file.FileTabChecker" enabled="true"></check>
diff --git a/toolflow/scala/settings.gradle b/toolflow/scala/settings.gradle
index ea0c1869..4295a5ec 100644
--- a/toolflow/scala/settings.gradle
+++ b/toolflow/scala/settings.gradle
@@ -1,3 +1,25 @@
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
 /*
  * This file was generated by the Gradle 'init' task.
  *
diff --git a/toolflow/scala/src/main/resources/logback-test.xml b/toolflow/scala/src/main/resources/logback-test.xml
index d251a2a5..91bcd555 100644
--- a/toolflow/scala/src/main/resources/logback-test.xml
+++ b/toolflow/scala/src/main/resources/logback-test.xml
@@ -1,3 +1,25 @@
+<!--
+  ~
+  ~ Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+  ~
+  ~ This file is part of TaPaSCo
+  ~ (see https://github.com/esa-tu-darmstadt/tapasco).
+  ~
+  ~ This program is free software: you can redistribute it and/or modify
+  ~ it under the terms of the GNU Lesser General Public License as published by
+  ~ the Free Software Foundation, either version 3 of the License, or
+  ~ (at your option) any later version.
+  ~
+  ~ This program is distributed in the hope that it will be useful,
+  ~ but WITHOUT ANY WARRANTY; without even the implied warranty of
+  ~ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  ~ GNU Lesser General Public License for more details.
+  ~
+  ~ You should have received a copy of the GNU Lesser General Public License
+  ~ along with this program. If not, see <http://www.gnu.org/licenses/>.
+  ~
+  -->
+
 <configuration debug="false">
     <appender name="STDOUT" class="ch.qos.logback.core.ConsoleAppender">
         <withJansi>true</withJansi>
diff --git a/toolflow/scala/src/main/scala/tapasco/Common.scala b/toolflow/scala/src/main/scala/tapasco/Common.scala
index a7f7b5af..184e3e2f 100644
--- a/toolflow/scala/src/main/scala/tapasco/Common.scala
+++ b/toolflow/scala/src/main/scala/tapasco/Common.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Common.scala
   * @brief Common classes and tools for the GenerateX classes.
diff --git a/toolflow/scala/src/main/scala/tapasco/Implicits.scala b/toolflow/scala/src/main/scala/tapasco/Implicits.scala
index 2f960688..a807939e 100644
--- a/toolflow/scala/src/main/scala/tapasco/Implicits.scala
+++ b/toolflow/scala/src/main/scala/tapasco/Implicits.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 object Implicits {
diff --git a/toolflow/scala/src/main/scala/tapasco/Logging.scala b/toolflow/scala/src/main/scala/tapasco/Logging.scala
index c4fea3d4..5513577c 100644
--- a/toolflow/scala/src/main/scala/tapasco/Logging.scala
+++ b/toolflow/scala/src/main/scala/tapasco/Logging.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 import org.slf4j.LoggerFactory
diff --git a/toolflow/scala/src/main/scala/tapasco/Tapasco.scala b/toolflow/scala/src/main/scala/tapasco/Tapasco.scala
index 2654b4d5..29c57ce5 100644
--- a/toolflow/scala/src/main/scala/tapasco/Tapasco.scala
+++ b/toolflow/scala/src/main/scala/tapasco/Tapasco.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 import java.nio.file.Path
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/CoreStatistics.scala b/toolflow/scala/src/main/scala/tapasco/activity/CoreStatistics.scala
index 7caac66b..1280b189 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/CoreStatistics.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/CoreStatistics.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity
 
 import tapasco.base._
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/EvaluateIP.scala b/toolflow/scala/src/main/scala/tapasco/activity/EvaluateIP.scala
index 9c958a43..20016c15 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/EvaluateIP.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/EvaluateIP.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file EvaluateIP.scala
   * @brief Contains the code for the out-of-context synthesis activity.
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/Import.scala b/toolflow/scala/src/main/scala/tapasco/activity/Import.scala
index c8c1f687..e605e1dc 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/Import.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/Import.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Import.scala
   * @brief The Import activity import an IP-XACT IP core in a .zip file
@@ -135,7 +138,7 @@ object Import {
     * @param synthOptions Optional arguments for synth_design.
     * @param cfg          Implicit [[Configuration]].
     **/
-  private def evaluateCore(c: Core, t: Target, optimization: Int, synthOptions: Option[String] = None)
+  def evaluateCore(c: Core, t: Target, optimization: Int, synthOptions: Option[String] = None)
                           (implicit cfg: Configuration): Boolean = {
     logger.trace("looking for SynthesisReport ...")
     val period = 1.0
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposeResult.scala b/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposeResult.scala
index 00e64094..07694888 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposeResult.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposeResult.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity.composers
 
 /** Possible result kinds of composition runs. */
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/composers/Composer.scala b/toolflow/scala/src/main/scala/tapasco/activity/composers/Composer.scala
index b5b8e91d..1f8283fd 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/composers/Composer.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/composers/Composer.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2016 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Composer.scala
   * @brief Abstract trait for synthesis tool wrappers that perform the actual
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposerLog.scala b/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposerLog.scala
index f141897f..d2c693f8 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposerLog.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/composers/ComposerLog.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2016 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file ComposerLog.scala
   * @brief Model for Composer tool logfiles.
@@ -44,7 +47,7 @@ class ComposerLog(val file: Path) {
     _ match { case (line, idx) => !RE_WARNING.findFirstIn(line).isEmpty }).toSeq
 
   /** Interprets the warnings and errors to generate a result value. */
-  def result: ComposeResult = if (errors.isEmpty) {
+  def result(failed : Boolean = false): ComposeResult = if (errors.isEmpty && !failed) {
     if ((warnings map (line => RE_TIMING.findFirstIn(line._1).isEmpty) fold true) (_ && _)) {
       Success
     } else {
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/composers/VivadoComposer.scala b/toolflow/scala/src/main/scala/tapasco/activity/composers/VivadoComposer.scala
index 9c606900..00423ebe 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/composers/VivadoComposer.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/composers/VivadoComposer.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2016 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file VivadoComposer.scala
   * @brief Composer implementation for Vivado Design Suite.
@@ -80,6 +83,9 @@ class VivadoComposer()(implicit cfg: Configuration) extends Composer {
     val pt = new ProgressTrackingFileWatcher(Some(logger))
     pt += files.logFile
 
+    // Delete outdated timing report to make sure we detect failure correctly.
+    files.timFile.toFile.delete
+
     // Vivado shell command
     val vivadoCmd = Seq("vivado", "-mode", "batch", "-source", files.tclFile.toString,
       "-notrace", "-nojournal", "-log", files.logFile.toString)
@@ -107,7 +113,7 @@ class VivadoComposer()(implicit cfg: Configuration) extends Composer {
       else{
         logger.error("Vivado finished with non-zero exit code: %d for %s in '%s'"
           .format(r, files.runName, files.outdir))
-        Composer.Result(files.log map (_.result) getOrElse OtherError, log = files.log,
+        Composer.Result(files.log map (_.result(true)) getOrElse OtherError, log = files.log,
           util = None, timing = None)
       }
     } else {
@@ -162,7 +168,7 @@ class VivadoComposer()(implicit cfg: Configuration) extends Composer {
         .format(files.runName, wns, files.tim.map(_.maxDelayPath), files.outdir))
       TimingFailure
     } else {
-      logger.info("Vivado finished successfully for %s, WNS: %1.3f, bitstream file is here: '%s'"
+      logger.info("Vivado finished successfully for %s, WNS: %1.3f, resulting file is here: '%s'"
         .format(files.runName, wns, files.bitFile))
       Success
     }
@@ -254,7 +260,7 @@ object VivadoComposer {
     lazy val outdir: Path = cfg.outputDir(c, t, f, fs)
     lazy val logFile: Path = outdir.resolve("%s.log".format(Composer.mkProjectName(c, t, f)))
     lazy val tclFile: Path = outdir.resolve("%s.tcl".format(t.pd.name))
-    lazy val bitFile: Path = logFile.resolveSibling("%s.bit".format(Composer.mkProjectName(c, t, f)))
+    lazy val bitFile: Path = logFile.resolveSibling("%s.%s".format(Composer.mkProjectName(c, t, f), t.pd.fileExtension))
     lazy val runName: String = "%s with %s[F=%1.3f]".format(logformat(c), t, f)
     lazy val timFile: Path = logFile.resolveSibling("timing.txt")
     lazy val utilFile: Path = logFile.resolveSibling("utilization.txt")
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/composers/json/package.scala b/toolflow/scala/src/main/scala/tapasco/activity/composers/json/package.scala
index ba23dfbc..51e1bd35 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/composers/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/composers/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity.composers
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/composers/package.scala b/toolflow/scala/src/main/scala/tapasco/activity/composers/package.scala
index faec2e9a..858e312d 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/composers/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/composers/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity
 
 /** Composers subpackage: Contains Composer activities.
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizer.scala b/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizer.scala
index 466bc7ea..61d96dcf 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizer.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizer.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity.hls
 
 import java.nio.file.Path
@@ -126,5 +129,8 @@ object HighLevelSynthesizer {
   /** HLS run that failed due to another kind of error. */
   final case class OtherError(log: HighLevelSynthesizerLog, e: Exception) extends Result
 
+  /** HLS failed to produce a valid .zip-Archive as Result. */
+  final case class MissingZip(log: HighLevelSynthesizerLog) extends Result
+
 }
 
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizerLog.scala b/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizerLog.scala
index 5d532017..3e327aae 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizerLog.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/hls/HighLevelSynthesizerLog.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity.hls
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/hls/VivadoHighLevelSynthesis.scala b/toolflow/scala/src/main/scala/tapasco/activity/hls/VivadoHighLevelSynthesis.scala
index 447d95ec..440e16c2 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/hls/VivadoHighLevelSynthesis.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/hls/VivadoHighLevelSynthesis.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity.hls
 
 import java.io.FileWriter
@@ -77,11 +80,18 @@ private object VivadoHighLevelSynthesis extends HighLevelSynthesizer {
       logger.debug("Vivado HLS finished with exit code %d".format(vivadoRet))
       vivadoRet match {
         case 0 =>
-          logger.info("Vivado HLS finished successfully for {}", runName)
-          logger.trace("performing additional steps for {}", runName)
-          performAdditionalSteps(k, t)
-          logger.trace("additional steps for {} finished, copying zip", runName)
-          Success(HighLevelSynthesizerLog(logfile), copyZip(k, t).get)
+          val cp = copyZip(k, t)
+          if(cp.isEmpty) {
+            logger.error("Vivado HLS failed for run: {}", runName)
+            logger.info("Check Log-File for error: {}", logfile.toAbsolutePath.toString)
+            MissingZip(HighLevelSynthesizerLog(logfile))
+          } else {
+            logger.info("Vivado HLS finished successfully for {}", runName)
+            logger.trace("performing additional steps for {}", runName)
+            performAdditionalSteps(k, t)
+            logger.trace("additional steps for {} finished, copying zip", runName)
+            Success(HighLevelSynthesizerLog(logfile), copyZip(k, t).get)
+          }
         case InterruptibleProcess.TIMEOUT_RETCODE =>
           logger.error("Vivado HLS timeout for " + runName)
           Timeout(HighLevelSynthesizerLog(logfile))
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/hls/json/package.scala b/toolflow/scala/src/main/scala/tapasco/activity/hls/json/package.scala
index 2fa3cac3..ff4ececf 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/hls/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/hls/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity.hls
 
 import play.api.libs.json._
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/hls/package.scala b/toolflow/scala/src/main/scala/tapasco/activity/hls/package.scala
index cee4fb63..3e424060 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/hls/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/hls/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.activity
 
 /** Subpackage hls contains all high-level synthesis activities.
diff --git a/toolflow/scala/src/main/scala/tapasco/activity/package.scala b/toolflow/scala/src/main/scala/tapasco/activity/package.scala
index 4d2131c1..e9922837 100644
--- a/toolflow/scala/src/main/scala/tapasco/activity/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/activity/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 /**
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Architecture.scala b/toolflow/scala/src/main/scala/tapasco/base/Architecture.scala
index d661e033..468e3b42 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Architecture.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Architecture.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Architecture.scala
   * @brief Model: TPC Architecture.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Benchmark.scala b/toolflow/scala/src/main/scala/tapasco/base/Benchmark.scala
index 893bb284..e4c05ac9 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Benchmark.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Benchmark.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Benchmark.scala
   * @brief Model: TPC IP Benchmark.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Composition.scala b/toolflow/scala/src/main/scala/tapasco/base/Composition.scala
index 4c017262..8a2c4639 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Composition.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Composition.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Composition.scala
   * @brief Model: TPC Composition.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Configuration.scala b/toolflow/scala/src/main/scala/tapasco/base/Configuration.scala
index 59252daf..9be0f208 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Configuration.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Configuration.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Configuration.scala
   * @brief Model: TPC Configuration.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/ConfigurationImpl.scala b/toolflow/scala/src/main/scala/tapasco/base/ConfigurationImpl.scala
index 5cc8abd9..78139ae7 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/ConfigurationImpl.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/ConfigurationImpl.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file ConfigurationImpl.scala
   * @brief Model: TPC Configuration.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Core.scala b/toolflow/scala/src/main/scala/tapasco/base/Core.scala
index 26a37675..d190fccc 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Core.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Core.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Core.scala
   * @brief Model: TPC IP Core.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Description.scala b/toolflow/scala/src/main/scala/tapasco/base/Description.scala
index 4e467ddc..78260048 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Description.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Description.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Description.scala
   * @brief Abstract base class for configuration files in TPC.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Feature.scala b/toolflow/scala/src/main/scala/tapasco/base/Feature.scala
index 706bc339..95f9704c 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Feature.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Feature.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//props
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Feature.scala
   * @brief TPC Architecture / Platform features.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Kernel.scala b/toolflow/scala/src/main/scala/tapasco/base/Kernel.scala
index b6f0936d..7a27558f 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Kernel.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Kernel.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Kernel.scala
   * @brief Model: TPC Kernel.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Platform.scala b/toolflow/scala/src/main/scala/tapasco/base/Platform.scala
index 407fe7ff..bb6f15d9 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Platform.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Platform.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Platform.scala
   * @brief Model: TPC Platform.
@@ -45,12 +48,14 @@ case class Platform(
                      private val _benchmark: Option[Path],
                      hostFrequency: Option[Double],
                      memFrequency: Option[Double],
-                     implTimeout : Option[Int]
+                     implTimeout : Option[Int],
+                     private val _fileFormat : Option[String]
                    ) extends Description(descPath) {
   val tclLibrary: Path = resolve(_tclLibrary)
   val benchmark: Option[Benchmark] = _benchmark flatMap (p => Benchmark.from(resolve(p)).toOption)
   val slotCount: Int = _slotCount getOrElse Platform.DEFAULT_SLOTCOUNT
   val supportedFrequencies : Seq[Int] = _supportedFrequencies.getOrElse(50 to maxFrequency by 5)
+  val fileExtension : String = _fileFormat.getOrElse("bit")
   require(mustExist(tclLibrary), "Tcl library %s does not exist".format(tclLibrary.toString))
 }
 
diff --git a/toolflow/scala/src/main/scala/tapasco/base/PrettyPrinter.scala b/toolflow/scala/src/main/scala/tapasco/base/PrettyPrinter.scala
index 6937cbe9..260c0de7 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/PrettyPrinter.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/PrettyPrinter.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file PrettyPrinter.scala
   * @brief Implements pretty printing for Description subclasses.
diff --git a/toolflow/scala/src/main/scala/tapasco/base/Target.scala b/toolflow/scala/src/main/scala/tapasco/base/Target.scala
index cdb12ac8..ccfa53ba 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/Target.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/Target.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.base
 
 import tapasco.filemgmt.FileAssetManager
diff --git a/toolflow/scala/src/main/scala/tapasco/base/builder/Builds.scala b/toolflow/scala/src/main/scala/tapasco/base/builder/Builds.scala
index 57b55c51..c5c271a3 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/builder/Builds.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/builder/Builds.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.base.builder
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/base/json/package.scala b/toolflow/scala/src/main/scala/tapasco/base/json/package.scala
index 675b33b6..7ec1fdb6 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.base
 
 import java.nio.file._
@@ -361,7 +364,8 @@ package object json {
       (JsPath \ "Benchmark").readNullable[Path] ~
       (JsPath \ "HostFrequency").readNullable[Double] ~
       (JsPath \ "MemFrequency").readNullable[Double] ~
-      (JsPath \ "ImplementationTimeout").readNullable[Int]
+      (JsPath \ "ImplementationTimeout").readNullable[Int] ~
+      (JsPath \ "FileExtension").readNullable[String]
     ) (Platform.apply _)
 
   // scalastyle:on magic.number
@@ -381,7 +385,8 @@ package object json {
       (JsPath \ "Benchmark").writeNullable[Path] ~
       (JsPath \ "HostFrequency").writeNullable[Double] ~
       (JsPath \ "MemFrequency").writeNullable[Double] ~
-      (JsPath \ "ImplementationTimeout").writeNullable[Int]
+      (JsPath \ "ImplementationTimeout").writeNullable[Int] ~
+      (JsPath \ "FileExtension").writeNullable[String]
     ) (unlift(Platform.unapply _))
 
   /* Platform @} */
diff --git a/toolflow/scala/src/main/scala/tapasco/base/package.scala b/toolflow/scala/src/main/scala/tapasco/base/package.scala
index 1397b354..af391b42 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 import tapasco.base._
diff --git a/toolflow/scala/src/main/scala/tapasco/base/tcl/FeatureTclPrinter.scala b/toolflow/scala/src/main/scala/tapasco/base/tcl/FeatureTclPrinter.scala
index 171ea038..c4520ff5 100644
--- a/toolflow/scala/src/main/scala/tapasco/base/tcl/FeatureTclPrinter.scala
+++ b/toolflow/scala/src/main/scala/tapasco/base/tcl/FeatureTclPrinter.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file FeatureTclPrinter.scala
   * @brief Generates Tcl commands to add feature to a Tcl dict.
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/Alternatives.scala b/toolflow/scala/src/main/scala/tapasco/dse/Alternatives.scala
index 783271c9..8c55bb17 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/Alternatives.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/Alternatives.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Alternatives.scala
   * @brief One dimension for design space exploration are variants or alternatives of
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/Batch.scala b/toolflow/scala/src/main/scala/tapasco/dse/Batch.scala
index ae407584..cd9a7533 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/Batch.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/Batch.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse
 
 import java.util.concurrent.CountDownLatch
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/DesignSpace.scala b/toolflow/scala/src/main/scala/tapasco/dse/DesignSpace.scala
index 97b541fd..dcb4ba5b 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/DesignSpace.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/DesignSpace.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file DesignSpace.scala
   * @brief    The DesignSpace class models the discrete design space for TPC hardware
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/Exploration.scala b/toolflow/scala/src/main/scala/tapasco/dse/Exploration.scala
index bc9ebc61..5db52cde 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/Exploration.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/Exploration.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/Heuristics.scala b/toolflow/scala/src/main/scala/tapasco/dse/Heuristics.scala
index 92a074e4..882326d1 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/Heuristics.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/Heuristics.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Heuristics.scala
   * @brief Heuristic functions for the automated design space exploration.
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/Run.scala b/toolflow/scala/src/main/scala/tapasco/dse/Run.scala
index 4294d807..f282270b 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/Run.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/Run.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse
 
 import java.util.concurrent.CountDownLatch
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/Startable.scala b/toolflow/scala/src/main/scala/tapasco/dse/Startable.scala
index 065b7da3..51632fe2 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/Startable.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/Startable.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse
 
 import java.util.concurrent.CountDownLatch
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/json/package.scala b/toolflow/scala/src/main/scala/tapasco/dse/json/package.scala
index a287bd01..4933cfa4 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse
 
 import java.nio.file.Path
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/log/ExplorationLog.scala b/toolflow/scala/src/main/scala/tapasco/dse/log/ExplorationLog.scala
index 9d63d2cc..6b91b90d 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/log/ExplorationLog.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/log/ExplorationLog.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse.log
 
 import java.time.LocalDateTime
diff --git a/toolflow/scala/src/main/scala/tapasco/dse/log/json/package.scala b/toolflow/scala/src/main/scala/tapasco/dse/log/json/package.scala
index f2c2c282..14cc5aa6 100644
--- a/toolflow/scala/src/main/scala/tapasco/dse/log/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/dse/log/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.dse.log
 
 import java.time.LocalDateTime
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePath.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePath.scala
index a7df17ec..4137497a 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePath.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePath.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file.{Files, Path}
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePathManager.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePathManager.scala
index 51ca8551..a0ee3434 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePathManager.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/BasePathManager.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file.{Path, Paths}
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/Change.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/Change.scala
index 5c703992..ef2f34c7 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/Change.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/Change.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 /** Change type represents changes in files. **/
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/DirectoryWatcher.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/DirectoryWatcher.scala
index 6c92e528..a10dbdf6 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/DirectoryWatcher.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/DirectoryWatcher.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file.StandardWatchEventKinds._
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/Entity.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/Entity.scala
index 7399adf8..5930d81f 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/Entity.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/Entity.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 /**
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityCache.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityCache.scala
index 2f14c427..442011a5 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityCache.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityCache.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityManager.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityManager.scala
index e1b80770..b5d252a3 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityManager.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/EntityManager.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/FileAssetManager.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/FileAssetManager.scala
index b524a930..f4c914f4 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/FileAssetManager.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/FileAssetManager.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file.{Path, Paths}
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/LogTrackingFileWatcher.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/LogTrackingFileWatcher.scala
index fa5eae0a..aeaa63d4 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/LogTrackingFileWatcher.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/LogTrackingFileWatcher.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file.Paths
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/MultiFileWatcher.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/MultiFileWatcher.scala
index 3fe66be3..1f1dde80 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/MultiFileWatcher.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/MultiFileWatcher.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.io.{BufferedReader, FileReader}
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/ProgressTrackingFileWatcher.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/ProgressTrackingFileWatcher.scala
index fed00af0..aa6cfc21 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/ProgressTrackingFileWatcher.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/ProgressTrackingFileWatcher.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2019 ESA, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import tapasco.Logging._
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/ReportManager.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/ReportManager.scala
index c263c714..83442549 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/ReportManager.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/ReportManager.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.filemgmt
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/filemgmt/package.scala b/toolflow/scala/src/main/scala/tapasco/filemgmt/package.scala
index 0696b6bb..59df8938 100644
--- a/toolflow/scala/src/main/scala/tapasco/filemgmt/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/filemgmt/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 /**
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/JobExamples.scala b/toolflow/scala/src/main/scala/tapasco/jobs/JobExamples.scala
index 6067098b..4fe90e5d 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/JobExamples.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/JobExamples.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.jobs
 
 import java.io.FileWriter
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/Jobs.scala b/toolflow/scala/src/main/scala/tapasco/jobs/Jobs.scala
index 3b61d5f0..8e2a915c 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/Jobs.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/Jobs.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.jobs
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/BulkImport.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/BulkImport.scala
index 7614961c..91ee6e99 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/BulkImport.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/BulkImport.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file BulkImport.scala
   * @brief Task to bulk-import IP cores given in a comma-separated values file.
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/Command.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/Command.scala
index 1c2bd28a..b1d35a4f 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/Command.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/Command.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.jobs.executors
 
 import tapasco.base._
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/Compose.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/Compose.scala
index c218b076..0453d618 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/Compose.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/Compose.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Compose.scala
   * @brief Threadpool composition task.
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/CoreStatistics.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/CoreStatistics.scala
index 64760ab1..8019f0bb 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/CoreStatistics.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/CoreStatistics.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file CoreStatistics.scala
   * @brief Command to scan the cores directory and produce spreadsheets for each
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/DesignSpaceExploration.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/DesignSpaceExploration.scala
index 4ee43ea5..9e003e95 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/DesignSpaceExploration.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/DesignSpaceExploration.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file DesignSpaceExploration.scala
   * @brief DesignSpaceExploration executor.
@@ -26,12 +29,14 @@ package tapasco.jobs.executors
 import java.util.concurrent.Semaphore
 
 import play.api.libs.json._
+import tapasco.activity
 import tapasco.base._
 import tapasco.dse._
 import tapasco.filemgmt._
 import tapasco.jobs._
 import tapasco.jobs.json._
 import tapasco.task._
+import tapasco.util.AreaUtilization
 
 private object DesignSpaceExploration extends Executor[DesignSpaceExplorationJob] {
   private implicit val logger = tapasco.Logging.logger(getClass)
@@ -76,24 +81,49 @@ private object DesignSpaceExploration extends Executor[DesignSpaceExplorationJob
     val hls_ok = (hls_results fold true) (_ && _)
 
     if (hls_ok) {
-      val tasks = for {
-        a <- job.architectures.toSeq.sortBy(_.name)
-        p <- job.platforms.toSeq.sortBy(_.name)
-        target = Target(a, p)
-      } yield mkExplorationTask(job, target, _ => signal.release())
-
-      tasks foreach {
-        tsk.apply _
-      }
 
-      0 until tasks.length foreach { i =>
-        signal.acquire()
-        logger.debug("DSE task #{} collected", i)
+      // Check if an area estimate from OOC synthesis is present for all cores.
+      val notEvaluated = for {
+        k <- kernels
+        t <- job.targets
+        if AreaUtilization(t, FileAssetManager.entities.core(k, t).get).isEmpty
+      } yield (FileAssetManager.entities.core(k, t).get, t)
+
+      if (notEvaluated.nonEmpty) {
+        logger.info("need to evaluate the following cores first: {}",
+          notEvaluated map { case (c, t) => "%s @ %s".format(c.name, t) } mkString ", ")
       }
 
-      logger.info("all DSE tasks have finished")
+      // Evaluate cores that did not have a OOC synthesis report.
+      val evaluationResults = notEvaluated.map{case (c, t) => activity.Import.evaluateCore(c, t, 1)}
+
+      val evaluation_ok = evaluationResults.forall(r => r)
+
+      if(evaluation_ok){
+
+        val tasks = for {
+          a <- job.architectures.toSeq.sortBy(_.name)
+          p <- job.platforms.toSeq.sortBy(_.name)
+          target = Target(a, p)
+        } yield mkExplorationTask(job, target, _ => signal.release())
+
+        tasks foreach {
+          tsk.apply _
+        }
+
+        0 until tasks.length foreach { i =>
+          signal.acquire()
+          logger.debug("DSE task #{} collected", i)
+        }
+
+        logger.info("all DSE tasks have finished")
+
+        (tasks map (_.result) fold true) (_ && _)
+      } else {
+        logger.error("Evaluation tasks failed, aborting design-space exploration")
+        false
+      }
 
-      (tasks map (_.result) fold true) (_ && _)
     } else {
       logger.error("HLS tasks failed, aborting composition")
       false
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/HighLevelSynthesis.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/HighLevelSynthesis.scala
index e394a985..80fbe765 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/HighLevelSynthesis.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/HighLevelSynthesis.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.jobs.executors
 
 import java.util.concurrent.Semaphore
@@ -89,6 +92,6 @@ protected object HighLevelSynthesis extends Executor[HighLevelSynthesisJob] {
     }
 
     // success, if all tasks were successful
-    ((tasks ++ importTasks) map (_.result) fold false) (_ || _)
+    ((tasks ++ importTasks) map (_.result) fold true) (_ && _)
   }
 }
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/Import.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/Import.scala
index dcb66bff..f6e514a4 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/Import.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/Import.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Import.scala
   * @brief Task to add an existing IP core to the TPC catalog. Will perform
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/executors/package.scala b/toolflow/scala/src/main/scala/tapasco/jobs/executors/package.scala
index 2e66c061..cafe42c6 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/executors/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/executors/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.jobs
 
 import tapasco.Logging.Logger
diff --git a/toolflow/scala/src/main/scala/tapasco/jobs/json/package.scala b/toolflow/scala/src/main/scala/tapasco/jobs/json/package.scala
index 9ec811b4..775355a8 100644
--- a/toolflow/scala/src/main/scala/tapasco/jobs/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/jobs/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.jobs
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/json/JsonErrors.scala b/toolflow/scala/src/main/scala/tapasco/json/JsonErrors.scala
index adaa223a..d792ffd0 100644
--- a/toolflow/scala/src/main/scala/tapasco/json/JsonErrors.scala
+++ b/toolflow/scala/src/main/scala/tapasco/json/JsonErrors.scala
@@ -1,3 +1,25 @@
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
 package tapasco.json
 
 object JsonErrors {
diff --git a/toolflow/scala/src/main/scala/tapasco/json/package.scala b/toolflow/scala/src/main/scala/tapasco/json/package.scala
index 06727007..843a2bc3 100644
--- a/toolflow/scala/src/main/scala/tapasco/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/package.scala b/toolflow/scala/src/main/scala/tapasco/package.scala
index a044e0da..825696be 100644
--- a/toolflow/scala/src/main/scala/tapasco/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /** Tapasco is an automated tool flow for generating
   * threadpool architectures on FPGAs.
   *
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/BasicParsers.scala b/toolflow/scala/src/main/scala/tapasco/parser/BasicParsers.scala
index 10d2a4df..03dad61e 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/BasicParsers.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/BasicParsers.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/BulkImportParser.scala b/toolflow/scala/src/main/scala/tapasco/parser/BulkImportParser.scala
index d0a6e718..a337a6a1 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/BulkImportParser.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/BulkImportParser.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/CommandLineParser.scala b/toolflow/scala/src/main/scala/tapasco/parser/CommandLineParser.scala
index c7a1d5d3..0dd7ad43 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/CommandLineParser.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/CommandLineParser.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/CommonArgParsers.scala b/toolflow/scala/src/main/scala/tapasco/parser/CommonArgParsers.scala
index a43a3cba..5f955609 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/CommonArgParsers.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/CommonArgParsers.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/ComposeParser.scala b/toolflow/scala/src/main/scala/tapasco/parser/ComposeParser.scala
index 66e0ff1c..f1ff13d1 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/ComposeParser.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/ComposeParser.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/CoreStatisticsParser.scala b/toolflow/scala/src/main/scala/tapasco/parser/CoreStatisticsParser.scala
index d617e9ef..552a0391 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/CoreStatisticsParser.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/CoreStatisticsParser.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/DesignSpaceExploration.scala b/toolflow/scala/src/main/scala/tapasco/parser/DesignSpaceExploration.scala
index aa23ad3e..02f7826d 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/DesignSpaceExploration.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/DesignSpaceExploration.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import java.nio.file.Path
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/FeatureParsers.scala b/toolflow/scala/src/main/scala/tapasco/parser/FeatureParsers.scala
index 9175f88d..216b8862 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/FeatureParsers.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/FeatureParsers.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/FormatObject.scala b/toolflow/scala/src/main/scala/tapasco/parser/FormatObject.scala
index c04f6b90..007f44d3 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/FormatObject.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/FormatObject.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import tapasco.parser.FormatObject._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/Formatter.scala b/toolflow/scala/src/main/scala/tapasco/parser/Formatter.scala
index eaeb13e2..c9de71f6 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/Formatter.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/Formatter.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import scala.util.Properties.{lineSeparator => NL}
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/GlobalOptions.scala b/toolflow/scala/src/main/scala/tapasco/parser/GlobalOptions.scala
index 420b2741..97b7318f 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/GlobalOptions.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/GlobalOptions.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/HighLevelSynthesisParser.scala b/toolflow/scala/src/main/scala/tapasco/parser/HighLevelSynthesisParser.scala
index 8635279d..b0cca0e5 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/HighLevelSynthesisParser.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/HighLevelSynthesisParser.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/ImportParser.scala b/toolflow/scala/src/main/scala/tapasco/parser/ImportParser.scala
index 00b898d3..e89830d2 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/ImportParser.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/ImportParser.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import java.nio.file.Path
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/JobParsers.scala b/toolflow/scala/src/main/scala/tapasco/parser/JobParsers.scala
index a1f618c8..09b33212 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/JobParsers.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/JobParsers.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/ManSection.scala b/toolflow/scala/src/main/scala/tapasco/parser/ManSection.scala
index a8d92fc9..f1162b9d 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/ManSection.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/ManSection.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import scala.language.implicitConversions
diff --git a/toolflow/scala/src/main/scala/tapasco/parser/Usage.scala b/toolflow/scala/src/main/scala/tapasco/parser/Usage.scala
index 78b99641..924bcbc6 100644
--- a/toolflow/scala/src/main/scala/tapasco/parser/Usage.scala
+++ b/toolflow/scala/src/main/scala/tapasco/parser/Usage.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import tapasco.PLATFORM_NUM_SLOTS
diff --git a/toolflow/scala/src/main/scala/tapasco/reports/CoSimReport.scala b/toolflow/scala/src/main/scala/tapasco/reports/CoSimReport.scala
index 39e4de71..5ba82fad 100644
--- a/toolflow/scala/src/main/scala/tapasco/reports/CoSimReport.scala
+++ b/toolflow/scala/src/main/scala/tapasco/reports/CoSimReport.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file CoSimReport.scala
   * @brief Model for parsing and evaluating co-simulation reports in Vivado HLS format.
diff --git a/toolflow/scala/src/main/scala/tapasco/reports/PortReport.scala b/toolflow/scala/src/main/scala/tapasco/reports/PortReport.scala
index 4b95d44a..20da103d 100644
--- a/toolflow/scala/src/main/scala/tapasco/reports/PortReport.scala
+++ b/toolflow/scala/src/main/scala/tapasco/reports/PortReport.scala
@@ -1,3 +1,25 @@
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
 package tapasco.reports
 
 import java.nio.file.Path
diff --git a/toolflow/scala/src/main/scala/tapasco/reports/Report.scala b/toolflow/scala/src/main/scala/tapasco/reports/Report.scala
index cb7a7fce..44f3aba3 100644
--- a/toolflow/scala/src/main/scala/tapasco/reports/Report.scala
+++ b/toolflow/scala/src/main/scala/tapasco/reports/Report.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Report.scala
   * @brief Base class for diverse report files.
diff --git a/toolflow/scala/src/main/scala/tapasco/reports/SynthesisReport.scala b/toolflow/scala/src/main/scala/tapasco/reports/SynthesisReport.scala
index fac1d333..595ded29 100644
--- a/toolflow/scala/src/main/scala/tapasco/reports/SynthesisReport.scala
+++ b/toolflow/scala/src/main/scala/tapasco/reports/SynthesisReport.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file SynthesisReport.scala
   * @brief Model for parsing and evaluating synthesis reports in XML format
diff --git a/toolflow/scala/src/main/scala/tapasco/reports/TimingReport.scala b/toolflow/scala/src/main/scala/tapasco/reports/TimingReport.scala
index 8c8ce2ff..6483d308 100644
--- a/toolflow/scala/src/main/scala/tapasco/reports/TimingReport.scala
+++ b/toolflow/scala/src/main/scala/tapasco/reports/TimingReport.scala
@@ -1,20 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-// // Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file TimingReport.scala
   * @brief Model for parsing and evaluating timing reports in Vivado format.
diff --git a/toolflow/scala/src/main/scala/tapasco/reports/UtilizationReport.scala b/toolflow/scala/src/main/scala/tapasco/reports/UtilizationReport.scala
index 8302cdee..4486ff0e 100644
--- a/toolflow/scala/src/main/scala/tapasco/reports/UtilizationReport.scala
+++ b/toolflow/scala/src/main/scala/tapasco/reports/UtilizationReport.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file UtilizationReport.scala
   * @brief Model for parsing and evaluating utilization reports in Vivado format.
diff --git a/toolflow/scala/src/main/scala/tapasco/slurm/Slurm.scala b/toolflow/scala/src/main/scala/tapasco/slurm/Slurm.scala
index 597f8b53..afd0049d 100644
--- a/toolflow/scala/src/main/scala/tapasco/slurm/Slurm.scala
+++ b/toolflow/scala/src/main/scala/tapasco/slurm/Slurm.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.slurm
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/task/ComposeTask.scala b/toolflow/scala/src/main/scala/tapasco/task/ComposeTask.scala
index ba4cc82c..055b46ad 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/ComposeTask.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/ComposeTask.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 import java.nio.file._
@@ -81,7 +84,7 @@ class ComposeTask(composition: Composition,
     }
 
     _logger.trace("_composerResult = {}", _composerResult: Any)
-    _logger.info(("compose run %s@%2.3f MHz for %s finished, result: %s, bitstream file: '%s', " +
+    _logger.info(("compose run %s@%2.3f MHz for %s finished, result: %s, produced file: '%s', " +
       "logfile: '%s', utilization report: '%s', timing report: '%s'").format(
       composition: Any,
       designFrequency,
diff --git a/toolflow/scala/src/main/scala/tapasco/task/CoreStatisticsTask.scala b/toolflow/scala/src/main/scala/tapasco/task/CoreStatisticsTask.scala
index 500a1692..c95fdac7 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/CoreStatisticsTask.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/CoreStatisticsTask.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file CoreStatisticsTask.scala
   * @brief Task to compute a spreadsheet of evaluation results of all
diff --git a/toolflow/scala/src/main/scala/tapasco/task/DesignSpaceExplorationTask.scala b/toolflow/scala/src/main/scala/tapasco/task/DesignSpaceExplorationTask.scala
index ab5ea1fa..7d356bfd 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/DesignSpaceExplorationTask.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/DesignSpaceExplorationTask.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 import java.nio.file.Paths
@@ -60,10 +63,12 @@ private class DesignSpaceExplorationTask(
   private[this] val _bp = basePath map (p => Paths.get(p).toAbsolutePath) getOrElse {
     val shortDate = java.time.format.DateTimeFormatter.ISO_LOCAL_DATE_TIME.format(java.time.LocalDateTime.now())
     val dsepath = FileAssetManager.TAPASCO_WORK_DIR.resolve(
-      "DSE_%s-%s-%s_%s".format(target.ad.name, target.pd.name, composition.toString, shortDate)
+      "DSE_%s-%s-%s-%s".format(target.ad.name, target.pd.name, composition.toString, shortDate)
         .replace(" ", "_")
         .replace("/", "-")
         .replace(":", "-")
+        .replace("[", "")
+        .replace("]", "")
     ).normalize()
     java.nio.file.Files.createDirectories(dsepath.resolve("bd"))
     dsepath
diff --git a/toolflow/scala/src/main/scala/tapasco/task/HighLevelSynthesisTask.scala b/toolflow/scala/src/main/scala/tapasco/task/HighLevelSynthesisTask.scala
index b0308877..99edeb23 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/HighLevelSynthesisTask.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/HighLevelSynthesisTask.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 import java.nio.file._
diff --git a/toolflow/scala/src/main/scala/tapasco/task/ImportTask.scala b/toolflow/scala/src/main/scala/tapasco/task/ImportTask.scala
index ffc7fc2e..7fad1c8d 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/ImportTask.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/ImportTask.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file ImportTask.scala
   * @brief Task to import an existing IP-XACT core to TPC. Performs
diff --git a/toolflow/scala/src/main/scala/tapasco/task/LogTracking.scala b/toolflow/scala/src/main/scala/tapasco/task/LogTracking.scala
index 42a53977..95f38c26 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/LogTracking.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/LogTracking.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 /** LogTracking instances maintain a list of relevant logfile paths. */
diff --git a/toolflow/scala/src/main/scala/tapasco/task/ResourceConsumer.scala b/toolflow/scala/src/main/scala/tapasco/task/ResourceConsumer.scala
index 5e6e05bb..d3e60957 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/ResourceConsumer.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/ResourceConsumer.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 import tapasco.slurm._
diff --git a/toolflow/scala/src/main/scala/tapasco/task/ResourceMonitor.scala b/toolflow/scala/src/main/scala/tapasco/task/ResourceMonitor.scala
index 7bba6114..add1e12b 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/ResourceMonitor.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/ResourceMonitor.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 import tapasco.slurm._
diff --git a/toolflow/scala/src/main/scala/tapasco/task/Tasks.scala b/toolflow/scala/src/main/scala/tapasco/task/Tasks.scala
index 745de7ef..7222d0f9 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/Tasks.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/Tasks.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.task
 
 import java.time.LocalDateTime
diff --git a/toolflow/scala/src/main/scala/tapasco/task/package.scala b/toolflow/scala/src/main/scala/tapasco/task/package.scala
index 46249f9a..5246aab9 100644
--- a/toolflow/scala/src/main/scala/tapasco/task/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/task/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 
 package tapasco
 
diff --git a/toolflow/scala/src/main/scala/tapasco/util/AreaEstimate.scala b/toolflow/scala/src/main/scala/tapasco/util/AreaEstimate.scala
index f86109a8..2b2ec29d 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/AreaEstimate.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/AreaEstimate.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file AreaEstimate.scala
   * @brief Model of FPGA area estimate.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/AreaUtilization.scala b/toolflow/scala/src/main/scala/tapasco/util/AreaUtilization.scala
index 4e9c847c..c131941d 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/AreaUtilization.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/AreaUtilization.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file AreaUtilization.scala
   * @brief Helper object for computing area utilization estimations.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/FlexLicenceManagerStatus.scala b/toolflow/scala/src/main/scala/tapasco/util/FlexLicenceManagerStatus.scala
index 4a69e528..90892b82 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/FlexLicenceManagerStatus.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/FlexLicenceManagerStatus.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.util
 
 import scala.sys.process._
diff --git a/toolflow/scala/src/main/scala/tapasco/util/FrequencyLimit.scala b/toolflow/scala/src/main/scala/tapasco/util/FrequencyLimit.scala
index b3e90ab5..15a777a5 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/FrequencyLimit.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/FrequencyLimit.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.util
 
 import tapasco.base._
diff --git a/toolflow/scala/src/main/scala/tapasco/util/InterruptibleProcess.scala b/toolflow/scala/src/main/scala/tapasco/util/InterruptibleProcess.scala
index 00d4bb4a..c95d439b 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/InterruptibleProcess.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/InterruptibleProcess.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.util
 
 import scala.collection.mutable.ArrayBuffer
diff --git a/toolflow/scala/src/main/scala/tapasco/util/LinearInterpolator.scala b/toolflow/scala/src/main/scala/tapasco/util/LinearInterpolator.scala
index 27a90915..4c7d62c3 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/LinearInterpolator.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/LinearInterpolator.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file LinearInterpolator.scala
   * @brief Generic linear interpolation between abstract values.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/LogFileTracker.scala b/toolflow/scala/src/main/scala/tapasco/util/LogFileTracker.scala
index a433bc7e..13d0522c 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/LogFileTracker.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/LogFileTracker.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.util
 
 /**
diff --git a/toolflow/scala/src/main/scala/tapasco/util/LogFormatter.scala b/toolflow/scala/src/main/scala/tapasco/util/LogFormatter.scala
index 2c31a81b..9fbb0dfc 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/LogFormatter.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/LogFormatter.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2016 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file LogFormatter.scala
   * @brief Formats TPC objects for log output.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/MemInfo.scala b/toolflow/scala/src/main/scala/tapasco/util/MemInfo.scala
index e5005e3e..b56cde8e 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/MemInfo.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/MemInfo.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2016 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file MemInfo.scala
   * @brief Wrapper for /proc/meminfo; retrieve info about memory configuration.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/Memoization.scala b/toolflow/scala/src/main/scala/tapasco/util/Memoization.scala
index 843609bb..f8d65cd7 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/Memoization.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/Memoization.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.util
 
 import java.util.WeakHashMap
diff --git a/toolflow/scala/src/main/scala/tapasco/util/PublisherListener.scala b/toolflow/scala/src/main/scala/tapasco/util/PublisherListener.scala
index 3f4f9c3f..e4adc596 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/PublisherListener.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/PublisherListener.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.util
 
 import scala.collection.mutable.ArrayBuffer
diff --git a/toolflow/scala/src/main/scala/tapasco/util/SequenceMatcher.scala b/toolflow/scala/src/main/scala/tapasco/util/SequenceMatcher.scala
index c21d552d..19cb619f 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/SequenceMatcher.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/SequenceMatcher.scala
@@ -1,20 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-// // Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file SequenceMatcher.scala
   * @brief Multi-line stateful regex matcher for text file parsing.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/Template.scala b/toolflow/scala/src/main/scala/tapasco/util/Template.scala
index 84e13627..812473f0 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/Template.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/Template.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file Template.scala
   * @brief Class for needle templating.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/TimingEstimate.scala b/toolflow/scala/src/main/scala/tapasco/util/TimingEstimate.scala
index 120723af..002d95dc 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/TimingEstimate.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/TimingEstimate.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file TimingEstimate.scala
   * @brief Model of FPGA timing estimate.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/VLNV.scala b/toolflow/scala/src/main/scala/tapasco/util/VLNV.scala
index c079057f..26ff2f1b 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/VLNV.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/VLNV.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file VLNV.scala
   * @brief Model for Version-Library-Vendor-Version string identifier.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/ZipUtils.scala b/toolflow/scala/src/main/scala/tapasco/util/ZipUtils.scala
index 16d74a91..11844cac 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/ZipUtils.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/ZipUtils.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file ZipUtils.scala
   * @brief Helper functions to work with .zip files.
diff --git a/toolflow/scala/src/main/scala/tapasco/util/json/package.scala b/toolflow/scala/src/main/scala/tapasco/util/json/package.scala
index 3f2c2936..64285582 100644
--- a/toolflow/scala/src/main/scala/tapasco/util/json/package.scala
+++ b/toolflow/scala/src/main/scala/tapasco/util/json/package.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file json.scala
   * @brief Package containing Json Reads/Writes/Formats for Json SerDes.
diff --git a/toolflow/scala/src/test/scala/tapasco/TaPaSCoSpec.scala b/toolflow/scala/src/test/scala/tapasco/TaPaSCoSpec.scala
index 1e789d6d..6fa15545 100644
--- a/toolflow/scala/src/test/scala/tapasco/TaPaSCoSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/TaPaSCoSpec.scala
@@ -1,3 +1,25 @@
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
 package tapasco
 
 import java.nio.file.{Path, Paths}
diff --git a/toolflow/scala/src/test/scala/tapasco/base/ArchitectureTest.scala b/toolflow/scala/src/test/scala/tapasco/base/ArchitectureTest.scala
index 733a3c13..db55d80b 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/ArchitectureTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/ArchitectureTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file ArchitectureTest.scala
   * @brief Unit tests for Architecture description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/BenchmarkTest.scala b/toolflow/scala/src/test/scala/tapasco/base/BenchmarkTest.scala
index 2da1e6f4..2fcfa394 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/BenchmarkTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/BenchmarkTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file BenchmarkTest.scala
   * @brief Unit tests for Benchmark description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/CompositionTest.scala b/toolflow/scala/src/test/scala/tapasco/base/CompositionTest.scala
index 5bd25608..d6e185aa 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/CompositionTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/CompositionTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file CompositionTest.scala
   * @brief Unit tests for Composition description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/ConfigurationTest.scala b/toolflow/scala/src/test/scala/tapasco/base/ConfigurationTest.scala
index 0b2e211b..1e3bd56d 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/ConfigurationTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/ConfigurationTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file ConfigurationTest.scala
   * @brief Unit tests for Configuration description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/CoreTest.scala b/toolflow/scala/src/test/scala/tapasco/base/CoreTest.scala
index ab8dd864..bed0c209 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/CoreTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/CoreTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file CoreTest.scala
   * @brief Unit tests for Core description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/FeatureTest.scala b/toolflow/scala/src/test/scala/tapasco/base/FeatureTest.scala
index 26d55592..eedac2d1 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/FeatureTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/FeatureTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file FeatureTest.scala
   * @brief Unit tests for Features.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/KernelTest.scala b/toolflow/scala/src/test/scala/tapasco/base/KernelTest.scala
index 6f00b9df..450b419c 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/KernelTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/KernelTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file KernelTest.scala
   * @brief Unit tests for Kernel description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/base/PlatformTest.scala b/toolflow/scala/src/test/scala/tapasco/base/PlatformTest.scala
index be6ff205..721af397 100644
--- a/toolflow/scala/src/test/scala/tapasco/base/PlatformTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/base/PlatformTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file PlatformTest.scala
   * @brief Unit tests for Platform description file.
diff --git a/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathManagerTest.scala b/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathManagerTest.scala
index d8f74d23..fb72ed22 100644
--- a/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathManagerTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathManagerTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file BasePathManagerTest.scala
   * @brief Unit tests for BasePathManager.
diff --git a/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathTest.scala b/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathTest.scala
index f4e5579b..92319089 100644
--- a/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/filemgmt/BasePathTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file BasePathTest.scala
   * @brief Unit tests for BasePath.
diff --git a/toolflow/scala/src/test/scala/tapasco/filemgmt/DirectoryWatcherTest.scala b/toolflow/scala/src/test/scala/tapasco/filemgmt/DirectoryWatcherTest.scala
index 2c6e3fac..da6803b1 100644
--- a/toolflow/scala/src/test/scala/tapasco/filemgmt/DirectoryWatcherTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/filemgmt/DirectoryWatcherTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file DirectoryWatcherTest.scala
   * @brief Unit tests for DirectoryWatcher.
diff --git a/toolflow/scala/src/test/scala/tapasco/filemgmt/FileAssetManagerTest.scala b/toolflow/scala/src/test/scala/tapasco/filemgmt/FileAssetManagerTest.scala
index 451acb9a..d7792238 100644
--- a/toolflow/scala/src/test/scala/tapasco/filemgmt/FileAssetManagerTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/filemgmt/FileAssetManagerTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file EntityManagerTest.scala
   * @brief Unit tests for EntityManager.
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/BasicParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/BasicParserSpec.scala
index 53fd786f..1ac7a5e3 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/BasicParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/BasicParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/BulkImportParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/BulkImportParserSpec.scala
index 6885f8b5..980b032a 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/BulkImportParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/BulkImportParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/Common.scala b/toolflow/scala/src/test/scala/tapasco/parser/Common.scala
index be202036..8164eea2 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/Common.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/Common.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/CommonArgParsersSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/CommonArgParsersSpec.scala
index e8ea1704..246f4b97 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/CommonArgParsersSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/CommonArgParsersSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/ComposeParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/ComposeParserSpec.scala
index af0dffe7..64e52845 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/ComposeParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/ComposeParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/CoreStatisticsParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/CoreStatisticsParserSpec.scala
index e9294810..2b91d414 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/CoreStatisticsParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/CoreStatisticsParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/DesignSpaceExplorationParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/DesignSpaceExplorationParserSpec.scala
index 8aa16325..42ac5179 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/DesignSpaceExplorationParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/DesignSpaceExplorationParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/FeatureParsersSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/FeatureParsersSpec.scala
index a9d82ca6..da0e1e17 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/FeatureParsersSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/FeatureParsersSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/GlobalOptionsSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/GlobalOptionsSpec.scala
index 60c12b11..bb104d8d 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/GlobalOptionsSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/GlobalOptionsSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import java.nio.file._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/HighLevelSynthesisParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/HighLevelSynthesisParserSpec.scala
index f2498d54..52d100aa 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/HighLevelSynthesisParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/HighLevelSynthesisParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/ImportParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/ImportParserSpec.scala
index 601922a7..507570dd 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/ImportParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/ImportParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/JobParsersSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/JobParsersSpec.scala
index 58f082fb..557404e1 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/JobParsersSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/JobParsersSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 package tapasco.parser
 
 import fastparse.all._
diff --git a/toolflow/scala/src/test/scala/tapasco/parser/ParserSpec.scala b/toolflow/scala/src/test/scala/tapasco/parser/ParserSpec.scala
index 05c5f323..85913958 100644
--- a/toolflow/scala/src/test/scala/tapasco/parser/ParserSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/parser/ParserSpec.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 
 package tapasco.parser
 
diff --git a/toolflow/scala/src/test/scala/tapasco/reports/CoSimReportTest.scala b/toolflow/scala/src/test/scala/tapasco/reports/CoSimReportTest.scala
index 58b4bf4a..7ce7ce36 100644
--- a/toolflow/scala/src/test/scala/tapasco/reports/CoSimReportTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/reports/CoSimReportTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file CoSimReportTest.scala
   * @brief Unit tests for CoSimReport model.
diff --git a/toolflow/scala/src/test/scala/tapasco/reports/PortReportSpec.scala b/toolflow/scala/src/test/scala/tapasco/reports/PortReportSpec.scala
index f2dfc450..6b1faaca 100644
--- a/toolflow/scala/src/test/scala/tapasco/reports/PortReportSpec.scala
+++ b/toolflow/scala/src/test/scala/tapasco/reports/PortReportSpec.scala
@@ -1,3 +1,25 @@
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
 package tapasco.reports
 
 import org.scalatest.Matchers
diff --git a/toolflow/scala/src/test/scala/tapasco/reports/SynthesisReportTest.scala b/toolflow/scala/src/test/scala/tapasco/reports/SynthesisReportTest.scala
index 0defc341..a8587cc4 100644
--- a/toolflow/scala/src/test/scala/tapasco/reports/SynthesisReportTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/reports/SynthesisReportTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file SynthesisReportTest.scala
   * @brief Unit tests for SynthesisReport model.
diff --git a/toolflow/scala/src/test/scala/tapasco/reports/TimingReportTest.scala b/toolflow/scala/src/test/scala/tapasco/reports/TimingReportTest.scala
index f5908baa..ebb6ae6b 100644
--- a/toolflow/scala/src/test/scala/tapasco/reports/TimingReportTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/reports/TimingReportTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file TimingReportTest.scala
   * @brief Unit tests for TimingReport model.
diff --git a/toolflow/scala/src/test/scala/tapasco/reports/UtilizationReportTest.scala b/toolflow/scala/src/test/scala/tapasco/reports/UtilizationReportTest.scala
index 14595a88..12e5d9bd 100644
--- a/toolflow/scala/src/test/scala/tapasco/reports/UtilizationReportTest.scala
+++ b/toolflow/scala/src/test/scala/tapasco/reports/UtilizationReportTest.scala
@@ -1,21 +1,24 @@
-//
-// Copyright (C) 2017 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
+/*
+ *
+ * Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+ *
+ * This file is part of TaPaSCo
+ * (see https://github.com/esa-tu-darmstadt/tapasco).
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
 /**
   * @file UtilizationReportTest.scala
   * @brief Unit tests for UtilizationReport model.
diff --git a/toolflow/vivado/arch/axi4mm/axi4mm.tcl b/toolflow/vivado/arch/axi4mm/axi4mm.tcl
index ae95bfbb..103f3776 100644
--- a/toolflow/vivado/arch/axi4mm/axi4mm.tcl
+++ b/toolflow/vivado/arch/axi4mm/axi4mm.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file    axi4mm.tcl
-# @brief  AXI4 memory mapped master/slave interface based Architectures.
-# @author  J. Korinth, TU Darmstadt (jk@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval arch {
   namespace export create
   namespace export get_irqs
@@ -124,11 +121,9 @@ namespace eval arch {
     return [tapasco::get_aximm_interfaces [get_bd_cell -hier -filter "NAME == $name"] $mode]
   }
 
-  # Instantiates the memory interconnect hierarchy.
-  proc arch_create_mem_interconnects {composition outs} {
-    variable arch_mem_ports
+  # Determines the number of AXI-MM interfaces in the composition
+  proc arch_get_num_masters {composition} {
     set no_kinds [llength [dict keys $composition]]
-    set ic_m 0
     set m_total 0
 
     # determine number of masters from composition
@@ -136,8 +131,6 @@ namespace eval arch {
       set no_inst [dict get $composition $i count]
       set example [get_bd_cells [format "target_ip_%02d_000" $i]]
       set masters [tapasco::get_aximm_interfaces $example]
-      set ic_m [expr "$ic_m + [llength $masters] * $no_inst"]
-
       set m_total [expr "$m_total + [llength $masters] * $no_inst"]
     }
 
@@ -145,6 +138,14 @@ namespace eval arch {
     set no_masters $m_total
     puts "  no_masters : $no_masters"
 
+    return $no_masters
+  }
+
+  # Instantiates a memory interconnect hierarchy for the given number of masters
+  proc arch_create_mem_interconnects {outs no_masters} {
+    variable arch_mem_ports
+
+
     # check if all masters can be connected with the outs config
     set total_ports [expr [join $outs +]]
     if {$total_ports < $no_masters} {
@@ -257,9 +258,7 @@ namespace eval arch {
   }
 
   # Connects the threadpool to memory interconnects.
-  proc arch_connect_mem {mem_ics ips} {
-    # get PE masters
-    set masters [lsort -dictionary [tapasco::get_aximm_interfaces $ips]]
+  proc arch_connect_mem {mem_ics masters} {
     # interleave slaves of out ic trees
     set outs [get_bd_cells -filter {NAME =~ "out_*"}]
     set sc [llength [tapasco::get_aximm_interfaces $outs "Slave"]]
@@ -407,13 +406,16 @@ namespace eval arch {
     arch_connect_interrupts $insts
 
     arch_check_instance_count $kernels
-    set arch_mem_ics [arch_create_mem_interconnects $kernels $mgroups]
+    set no_masters [arch_get_num_masters $kernels]
+    set arch_mem_ics [arch_create_mem_interconnects $mgroups $no_masters]
 
     set arch_host_ics [arch_create_host_interconnects $kernels 1]
 
     # connect AXI infrastructure
     arch_connect_host $arch_host_ics $insts
-    arch_connect_mem $arch_mem_ics $insts
+
+    set masters [lsort -dictionary [tapasco::get_aximm_interfaces $insts]]
+    arch_connect_mem $arch_mem_ics $masters
 
     arch_connect_clocks
     arch_connect_resets
diff --git a/toolflow/vivado/arch/axi4mm/plugins/clk2x.tcl b/toolflow/vivado/arch/axi4mm/plugins/clk2x.tcl
index 3a491ca3..2e62c4a2 100644
--- a/toolflow/vivado/arch/axi4mm/plugins/clk2x.tcl
+++ b/toolflow/vivado/arch/axi4mm/plugins/clk2x.tcl
@@ -1,21 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2018 Carsten Heinz, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval clk2x {
   proc wrap_clk_2x {inst {args}} {
     # check for clk_2x
diff --git a/toolflow/vivado/arch/axi4mm/plugins/debug.tcl b/toolflow/vivado/arch/axi4mm/plugins/debug.tcl
index b147a115..4663cf2a 100644
--- a/toolflow/vivado/arch/axi4mm/plugins/debug.tcl
+++ b/toolflow/vivado/arch/axi4mm/plugins/debug.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   debug.tcl
-# @brief  Add system ILA for all AXI connections specified for use with the Debug feature
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval debug {
   proc debug_feature {args} {
     if {[tapasco::is_feature_enabled "Debug"]} {
diff --git a/toolflow/vivado/arch/axi4mm/plugins/full_axi_slave_wrapper.tcl b/toolflow/vivado/arch/axi4mm/plugins/full_axi_slave_wrapper.tcl
index a3f835e6..98fe97ad 100644
--- a/toolflow/vivado/arch/axi4mm/plugins/full_axi_slave_wrapper.tcl
+++ b/toolflow/vivado/arch/axi4mm/plugins/full_axi_slave_wrapper.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   full_axi_slave_wrapper.tcl
-# @brief  PE-wrapper plugin that checks for full AXI3/4 slave protocols and
-#         wraps them with a AXI protocol converter to AXI4Lite (if any).
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval full_axi_wrapper {
   proc wrap_full_axi_interfaces {inst {args {}}} {
     # check interfaces: AXI3/AXI4 slaves will be wrappped
diff --git a/toolflow/vivado/arch/axi4mm/plugins/mb_mdm.tcl b/toolflow/vivado/arch/axi4mm/plugins/mb_mdm.tcl
index 84a2aab9..08cc0ae7 100644
--- a/toolflow/vivado/arch/axi4mm/plugins/mb_mdm.tcl
+++ b/toolflow/vivado/arch/axi4mm/plugins/mb_mdm.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   mb_shifter.tcl
-# @brief  Plugin to insert the MicroBlaze Debug Module (MDM) for all DEBUG ports
-#         found in the Architecture.
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval mb_mdm {
   set mb_debug_vlnv "xilinx.com:interface:mbdebug_rtl:3.0"
   set mdm_vlnv "xilinx.com:ip:mdm:3.2"
diff --git a/toolflow/vivado/arch/common/arch.tcl b/toolflow/vivado/arch/common/arch.tcl
index 91340df1..82385281 100644
--- a/toolflow/vivado/arch/common/arch.tcl
+++ b/toolflow/vivado/arch/common/arch.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 namespace eval arch {
   namespace export create
   namespace export get_address_map
diff --git a/toolflow/vivado/common/common.tcl b/toolflow/vivado/common/common.tcl
index f5395f91..eba35ab2 100644
--- a/toolflow/vivado/common/common.tcl
+++ b/toolflow/vivado/common/common.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		common.tcl
-# @brief	Common Vivado Tcl helper procs to create block designs.
-# @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval tapasco {
 
   namespace export vivado_is_newer
@@ -108,7 +105,7 @@ namespace eval tapasco {
 
   # Returns the Tapasco version.
   proc get_tapasco_version {} {
-    return "2019.10"
+    return "2020.4"
   }
 
   # Returns the interface pin groups for all AXI MM interfaces on cell.
diff --git a/toolflow/vivado/common/common_2017.4.tcl b/toolflow/vivado/common/common_2017.4.tcl
index b681b392..d2162f0e 100644
--- a/toolflow/vivado/common/common_2017.4.tcl
+++ b/toolflow/vivado/common/common_2017.4.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 # create a dictionary of compatible VLNVs
 source $::env(TAPASCO_HOME_TCL)/common/common_ip.tcl
 dict set stdcomps   system_ila       vlnv   "xilinx.com:ip:system_ila:1.1"
diff --git a/toolflow/vivado/common/common_2018.1.tcl b/toolflow/vivado/common/common_2018.1.tcl
index bfae9b18..20661b08 100644
--- a/toolflow/vivado/common/common_2018.1.tcl
+++ b/toolflow/vivado/common/common_2018.1.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 # create a dictionary of compatible VLNVs
 source $::env(TAPASCO_HOME_TCL)/common/common_ip.tcl
 dict set stdcomps   system_ila       vlnv   "xilinx.com:ip:system_ila:1.1"
diff --git a/toolflow/vivado/common/common_2018.2.tcl b/toolflow/vivado/common/common_2018.2.tcl
index bfae9b18..20661b08 100644
--- a/toolflow/vivado/common/common_2018.2.tcl
+++ b/toolflow/vivado/common/common_2018.2.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 # create a dictionary of compatible VLNVs
 source $::env(TAPASCO_HOME_TCL)/common/common_ip.tcl
 dict set stdcomps   system_ila       vlnv   "xilinx.com:ip:system_ila:1.1"
diff --git a/toolflow/vivado/common/common_2018.3.tcl b/toolflow/vivado/common/common_2018.3.tcl
index 01711f0d..e5ac2e9b 100644
--- a/toolflow/vivado/common/common_2018.3.tcl
+++ b/toolflow/vivado/common/common_2018.3.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 # create a dictionary of compatible VLNVs
 source $::env(TAPASCO_HOME_TCL)/common/common_ip.tcl
 dict set stdcomps   system_ila       vlnv   "xilinx.com:ip:system_ila:1.1"
diff --git a/toolflow/vivado/common/common_2019.1.tcl b/toolflow/vivado/common/common_2019.1.tcl
index f367a8a3..171daeeb 100644
--- a/toolflow/vivado/common/common_2019.1.tcl
+++ b/toolflow/vivado/common/common_2019.1.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 # create a dictionary of compatible VLNVs
 source $::env(TAPASCO_HOME_TCL)/common/common_ip.tcl
 dict set stdcomps   system_ila       vlnv   "xilinx.com:ip:system_ila:1.1"
diff --git a/toolflow/vivado/common/common_2019.2.tcl b/toolflow/vivado/common/common_2019.2.tcl
new file mode 100644
index 00000000..171daeeb
--- /dev/null
+++ b/toolflow/vivado/common/common_2019.2.tcl
@@ -0,0 +1,26 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# create a dictionary of compatible VLNVs
+source $::env(TAPASCO_HOME_TCL)/common/common_ip.tcl
+dict set stdcomps   system_ila       vlnv   "xilinx.com:ip:system_ila:1.1"
+dict set stdcomps   axi_pcie3_0_usp  vlnv   "xilinx.com:ip:xdma:4.1"
+dict set stdcomps   clk_wiz          vlnv   "xilinx.com:ip:clk_wiz:6.0"
+dict set stdcomps   mig_core         vlnv   "xilinx.com:ip:mig_7series:4.2"
+dict set stdcomps   ultra_ps         vlnv   "xilinx.com:ip:zynq_ultra_ps_e:3.3"
diff --git a/toolflow/vivado/common/common_ip.tcl b/toolflow/vivado/common/common_ip.tcl
index 1d13f8d7..fe186193 100644
--- a/toolflow/vivado/common/common_ip.tcl
+++ b/toolflow/vivado/common/common_ip.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 # create a dictionary of compatible VLNVs
 dict set stdcomps   axi_ic               vlnv   "xilinx.com:ip:axi_interconnect:2.1"
 dict set stdcomps   axi_sc               vlnv   "xilinx.com:ip:smartconnect:1.0"
@@ -38,5 +57,8 @@ dict set stdcomps   pciebridgetolite     vlnv   "esa.informatik.tu-darmstadt.de:
 dict set stdcomps   pciebridgetolite_x16 vlnv   "esa.informatik.tu-darmstadt.de:user:PCIeBridgeToLite_x16:1.0"
 dict set stdcomps   hsa_wrapper          vlnv   "esa.informatik.tu-darmstadt.de:user:HSAWrapper:1.0"
 dict set stdcomps   axis_arbiter         vlnv   "esa.informatik.tu-darmstadt.de:user:AXIS_Arbiter:1.0"
+dict set stdcomps   aws_intr_ctrl        vlnv   "esa.informatik.tu-darmstadt.de:user:AWSIntrCtrl:1.0"
 dict set stdcomps   axi_bram_ctrl        vlnv   "xilinx.com:ip:axi_bram_ctrl"
-dict set stdcomps   bram_ctrl            vlnv   "xilinx.com:ip:blk_mem_gen"
\ No newline at end of file
+dict set stdcomps   bram_ctrl            vlnv   "xilinx.com:ip:blk_mem_gen"
+dict set stdcomps   axi_gpio             vlnv   "xilinx.com:ip:axi_gpio:2.0"
+dict set stdcomps   axioffset_hbm        vlnv   "esa.informatik.tu-darmstadt.de:user:AXIOffsetHBM:1.0"
diff --git a/toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/board.xml b/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/board.xml
similarity index 95%
rename from toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/board.xml
rename to toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/board.xml
index 848ebad8..8d0ffd2d 100644
--- a/toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/board.xml
+++ b/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/board.xml
@@ -1,674 +1,679 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?> 
-<board schema_version="2.0" vendor="digilentinc.com" name="arty-z7-20" display_name="Arty Z7-20" url="http://www.digilentinc.com" preset_file="preset.xml" >
-<compatible_board_revisions>
-  <revision id="0">A.0</revision>
-</compatible_board_revisions>
-<file_version>1.0</file_version>
-<description>Arty Z7-20 </description>
-<components>
-  <component name="part0" display_name="Arty Z7-20" type="fpga" part_name="xc7z020clg400-1" pin_map_file="part0_pins.xml" vendor="xilinx.com" spec_url="http://www.digilentinc.com">
-    <interfaces>
-      <interface mode="master" name="btns_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="btns_4bits" preset_proc="push_buttons_4bits_preset">
-        <port_maps>
-          <port_map logical_port="TRI_I" physical_port="btns_4bits_tri_i" dir="in" left="3" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="btns_4bits_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="btns_4bits_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="btns_4bits_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="btns_4bits_tri_i_3"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="leds_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="leds_4bits" preset_proc="led_4bits_preset">
-        <port_maps>
-          <port_map logical_port="TRI_O" physical_port="leds_4bits_tri_o" dir="out" left="3" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/> 
-              <pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/> 
-              <pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/> 
-              <pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/> 
-            </pin_maps>
-          </port_map>
-		  <port_map logical_port="TRI_I" physical_port="leds_4bits_tri_o" dir="in" left="3" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/> 
-              <pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/> 
-              <pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/> 
-              <pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/> 
-            </pin_maps>
-          </port_map>
-		  <port_map logical_port="TRI_T" physical_port="leds_4bits_tri_o" dir="out" left="3" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/> 
-              <pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/> 
-              <pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/> 
-              <pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="ps7_fixedio" type="xilinx.com:display_processing_system7:fixedio_rtl:1.0" of_component="ps7_fixedio" preset_proc="ps7_preset"> 
-      </interface>
-      <interface mode="master" name="sws_2bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="sws_2bits" preset_proc="dip_switches_2bits_preset">
-		<port_maps>
-          <port_map logical_port="TRI_I" physical_port="sws_2bits_tri_i" dir="in" left="1" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="sws_2bits_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="sws_2bits_tri_i_1"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="slave" name="sys_clock" type="xilinx.com:signal:clock_rtl:1.0" of_component="sys_clock" preset_proc="sys_clock_preset">
-        <port_maps>
-          <port_map logical_port="CLK" physical_port="sys_clk" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="sys_clk"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-        <parameters>
-          <parameter name="frequency" value="125000000" />
-       </parameters>
-      </interface>
-	  <interface mode="master" name="ja" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="ja">
-        <port_maps>
-          <port_map logical_port="PIN1_I" physical_port="JA1" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA1"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN1_O" physical_port="JA1" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA1"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN1_T" physical_port="JA1" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA1"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN2_I" physical_port="JA2" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA2"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN2_O" physical_port="JA2" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA2"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN2_T" physical_port="JA2" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA2"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN3_I" physical_port="JA3" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA3"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN3_O" physical_port="JA3" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA3"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN3_T" physical_port="JA3" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA3"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN4_I" physical_port="JA4" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA4"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN4_O" physical_port="JA4" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA4"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN4_T" physical_port="JA4" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA4"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN7_I" physical_port="JA7" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA7"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN7_O" physical_port="JA7" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA7"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN7_T" physical_port="JA7" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA7"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN8_I" physical_port="JA8" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA8"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN8_O" physical_port="JA8" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA8"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN8_T" physical_port="JA8" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA8"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN9_I" physical_port="JA9" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA9"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN9_O" physical_port="JA9" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA9"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN9_T" physical_port="JA9" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA9"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN10_I" physical_port="JA10" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA10"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN10_O" physical_port="JA10" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA10"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN10_T" physical_port="JA10" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JA10"/> 
-			</pin_maps>
-		  </port_map>
-        </port_maps>
-      </interface>
-	  <interface mode="master" name="jb" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="jb">
-        <port_maps>
-          <port_map logical_port="PIN1_I" physical_port="JB1" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB1"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN1_O" physical_port="JB1" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB1"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN1_T" physical_port="JB1" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB1"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN2_I" physical_port="JB2" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB2"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN2_O" physical_port="JB2" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB2"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN2_T" physical_port="JB2" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB2"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN3_I" physical_port="JB3" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB3"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN3_O" physical_port="JB3" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB3"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN3_T" physical_port="JB3" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB3"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN4_I" physical_port="JB4" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB4"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN4_O" physical_port="JB4" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB4"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN4_T" physical_port="JB4" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB4"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN7_I" physical_port="JB7" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB7"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN7_O" physical_port="JB7" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB7"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN7_T" physical_port="JB7" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB7"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN8_I" physical_port="JB8" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB8"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN8_O" physical_port="JB8" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB8"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN8_T" physical_port="JB8" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB8"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN9_I" physical_port="JB9" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB9"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN9_O" physical_port="JB9" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB9"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN9_T" physical_port="JB9" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB9"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN10_I" physical_port="JB10" dir="in"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB10"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN10_O" physical_port="JB10" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB10"/> 
-			</pin_maps>
-		  </port_map>
-		  <port_map logical_port="PIN10_T" physical_port="JB10" dir="out"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="JB10"/> 
-			</pin_maps>
-		  </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="i2c" type="xilinx.com:interface:iic_rtl:1.0" of_component="i2c">
-        <description>Shield I2C</description>
-		<preferred_ips>
-            <preferred_ip vendor="xilinx.com" library="ip" name="axi_iic" order="0"/>
-        </preferred_ips>
-		<port_maps>
-          <port_map logical_port="SDA_I" physical_port="i2c_sda_i" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="i2c_sda_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SDA_O" physical_port="i2c_sda_o" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="i2c_sda_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SDA_T" physical_port="i2c_sda_t" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="i2c_sda_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SCL_I" physical_port="i2c_scl_i" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="i2c_scl_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SCL_O" physical_port="i2c_scl_o" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="i2c_scl_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SCL_T" physical_port="i2c_scl_t" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="i2c_scl_i"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="rgb_led" type="xilinx.com:interface:gpio_rtl:1.0" of_component="rgb_led" preset_proc="output_6bits_preset">
-        <description>2 RGB LEDs</description>
-		<preferred_ips>
-			<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
-		</preferred_ips>
-		<port_maps>
-          <port_map logical_port="TRI_O" physical_port="rgb_led_tri_o" dir="out" left="5" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="rgb_led_tri_o_0"/> 
-              <pin_map port_index="1" component_pin="rgb_led_tri_o_1"/> 
-              <pin_map port_index="2" component_pin="rgb_led_tri_o_2"/> 
-              <pin_map port_index="3" component_pin="rgb_led_tri_o_3"/> 
-              <pin_map port_index="4" component_pin="rgb_led_tri_o_4"/> 
-              <pin_map port_index="5" component_pin="rgb_led_tri_o_5"/> 
-            </pin_maps>
-          </port_map>
-		  <port_map logical_port="TRI_I" physical_port="rgb_led_tri_o" dir="in" left="5" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="rgb_led_tri_o_0"/> 
-              <pin_map port_index="1" component_pin="rgb_led_tri_o_1"/> 
-              <pin_map port_index="2" component_pin="rgb_led_tri_o_2"/> 
-              <pin_map port_index="3" component_pin="rgb_led_tri_o_3"/> 
-              <pin_map port_index="4" component_pin="rgb_led_tri_o_4"/> 
-              <pin_map port_index="5" component_pin="rgb_led_tri_o_5"/> 
-            </pin_maps>
-          </port_map>
-		  <port_map logical_port="TRI_T" physical_port="rgb_led_tri_o" dir="out" left="5" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="rgb_led_tri_o_0"/> 
-              <pin_map port_index="1" component_pin="rgb_led_tri_o_1"/> 
-              <pin_map port_index="2" component_pin="rgb_led_tri_o_2"/> 
-              <pin_map port_index="3" component_pin="rgb_led_tri_o_3"/> 
-              <pin_map port_index="4" component_pin="rgb_led_tri_o_4"/> 
-              <pin_map port_index="5" component_pin="rgb_led_tri_o_5"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="shield_dp0_dp13" type="xilinx.com:interface:gpio_rtl:1.0" of_component="shield_dp0_dp13" preset_proc="shield_dp0_dp13_preset">
-		<preferred_ips>
-			<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
-		</preferred_ips>
-        <port_maps>
-          <port_map logical_port="TRI_I" physical_port="shield_dp0_dp13_tri_i" dir="in" left="13" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="shield_dp0_dp13_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="shield_dp0_dp13_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="shield_dp0_dp13_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="shield_dp0_dp13_tri_i_3"/> 
-              <pin_map port_index="4" component_pin="shield_dp0_dp13_tri_i_4"/> 
-              <pin_map port_index="5" component_pin="shield_dp0_dp13_tri_i_5"/> 
-              <pin_map port_index="6" component_pin="shield_dp0_dp13_tri_i_6"/> 
-              <pin_map port_index="7" component_pin="shield_dp0_dp13_tri_i_7"/> 
-              <pin_map port_index="8" component_pin="shield_dp0_dp13_tri_i_8"/> 
-              <pin_map port_index="9" component_pin="shield_dp0_dp13_tri_i_9"/> 
-              <pin_map port_index="10" component_pin="shield_dp0_dp13_tri_i_10"/> 
-              <pin_map port_index="11" component_pin="shield_dp0_dp13_tri_i_11"/> 
-              <pin_map port_index="12" component_pin="shield_dp0_dp13_tri_i_12"/> 
-              <pin_map port_index="13" component_pin="shield_dp0_dp13_tri_i_13"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="TRI_O" physical_port="shield_dp0_dp13_tri_o" dir="out" left="13" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="shield_dp0_dp13_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="shield_dp0_dp13_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="shield_dp0_dp13_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="shield_dp0_dp13_tri_i_3"/> 
-              <pin_map port_index="4" component_pin="shield_dp0_dp13_tri_i_4"/> 
-              <pin_map port_index="5" component_pin="shield_dp0_dp13_tri_i_5"/> 
-              <pin_map port_index="6" component_pin="shield_dp0_dp13_tri_i_6"/> 
-              <pin_map port_index="7" component_pin="shield_dp0_dp13_tri_i_7"/> 
-              <pin_map port_index="8" component_pin="shield_dp0_dp13_tri_i_8"/> 
-              <pin_map port_index="9" component_pin="shield_dp0_dp13_tri_i_9"/> 
-              <pin_map port_index="10" component_pin="shield_dp0_dp13_tri_i_10"/> 
-              <pin_map port_index="11" component_pin="shield_dp0_dp13_tri_i_11"/> 
-              <pin_map port_index="12" component_pin="shield_dp0_dp13_tri_i_12"/> 
-              <pin_map port_index="13" component_pin="shield_dp0_dp13_tri_i_13"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="TRI_T" physical_port="shield_dp0_dp13_tri_t" dir="out" left="13" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="shield_dp0_dp13_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="shield_dp0_dp13_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="shield_dp0_dp13_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="shield_dp0_dp13_tri_i_3"/> 
-              <pin_map port_index="4" component_pin="shield_dp0_dp13_tri_i_4"/> 
-              <pin_map port_index="5" component_pin="shield_dp0_dp13_tri_i_5"/> 
-              <pin_map port_index="6" component_pin="shield_dp0_dp13_tri_i_6"/> 
-              <pin_map port_index="7" component_pin="shield_dp0_dp13_tri_i_7"/> 
-              <pin_map port_index="8" component_pin="shield_dp0_dp13_tri_i_8"/> 
-              <pin_map port_index="9" component_pin="shield_dp0_dp13_tri_i_9"/> 
-              <pin_map port_index="10" component_pin="shield_dp0_dp13_tri_i_10"/> 
-              <pin_map port_index="11" component_pin="shield_dp0_dp13_tri_i_11"/> 
-              <pin_map port_index="12" component_pin="shield_dp0_dp13_tri_i_12"/> 
-              <pin_map port_index="13" component_pin="shield_dp0_dp13_tri_i_13"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="shield_dp26_dp41" type="xilinx.com:interface:gpio_rtl:1.0" of_component="shield_dp26_dp41" preset_proc="shield_dp26_dp41_preset">
-		<preferred_ips>
-			<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
-		</preferred_ips>
-        <port_maps>
-          <port_map logical_port="TRI_I" physical_port="shield_dp26_dp41_tri_i" dir="in" left="15" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="shield_dp26_dp41_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="shield_dp26_dp41_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="shield_dp26_dp41_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="shield_dp26_dp41_tri_i_3"/> 
-              <pin_map port_index="4" component_pin="shield_dp26_dp41_tri_i_4"/> 
-              <pin_map port_index="5" component_pin="shield_dp26_dp41_tri_i_5"/> 
-              <pin_map port_index="6" component_pin="shield_dp26_dp41_tri_i_6"/> 
-              <pin_map port_index="7" component_pin="shield_dp26_dp41_tri_i_7"/> 
-              <pin_map port_index="8" component_pin="shield_dp26_dp41_tri_i_8"/> 
-              <pin_map port_index="9" component_pin="shield_dp26_dp41_tri_i_9"/> 
-              <pin_map port_index="10" component_pin="shield_dp26_dp41_tri_i_10"/> 
-              <pin_map port_index="11" component_pin="shield_dp26_dp41_tri_i_11"/> 
-              <pin_map port_index="12" component_pin="shield_dp26_dp41_tri_i_12"/> 
-              <pin_map port_index="13" component_pin="shield_dp26_dp41_tri_i_13"/> 
-              <pin_map port_index="14" component_pin="shield_dp26_dp41_tri_i_14"/> 
-              <pin_map port_index="15" component_pin="shield_dp26_dp41_tri_i_15"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="TRI_O" physical_port="shield_dp26_dp41_tri_o" dir="out" left="15" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="shield_dp26_dp41_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="shield_dp26_dp41_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="shield_dp26_dp41_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="shield_dp26_dp41_tri_i_3"/> 
-              <pin_map port_index="4" component_pin="shield_dp26_dp41_tri_i_4"/> 
-              <pin_map port_index="5" component_pin="shield_dp26_dp41_tri_i_5"/> 
-              <pin_map port_index="6" component_pin="shield_dp26_dp41_tri_i_6"/> 
-              <pin_map port_index="7" component_pin="shield_dp26_dp41_tri_i_7"/> 
-              <pin_map port_index="8" component_pin="shield_dp26_dp41_tri_i_8"/> 
-              <pin_map port_index="9" component_pin="shield_dp26_dp41_tri_i_9"/> 
-              <pin_map port_index="10" component_pin="shield_dp26_dp41_tri_i_10"/> 
-              <pin_map port_index="11" component_pin="shield_dp26_dp41_tri_i_11"/> 
-              <pin_map port_index="12" component_pin="shield_dp26_dp41_tri_i_12"/> 
-              <pin_map port_index="13" component_pin="shield_dp26_dp41_tri_i_13"/> 
-              <pin_map port_index="14" component_pin="shield_dp26_dp41_tri_i_14"/> 
-              <pin_map port_index="15" component_pin="shield_dp26_dp41_tri_i_15"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="TRI_T" physical_port="shield_dp26_dp41_tri_t" dir="out" left="15" right="0"> 
-            <pin_maps>
-              <pin_map port_index="0" component_pin="shield_dp26_dp41_tri_i_0"/> 
-              <pin_map port_index="1" component_pin="shield_dp26_dp41_tri_i_1"/> 
-              <pin_map port_index="2" component_pin="shield_dp26_dp41_tri_i_2"/> 
-              <pin_map port_index="3" component_pin="shield_dp26_dp41_tri_i_3"/> 
-              <pin_map port_index="4" component_pin="shield_dp26_dp41_tri_i_4"/> 
-              <pin_map port_index="5" component_pin="shield_dp26_dp41_tri_i_5"/> 
-              <pin_map port_index="6" component_pin="shield_dp26_dp41_tri_i_6"/> 
-              <pin_map port_index="7" component_pin="shield_dp26_dp41_tri_i_7"/> 
-              <pin_map port_index="8" component_pin="shield_dp26_dp41_tri_i_8"/> 
-              <pin_map port_index="9" component_pin="shield_dp26_dp41_tri_i_9"/> 
-              <pin_map port_index="10" component_pin="shield_dp26_dp41_tri_i_10"/> 
-              <pin_map port_index="11" component_pin="shield_dp26_dp41_tri_i_11"/> 
-              <pin_map port_index="12" component_pin="shield_dp26_dp41_tri_i_12"/> 
-              <pin_map port_index="13" component_pin="shield_dp26_dp41_tri_i_13"/> 
-              <pin_map port_index="14" component_pin="shield_dp26_dp41_tri_i_14"/> 
-              <pin_map port_index="15" component_pin="shield_dp26_dp41_tri_i_15"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>
-      <interface mode="master" name="spi" type="xilinx.com:interface:spi_rtl:1.0" of_component="spi" preset_proc="spi_preset">
-        <preferred_ips>
-			<preferred_ip vendor="xilinx.com" library="ip" name="axi_quad_spi" order="0"/>
-		</preferred_ips>
-		<port_maps>
-          <port_map logical_port="IO0_I" physical_port="spi_miso_i" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_miso_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="IO0_O" physical_port="spi_miso_o" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_miso_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="IO0_T" physical_port="spi_miso_t" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_miso_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="IO1_I" physical_port="spi_mosi_i" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_mosi_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="IO1_O" physical_port="spi_mosi_o" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_mosi_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="IO1_T" physical_port="spi_mosi_t" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_mosi_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SCK_I" physical_port="spi_sclk_i" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_sclk_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SCK_O" physical_port="spi_sclk_o" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_sclk_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SCK_T" physical_port="spi_sclk_t" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_sclk_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SS_I" physical_port="spi_ss_i" dir="in">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_ss_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SS_O" physical_port="spi_ss_o" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_ss_i"/> 
-            </pin_maps>
-          </port_map>
-          <port_map logical_port="SS_T" physical_port="spi_ss_t" dir="out">
-            <pin_maps>
-              <pin_map port_index="0" component_pin="spi_ss_i"/> 
-            </pin_maps>
-          </port_map>
-        </port_maps>
-      </interface>	  
-    </interfaces>
-  </component>
-  
-  <component name="btns_4bits" display_name="4 Buttons" type="chip" sub_type="push_button" major_group="GPIO">
-	<description>Buttons 3 to 0</description>
-  </component>
-  <component name="ja" display_name="Connector JA" type="chip" sub_type="chip" major_group="Pmod">
-	<description>Pmod Connector JA</description>
-  </component>
-  <component name="jb" display_name="Connector JB" type="chip" sub_type="chip" major_group="Pmod">
-	<description>Pmod Connector JB</description>
-  </component>
-  <component name="leds_4bits" display_name="4 LEDs" type="chip" sub_type="led" major_group="GPIO">
-	<description>LEDs 3 to 0</description>
-  </component>
-  <component name="ps7_fixedio" display_name="ps7_fixedio" type="chip" sub_type="fixed_io" major_group=""/>
-  <component name="sws_2bits" display_name="2 Switches" type="chip" sub_type="switch" major_group="GPIO">
-	<description>DIP Switches 1 to 0</description>
-  </component>
-  <component name="sys_clock" display_name="System Clock" type="chip" sub_type="system_clock" major_group="Clocks">
-  <description>3.3V Single-Ended 125 MHz oscillator used as system clock on the board</description>
-  </component>
-
-  <component name="i2c" display_name="I2C on J2" type="chip" sub_type="mux" major_group="I2C">
-  <description>Shield i2c</description>
-  </component>
-  <component name="rgb_led" display_name="2 RGB LEDS" type="chip" sub_type="led" major_group="GPIO">
-  	<description>RGB leds 5 to 0 (3 per LED, Ordered "RGBRGB")</description>
-  </component>
-  <component name="shield_dp0_dp13" display_name="Shield Pins 0 through 13" type="chip" sub_type="led" major_group="GPIO">
-  	<description>Digital Shield pins DP0 through DP13</description>
-  </component>
-  <component name="shield_dp26_dp41" display_name="Shield Pins 26 to 41" type="chip" sub_type="led" major_group="GPIO">
-  	<description>Digital Shield pins DP26 through DP41</description>
-  </component>
-  <component name="spi" display_name="SPI connector J6" type="chip" sub_type="mux" major_group="SPI">
-  	<description>Shield SPI</description>
-  </component>
-
-</components>
-<jtag_chains>
-  <jtag_chain name="chain1">
-    <position name="0" component="part0"/>
-  </jtag_chain>
-</jtag_chains>
-<connections>
-  <connection name="part0_btns_4bits" component1="part0" component2="btns_4bits">
-    <connection_map name="part0_btns_4bits_1" c1_st_index="0" c1_end_index="3" c2_st_index="0" c2_end_index="3"/>
-  </connection>
-  <connection name="part0_leds_4bits" component1="part0" component2="leds_4bits">
-    <connection_map name="part0_leds_4bits_1" c1_st_index="4" c1_end_index="7" c2_st_index="0" c2_end_index="3"/>
-  </connection>
-  <connection name="part0_sws_2bits" component1="part0" component2="sws_2bits">
-    <connection_map name="part0_sws_2bits_1" c1_st_index="8" c1_end_index="9" c2_st_index="0" c2_end_index="1"/>
-  </connection>
-  <connection name="part0_sys_clock" component1="part0" component2="sys_clock">
-    <connection_map name="part0_sys_clock_1" c1_st_index="10" c1_end_index="10" c2_st_index="0" c2_end_index="0"/>
-  </connection>
-  <connection name="part0_ja" component1="part0" component2="ja">
-    <connection_map name="part0_ja_1" c1_st_index="11" c1_end_index="18" c2_st_index="0" c2_end_index="7"/>
-  </connection>
-  <connection name="part0_jb" component1="part0" component2="jb">
-    <connection_map name="part0_jb_1" c1_st_index="19" c1_end_index="26" c2_st_index="0" c2_end_index="7"/>
-  </connection>
-  <connection name="part0_i2c" component1="part0" component2="i2c">
-    <connection_map name="part0_i2c_1" c1_st_index="27" c1_end_index="28" c2_st_index="0" c2_end_index="1"/>
-  </connection>
-  <connection name="part0_rgb_led" component1="part0" component2="rgb_led">
-    <connection_map name="part0_rgb_led_1" c1_st_index="29" c1_end_index="34" c2_st_index="0" c2_end_index="5"/>
-  </connection>
-  <connection name="part0_shield_dp0_dp13" component1="part0" component2="shield_dp0_dp13">
-    <connection_map name="part0_shield_dp0_dp13_1" c1_st_index="35" c1_end_index="48" c2_st_index="0" c2_end_index="13"/>
-  </connection>
-  <connection name="part0_shield_dp26_dp41" component1="part0" component2="shield_dp26_dp41">
-    <connection_map name="part0_shield_dp26_dp41_1" c1_st_index="49" c1_end_index="64" c2_st_index="0" c2_end_index="15"/>
-  </connection>
-  <connection name="part0_spi" component1="part0" component2="spi">
-    <connection_map name="part0_spi_1" c1_st_index="65" c1_end_index="68" c2_st_index="0" c2_end_index="3"/>
-  </connection>
-</connections>
-</board>
+<?xml version="1.0" encoding="UTF-8" standalone="no"?> 
+<board schema_version="2.0" vendor="www.digilentinc.com" name="PYNQ-Z1" display_name="PYNQ-Z1" url="http://www.pynq.io" preset_file="preset.xml" >
+  <images>
+    <image name="pynq_z1_board.png" display_name="Zynq-7000 PYNQ-Z1 BOARD" sub_type="board">
+      <description>PYNQ-Z1 Board Image</description>
+    </image>
+  </images>
+<compatible_board_revisions>
+  <revision id="0">1.0</revision>
+</compatible_board_revisions>
+<file_version>1.0</file_version>
+<description>PYNQ-Z1</description>
+<components>
+  <component name="part0" display_name="PYNQ-Z1" type="fpga" part_name="xc7z020clg400-1" pin_map_file="part0_pins.xml" vendor="xilinx.com" spec_url="http://www.pynq.io">
+    <interfaces>
+      <interface mode="master" name="btns_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="btns_4bits" preset_proc="push_buttons_4bits_preset">
+        <port_maps>
+          <port_map logical_port="TRI_I" physical_port="btns_4bits_tri_i" dir="in" left="3" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="btns_4bits_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="btns_4bits_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="btns_4bits_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="btns_4bits_tri_i_3"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="leds_4bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="leds_4bits" preset_proc="led_4bits_preset">
+        <port_maps>
+          <port_map logical_port="TRI_O" physical_port="leds_4bits_tri_o" dir="out" left="3" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/> 
+              <pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/> 
+              <pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/> 
+              <pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/> 
+            </pin_maps>
+          </port_map>
+		  <port_map logical_port="TRI_I" physical_port="leds_4bits_tri_o" dir="in" left="3" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/> 
+              <pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/> 
+              <pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/> 
+              <pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/> 
+            </pin_maps>
+          </port_map>
+		  <port_map logical_port="TRI_T" physical_port="leds_4bits_tri_o" dir="out" left="3" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="leds_4bits_tri_o_0"/> 
+              <pin_map port_index="1" component_pin="leds_4bits_tri_o_1"/> 
+              <pin_map port_index="2" component_pin="leds_4bits_tri_o_2"/> 
+              <pin_map port_index="3" component_pin="leds_4bits_tri_o_3"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="ps7_fixedio" type="xilinx.com:display_processing_system7:fixedio_rtl:1.0" of_component="ps7_fixedio" preset_proc="ps7_preset"> 
+      </interface>
+      <interface mode="master" name="sws_2bits" type="xilinx.com:interface:gpio_rtl:1.0" of_component="sws_2bits" preset_proc="dip_switches_2bits_preset">
+		<port_maps>
+          <port_map logical_port="TRI_I" physical_port="sws_2bits_tri_i" dir="in" left="1" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="sws_2bits_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="sws_2bits_tri_i_1"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="slave" name="sys_clock" type="xilinx.com:signal:clock_rtl:1.0" of_component="sys_clock" preset_proc="sys_clock_preset">
+        <port_maps>
+          <port_map logical_port="CLK" physical_port="sys_clk" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="sys_clk"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+        <parameters>
+          <parameter name="frequency" value="125000000" />
+       </parameters>
+      </interface>
+	  <interface mode="master" name="ja" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="ja">
+        <port_maps>
+          <port_map logical_port="PIN1_I" physical_port="JA1" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA1"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN1_O" physical_port="JA1" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA1"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN1_T" physical_port="JA1" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA1"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN2_I" physical_port="JA2" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA2"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN2_O" physical_port="JA2" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA2"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN2_T" physical_port="JA2" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA2"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN3_I" physical_port="JA3" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA3"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN3_O" physical_port="JA3" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA3"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN3_T" physical_port="JA3" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA3"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN4_I" physical_port="JA4" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA4"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN4_O" physical_port="JA4" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA4"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN4_T" physical_port="JA4" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA4"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN7_I" physical_port="JA7" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA7"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN7_O" physical_port="JA7" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA7"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN7_T" physical_port="JA7" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA7"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN8_I" physical_port="JA8" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA8"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN8_O" physical_port="JA8" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA8"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN8_T" physical_port="JA8" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA8"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN9_I" physical_port="JA9" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA9"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN9_O" physical_port="JA9" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA9"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN9_T" physical_port="JA9" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA9"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN10_I" physical_port="JA10" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA10"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN10_O" physical_port="JA10" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA10"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN10_T" physical_port="JA10" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JA10"/> 
+			</pin_maps>
+		  </port_map>
+        </port_maps>
+      </interface>
+	  <interface mode="master" name="jb" type="digilentinc.com:interface:pmod_rtl:1.0" of_component="jb">
+        <port_maps>
+          <port_map logical_port="PIN1_I" physical_port="JB1" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB1"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN1_O" physical_port="JB1" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB1"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN1_T" physical_port="JB1" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB1"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN2_I" physical_port="JB2" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB2"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN2_O" physical_port="JB2" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB2"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN2_T" physical_port="JB2" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB2"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN3_I" physical_port="JB3" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB3"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN3_O" physical_port="JB3" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB3"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN3_T" physical_port="JB3" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB3"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN4_I" physical_port="JB4" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB4"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN4_O" physical_port="JB4" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB4"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN4_T" physical_port="JB4" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB4"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN7_I" physical_port="JB7" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB7"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN7_O" physical_port="JB7" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB7"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN7_T" physical_port="JB7" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB7"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN8_I" physical_port="JB8" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB8"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN8_O" physical_port="JB8" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB8"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN8_T" physical_port="JB8" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB8"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN9_I" physical_port="JB9" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB9"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN9_O" physical_port="JB9" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB9"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN9_T" physical_port="JB9" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB9"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN10_I" physical_port="JB10" dir="in"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB10"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN10_O" physical_port="JB10" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB10"/> 
+			</pin_maps>
+		  </port_map>
+		  <port_map logical_port="PIN10_T" physical_port="JB10" dir="out"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="JB10"/> 
+			</pin_maps>
+		  </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="i2c" type="xilinx.com:interface:iic_rtl:1.0" of_component="i2c">
+        <description>Shield I2C</description>
+		<preferred_ips>
+            <preferred_ip vendor="xilinx.com" library="ip" name="axi_iic" order="0"/>
+        </preferred_ips>
+		<port_maps>
+          <port_map logical_port="SDA_I" physical_port="i2c_sda_i" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="i2c_sda_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SDA_O" physical_port="i2c_sda_o" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="i2c_sda_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SDA_T" physical_port="i2c_sda_t" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="i2c_sda_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SCL_I" physical_port="i2c_scl_i" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="i2c_scl_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SCL_O" physical_port="i2c_scl_o" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="i2c_scl_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SCL_T" physical_port="i2c_scl_t" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="i2c_scl_i"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="rgb_led" type="xilinx.com:interface:gpio_rtl:1.0" of_component="rgb_led" preset_proc="output_6bits_preset">
+        <description>2 RGB LEDs</description>
+		<preferred_ips>
+			<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
+		</preferred_ips>
+		<port_maps>
+          <port_map logical_port="TRI_O" physical_port="rgb_led_tri_o" dir="out" left="5" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="rgb_led_tri_o_0"/> 
+              <pin_map port_index="1" component_pin="rgb_led_tri_o_1"/> 
+              <pin_map port_index="2" component_pin="rgb_led_tri_o_2"/> 
+              <pin_map port_index="3" component_pin="rgb_led_tri_o_3"/> 
+              <pin_map port_index="4" component_pin="rgb_led_tri_o_4"/> 
+              <pin_map port_index="5" component_pin="rgb_led_tri_o_5"/> 
+            </pin_maps>
+          </port_map>
+		  <port_map logical_port="TRI_I" physical_port="rgb_led_tri_o" dir="in" left="5" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="rgb_led_tri_o_0"/> 
+              <pin_map port_index="1" component_pin="rgb_led_tri_o_1"/> 
+              <pin_map port_index="2" component_pin="rgb_led_tri_o_2"/> 
+              <pin_map port_index="3" component_pin="rgb_led_tri_o_3"/> 
+              <pin_map port_index="4" component_pin="rgb_led_tri_o_4"/> 
+              <pin_map port_index="5" component_pin="rgb_led_tri_o_5"/> 
+            </pin_maps>
+          </port_map>
+		  <port_map logical_port="TRI_T" physical_port="rgb_led_tri_o" dir="out" left="5" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="rgb_led_tri_o_0"/> 
+              <pin_map port_index="1" component_pin="rgb_led_tri_o_1"/> 
+              <pin_map port_index="2" component_pin="rgb_led_tri_o_2"/> 
+              <pin_map port_index="3" component_pin="rgb_led_tri_o_3"/> 
+              <pin_map port_index="4" component_pin="rgb_led_tri_o_4"/> 
+              <pin_map port_index="5" component_pin="rgb_led_tri_o_5"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="shield_dp0_dp13" type="xilinx.com:interface:gpio_rtl:1.0" of_component="shield_dp0_dp13" preset_proc="shield_dp0_dp13_preset">
+		<preferred_ips>
+			<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
+		</preferred_ips>
+        <port_maps>
+          <port_map logical_port="TRI_I" physical_port="shield_dp0_dp13_tri_i" dir="in" left="13" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="shield_dp0_dp13_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="shield_dp0_dp13_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="shield_dp0_dp13_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="shield_dp0_dp13_tri_i_3"/> 
+              <pin_map port_index="4" component_pin="shield_dp0_dp13_tri_i_4"/> 
+              <pin_map port_index="5" component_pin="shield_dp0_dp13_tri_i_5"/> 
+              <pin_map port_index="6" component_pin="shield_dp0_dp13_tri_i_6"/> 
+              <pin_map port_index="7" component_pin="shield_dp0_dp13_tri_i_7"/> 
+              <pin_map port_index="8" component_pin="shield_dp0_dp13_tri_i_8"/> 
+              <pin_map port_index="9" component_pin="shield_dp0_dp13_tri_i_9"/> 
+              <pin_map port_index="10" component_pin="shield_dp0_dp13_tri_i_10"/> 
+              <pin_map port_index="11" component_pin="shield_dp0_dp13_tri_i_11"/> 
+              <pin_map port_index="12" component_pin="shield_dp0_dp13_tri_i_12"/> 
+              <pin_map port_index="13" component_pin="shield_dp0_dp13_tri_i_13"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="TRI_O" physical_port="shield_dp0_dp13_tri_o" dir="out" left="13" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="shield_dp0_dp13_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="shield_dp0_dp13_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="shield_dp0_dp13_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="shield_dp0_dp13_tri_i_3"/> 
+              <pin_map port_index="4" component_pin="shield_dp0_dp13_tri_i_4"/> 
+              <pin_map port_index="5" component_pin="shield_dp0_dp13_tri_i_5"/> 
+              <pin_map port_index="6" component_pin="shield_dp0_dp13_tri_i_6"/> 
+              <pin_map port_index="7" component_pin="shield_dp0_dp13_tri_i_7"/> 
+              <pin_map port_index="8" component_pin="shield_dp0_dp13_tri_i_8"/> 
+              <pin_map port_index="9" component_pin="shield_dp0_dp13_tri_i_9"/> 
+              <pin_map port_index="10" component_pin="shield_dp0_dp13_tri_i_10"/> 
+              <pin_map port_index="11" component_pin="shield_dp0_dp13_tri_i_11"/> 
+              <pin_map port_index="12" component_pin="shield_dp0_dp13_tri_i_12"/> 
+              <pin_map port_index="13" component_pin="shield_dp0_dp13_tri_i_13"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="TRI_T" physical_port="shield_dp0_dp13_tri_t" dir="out" left="13" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="shield_dp0_dp13_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="shield_dp0_dp13_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="shield_dp0_dp13_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="shield_dp0_dp13_tri_i_3"/> 
+              <pin_map port_index="4" component_pin="shield_dp0_dp13_tri_i_4"/> 
+              <pin_map port_index="5" component_pin="shield_dp0_dp13_tri_i_5"/> 
+              <pin_map port_index="6" component_pin="shield_dp0_dp13_tri_i_6"/> 
+              <pin_map port_index="7" component_pin="shield_dp0_dp13_tri_i_7"/> 
+              <pin_map port_index="8" component_pin="shield_dp0_dp13_tri_i_8"/> 
+              <pin_map port_index="9" component_pin="shield_dp0_dp13_tri_i_9"/> 
+              <pin_map port_index="10" component_pin="shield_dp0_dp13_tri_i_10"/> 
+              <pin_map port_index="11" component_pin="shield_dp0_dp13_tri_i_11"/> 
+              <pin_map port_index="12" component_pin="shield_dp0_dp13_tri_i_12"/> 
+              <pin_map port_index="13" component_pin="shield_dp0_dp13_tri_i_13"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="shield_dp26_dp41" type="xilinx.com:interface:gpio_rtl:1.0" of_component="shield_dp26_dp41" preset_proc="shield_dp26_dp41_preset">
+		<preferred_ips>
+			<preferred_ip vendor="xilinx.com" library="ip" name="axi_gpio" order="0"/>
+		</preferred_ips>
+        <port_maps>
+          <port_map logical_port="TRI_I" physical_port="shield_dp26_dp41_tri_i" dir="in" left="15" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="shield_dp26_dp41_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="shield_dp26_dp41_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="shield_dp26_dp41_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="shield_dp26_dp41_tri_i_3"/> 
+              <pin_map port_index="4" component_pin="shield_dp26_dp41_tri_i_4"/> 
+              <pin_map port_index="5" component_pin="shield_dp26_dp41_tri_i_5"/> 
+              <pin_map port_index="6" component_pin="shield_dp26_dp41_tri_i_6"/> 
+              <pin_map port_index="7" component_pin="shield_dp26_dp41_tri_i_7"/> 
+              <pin_map port_index="8" component_pin="shield_dp26_dp41_tri_i_8"/> 
+              <pin_map port_index="9" component_pin="shield_dp26_dp41_tri_i_9"/> 
+              <pin_map port_index="10" component_pin="shield_dp26_dp41_tri_i_10"/> 
+              <pin_map port_index="11" component_pin="shield_dp26_dp41_tri_i_11"/> 
+              <pin_map port_index="12" component_pin="shield_dp26_dp41_tri_i_12"/> 
+              <pin_map port_index="13" component_pin="shield_dp26_dp41_tri_i_13"/> 
+              <pin_map port_index="14" component_pin="shield_dp26_dp41_tri_i_14"/> 
+              <pin_map port_index="15" component_pin="shield_dp26_dp41_tri_i_15"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="TRI_O" physical_port="shield_dp26_dp41_tri_o" dir="out" left="15" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="shield_dp26_dp41_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="shield_dp26_dp41_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="shield_dp26_dp41_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="shield_dp26_dp41_tri_i_3"/> 
+              <pin_map port_index="4" component_pin="shield_dp26_dp41_tri_i_4"/> 
+              <pin_map port_index="5" component_pin="shield_dp26_dp41_tri_i_5"/> 
+              <pin_map port_index="6" component_pin="shield_dp26_dp41_tri_i_6"/> 
+              <pin_map port_index="7" component_pin="shield_dp26_dp41_tri_i_7"/> 
+              <pin_map port_index="8" component_pin="shield_dp26_dp41_tri_i_8"/> 
+              <pin_map port_index="9" component_pin="shield_dp26_dp41_tri_i_9"/> 
+              <pin_map port_index="10" component_pin="shield_dp26_dp41_tri_i_10"/> 
+              <pin_map port_index="11" component_pin="shield_dp26_dp41_tri_i_11"/> 
+              <pin_map port_index="12" component_pin="shield_dp26_dp41_tri_i_12"/> 
+              <pin_map port_index="13" component_pin="shield_dp26_dp41_tri_i_13"/> 
+              <pin_map port_index="14" component_pin="shield_dp26_dp41_tri_i_14"/> 
+              <pin_map port_index="15" component_pin="shield_dp26_dp41_tri_i_15"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="TRI_T" physical_port="shield_dp26_dp41_tri_t" dir="out" left="15" right="0"> 
+            <pin_maps>
+              <pin_map port_index="0" component_pin="shield_dp26_dp41_tri_i_0"/> 
+              <pin_map port_index="1" component_pin="shield_dp26_dp41_tri_i_1"/> 
+              <pin_map port_index="2" component_pin="shield_dp26_dp41_tri_i_2"/> 
+              <pin_map port_index="3" component_pin="shield_dp26_dp41_tri_i_3"/> 
+              <pin_map port_index="4" component_pin="shield_dp26_dp41_tri_i_4"/> 
+              <pin_map port_index="5" component_pin="shield_dp26_dp41_tri_i_5"/> 
+              <pin_map port_index="6" component_pin="shield_dp26_dp41_tri_i_6"/> 
+              <pin_map port_index="7" component_pin="shield_dp26_dp41_tri_i_7"/> 
+              <pin_map port_index="8" component_pin="shield_dp26_dp41_tri_i_8"/> 
+              <pin_map port_index="9" component_pin="shield_dp26_dp41_tri_i_9"/> 
+              <pin_map port_index="10" component_pin="shield_dp26_dp41_tri_i_10"/> 
+              <pin_map port_index="11" component_pin="shield_dp26_dp41_tri_i_11"/> 
+              <pin_map port_index="12" component_pin="shield_dp26_dp41_tri_i_12"/> 
+              <pin_map port_index="13" component_pin="shield_dp26_dp41_tri_i_13"/> 
+              <pin_map port_index="14" component_pin="shield_dp26_dp41_tri_i_14"/> 
+              <pin_map port_index="15" component_pin="shield_dp26_dp41_tri_i_15"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>
+      <interface mode="master" name="spi" type="xilinx.com:interface:spi_rtl:1.0" of_component="spi" preset_proc="spi_preset">
+        <preferred_ips>
+			<preferred_ip vendor="xilinx.com" library="ip" name="axi_quad_spi" order="0"/>
+		</preferred_ips>
+		<port_maps>
+          <port_map logical_port="IO0_I" physical_port="spi_mosi_i" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_mosi_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="IO0_O" physical_port="spi_mosi_o" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_mosi_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="IO0_T" physical_port="spi_mosi_t" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_mosi_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="IO1_I" physical_port="spi_miso_i" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_miso_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="IO1_O" physical_port="spi_miso_o" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_miso_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="IO1_T" physical_port="spi_miso_t" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_miso_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SCK_I" physical_port="spi_sclk_i" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_sclk_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SCK_O" physical_port="spi_sclk_o" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_sclk_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SCK_T" physical_port="spi_sclk_t" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_sclk_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SS_I" physical_port="spi_ss_i" dir="in">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_ss_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SS_O" physical_port="spi_ss_o" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_ss_i"/> 
+            </pin_maps>
+          </port_map>
+          <port_map logical_port="SS_T" physical_port="spi_ss_t" dir="out">
+            <pin_maps>
+              <pin_map port_index="0" component_pin="spi_ss_i"/> 
+            </pin_maps>
+          </port_map>
+        </port_maps>
+      </interface>	  
+    </interfaces>
+  </component>
+  
+  <component name="btns_4bits" display_name="4 Buttons" type="chip" sub_type="push_button" major_group="GPIO">
+	<description>Buttons 3 to 0</description>
+  </component>
+  <component name="ja" display_name="Connector JA" type="chip" sub_type="chip" major_group="Pmod">
+	<description>Pmod Connector JA</description>
+  </component>
+  <component name="jb" display_name="Connector JB" type="chip" sub_type="chip" major_group="Pmod">
+	<description>Pmod Connector JB</description>
+  </component>
+  <component name="leds_4bits" display_name="4 LEDs" type="chip" sub_type="led" major_group="GPIO">
+	<description>LEDs 3 to 0</description>
+  </component>
+  <component name="ps7_fixedio" display_name="ps7_fixedio" type="chip" sub_type="fixed_io" major_group=""/>
+  <component name="sws_2bits" display_name="2 Switches" type="chip" sub_type="switch" major_group="GPIO">
+	<description>DIP Switches 1 to 0</description>
+  </component>
+  <component name="sys_clock" display_name="System Clock" type="chip" sub_type="system_clock" major_group="Clocks">
+  <description>3.3V Single-Ended 125 MHz oscillator used as system clock on the board</description>
+  </component>
+
+  <component name="i2c" display_name="I2C on J2" type="chip" sub_type="mux" major_group="I2C">
+  <description>Shield i2c</description>
+  </component>
+  <component name="rgb_led" display_name="2 RGB LEDS" type="chip" sub_type="led" major_group="GPIO">
+  	<description>RGB leds 5 to 0 (3 per LED, Ordered "RGBRGB")</description>
+  </component>
+  <component name="shield_dp0_dp13" display_name="Shield Pins 0 through 13" type="chip" sub_type="led" major_group="GPIO">
+  	<description>Digital Shield pins DP0 through DP13</description>
+  </component>
+  <component name="shield_dp26_dp41" display_name="Shield Pins 26 to 41" type="chip" sub_type="led" major_group="GPIO">
+  	<description>Digital Shield pins DP26 through DP41</description>
+  </component>
+  <component name="spi" display_name="SPI connector J6" type="chip" sub_type="mux" major_group="SPI">
+  	<description>Shield SPI</description>
+  </component>
+
+</components>
+<jtag_chains>
+  <jtag_chain name="chain1">
+    <position name="0" component="part0"/>
+  </jtag_chain>
+</jtag_chains>
+<connections>
+  <connection name="part0_btns_4bits" component1="part0" component2="btns_4bits">
+    <connection_map name="part0_btns_4bits_1" c1_st_index="0" c1_end_index="3" c2_st_index="0" c2_end_index="3"/>
+  </connection>
+  <connection name="part0_leds_4bits" component1="part0" component2="leds_4bits">
+    <connection_map name="part0_leds_4bits_1" c1_st_index="4" c1_end_index="7" c2_st_index="0" c2_end_index="3"/>
+  </connection>
+  <connection name="part0_sws_2bits" component1="part0" component2="sws_2bits">
+    <connection_map name="part0_sws_2bits_1" c1_st_index="8" c1_end_index="9" c2_st_index="0" c2_end_index="1"/>
+  </connection>
+  <connection name="part0_sys_clock" component1="part0" component2="sys_clock">
+    <connection_map name="part0_sys_clock_1" c1_st_index="10" c1_end_index="10" c2_st_index="0" c2_end_index="0"/>
+  </connection>
+  <connection name="part0_ja" component1="part0" component2="ja">
+    <connection_map name="part0_ja_1" c1_st_index="11" c1_end_index="18" c2_st_index="0" c2_end_index="7"/>
+  </connection>
+  <connection name="part0_jb" component1="part0" component2="jb">
+    <connection_map name="part0_jb_1" c1_st_index="19" c1_end_index="26" c2_st_index="0" c2_end_index="7"/>
+  </connection>
+  <connection name="part0_i2c" component1="part0" component2="i2c">
+    <connection_map name="part0_i2c_1" c1_st_index="27" c1_end_index="28" c2_st_index="0" c2_end_index="1"/>
+  </connection>
+  <connection name="part0_rgb_led" component1="part0" component2="rgb_led">
+    <connection_map name="part0_rgb_led_1" c1_st_index="29" c1_end_index="34" c2_st_index="0" c2_end_index="5"/>
+  </connection>
+  <connection name="part0_shield_dp0_dp13" component1="part0" component2="shield_dp0_dp13">
+    <connection_map name="part0_shield_dp0_dp13_1" c1_st_index="35" c1_end_index="48" c2_st_index="0" c2_end_index="13"/>
+  </connection>
+  <connection name="part0_shield_dp26_dp41" component1="part0" component2="shield_dp26_dp41">
+    <connection_map name="part0_shield_dp26_dp41_1" c1_st_index="49" c1_end_index="64" c2_st_index="0" c2_end_index="15"/>
+  </connection>
+  <connection name="part0_spi" component1="part0" component2="spi">
+    <connection_map name="part0_spi_1" c1_st_index="65" c1_end_index="68" c2_st_index="0" c2_end_index="3"/>
+  </connection>
+</connections>
+</board>
diff --git a/toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/part0_pins.xml b/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/part0_pins.xml
similarity index 100%
rename from toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/part0_pins.xml
rename to toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/part0_pins.xml
diff --git a/toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/preset.xml b/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/preset.xml
similarity index 100%
rename from toolflow/vivado/common/data/boards/board_files/arty-z7-20/A.0/preset.xml
rename to toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/preset.xml
diff --git a/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/pynq_z1_board.png b/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/pynq_z1_board.png
new file mode 100644
index 00000000..4ac89bf3
Binary files /dev/null and b/toolflow/vivado/common/data/boards/board_files/pynq-z1/1.0/pynq_z1_board.png differ
diff --git a/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/board.xml b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/board.xml
new file mode 100644
index 00000000..1712c00f
--- /dev/null
+++ b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/board.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?> 
+<board schema_version="2.1" vendor="em.avnet.com" name="Ultra96v2" display_name="Ultra96v2 Evaluation Platform" url="http://avnet.me/ultra96-v2" preset_file="preset.xml">
+<images>
+    <image name="ultra96v2.jpg" display_name="Ultra96v2 Evaluation Platform" sub_type="board">
+      <description>Ultra96v2 Board File Image</description>
+    </image>
+  </images>
+  <compatible_board_revisions>
+   <revision id="0">Rev 1</revision>
+  </compatible_board_revisions>
+  <file_version>1.0</file_version>
+  <description>Ultra96v2 Evaluation Platform</description>
+  <parameters>
+    <parameter name="heat_sink_type" value="medium" value_type="string"/>
+    <parameter name="heat_sink_temperature" value_type="range" value_min="20.0" value_max="30.0"/>
+  </parameters>
+  <jumpers>
+  </jumpers>
+  
+  <components>   
+  
+     <component name="part0" display_name="Ultra96v2 Evaluation Platform" type="fpga" part_name="xczu3eg-sbva484-1-e" pin_map_file="part0_pins.xml" vendor="xilinx" spec_url="http://avnet.me/ultra96-v2">
+      <description>FPGA part on the board</description>
+     
+      <interfaces>
+       <interface mode="master" name="ps8_fixedio" type="xilinx.com:zynq_ultra_ps_e:fixedio_rtl:1.0" of_component="ps8_fixedio" preset_proc="zynq_ultra_ps_e_preset"> 
+          <preferred_ips>
+            <preferred_ip vendor="xilinx.com" library="ip" name="zynq_ultra_ps_e" order="0"/>
+          </preferred_ips>
+        </interface>
+      </interfaces> 
+    </component>
+   
+    <component name="ps8_fixedio" display_name="PS8 fixed IO" type="chip" sub_type="fixed_io" major_group=""/>
+
+  </components>
+   
+  <jtag_chains>
+    <jtag_chain name="chain1">
+      <position name="0" component="part0"/>
+    </jtag_chain>
+  </jtag_chains>
+  
+  
+</board>
+
diff --git a/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/part0_pins.xml b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/part0_pins.xml
new file mode 100644
index 00000000..6d3c4d06
--- /dev/null
+++ b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/part0_pins.xml
@@ -0,0 +1,145 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?> 
+<part_info part_name="xczu3eg-sbva484-1-e">
+<pins>
+  
+  <pin index="0" name ="uart2_PL_TX"   iostandard="LVCMOS18" loc="AU15"/>
+  <pin index="1" name ="uart2_PL_RX"   iostandard="LVCMOS18" loc="AT15"/>
+  <pin index="2" name ="IIC0_SCL_MAIN" iostandard="LVCMOS18" loc="AT16"/>
+  <pin index="3" name ="IIC0_SDA_MAIN" iostandard="LVCMOS18" loc="AW16"/>
+  
+  <pin index="4" name ="IIC1_SCL_MAIN" iostandard="LVCMOS12" loc="AV16"/>
+  <pin index="5" name ="IIC1_SDA_MAIN" iostandard="LVCMOS12" loc="AV13"/>
+  
+  <pin index="6 " name ="c0_ddr4_act_n" iostandard="SSTL12_DCI" loc="A19" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="7 " name ="c0_ddr4_adr0" iostandard="SSTL12_DCI" loc="D18" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="8 " name ="c0_ddr4_adr1" iostandard="SSTL12_DCI" loc="E19" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="9 " name ="c0_ddr4_adr2" iostandard="SSTL12_DCI" loc="E17" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="10" name ="c0_ddr4_adr3" iostandard="SSTL12_DCI" loc="E18" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="11" name ="c0_ddr4_adr4" iostandard="SSTL12_DCI" loc="E16" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="12" name ="c0_ddr4_adr5" iostandard="SSTL12_DCI" loc="F16" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="13" name ="c0_ddr4_adr6" iostandard="SSTL12_DCI" loc="F19" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="14" name ="c0_ddr4_adr7" iostandard="SSTL12_DCI" loc="G19" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="15" name ="c0_ddr4_adr8" iostandard="SSTL12_DCI" loc="F15" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="16" name ="c0_ddr4_adr9" iostandard="SSTL12_DCI" loc="G15" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="17" name ="c0_ddr4_adr10" iostandard="SSTL12_DCI" loc="G18" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="18" name ="c0_ddr4_adr11" iostandard="SSTL12_DCI" loc="H18" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="19" name ="c0_ddr4_adr12" iostandard="SSTL12_DCI" loc="K17" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="20" name ="c0_ddr4_adr13" iostandard="SSTL12_DCI" loc="L17" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="21" name ="c0_ddr4_adr14" iostandard="SSTL12_DCI" loc="B17" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="22" name ="c0_ddr4_adr15" iostandard="SSTL12_DCI" loc="D15" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="23" name ="c0_ddr4_adr16" iostandard="SSTL12_DCI" loc="C18" output_impedance="RDRV_40_40" slew="FAST"/>
+  
+  <pin index="24" name ="c0_ddr4_ba0" iostandard="SSTL12_DCI" loc="K18" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="25" name ="c0_ddr4_ba1" iostandard="SSTL12_DCI" loc="K19" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="26" name ="c0_ddr4_bg" iostandard="SSTL12_DCI" loc="C16" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="27" name ="c0_ddr4_ck_c" iostandard="SSTL12_DCI" loc="F17" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="28" name ="c0_ddr4_ck_t" iostandard="SSTL12_DCI" loc="G17" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="29" name ="c0_ddr4_cke" iostandard="SSTL12_DCI" loc="A16" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="30" name ="c0_ddr4_cs_n" iostandard="SSTL12_DCI" loc="D16" output_impedance="RDRV_40_40" slew="FAST"/>
+
+  <pin index="31" name ="c0_ddr4_dm_dbi_n0" iostandard="POD12_DCI" loc="G13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="32" name ="c0_ddr4_dm_dbi_n1" iostandard="POD12_DCI" loc="C12" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="33" name ="c0_ddr4_dm_dbi_n2" iostandard="POD12_DCI" loc="K13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="34" name ="c0_ddr4_dm_dbi_n3" iostandard="POD12_DCI" loc="J8" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="35" name ="c0_ddr4_dm_dbi_n4" iostandard="POD12_DCI" loc="C23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="36" name ="c0_ddr4_dm_dbi_n5" iostandard="POD12_DCI" loc="F21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="37" name ="c0_ddr4_dm_dbi_n6" iostandard="POD12_DCI" loc="J23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="38" name ="c0_ddr4_dm_dbi_n7" iostandard="POD12_DCI" loc="N20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+ 
+  <pin index="39" name ="c0_ddr4_dq0" iostandard="POD12_DCI" loc="D14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="40" name ="c0_ddr4_dq1" iostandard="POD12_DCI" loc="E11" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="41" name ="c0_ddr4_dq2" iostandard="POD12_DCI" loc="F14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="42" name ="c0_ddr4_dq3" iostandard="POD12_DCI" loc="F12" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="43" name ="c0_ddr4_dq4" iostandard="POD12_DCI" loc="E14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="44" name ="c0_ddr4_dq5" iostandard="POD12_DCI" loc="H12" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="45" name ="c0_ddr4_dq6" iostandard="POD12_DCI" loc="G14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="46" name ="c0_ddr4_dq7" iostandard="POD12_DCI" loc="H13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="47" name ="c0_ddr4_dq8" iostandard="POD12_DCI" loc="B13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="48" name ="c0_ddr4_dq9" iostandard="POD12_DCI" loc="A15" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="49" name ="c0_ddr4_dq10" iostandard="POD12_DCI" loc="A12" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="50" name ="c0_ddr4_dq11" iostandard="POD12_DCI" loc="A14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="51" name ="c0_ddr4_dq12" iostandard="POD12_DCI" loc="D13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="52" name ="c0_ddr4_dq13" iostandard="POD12_DCI" loc="B14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="53" name ="c0_ddr4_dq14" iostandard="POD12_DCI" loc="A11" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="54" name ="c0_ddr4_dq15" iostandard="POD12_DCI" loc="C13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="55" name ="c0_ddr4_dq16" iostandard="POD12_DCI" loc="K11" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="56" name ="c0_ddr4_dq17" iostandard="POD12_DCI" loc="J11" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="57" name ="c0_ddr4_dq18" iostandard="POD12_DCI" loc="H10" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="58" name ="c0_ddr4_dq19" iostandard="POD12_DCI" loc="F11" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="59" name ="c0_ddr4_dq20" iostandard="POD12_DCI" loc="K10" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="60" name ="c0_ddr4_dq21" iostandard="POD12_DCI" loc="F10" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="61" name ="c0_ddr4_dq22" iostandard="POD12_DCI" loc="J10" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="62" name ="c0_ddr4_dq23" iostandard="POD12_DCI" loc="H11" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="63" name ="c0_ddr4_dq24" iostandard="POD12_DCI" loc="G9" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="64" name ="c0_ddr4_dq25" iostandard="POD12_DCI" loc="G7" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="65" name ="c0_ddr4_dq26" iostandard="POD12_DCI" loc="F9" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="66" name ="c0_ddr4_dq27" iostandard="POD12_DCI" loc="G6" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="67" name ="c0_ddr4_dq28" iostandard="POD12_DCI" loc="H6" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="68" name ="c0_ddr4_dq29" iostandard="POD12_DCI" loc="H7" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="69" name ="c0_ddr4_dq30" iostandard="POD12_DCI" loc="J9" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="70" name ="c0_ddr4_dq31" iostandard="POD12_DCI" loc="K9" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>  
+  <pin index="71" name ="c0_ddr4_dq32" iostandard="POD12_DCI" loc="C22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="72" name ="c0_ddr4_dq33" iostandard="POD12_DCI" loc="A20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="73" name ="c0_ddr4_dq34" iostandard="POD12_DCI" loc="A21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="74" name ="c0_ddr4_dq35" iostandard="POD12_DCI" loc="C21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="75" name ="c0_ddr4_dq36" iostandard="POD12_DCI" loc="B24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="76" name ="c0_ddr4_dq37" iostandard="POD12_DCI" loc="B20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="77" name ="c0_ddr4_dq38" iostandard="POD12_DCI" loc="B24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="78" name ="c0_ddr4_dq39" iostandard="POD12_DCI" loc="C20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="79" name ="c0_ddr4_dq40" iostandard="POD12_DCI" loc="E24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="80" name ="c0_ddr4_dq41" iostandard="POD12_DCI" loc="E22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="81" name ="c0_ddr4_dq42" iostandard="POD12_DCI" loc="E23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="82" name ="c0_ddr4_dq43" iostandard="POD12_DCI" loc="G20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="83" name ="c0_ddr4_dq44" iostandard="POD12_DCI" loc="F24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="84" name ="c0_ddr4_dq45" iostandard="POD12_DCI" loc="E21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="85" name ="c0_ddr4_dq46" iostandard="POD12_DCI" loc="F20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="86" name ="c0_ddr4_dq47" iostandard="POD12_DCI" loc="D21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="87" name ="c0_ddr4_dq48" iostandard="POD12_DCI" loc="H23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="88" name ="c0_ddr4_dq49" iostandard="POD12_DCI" loc="G23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="89" name ="c0_ddr4_dq50" iostandard="POD12_DCI" loc="K24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="90" name ="c0_ddr4_dq51" iostandard="POD12_DCI" loc="G22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="91" name ="c0_ddr4_dq52" iostandard="POD12_DCI" loc="J21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="92" name ="c0_ddr4_dq53" iostandard="POD12_DCI" loc="H22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="93" name ="c0_ddr4_dq54" iostandard="POD12_DCI" loc="L24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="94" name ="c0_ddr4_dq55" iostandard="POD12_DCI" loc="H21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="95" name ="c0_ddr4_dq56" iostandard="POD12_DCI" loc="L23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="96" name ="c0_ddr4_dq57" iostandard="POD12_DCI" loc="L20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="97" name ="c0_ddr4_dq58" iostandard="POD12_DCI" loc="L22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="98" name ="c0_ddr4_dq59" iostandard="POD12_DCI" loc="L21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="99" name ="c0_ddr4_dq60" iostandard="POD12_DCI" loc="M20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="100" name ="c0_ddr4_dq61" iostandard="POD12_DCI" loc="L19" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="101" name ="c0_ddr4_dq62" iostandard="POD12_DCI" loc="M19" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="102" name ="c0_ddr4_dq63" iostandard="POD12_DCI" loc="N19" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  
+  <pin index="103" name ="c0_ddr4_dqs0_c" iostandard="DIFF_POD12_DCI" loc="E12" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="104" name ="c0_ddr4_dqs0_t" iostandard="DIFF_POD12_DCI" loc="E13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="105" name ="c0_ddr4_dqs1_c" iostandard="DIFF_POD12_DCI" loc="B15" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="106" name ="c0_ddr4_dqs1_t" iostandard="DIFF_POD12_DCI" loc="C15" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="107" name ="c0_ddr4_dqs2_c" iostandard="DIFF_POD12_DCI" loc="J13" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="108" name ="c0_ddr4_dqs2_t" iostandard="DIFF_POD12_DCI" loc="J14" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="109" name ="c0_ddr4_dqs3_c" iostandard="DIFF_POD12_DCI" loc="G8" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="110" name ="c0_ddr4_dqs3_t" iostandard="DIFF_POD12_DCI" loc="H8" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/> 
+  <pin index="111" name ="c0_ddr4_dqs4_c" iostandard="DIFF_POD12_DCI" loc="B22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="112" name ="c0_ddr4_dqs4_t" iostandard="DIFF_POD12_DCI" loc="C22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>  
+  <pin index="113" name ="c0_ddr4_dqs5_c" iostandard="DIFF_POD12_DCI" loc="D24" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="114" name ="c0_ddr4_dqs5_t" iostandard="DIFF_POD12_DCI" loc="D23" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="115" name ="c0_ddr4_dqs6_c" iostandard="DIFF_POD12_DCI" loc="H20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="116" name ="c0_ddr4_dqs6_t" iostandard="DIFF_POD12_DCI" loc="J20" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="117" name ="c0_ddr4_dqs7_c" iostandard="DIFF_POD12_DCI" loc="K22" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="118" name ="c0_ddr4_dqs7_t" iostandard="DIFF_POD12_DCI" loc="K21" output_impedance="RDRV_40_40" slew="FAST" ibuf_low_pwr="FALSE" odt="RTT_40" equalization="EQ_LEVEL2" pre_emphasis="RDRV_240"/>
+  <pin index="119" name ="c0_ddr4_odt" iostandard="SSTL12_DCI" loc="B19" output_impedance="RDRV_40_40" slew="FAST"/>
+  <pin index="120" name ="c0_ddr4_reset_n" iostandard="LVCMOS18" loc="A17" drive="8"/>
+  <pin index="121" name ="c0_ddr4_parity"     iostandard="SSTL12_DCI"     loc="D19"  output_impedance="RDRV_40_40" slew="FAST"/>
+  
+  <pin index="122" name ="RADIO_LED0" iostandard="LVCMOS18" loc="AR9"/>
+  <pin index="123" name ="RADIO_LED1" iostandard="LVCMOS18" loc="B9"/>
+    
+  <pin index="124" name ="PL_RADIO_RESET" iostandard="LVCMOS18" loc="A3"/>	
+
+  <pin index="125" name ="HSIC_STR" iostandard="LVCMOS18" loc="A2"/>	
+  
+  <pin index="126" name ="GTR_CLK1_DP_27M_P user_si570_sysclk_p" iostandard="DIFF_SSTL12" loc="J19"/>
+  <pin index="127" name ="GTR_CLK1_DP_27M_N user_si570_sysclk_n" iostandard="DIFF_SSTL12" loc="J18"/>  
+ 
+</pins>
+</part_info>
diff --git a/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/preset.xml b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/preset.xml
new file mode 100644
index 00000000..0531e567
--- /dev/null
+++ b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/preset.xml
@@ -0,0 +1,609 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?> 
+<ip_presets schema="1.0">
+
+		
+
+  <ip_preset preset_proc_name="ddr4_sdram_preset">
+    <ip vendor="xilinx.com" library="ip" name="ddr4">
+      <user_parameters>
+        <user_parameter name="CONFIG.C0.DDR4_MemoryPart" value="MT40A512M16HA-075E" />
+        <user_parameter name="CONFIG.C0.DDR4_DataWidth" value="64" />
+        <user_parameter name="CONFIG.C0.DDR4_TimePeriod" value="833" />
+        <user_parameter name="CONFIG.C0.DDR4_InputClockPeriod" value="3332" />
+        <user_parameter name="CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ" value="100" />
+      </user_parameters>
+    </ip>
+  </ip_preset>
+  
+  <ip_preset preset_proc_name="uart2_PL_preset">
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="UART">
+      <user_parameters>
+        <user_parameter name="CONFIG.C_USE_UART_RX" value="1"/> 
+        <user_parameter name="CONFIG.C_USE_UART_TX" value="1"/> 
+      </user_parameters>
+    </ip>
+	<ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="UART">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_UART_RX" value="1"/> 
+          <user_parameter name="CONFIG.USE_UART_RX" value="1"/> 
+        </user_parameters>
+    </ip>
+  </ip_preset>
+ 
+  
+
+
+ <ip_preset preset_proc_name="zynq_ultra_ps_e_preset"> 
+  <ip vendor="xilinx.com" library="ip" name="zynq_ultra_ps_e" version="*"> 
+    <user_parameters>
+
+		<user_parameter name="CONFIG.PSU__PRESET_APPLIED" value="1"/> 	
+		<user_parameter name="CONFIG.PSU_BANK_0_IO_STANDARD" value="LVCMOS18"/>
+		<user_parameter name="CONFIG.PSU_BANK_1_IO_STANDARD" value="LVCMOS18"/>
+		<user_parameter name="CONFIG.PSU_BANK_2_IO_STANDARD" value="LVCMOS18"/>
+		<user_parameter name="CONFIG.PSU_BANK_3_IO_STANDARD" value="LVCMOS18"/>
+		
+		<user_parameter name="CONFIG.PSU_MIO_13_DRIVE_STRENGTH" value="4"/>
+		<user_parameter name="CONFIG.PSU_MIO_14_DRIVE_STRENGTH" value="4"/>
+		<user_parameter name="CONFIG.PSU_MIO_15_DRIVE_STRENGTH" value="4"/>		
+		<user_parameter name="CONFIG.PSU_MIO_16_DRIVE_STRENGTH" value="4"/>
+		<user_parameter name="CONFIG.PSU_MIO_21_DRIVE_STRENGTH" value="4"/>
+		<user_parameter name="CONFIG.PSU_MIO_22_DRIVE_STRENGTH" value="4"/>		
+
+    	<user_parameter name="CONFIG.PSU__DDRC__ENABLE_DP_SWITCH" value="1"/>		
+    	<user_parameter name="CONFIG.PSU__DDR_QOS_ENABLE" value="1"/>				
+    	<user_parameter name="CONFIG.PSU__DDR_QOS_PORT4_TYPE" value="Best Effort"/>		
+    	<user_parameter name="CONFIG.PSU__DDR_QOS_PORT5_TYPE" value="Best Effort"/>			
+	
+		<user_parameter name="CONFIG.PSU__CAN1__PERIPHERAL__ENABLE" value="0"/>
+
+		<user_parameter name="CONFIG.PSU__ENET3__PERIPHERAL__ENABLE" value="0"/>
+	    <user_parameter name="CONFIG.PSU__ENET3__GRP_MDIO__ENABLE" value="0"/>
+
+		<user_parameter name="CONFIG.PSU__GPIO0_MIO__IO" value="MIO 0 .. 25"/>
+		<user_parameter name="CONFIG.PSU__GPIO0_MIO__PERIPHERAL__ENABLE" value="1"/>
+		
+		<user_parameter name="CONFIG.PSU__GPIO1_MIO__IO" value="MIO 26 .. 51"/>
+		<user_parameter name="CONFIG.PSU__GPIO1_MIO__PERIPHERAL__ENABLE" value="1"/>
+		
+		<user_parameter name="CONFIG.PSU__I2C0__PERIPHERAL__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__I2C1__PERIPHERAL__ENABLE" value="1"/>
+		
+		<user_parameter name="CONFIG.PSU__I2C1__PERIPHERAL__IO" value="MIO 4 .. 5"/>
+		
+		<user_parameter name="CONFIG.PSU__SPI0__PERIPHERAL__ENABLE" value="1"/> 
+		<user_parameter name="CONFIG.PSU__SPI0__PERIPHERAL__IO" value="MIO 38 .. 43"/> 
+
+		<user_parameter name="CONFIG.PSU__SPI1__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__SPI1__PERIPHERAL__IO" value="MIO 6 .. 11"/> 
+ 
+		<user_parameter name="CONFIG.PSU__QSPI__PERIPHERAL__ENABLE" value="0"/>
+
+ 		<user_parameter name="CONFIG.PSU__SD0__PERIPHERAL__ENABLE" value="1"/>		
+		<user_parameter name="CONFIG.PSU__SD0__DATA_TRANSFER_MODE" value="4Bit"/> 
+		<user_parameter name="CONFIG.PSU__SD0__PERIPHERAL__IO" value="MIO 13 .. 16 21 22"/>
+		<user_parameter name="CONFIG.PSU__SD0__SLOT_TYPE" value="SD 2.0"/>
+		<user_parameter name="CONFIG.PSU__SD0__GRP_CD__ENABLE" value="1"/>
+ 
+		<user_parameter name="CONFIG.PSU__SD1__PERIPHERAL__ENABLE" value="1"/>		
+		<user_parameter name="CONFIG.PSU__SD1__DATA_TRANSFER_MODE" value="4Bit"/> 
+		<user_parameter name="CONFIG.PSU__SD1__PERIPHERAL__IO" value="MIO 46 .. 51"/>
+		<user_parameter name="CONFIG.PSU__SD1__SLOT_TYPE" value="SD 2.0"/>
+		
+		<user_parameter name="CONFIG.PSU__UART0__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__UART0__PERIPHERAL__IO" value="MIO 2 .. 3"/>
+		
+		<user_parameter name="CONFIG.PSU__UART1__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__UART1__PERIPHERAL__IO" value="MIO 0 .. 1"/>
+		
+		
+		<user_parameter name="CONFIG.PSU__USE__IRQ0" value="1"/>
+		<user_parameter name="CONFIG.PSU__USE__M_AXI_GP0" value="1"/>
+		<user_parameter name="CONFIG.PSU__USE__M_AXI_GP1" value="1"/>
+		<user_parameter name="CONFIG.PSU__USE__M_AXI_GP2" value="0"/>
+		
+			
+		<user_parameter name="CONFIG.PSU__PMU__PERIPHERAL__ENABLE" value="1"/>
+		
+		<user_parameter name="CONFIG.PSU__PMU__GPI0__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPI1__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPI2__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPI3__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPI4__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPI5__ENABLE" value="0"/>
+
+		<user_parameter name="CONFIG.PSU__PMU__GPO0__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPO1__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPO2__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPO2__POLARITY" value="high"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPO3__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPO4__ENABLE" value="0"/>
+		<user_parameter name="CONFIG.PSU__PMU__GPO5__ENABLE" value="0"/>		
+		
+		<user_parameter name="CONFIG.PSU__GPIO2_MIO__PERIPHERAL__ENABLE" value="1"/>		
+	
+		<user_parameter name="CONFIG.PSU__PSS_REF_CLK__FREQMHZ" value="33.333333"/>
+		
+		<user_parameter name="CONFIG.PSU__DISPLAYPORT__LANE0__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__DISPLAYPORT__LANE0__IO" value="GT Lane1"/>
+		<user_parameter name="CONFIG.PSU__DISPLAYPORT__LANE1__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__DISPLAYPORT__LANE1__IO" value="GT Lane0"/>
+		<user_parameter name="CONFIG.PSU__DISPLAYPORT__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__DPAUX__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__DPAUX__PERIPHERAL__IO" value="MIO 27 .. 30"/>
+	
+		<user_parameter name="CONFIG.PSU__DP__LANE_SEL" value="Dual Lower"/>
+		<user_parameter name="CONFIG.PSU__DP__REF_CLK_FREQ" value="27"/>
+		<user_parameter name="CONFIG.PSU__DP__REF_CLK_SEL" value="Ref Clk1"/>
+		
+		<user_parameter name="CONFIG.PSU__USB0__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__USB0__PERIPHERAL__IO" value="MIO 52 .. 63"/>
+		<user_parameter name="CONFIG.PSU__USB3_0__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__USB3_0__PERIPHERAL__IO" value="GT Lane2"/>			
+		
+		<user_parameter name="CONFIG.PSU__USB0__REF_CLK_SEL" value="Ref Clk0"/>		
+		<user_parameter name="CONFIG.PSU__USB0__REF_CLK_FREQ" value="26"/>		
+
+		<user_parameter name="CONFIG.PSU__USB1__REF_CLK_SEL" value="Ref Clk0"/>		
+		<user_parameter name="CONFIG.PSU__USB1__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__USB1__PERIPHERAL__IO" value="MIO 64 .. 75"/>		
+		<user_parameter name="CONFIG.PSU__USB3_1__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__USB3_1__PERIPHERAL__IO" value="GT Lane3"/>	
+
+		<user_parameter name="CONFIG.PSU__SATA__PERIPHERAL__ENABLE" value="0"/>
+
+		<user_parameter name="CONFIG.PSU__DDRC__VREF" value="0"/>
+		<user_parameter name="CONFIG.PSU__DDRC__ECC" value="Disabled"/>
+		<user_parameter name="CONFIG.PSU__DDRC__BUS_WIDTH" value="32 Bit"/>
+		<user_parameter name="CONFIG.PSU__DDRC__DRAM_WIDTH" value="32 Bits"/>
+		<user_parameter name="CONFIG.PSU__DDRC__MEMORY_TYPE" value="LPDDR 4"/>
+		<user_parameter name="CONFIG.PSU__DDRC__SPEED_BIN" value="LPDDR4_1066"/>
+		<user_parameter name="CONFIG.PSU__DDRC__BANK_ADDR_COUNT" value="3"/>
+		<user_parameter name="CONFIG.PSU__DDRC__DEVICE_CAPACITY" value="16384 MBits"/>
+		<user_parameter name="CONFIG.PSU__DDRC__RANK_ADDR_COUNT" value="0"/>
+		<user_parameter name="CONFIG.PSU__DDRC__ROW_ADDR_COUNT" value="16"/>		
+		<user_parameter name="CONFIG.PSU__DDRC__COL_ADDR_COUNT" value="10"/>
+		<user_parameter name="CONFIG.PSU__DDRC__T_RCD" value="10"/>
+		<user_parameter name="CONFIG.PSU__DDRC__T_RP" value="12"/>
+		<user_parameter name="CONFIG.PSU__DDRC__T_RC" value="63"/>
+		<user_parameter name="CONFIG.PSU__DDRC__T_RAS_MIN" value="42"/>
+		<user_parameter name="CONFIG.PSU__DDRC__T_FAW" value="40.0"/>
+		<user_parameter name="CONFIG.PSU__DDRC__PHY_DBI_MODE" value="0"/>
+		<user_parameter name="CONFIG.PSU__DDRC__CLOCK_STOP_EN" value="0"/>
+		<user_parameter name="CONFIG.PSU__DDRC__TRAIN_DATA_EYE" value="1"/>
+		<user_parameter name="CONFIG.PSU__DDRC__TRAIN_READ_GATE" value="1"/>
+		<user_parameter name="CONFIG.PSU__DDRC__TRAIN_WRITE_LEVEL" value="1"/>
+		<user_parameter name="CONFIG.PSU__DDRC__BRC_MAPPING" value="ROW_BANK_COL"/>
+		<user_parameter name="CONFIG.PSU__DDRC__DM_DBI" value="DM_NO_DBI"/>
+		<user_parameter name="CONFIG.PSU__DDRC__PER_BANK_REFRESH" value="0"/>
+		<user_parameter name="CONFIG.PSU__DDRC__STATIC_RD_MODE" value="0"/>
+		
+		<user_parameter name="CONFIG.PSU__SWDT0__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__SWDT1__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__TTC0__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC0_SEL" value="APB"/>
+		<user_parameter name="CONFIG.PSU__TTC1__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC1_SEL" value="APB"/>
+		<user_parameter name="CONFIG.PSU__TTC2__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC2_SEL" value="APB"/>
+		<user_parameter name="CONFIG.PSU__TTC3__PERIPHERAL__ENABLE" value="1"/>
+		<user_parameter name="CONFIG.PSU__IOU_SLCR__IOU_TTC_APB_CLK__TTC3_SEL" value="APB"/>
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__SRCSEL" value="IOPLL"/>
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__FREQMHZ" value="250"/>
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__SRCSEL" value="IOPLL"/>
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__FREQMHZ" value="20"/>
+		<user_parameter name="CONFIG.PSU__FPGA_PL0_ENABLE" value="1"/>		
+		<user_parameter name="CONFIG.PSU__FPGA_PL1_ENABLE" value="0"/>		
+		<user_parameter name="CONFIG.PSU__FPGA_PL2_ENABLE" value="0"/>		
+		<user_parameter name="CONFIG.PSU__FPGA_PL3_ENABLE" value="0"/>		
+
+		<user_parameter name="CONFIG.PSU__OVERRIDE__BASIC_CLOCK" value="1"/>
+		<user_parameter name="CONFIG.PSU__CRF_APB__ACPU_CTRL__ACT_FREQMHZ" value="1199.998800"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__ACPU_CTRL__DIVISOR0" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__ACPU_CTRL__SRCSEL" value="APLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__APLL_CTRL__DIV2" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__APLL_CTRL__FBDIV" value="72"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__APLL_CTRL__FRACDATA" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__APLL_CTRL__SRCSEL" value="PSS_REF_CLK"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__APLL_FRAC_CFG__ENABLED" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__APLL_TO_LPD_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__ACT_FREQMHZ" value="249.999750"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_FPD_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_TRACE_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__ACT_FREQMHZ" value="249.999750"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DBG_TSTMP_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DDR_CTRL__ACT_FREQMHZ" value="266.666400"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DDR_CTRL__DIVISOR0" value="4"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DDR_CTRL__FREQMHZ" value="533"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DDR_CTRL__SRCSEL" value="DPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__ACT_FREQMHZ" value="599.999400"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPDMA_REF_CTRL__SRCSEL" value="APLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPLL_CTRL__DIV2" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPLL_CTRL__FBDIV" value="64"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPLL_CTRL__FRACDATA" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPLL_CTRL__SRCSEL" value="PSS_REF_CLK"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPLL_FRAC_CFG__ENABLED" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DPLL_TO_LPD_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__ACT_FREQMHZ" value="24.576018"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__DIVISOR0" value="16"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_AUDIO_REF_CTRL__SRCSEL" value="RPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_AUDIO__FRAC_ENABLED" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__ACT_FREQMHZ" value="26.214419"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_STC_REF_CTRL__SRCSEL" value="RPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__ACT_FREQMHZ" value="297.029294"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__DIVISOR0" value="4"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_VIDEO_REF_CTRL__SRCSEL" value="VPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__DP_VIDEO__FRAC_ENABLED" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__ACT_FREQMHZ" value="599.999400"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__GDMA_REF_CTRL__SRCSEL" value="APLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__GPU_REF_CTRL__ACT_FREQMHZ" value="499.999500"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__GPU_REF_CTRL__DIVISOR0" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__GPU_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__PCIE_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__SATA_REF_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__SATA_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__DIVISOR0" value="5"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__TOPSW_LSBUS_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__ACT_FREQMHZ" value="533.332800"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__DIVISOR0" value="2"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__TOPSW_MAIN_CTRL__SRCSEL" value="DPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_CTRL__DIV2" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_CTRL__FBDIV" value="71"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_CTRL__FRACDATA" value="0.2871"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_CTRL__FRACFREQ" value="300"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_CTRL__SRCSEL" value="PSS_REF_CLK"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_FRAC_CFG__ENABLED" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRF_APB__VPLL_TO_LPD_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__ACT_FREQMHZ" value="499.999500"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__ADMA_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__AFI6_REF_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__AMS_REF_CTRL__ACT_FREQMHZ" value="51.724086"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__AMS_REF_CTRL__DIVISOR0" value="29"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__AMS_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__AMS_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CAN0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CAN1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CPU_R5_CTRL__ACT_FREQMHZ" value="499.999500"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CPU_R5_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CPU_R5_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__ACT_FREQMHZ" value="500"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__DIVISOR0" value="4"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__FREQMHZ" value="400"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__CSU_PLL_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__ACT_FREQMHZ" value="249.999750"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__DIVISOR0" value="6"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__DBG_LPD_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__DLL_REF_CTRL__ACT_FREQMHZ" value="1499.998500"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__DIVISOR0" value="12"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__DIVISOR0" value="12"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__DIVISOR0" value="12"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM2_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__DIVISOR0" value="12"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM3_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__DIVISOR0" value="6"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__GEM_TSU_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__I2C1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOPLL_CTRL__DIV2" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOPLL_CTRL__FBDIV" value="45"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOPLL_CTRL__FRACDATA" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOPLL_CTRL__SRCSEL" value="PSS_REF_CLK"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOPLL_FRAC_CFG__ENABLED" value="0"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOPLL_TO_FPD_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__ACT_FREQMHZ" value="249.999750"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__DIVISOR0" value="6"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__IOU_SWITCH_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__LPD_LSBUS_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__ACT_FREQMHZ" value="499.999500"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__LPD_SWITCH_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__NAND_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__NAND_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__NAND_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PCAP_CTRL__ACT_FREQMHZ" value="187.499813"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PCAP_CTRL__DIVISOR0" value="8"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PCAP_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL0_REF_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL0_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL1_REF_CTRL__ACT_FREQMHZ" value="24.999975"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL1_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL1_REF_CTRL__DIVISOR1" value="4"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL1_REF_CTRL__FREQMHZ" value="100"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL2_REF_CTRL__ACT_FREQMHZ" value="299.999700"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL2_REF_CTRL__DIVISOR0" value="5"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL2_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL2_REF_CTRL__FREQMHZ" value="100"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL2_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL3_REF_CTRL__ACT_FREQMHZ" value="374.999625"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL3_REF_CTRL__DIVISOR0" value="4"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL3_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL3_REF_CTRL__FREQMHZ" value="100"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__PL3_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__DIVISOR0" value="12"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__QSPI_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_CTRL__DIV2" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_CTRL__FBDIV" value="70"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_CTRL__FRACDATA" value="0.779"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_CTRL__FRACFREQ" value="25"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_CTRL__SRCSEL" value="PSS_REF_CLK"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_FRAC_CFG__ENABLED" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__RPLL_TO_FPD_CTRL__DIVISOR0" value="3"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__ACT_FREQMHZ" value="187.499813"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__DIVISOR0" value="8"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__ACT_FREQMHZ" value="187.499813"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__DIVISOR0" value="8"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SDIO1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__ACT_FREQMHZ" value="187.499813"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__DIVISOR0" value="8"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__ACT_FREQMHZ" value="187.499813"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__DIVISOR0" value="8"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__SPI1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__TIMESTAMP_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART0_REF_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART0_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART0_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART0_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART1_REF_CTRL__ACT_FREQMHZ" value="99.999900"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART1_REF_CTRL__DIVISOR0" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART1_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__UART1_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__ACT_FREQMHZ" value="249.999750"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__DIVISOR0" value="6"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB0_BUS_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__ACT_FREQMHZ" value="249.999750"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__DIVISOR0" value="6"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__DIVISOR1" value="1"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB1_BUS_REF_CTRL__SRCSEL" value="IOPLL"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__ACT_FREQMHZ" value="19.999980"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__DIVISOR0" value="5"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__DIVISOR1" value="15"/>		
+		<user_parameter name="CONFIG.PSU__CRL_APB__USB3_DUAL_REF_CTRL__SRCSEL" value="IOPLL"/>		
+
+	</user_parameters>
+
+    </ip>
+    </ip_preset>
+ 
+    <ip_preset preset_proc_name="dip_switches_8bits_preset">
+	
+     <ip vendor="xilinx.com" library="ip" name="axi_gpio" ip_interface="GPIO">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_GPIO_WIDTH" value="8"/> 
+          <user_parameter name="CONFIG.C_ALL_INPUTS" value="1"/> 
+	  <user_parameter name="CONFIG.C_ALL_OUTPUTS" value="0"/>
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="axi_gpio" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_IS_DUAL" value="1"/> 
+          <user_parameter name="CONFIG.C_GPIO2_WIDTH" value="8"/> 
+          <user_parameter name="CONFIG.C_ALL_INPUTS_2" value="1"/> 
+	  <user_parameter name="CONFIG.C_ALL_OUTPUTS_2" value="0"/>
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO1">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI1" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI1_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI2" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI2_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO3">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI3" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI3_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO4">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI4" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI4_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO1">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI1" value="1"/> 
+          <user_parameter name="CONFIG.GPI1_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI2" value="1"/> 
+          <user_parameter name="CONFIG.GPI2_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+     <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO3">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI3" value="1"/> 
+          <user_parameter name="CONFIG.GPI1_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO4">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI4" value="1"/> 
+          <user_parameter name="CONFIG.GPI2_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+  </ip_preset>
+  
+  <ip_preset preset_proc_name="led_8bits_preset">
+    <ip vendor="xilinx.com" library="ip" name="axi_gpio" ip_interface="GPIO">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_GPIO_WIDTH" value="8"/> 
+          <user_parameter name="CONFIG.C_ALL_OUTPUTS" value="1"/> 
+	  <user_parameter name="CONFIG.C_ALL_INPUTS" value="0"/>
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="axi_gpio" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_IS_DUAL" value="1"/> 
+          <user_parameter name="CONFIG.C_GPIO2_WIDTH" value="8"/> 
+          <user_parameter name="CONFIG.C_ALL_OUTPUTS_2" value="1"/> 
+	  <user_parameter name="CONFIG.C_ALL_INPUTS_2" value="0"/>
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO1">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPO1" value="1"/> 
+          <user_parameter name="CONFIG.C_GPO1_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPO2" value="1"/> 
+          <user_parameter name="CONFIG.C_GPO2_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO3">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPO3" value="1"/> 
+          <user_parameter name="CONFIG.C_GPO3_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO4">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPO4" value="1"/> 
+          <user_parameter name="CONFIG.C_GPO4_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO1">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPO1" value="1"/> 
+          <user_parameter name="CONFIG.GPO1_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPO2" value="1"/> 
+          <user_parameter name="CONFIG.GPO2_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO3">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPO3" value="1"/> 
+          <user_parameter name="CONFIG.GPO3_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO4">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPO4" value="1"/> 
+          <user_parameter name="CONFIG.GPO4_SIZE" value="8"/> 
+        </user_parameters>
+    </ip>
+  </ip_preset>
+  
+  <ip_preset preset_proc_name="push_buttons_5bits_preset">
+    <ip vendor="xilinx.com" library="ip" name="axi_gpio" ip_interface="GPIO">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_GPIO_WIDTH" value="5"/> 
+          <user_parameter name="CONFIG.C_ALL_INPUTS" value="1"/> 
+	  <user_parameter name="CONFIG.C_ALL_OUTPUTS" value="0"/>
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="axi_gpio" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_IS_DUAL" value="1"/> 
+          <user_parameter name="CONFIG.C_GPIO2_WIDTH" value="5"/> 
+          <user_parameter name="CONFIG.C_ALL_INPUTS_2" value="1"/> 
+	  <user_parameter name="CONFIG.C_ALL_OUTPUTS_2" value="0"/>
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO1">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI1" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI1_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI2" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI2_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO3">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI3" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI3_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="iomodule" ip_interface="GPIO4">
+        <user_parameters>
+          <user_parameter name="CONFIG.C_USE_GPI4" value="1"/> 
+          <user_parameter name="CONFIG.C_GPI4_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO1">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI1" value="1"/> 
+          <user_parameter name="CONFIG.GPI1_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO2">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI2" value="1"/> 
+          <user_parameter name="CONFIG.GPI2_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO3">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI3" value="1"/> 
+          <user_parameter name="CONFIG.GPI3_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+    <ip vendor="xilinx.com" library="ip" name="microblaze_mcs" ip_interface="GPIO4">
+        <user_parameters>
+          <user_parameter name="CONFIG.USE_GPI4" value="1"/> 
+          <user_parameter name="CONFIG.GPI4_SIZE" value="5"/> 
+        </user_parameters>
+    </ip>
+  </ip_preset>
+
+</ip_presets>
diff --git a/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/ultra96v2.jpg b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/ultra96v2.jpg
new file mode 100644
index 00000000..4512441b
Binary files /dev/null and b/toolflow/vivado/common/data/boards/board_files/ultra96v2/1.0/ultra96v2.jpg differ
diff --git a/toolflow/vivado/common/design.master.tcl.template b/toolflow/vivado/common/design.master.tcl.template
index 542de037..61430397 100644
--- a/toolflow/vivado/common/design.master.tcl.template
+++ b/toolflow/vivado/common/design.master.tcl.template
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		design.master.tcl.template
-# @brief 	Master template used to instantiate the Vivado Tcl script to create a design.
-# @author	J. Korinth (TU Darmstadt), jk@esa.cs.tu-darmstadt.de
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 #
 # check TAPASCO_HOME env var
 if {![info exists ::env(TAPASCO_HOME)]} {
@@ -114,8 +111,11 @@ if {[llength [info commands platform::generate_wrapper]] == 0} {
   platform::generate_wrapper
 }
 
-# Disable OOC synthesis to avoid log file problems
-set_property synth_checkpoint_mode None [get_files system.bd]
+# activate retiming in synthesis
+set_property STEPS.SYNTH_DESIGN.ARGS.RETIMING true [get_runs synth_1]
+if {[info exists platform::ooc_synth_mode] == 0 || [string is false $platform::ooc_synth_mode]} {
+  set_property synth_checkpoint_mode None [get_files "[platform::get_bd_name].bd"]
+}
 
 # Synthesis and P&R effort level
 set effort_level "@@EFFORT_LEVEL@@"
diff --git a/toolflow/vivado/common/evaluate_ip.tcl.template b/toolflow/vivado/common/evaluate_ip.tcl.template
index 3b76ade3..403b4695 100644
--- a/toolflow/vivado/common/evaluate_ip.tcl.template
+++ b/toolflow/vivado/common/evaluate_ip.tcl.template
@@ -1,24 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		evaluate_ip.tcl.template
-# @brief	Tcl template to get area and timing estimates for IPXACT cores.
-# @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
 # source base lib
diff --git a/toolflow/vivado/common/hls.tcl.template b/toolflow/vivado/common/hls.tcl.template
index 2298164c..9547d212 100644
--- a/toolflow/vivado/common/hls.tcl.template
+++ b/toolflow/vivado/common/hls.tcl.template
@@ -1,32 +1,29 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
-# @file		hls.tcl.template
-# @brief	Tcl template to generate Vivado HLS script.
-# @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de
-# 
+
 # load common code etc.
 @@HEADER@@
 
 # if set, co-simulation will be performed
-# This flag is hardcoded to 0 for now until Vivado fixes 
+# This flag is hardcoded to 0 for now until Vivado fixes
 # cosimulation for current linux distributions
-# If you want to get back to default behaviour please 
+# If you want to get back to default behaviour please
 # replace the 0 with: @@COSIMULATION_FLAG@@
 set do_cosim 0
 
@@ -53,6 +50,8 @@ set_directive_interface -mode s_axilite @@TOP@@
 
 @@DIRECTIVES@@
 
+config_interface -m_axi_addr64
+
 # synthesize the core
 csynth_design
 # execute co-simulation (if set)
diff --git a/toolflow/vivado/common/hls_patch_saif.sh b/toolflow/vivado/common/hls_patch_saif.sh
index 6ccb373d..d674a8fa 100755
--- a/toolflow/vivado/common/hls_patch_saif.sh
+++ b/toolflow/vivado/common/hls_patch_saif.sh
@@ -1,25 +1,21 @@
 #!/bin/bash
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
-# @file		hls_patch_saif.sh
-# @brief	Patches the run_ippack.tcl generated by Vivado HLS to include 
-#               SAIF files generated during co-simulation.
-# @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de
-# 
+
 sed -i 's/\(ipx::save_core.*\)$/set saif_grp [ipx::add_file_group "saif" $core]\nipx::add_file [glob misc\/*.saif] $saif_grp\n\1/g' run_ippack.tcl
diff --git a/toolflow/vivado/common/hls_patch_subcores.sh b/toolflow/vivado/common/hls_patch_subcores.sh
index 0f0a31bc..61a286a5 100755
--- a/toolflow/vivado/common/hls_patch_subcores.sh
+++ b/toolflow/vivado/common/hls_patch_subcores.sh
@@ -1,25 +1,21 @@
 #!/bin/bash
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		hls_patch_subcores.sh
-# @brief	Patches the run_ippack.tcl generated by Vivado HLS to include
-#               SAIF files generated during co-simulation.
-# @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 sed -i 's/\(ipx::save_core.*\)$/if {[llength [glob -nocomplain subcore\/*]] > 0} {\n  set subcore_grp [ipx::add_file_group "subcore" $core]\n  foreach f [glob -nocomplain subcore\/*] { ipx::add_file $f $subcore_grp }\n}\n\1/g' run_ippack.tcl
diff --git a/toolflow/vivado/common/hls_patch_supported_families.sh b/toolflow/vivado/common/hls_patch_supported_families.sh
index 1508e839..44b8f041 100755
--- a/toolflow/vivado/common/hls_patch_supported_families.sh
+++ b/toolflow/vivado/common/hls_patch_supported_families.sh
@@ -1,27 +1,22 @@
 #!/bin/bash
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		hls_patch_supported_families.sh
-# @brief	Patches the run_ippack.tcl generated by Vivado HLS to include
-#               all Zynq, Virtex7, Artix7 and Kintex7 FPGAs in the supported
-#		device families for the IP cores.
-# @authors	J. Korinth (jk@esa.cs.tu-darmstadt.de
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
-sed -i 's/set_property supported_families .*$/set_property supported_families [list zynq Pre-Production virtex7 Pre-Production kintex7 Pre-Production artix7 Pre-Production zynquplus Pre-Production virtex7 Pre-Production qvirtex7 Pre-Production kintex7 Pre-Production kintex7l Pre-Production qkintex7 Pre-Production qkintex7l Pre-Production artix7 Pre-Production artix7l Pre-Production aartix7 Pre-Production qartix7 Pre-Production zynq Pre-Production qzynq Pre-Production azynq Pre-Production spartan7 Pre-Production virtexu Pre-Production virtexuplus Pre-Production kintexuplus Pre-Production zynquplus Pre-Production kintexu Pre-Production] $core/g' run_ippack.tcl
+
+sed -i 's/set_property supported_families .*$/set_property supported_families [list zynq Pre-Production virtex7 Pre-Production kintex7 Pre-Production artix7 Pre-Production zynquplus Pre-Production virtex7 Pre-Production qvirtex7 Pre-Production kintex7 Pre-Production kintex7l Pre-Production qkintex7 Pre-Production qkintex7l Pre-Production artix7 Pre-Production artix7l Pre-Production aartix7 Pre-Production qartix7 Pre-Production zynq Pre-Production qzynq Pre-Production azynq Pre-Production spartan7 Pre-Production virtexu Pre-Production virtexuplus Pre-Production virtexuplushbm Pre-Production kintexuplus Pre-Production zynquplus Pre-Production kintexu Pre-Production] $core/g' run_ippack.tcl
 sed -i 's/\(set DisplayName.*\)$/\1\nset IPName $DisplayName/g' run_ippack.tcl
diff --git a/toolflow/vivado/common/ip.tcl b/toolflow/vivado/common/ip.tcl
index bc83b519..3ee2b541 100644
--- a/toolflow/vivado/common/ip.tcl
+++ b/toolflow/vivado/common/ip.tcl
@@ -1,3 +1,23 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+
 namespace eval ::tapasco::ip {
   set stdcomps [dict create]
 
@@ -435,6 +455,7 @@ namespace eval ::tapasco::ip {
 
     set_property -dict [list CONFIG.Memory_Type {Single_Port_ROM} \
                          CONFIG.Load_Init_File {true}         \
+                         CONFIG.EN_SAFETY_CKT {false}         \
                          CONFIG.Coe_File $outfile] [get_bd_cells -filter "NAME == ${name}_base"]
   }
 
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/component.xml b/toolflow/vivado/common/ip/AWSIntrCtrl/component.xml
new file mode 100644
index 00000000..4e65e316
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/component.xml
@@ -0,0 +1,872 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+  <spirit:vendor>esa.informatik.tu-darmstadt.de</spirit:vendor>
+  <spirit:library>user</spirit:library>
+  <spirit:name>AWSIntrCtrl</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>S_AXI</spirit:name>
+      <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
+      <spirit:slave>
+        <spirit:memoryMapRef spirit:memoryMapRef="S_AXI"/>
+      </spirit:slave>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWADDR</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awaddr</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWPROT</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awprot</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awvalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWREADY</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WDATA</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>S_AXI_wdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WSTRB</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>S_AXI_wstrb</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
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+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>S_AXI_bvalid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>S_AXI_bready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>S_AXI_bresp</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">1</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>interrupt_pcie</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">3</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>interrupt_design</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">127</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>irq_req</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">15</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>irq_ack</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">15</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+  </spirit:model>
+  <spirit:choices>
+    <spirit:choice>
+      <spirit:name>choice_list_9d8b0d81</spirit:name>
+      <spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
+      <spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
+    </spirit:choice>
+  </spirit:choices>
+  <spirit:fileSets>
+    <spirit:fileSet>
+      <spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
+      <spirit:file>
+        <spirit:name>constraints/msix_intr_ctrl.xdc</spirit:name>
+        <spirit:userFileType>xdc</spirit:userFileType>
+        <spirit:define>
+          <spirit:name>processing_order</spirit:name>
+          <spirit:value>late</spirit:value>
+        </spirit:define>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/FIFO2.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/SizedFIFO.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/SyncPulse.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/mkAWSIntrCtrl.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+        <spirit:userFileType>CHECKSUM_fc99f411</spirit:userFileType>
+      </spirit:file>
+    </spirit:fileSet>
+    <spirit:fileSet>
+      <spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
+      <spirit:file>
+        <spirit:name>src/FIFO2.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/SizedFIFO.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/SyncPulse.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/mkAWSIntrCtrl.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+    </spirit:fileSet>
+    <spirit:fileSet>
+      <spirit:name>xilinx_xpgui_view_fileset</spirit:name>
+      <spirit:file>
+        <spirit:name>xgui/AWSIntrCtrl_v1_0.tcl</spirit:name>
+        <spirit:fileType>tclSource</spirit:fileType>
+        <spirit:userFileType>CHECKSUM_f92e9879</spirit:userFileType>
+        <spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
+      </spirit:file>
+    </spirit:fileSet>
+  </spirit:fileSets>
+  <spirit:description>AWSIntrCtrl</spirit:description>
+  <spirit:parameters>
+    <spirit:parameter>
+      <spirit:name>Component_Name</spirit:name>
+      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">mkAWSIntrCtrl_v1_0</spirit:value>
+    </spirit:parameter>
+  </spirit:parameters>
+  <spirit:vendorExtensions>
+    <xilinx:coreExtensions>
+      <xilinx:supportedFamilies>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">zynq</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">artix7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">zynquplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qvirtex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintex7l</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qkintex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qkintex7l</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">artix7l</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">aartix7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qartix7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qzynq</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">azynq</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">spartan7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexu</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintexu</xilinx:family>
+      </xilinx:supportedFamilies>
+      <xilinx:taxonomies>
+        <xilinx:taxonomy>/UserIP</xilinx:taxonomy>
+      </xilinx:taxonomies>
+      <xilinx:displayName>AWSIntrCtrl</xilinx:displayName>
+      <xilinx:definitionSource>package_project</xilinx:definitionSource>
+      <xilinx:coreRevision>1</xilinx:coreRevision>
+      <xilinx:coreCreationDateTime>2019-07-17T16:53:30Z</xilinx:coreCreationDateTime>
+      <xilinx:tags>
+        <xilinx:tag xilinx:name="nopcore"/>
+      </xilinx:tags>
+    </xilinx:coreExtensions>
+    <xilinx:packagingInfo>
+      <xilinx:xilinxVersion>2018.3</xilinx:xilinxVersion>
+      <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="fd0ed7f1"/>
+      <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="ce939530"/>
+      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="361a63a6"/>
+      <xilinx:checksum xilinx:scope="ports" xilinx:value="ada4e168"/>
+      <xilinx:checksum xilinx:scope="parameters" xilinx:value="36b2a869"/>
+    </xilinx:packagingInfo>
+  </spirit:vendorExtensions>
+</spirit:component>
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/constraints/msix_intr_ctrl.xdc b/toolflow/vivado/common/ip/AWSIntrCtrl/constraints/msix_intr_ctrl.xdc
new file mode 100644
index 00000000..f116b53b
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/constraints/msix_intr_ctrl.xdc
@@ -0,0 +1,20 @@
+##
+## set properties to help out clock domain crossing analysis
+##
+
+set s_clk [get_clocks -of_objects [get_ports -scoped_to_current_instance S_AXI_ACLK]]
+set m_clk [get_clocks -of_object [get_ports -scoped_to_current_instance design_clk]]
+set_max_delay -from [filter [all_fanout -from [get_ports -scoped_to_current_instance S_AXI_ACLK] -flat -endpoints_only]          {IS_LEAF}] -to [filter [all_fanout -from [get_ports -scoped_to_current_instance design_clk] -flat -only_cells] {IS_SEQUENTIAL    && (NAME !~ *dout_i_reg[*])}] -datapath_only [get_property -min PERIOD $s_clk]
+ set_max_delay -from [filter [all_fanout -from [get_ports -scoped_to_current_instance design_clk] -flat -endpoints_only]          {IS_LEAF}] -to [filter [all_fanout -from [get_ports -scoped_to_current_instance S_AXI_ACLK] -flat -only_cells] {IS_SEQUENTIAL    && (NAME !~ *dout_i_reg[*])}] -datapath_only [get_property -min PERIOD $m_clk]
+
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *reset_hold_reg*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *sGEnqPtr*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dGDeqPtr*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *sSyncReg*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dSyncReg*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dEnqPtr*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dEnqToggle*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dDeqToggle*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dNotEmpty*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dLastState*}] {IS_SEQUENTIAL}]
+set_false_path -through [get_ports -scoped_to_current_instance -filter {NAME =~ design_rst}] -to [filter [get_cells -hier -filter {NAME =~ *dSyncPulse_reg*}] {IS_SEQUENTIAL}]
\ No newline at end of file
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/src/FIFO2.v b/toolflow/vivado/common/ip/AWSIntrCtrl/src/FIFO2.v
new file mode 100644
index 00000000..002f13e0
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/src/FIFO2.v
@@ -0,0 +1,176 @@
+
+// Copyright (c) 2000-2012 Bluespec, Inc.
+
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+//
+// $Revision$
+// $Date$
+
+`ifdef BSV_ASSIGNMENT_DELAY
+`else
+  `define BSV_ASSIGNMENT_DELAY
+`endif
+
+`ifdef BSV_POSITIVE_RESET
+  `define BSV_RESET_VALUE 1'b1
+  `define BSV_RESET_EDGE posedge
+`else
+  `define BSV_RESET_VALUE 1'b0
+  `define BSV_RESET_EDGE negedge
+`endif
+
+`ifdef BSV_ASYNC_RESET
+ `define BSV_ARESET_EDGE_META or `BSV_RESET_EDGE RST
+`else
+ `define BSV_ARESET_EDGE_META
+`endif
+
+`ifdef BSV_RESET_FIFO_HEAD
+ `define BSV_ARESET_EDGE_HEAD `BSV_ARESET_EDGE_META
+`else
+ `define BSV_ARESET_EDGE_HEAD
+`endif
+
+// Depth 2 FIFO
+module FIFO2(CLK,
+             RST,
+             D_IN,
+             ENQ,
+             FULL_N,
+             D_OUT,
+             DEQ,
+             EMPTY_N,
+             CLR);
+
+   parameter width = 1;
+   parameter guarded = 1;
+
+   input     CLK ;
+   input     RST ;
+   input [width - 1 : 0] D_IN;
+   input                 ENQ;
+   input                 DEQ;
+   input                 CLR ;
+
+   output                FULL_N;
+   output                EMPTY_N;
+   output [width - 1 : 0] D_OUT;
+
+   reg                    full_reg;
+   reg                    empty_reg;
+   reg [width - 1 : 0]    data0_reg;
+   reg [width - 1 : 0]    data1_reg;
+
+   assign                 FULL_N = full_reg ;
+   assign                 EMPTY_N = empty_reg ;
+   assign                 D_OUT = data0_reg ;
+
+
+   // Optimize the loading logic since state encoding is not power of 2!
+   wire                   d0di = (ENQ && ! empty_reg ) || ( ENQ && DEQ && full_reg ) ;
+   wire                   d0d1 = DEQ && ! full_reg ;
+   wire                   d0h = ((! DEQ) && (! ENQ )) || (!DEQ && empty_reg ) || ( ! ENQ &&full_reg) ;
+   wire                   d1di = ENQ & empty_reg ;
+
+`ifdef BSV_NO_INITIAL_BLOCKS
+`else // not BSV_NO_INITIAL_BLOCKS
+   // synopsys translate_off
+   initial
+     begin
+        data0_reg   = {((width + 1)/2) {2'b10}} ;
+        data1_reg  = {((width + 1)/2) {2'b10}} ;
+        empty_reg = 1'b0;
+        full_reg  = 1'b1;
+     end // initial begin
+   // synopsys translate_on
+`endif // BSV_NO_INITIAL_BLOCKS
+
+   always@(posedge CLK `BSV_ARESET_EDGE_META)
+     begin
+        if (RST == `BSV_RESET_VALUE)
+          begin
+             empty_reg <= `BSV_ASSIGNMENT_DELAY 1'b0;
+             full_reg  <= `BSV_ASSIGNMENT_DELAY 1'b1;
+          end // if (RST == `BSV_RESET_VALUE)
+        else
+          begin
+             if (CLR)
+               begin
+                  empty_reg <= `BSV_ASSIGNMENT_DELAY 1'b0;
+                  full_reg  <= `BSV_ASSIGNMENT_DELAY 1'b1;
+               end // if (CLR)
+             else if ( ENQ && ! DEQ ) // just enq
+               begin
+                  empty_reg <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  full_reg <= `BSV_ASSIGNMENT_DELAY ! empty_reg ;
+               end
+             else if ( DEQ && ! ENQ )
+               begin
+                  full_reg  <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  empty_reg <= `BSV_ASSIGNMENT_DELAY ! full_reg;
+               end // if ( DEQ && ! ENQ )
+          end // else: !if(RST == `BSV_RESET_VALUE)
+
+     end // always@ (posedge CLK or `BSV_RESET_EDGE RST)
+
+
+   always@(posedge CLK `BSV_ARESET_EDGE_HEAD)
+     begin
+`ifdef BSV_RESET_FIFO_HEAD
+        if (RST == `BSV_RESET_VALUE)
+          begin
+             data0_reg <= `BSV_ASSIGNMENT_DELAY {width {1'b0}} ;
+             data1_reg <= `BSV_ASSIGNMENT_DELAY {width {1'b0}} ;
+          end
+        else
+`endif
+          begin
+             data0_reg  <= `BSV_ASSIGNMENT_DELAY
+                           {width{d0di}} & D_IN | {width{d0d1}} & data1_reg | {width{d0h}} & data0_reg ;
+             data1_reg <= `BSV_ASSIGNMENT_DELAY
+                          d1di ? D_IN : data1_reg ;
+          end // else: !if(RST == `BSV_RESET_VALUE)
+     end // always@ (posedge CLK or `BSV_RESET_EDGE RST)
+
+
+
+   // synopsys translate_off
+   always@(posedge CLK)
+     begin: error_checks
+        reg deqerror, enqerror ;
+
+        deqerror =  0;
+        enqerror = 0;
+        if (RST == ! `BSV_RESET_VALUE)
+          begin
+             if ( ! empty_reg && DEQ )
+               begin
+                  deqerror =  1;
+                  $display( "Warning: FIFO2: %m -- Dequeuing from empty fifo" ) ;
+               end
+             if ( ! full_reg && ENQ && (!DEQ || guarded) )
+               begin
+                  enqerror = 1;
+                  $display( "Warning: FIFO2: %m -- Enqueuing to a full fifo" ) ;
+               end
+          end
+     end // always@ (posedge CLK)
+   // synopsys translate_on
+
+endmodule
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/src/SizedFIFO.v b/toolflow/vivado/common/ip/AWSIntrCtrl/src/SizedFIFO.v
new file mode 100644
index 00000000..879a836e
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/src/SizedFIFO.v
@@ -0,0 +1,282 @@
+
+// Copyright (c) 2000-2012 Bluespec, Inc.
+
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+//
+// $Revision$
+// $Date$
+
+`ifdef BSV_ASSIGNMENT_DELAY
+`else
+  `define BSV_ASSIGNMENT_DELAY
+`endif
+
+`ifdef BSV_POSITIVE_RESET
+  `define BSV_RESET_VALUE 1'b1
+  `define BSV_RESET_EDGE posedge
+`else
+  `define BSV_RESET_VALUE 1'b0
+  `define BSV_RESET_EDGE negedge
+`endif
+
+`ifdef BSV_ASYNC_RESET
+ `define BSV_ARESET_EDGE_META or `BSV_RESET_EDGE RST
+`else
+ `define BSV_ARESET_EDGE_META
+`endif
+
+`ifdef BSV_RESET_FIFO_HEAD
+ `define BSV_ARESET_EDGE_HEAD `BSV_ARESET_EDGE_META
+`else
+ `define BSV_ARESET_EDGE_HEAD
+`endif
+
+`ifdef BSV_RESET_FIFO_ARRAY
+ `define BSV_ARESET_EDGE_ARRAY `BSV_ARESET_EDGE_META
+`else
+ `define BSV_ARESET_EDGE_ARRAY
+`endif
+
+
+// Sized fifo.  Model has output register which improves timing
+module SizedFIFO(CLK, RST, D_IN, ENQ, FULL_N, D_OUT, DEQ, EMPTY_N, CLR);
+   parameter               p1width = 1; // data width
+   parameter               p2depth = 3;
+   parameter               p3cntr_width = 1; // log(p2depth-1)
+   // The -1 is allowed since this model has a fast output register
+   parameter               guarded = 1;
+   localparam              p2depth2 = (p2depth >= 2) ? (p2depth -2) : 0 ;
+
+   input                   CLK;
+   input                   RST;
+   input                   CLR;
+   input [p1width - 1 : 0] D_IN;
+   input                   ENQ;
+   input                   DEQ;
+
+   output                  FULL_N;
+   output                  EMPTY_N;
+   output [p1width - 1 : 0] D_OUT;
+
+   reg                      not_ring_full;
+   reg                      ring_empty;
+
+   reg [p3cntr_width-1 : 0] head;
+   wire [p3cntr_width-1 : 0] next_head;
+
+   reg [p3cntr_width-1 : 0]  tail;
+   wire [p3cntr_width-1 : 0] next_tail;
+
+   // if the depth is too small, don't create an ill-sized array;
+   // instead, make a 1-sized array and let the initial block report an error
+   (* RAM_STYLE = "DISTRIBUTED" *)
+   reg [p1width - 1 : 0]     arr[0: p2depth2];
+
+   reg [p1width - 1 : 0]     D_OUT;
+   reg                       hasodata;
+
+   wire [p3cntr_width-1:0]   depthLess2 = p2depth2[p3cntr_width-1:0] ;
+
+   wire [p3cntr_width-1 : 0] incr_tail;
+   wire [p3cntr_width-1 : 0] incr_head;
+
+   assign                    incr_tail = tail + 1'b1 ;
+   assign                    incr_head = head + 1'b1 ;
+
+   assign    next_head = (head == depthLess2 ) ? {p3cntr_width{1'b0}} : incr_head ;
+   assign    next_tail = (tail == depthLess2 ) ? {p3cntr_width{1'b0}} : incr_tail ;
+
+   assign    EMPTY_N = hasodata;
+   assign    FULL_N  = not_ring_full;
+
+`ifdef BSV_NO_INITIAL_BLOCKS
+`else // not BSV_NO_INITIAL_BLOCKS
+   // synopsys translate_off
+   initial
+     begin : initial_block
+        integer   i;
+        D_OUT         = {((p1width + 1)/2){2'b10}} ;
+
+        ring_empty    = 1'b1;
+        not_ring_full = 1'b1;
+        hasodata      = 1'b0;
+        head          = {p3cntr_width {1'b0}} ;
+        tail          = {p3cntr_width {1'b0}} ;
+
+        for (i = 0; i <= p2depth2; i = i + 1)
+          begin
+             arr[i]   = D_OUT ;
+          end
+     end
+   // synopsys translate_on
+`endif // BSV_NO_INITIAL_BLOCKS
+
+
+   always @(posedge CLK `BSV_ARESET_EDGE_META)
+     begin
+        if (RST == `BSV_RESET_VALUE)
+          begin
+             head <= `BSV_ASSIGNMENT_DELAY {p3cntr_width {1'b0}} ;
+             tail <= `BSV_ASSIGNMENT_DELAY {p3cntr_width {1'b0}} ;
+             ring_empty <= `BSV_ASSIGNMENT_DELAY 1'b1;
+             not_ring_full <= `BSV_ASSIGNMENT_DELAY 1'b1;
+             hasodata <= `BSV_ASSIGNMENT_DELAY 1'b0;
+          end // if (RST == `BSV_RESET_VALUE)
+        else
+         begin
+
+             casez ({CLR, DEQ, ENQ, hasodata, ring_empty})
+               // Clear operation
+               5'b1????: begin
+                  head          <= `BSV_ASSIGNMENT_DELAY {p3cntr_width {1'b0}} ;
+                  tail          <= `BSV_ASSIGNMENT_DELAY {p3cntr_width {1'b0}} ;
+                  ring_empty    <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  not_ring_full <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  hasodata      <= `BSV_ASSIGNMENT_DELAY 1'b0;
+               end
+               // -----------------------
+               // DEQ && ENQ case -- change head and tail if added to ring
+               5'b011?0: begin
+                  tail          <= `BSV_ASSIGNMENT_DELAY next_tail;
+                  head          <= `BSV_ASSIGNMENT_DELAY next_head;
+               end
+               // -----------------------
+               // DEQ only and NO data is in ring
+               5'b010?1: begin
+                  hasodata <= `BSV_ASSIGNMENT_DELAY 1'b0;
+               end
+               // DEQ only and data is in ring (move the head pointer)
+               5'b010?0: begin
+                  head          <= `BSV_ASSIGNMENT_DELAY next_head;
+                  not_ring_full <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  ring_empty    <= `BSV_ASSIGNMENT_DELAY next_head == tail ;
+               end
+               // -----------------------
+               // ENQ only when empty
+               5'b0010?: begin
+                  hasodata      <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  end
+               // ENQ only when not empty
+               5'b0011?: begin
+                  if ( not_ring_full ) // Drop this test to save redundant test
+                    // but be warnned that with test fifo overflow causes loss of new data
+                    // while without test fifo drops all but head entry! (pointer overflow)
+                   begin
+                      tail          <= `BSV_ASSIGNMENT_DELAY next_tail;
+                      ring_empty    <= `BSV_ASSIGNMENT_DELAY 1'b0;
+                      not_ring_full <= `BSV_ASSIGNMENT_DELAY ! (next_tail == head) ;
+                   end
+               end
+             endcase
+         end // else: !if(RST == `BSV_RESET_VALUE)
+     end // always @ (posedge CLK)
+
+   // Update the fast data out register
+   always @(posedge CLK `BSV_ARESET_EDGE_HEAD)
+     begin
+`ifdef  BSV_RESET_FIFO_HEAD
+        if (RST == `BSV_RESET_VALUE)
+          begin
+             D_OUT    <= `BSV_ASSIGNMENT_DELAY {p1width {1'b0}} ;
+          end // if (RST == `BSV_RESET_VALUE)
+        else
+`endif
+        begin
+             casez ({CLR, DEQ, ENQ, hasodata, ring_empty})
+               // DEQ && ENQ cases
+               5'b011?0: begin D_OUT <= `BSV_ASSIGNMENT_DELAY arr[head]; end
+               5'b011?1: begin D_OUT <= `BSV_ASSIGNMENT_DELAY D_IN; end
+               // DEQ only and data is in ring
+               5'b010?0: begin D_OUT <= `BSV_ASSIGNMENT_DELAY arr[head]; end
+               // ENQ only when empty
+               5'b0010?: begin D_OUT <= `BSV_ASSIGNMENT_DELAY D_IN; end
+             endcase
+          end // else: !if(RST == `BSV_RESET_VALUE)
+     end // always @ (posedge CLK)
+
+   // Update the memory array  reset is OFF
+   always @(posedge CLK `BSV_ARESET_EDGE_ARRAY)
+     begin: array
+`ifdef BSV_RESET_FIFO_ARRAY
+        if (RST == `BSV_RESET_VALUE)
+          begin: rst_array
+             integer i;
+             for (i = 0; i <= p2depth2 && p2depth > 2; i = i + 1)
+               begin
+                   arr[i]  <= `BSV_ASSIGNMENT_DELAY {p1width {1'b0}} ;
+               end
+          end // if (RST == `BSV_RESET_VALUE)
+        else
+`endif
+         begin
+            if (!CLR && ENQ && ((DEQ && !ring_empty) || (!DEQ && hasodata && not_ring_full)))
+              begin
+                 arr[tail] <= `BSV_ASSIGNMENT_DELAY D_IN;
+              end
+         end // else: !if(RST == `BSV_RESET_VALUE)
+     end // always @ (posedge CLK)
+
+   // synopsys translate_off
+   always@(posedge CLK)
+     begin: error_checks
+        reg deqerror, enqerror ;
+
+        deqerror =  0;
+        enqerror = 0;
+        if (RST == ! `BSV_RESET_VALUE)
+           begin
+              if ( ! EMPTY_N && DEQ )
+                begin
+                   deqerror = 1 ;
+                   $display( "Warning: SizedFIFO: %m -- Dequeuing from empty fifo" ) ;
+                end
+              if ( ! FULL_N && ENQ && (!DEQ || guarded) )
+                begin
+                   enqerror =  1 ;
+                   $display( "Warning: SizedFIFO: %m -- Enqueuing to a full fifo" ) ;
+                end
+           end
+     end // block: error_checks
+   // synopsys translate_on
+
+   // synopsys translate_off
+   // Some assertions about parameter values
+   initial
+     begin : parameter_assertions
+        integer ok ;
+        ok = 1 ;
+
+        if ( p2depth <= 1)
+          begin
+             ok = 0;
+             $display ( "Warning SizedFIFO: %m -- depth parameter increased from %0d to 2", p2depth);
+          end
+
+        if ( p3cntr_width <= 0 )
+          begin
+             ok = 0;
+             $display ( "ERROR SizedFIFO: %m -- width parameter must be greater than 0" ) ;
+          end
+
+        if ( ok == 0 ) $finish ;
+
+      end // initial begin
+   // synopsys translate_on
+
+endmodule
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/src/SyncPulse.v b/toolflow/vivado/common/ip/AWSIntrCtrl/src/SyncPulse.v
new file mode 100644
index 00000000..67b38f8f
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/src/SyncPulse.v
@@ -0,0 +1,115 @@
+
+// Copyright (c) 2000-2012 Bluespec, Inc.
+
+// Permission is hereby granted, free of charge, to any person obtaining a copy
+// of this software and associated documentation files (the "Software"), to deal
+// in the Software without restriction, including without limitation the rights
+// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+// copies of the Software, and to permit persons to whom the Software is
+// furnished to do so, subject to the following conditions:
+
+// The above copyright notice and this permission notice shall be included in
+// all copies or substantial portions of the Software.
+
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+// THE SOFTWARE.
+//
+// $Revision$
+// $Date$
+
+`ifdef BSV_ASSIGNMENT_DELAY
+`else
+  `define BSV_ASSIGNMENT_DELAY
+`endif
+
+`ifdef BSV_POSITIVE_RESET
+  `define BSV_RESET_VALUE 1'b1
+  `define BSV_RESET_EDGE posedge
+`else
+  `define BSV_RESET_VALUE 1'b0
+  `define BSV_RESET_EDGE negedge
+`endif
+
+
+// A pulse based clock domain synchronization scheme.
+// When a sEN is asserted, a pulse is eventually sent to dPulse in the
+// destination clock domain.
+// Close and Multiple asserts of sEN may not be seen at the destination side.
+// Reset signal is not needed since it a pulse-based, rather than
+// level-based protocol
+// Delay is 2 dCLK cycle.
+// dPulse is not registered.
+module SyncPulse(
+                  sCLK,
+                  sRST,
+                  dCLK,
+                  sEN,
+                  dPulse
+                  );
+
+   // source clock ports
+   input     sCLK ;
+   input     sRST ;
+   input     sEN ;
+
+   // destination clock ports
+   input     dCLK ;
+   output    dPulse ;
+
+   // Flops to hold data
+   reg       sSyncReg;
+   reg       dSyncReg1, dSyncReg2;
+   reg       dSyncPulse;
+
+   assign    dPulse = dSyncReg2 != dSyncPulse ;
+
+   always @(posedge sCLK or `BSV_RESET_EDGE sRST)
+     begin
+        if (sRST == `BSV_RESET_VALUE)
+          sSyncReg <= `BSV_ASSIGNMENT_DELAY 1'b0 ;
+        else
+          begin
+             if ( sEN )
+               begin
+                  sSyncReg <= `BSV_ASSIGNMENT_DELAY ! sSyncReg ;
+               end
+          end // else: !if(sRST == `BSV_RESET_VALUE)
+     end // always @ (posedge sCLK or `BSV_RESET_EDGE sRST)
+
+
+   always @(posedge dCLK or `BSV_RESET_EDGE sRST )
+      begin
+         if (sRST == `BSV_RESET_VALUE)
+            begin
+               dSyncReg1 <= `BSV_ASSIGNMENT_DELAY 1'b0 ;
+               dSyncReg2 <= `BSV_ASSIGNMENT_DELAY 1'b0 ;
+               dSyncPulse <= `BSV_ASSIGNMENT_DELAY 1'b0 ;
+            end // if (sRST == `BSV_RESET_VALUE)
+         else
+           begin
+              dSyncReg1 <= `BSV_ASSIGNMENT_DELAY sSyncReg ;// domain crossing
+              dSyncReg2 <= `BSV_ASSIGNMENT_DELAY dSyncReg1 ;
+              dSyncPulse <= `BSV_ASSIGNMENT_DELAY dSyncReg2 ;
+           end // else: !if(sRST == `BSV_RESET_VALUE)
+      end // always @ (posedge dCLK or `BSV_RESET_EDGE sRST )
+
+`ifdef BSV_NO_INITIAL_BLOCKS
+`else // not BSV_NO_INITIAL_BLOCKS
+   // synopsys translate_off
+   initial
+      begin
+         sSyncReg   = 1'b0 ;
+         dSyncReg1  = 1'b0 ;
+         dSyncReg2  = 1'b0 ;
+         dSyncPulse = 1'b0 ;
+      end // initial begin
+   // synopsys translate_on
+`endif // BSV_NO_INITIAL_BLOCKS
+
+endmodule // PulseSync
+
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/src/mkAWSIntrCtrl.v b/toolflow/vivado/common/ip/AWSIntrCtrl/src/mkAWSIntrCtrl.v
new file mode 100644
index 00000000..e3941c6e
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/src/mkAWSIntrCtrl.v
@@ -0,0 +1,12648 @@
+//
+// Generated by Bluespec Compiler, version 2018.10.beta1 (build e1df8052c, 2018-10-17)
+//
+// On Wed Jul 17 18:53:12 CEST 2019
+//
+//
+// Ports:
+// Name                         I/O  size props
+// S_AXI_arready                  O     1 reg
+// S_AXI_rvalid                   O     1 reg
+// S_AXI_rdata                    O    32
+// S_AXI_rresp                    O     2
+// S_AXI_awready                  O     1
+// S_AXI_wready                   O     1
+// S_AXI_bvalid                   O     1 reg
+// S_AXI_bresp                    O     2
+// irq_req                        O    16 reg
+// design_clk                     I     1 clock
+// design_rst                     I     1 reset
+// S_AXI_ACLK                     I     1 clock
+// S_AXI_ARESETN                  I     1 reset
+// S_AXI_arvalid                  I     1
+// S_AXI_araddr                   I    16 reg
+// S_AXI_arprot                   I     3 reg
+// S_AXI_rready                   I     1
+// S_AXI_awvalid                  I     1
+// S_AXI_awaddr                   I    16
+// S_AXI_awprot                   I     3
+// S_AXI_wvalid                   I     1
+// S_AXI_wdata                    I    32
+// S_AXI_wstrb                    I     4
+// S_AXI_bready                   I     1
+// interrupt_pcie                 I     4
+// interrupt_design               I   128
+// irq_ack                        I    16
+//
+// No combinational paths from inputs to outputs
+//
+//
+
+`ifdef BSV_ASSIGNMENT_DELAY
+`else
+  `define BSV_ASSIGNMENT_DELAY
+`endif
+
+`ifdef BSV_POSITIVE_RESET
+  `define BSV_RESET_VALUE 1'b1
+  `define BSV_RESET_EDGE posedge
+`else
+  `define BSV_RESET_VALUE 1'b0
+  `define BSV_RESET_EDGE negedge
+`endif
+
+module mkAWSIntrCtrl(design_clk,
+		     design_rst,
+		     S_AXI_ACLK,
+		     S_AXI_ARESETN,
+
+		     S_AXI_arready,
+
+		     S_AXI_arvalid,
+
+		     S_AXI_araddr,
+
+		     S_AXI_arprot,
+
+		     S_AXI_rvalid,
+
+		     S_AXI_rready,
+
+		     S_AXI_rdata,
+
+		     S_AXI_rresp,
+
+		     S_AXI_awready,
+
+		     S_AXI_awvalid,
+
+		     S_AXI_awaddr,
+
+		     S_AXI_awprot,
+
+		     S_AXI_wready,
+
+		     S_AXI_wvalid,
+
+		     S_AXI_wdata,
+
+		     S_AXI_wstrb,
+
+		     S_AXI_bvalid,
+
+		     S_AXI_bready,
+
+		     S_AXI_bresp,
+
+		     interrupt_pcie,
+
+		     interrupt_design,
+
+		     irq_req,
+
+		     irq_ack);
+  input  design_clk;
+  input  design_rst;
+  input  S_AXI_ACLK;
+  input  S_AXI_ARESETN;
+
+  // value method s_rd_arready
+  output S_AXI_arready;
+
+  // action method s_rd_parvalid
+  input  S_AXI_arvalid;
+
+  // action method s_rd_paraddr
+  input  [15 : 0] S_AXI_araddr;
+
+  // action method s_rd_parprot
+  input  [2 : 0] S_AXI_arprot;
+
+  // value method s_rd_rvalid
+  output S_AXI_rvalid;
+
+  // action method s_rd_prready
+  input  S_AXI_rready;
+
+  // value method s_rd_rdata
+  output [31 : 0] S_AXI_rdata;
+
+  // value method s_rd_rresp
+  output [1 : 0] S_AXI_rresp;
+
+  // value method s_wr_awready
+  output S_AXI_awready;
+
+  // action method s_wr_pawvalid
+  input  S_AXI_awvalid;
+
+  // action method s_wr_pawaddr
+  input  [15 : 0] S_AXI_awaddr;
+
+  // action method s_wr_pawprot
+  input  [2 : 0] S_AXI_awprot;
+
+  // value method s_wr_wready
+  output S_AXI_wready;
+
+  // action method s_wr_pwvalid
+  input  S_AXI_wvalid;
+
+  // action method s_wr_pwdata
+  input  [31 : 0] S_AXI_wdata;
+
+  // action method s_wr_pwstrb
+  input  [3 : 0] S_AXI_wstrb;
+
+  // value method s_wr_bvalid
+  output S_AXI_bvalid;
+
+  // action method s_wr_pbready
+  input  S_AXI_bready;
+
+  // value method s_wr_bresp
+  output [1 : 0] S_AXI_bresp;
+
+  // action method _interrupts_pcie
+  input  [3 : 0] interrupt_pcie;
+
+  // action method _interrupts_design
+  input  [127 : 0] interrupt_design;
+
+  // value method _shell_irq_req
+  output [15 : 0] irq_req;
+
+  // action method _shell_irq_ack
+  input  [15 : 0] irq_ack;
+
+  // signals for module outputs
+  wire [31 : 0] S_AXI_rdata;
+  wire [15 : 0] irq_req;
+  wire [1 : 0] S_AXI_bresp, S_AXI_rresp;
+  wire S_AXI_arready, S_AXI_awready, S_AXI_bvalid, S_AXI_rvalid, S_AXI_wready;
+
+  // inlined wires
+  wire [36 : 0] s_config_writeSlave_dataIn_rv$port0__write_1,
+		s_config_writeSlave_dataIn_rv$port1__read,
+		s_config_writeSlave_dataIn_rv$port2__read;
+  wire [19 : 0] s_config_writeSlave_addrIn_rv$port0__write_1,
+		s_config_writeSlave_addrIn_rv$port1__read,
+		s_config_writeSlave_addrIn_rv$port2__read;
+  wire host_is_ready_0$EN_port1__write,
+       host_is_ready_0$port1__read,
+       host_is_ready_0$port2__read,
+       host_is_ready_1$EN_port1__write,
+       host_is_ready_1$port1__read,
+       host_is_ready_1$port2__read,
+       host_is_ready_2$EN_port1__write,
+       host_is_ready_2$port1__read,
+       host_is_ready_2$port2__read,
+       host_is_ready_3$EN_port1__write,
+       host_is_ready_3$port1__read,
+       host_is_ready_3$port2__read,
+       host_pending_design_0$EN_port1__write,
+       host_pending_design_0$port1__read,
+       host_pending_design_0$port2__read,
+       host_pending_design_1$EN_port1__write,
+       host_pending_design_1$port1__read,
+       host_pending_design_1$port2__read,
+       host_pending_design_10$EN_port1__write,
+       host_pending_design_10$port1__read,
+       host_pending_design_10$port2__read,
+       host_pending_design_100$EN_port1__write,
+       host_pending_design_100$port1__read,
+       host_pending_design_100$port2__read,
+       host_pending_design_101$EN_port1__write,
+       host_pending_design_101$port1__read,
+       host_pending_design_101$port2__read,
+       host_pending_design_102$EN_port1__write,
+       host_pending_design_102$port1__read,
+       host_pending_design_102$port2__read,
+       host_pending_design_103$EN_port1__write,
+       host_pending_design_103$port1__read,
+       host_pending_design_103$port2__read,
+       host_pending_design_104$EN_port1__write,
+       host_pending_design_104$port1__read,
+       host_pending_design_104$port2__read,
+       host_pending_design_105$EN_port1__write,
+       host_pending_design_105$port1__read,
+       host_pending_design_105$port2__read,
+       host_pending_design_106$EN_port1__write,
+       host_pending_design_106$port1__read,
+       host_pending_design_106$port2__read,
+       host_pending_design_107$EN_port1__write,
+       host_pending_design_107$port1__read,
+       host_pending_design_107$port2__read,
+       host_pending_design_108$EN_port1__write,
+       host_pending_design_108$port1__read,
+       host_pending_design_108$port2__read,
+       host_pending_design_109$EN_port1__write,
+       host_pending_design_109$port1__read,
+       host_pending_design_109$port2__read,
+       host_pending_design_11$EN_port1__write,
+       host_pending_design_11$port1__read,
+       host_pending_design_11$port2__read,
+       host_pending_design_110$EN_port1__write,
+       host_pending_design_110$port1__read,
+       host_pending_design_110$port2__read,
+       host_pending_design_111$EN_port1__write,
+       host_pending_design_111$port1__read,
+       host_pending_design_111$port2__read,
+       host_pending_design_112$EN_port1__write,
+       host_pending_design_112$port1__read,
+       host_pending_design_112$port2__read,
+       host_pending_design_113$EN_port1__write,
+       host_pending_design_113$port1__read,
+       host_pending_design_113$port2__read,
+       host_pending_design_114$EN_port1__write,
+       host_pending_design_114$port1__read,
+       host_pending_design_114$port2__read,
+       host_pending_design_115$EN_port1__write,
+       host_pending_design_115$port1__read,
+       host_pending_design_115$port2__read,
+       host_pending_design_116$EN_port1__write,
+       host_pending_design_116$port1__read,
+       host_pending_design_116$port2__read,
+       host_pending_design_117$EN_port1__write,
+       host_pending_design_117$port1__read,
+       host_pending_design_117$port2__read,
+       host_pending_design_118$EN_port1__write,
+       host_pending_design_118$port1__read,
+       host_pending_design_118$port2__read,
+       host_pending_design_119$EN_port1__write,
+       host_pending_design_119$port1__read,
+       host_pending_design_119$port2__read,
+       host_pending_design_12$EN_port1__write,
+       host_pending_design_12$port1__read,
+       host_pending_design_12$port2__read,
+       host_pending_design_120$EN_port1__write,
+       host_pending_design_120$port1__read,
+       host_pending_design_120$port2__read,
+       host_pending_design_121$EN_port1__write,
+       host_pending_design_121$port1__read,
+       host_pending_design_121$port2__read,
+       host_pending_design_122$EN_port1__write,
+       host_pending_design_122$port1__read,
+       host_pending_design_122$port2__read,
+       host_pending_design_123$EN_port1__write,
+       host_pending_design_123$port1__read,
+       host_pending_design_123$port2__read,
+       host_pending_design_124$EN_port1__write,
+       host_pending_design_124$port1__read,
+       host_pending_design_124$port2__read,
+       host_pending_design_125$EN_port1__write,
+       host_pending_design_125$port1__read,
+       host_pending_design_125$port2__read,
+       host_pending_design_126$EN_port1__write,
+       host_pending_design_126$port1__read,
+       host_pending_design_126$port2__read,
+       host_pending_design_127$EN_port1__write,
+       host_pending_design_127$port1__read,
+       host_pending_design_127$port2__read,
+       host_pending_design_13$EN_port1__write,
+       host_pending_design_13$port1__read,
+       host_pending_design_13$port2__read,
+       host_pending_design_14$EN_port1__write,
+       host_pending_design_14$port1__read,
+       host_pending_design_14$port2__read,
+       host_pending_design_15$EN_port1__write,
+       host_pending_design_15$port1__read,
+       host_pending_design_15$port2__read,
+       host_pending_design_16$EN_port1__write,
+       host_pending_design_16$port1__read,
+       host_pending_design_16$port2__read,
+       host_pending_design_17$EN_port1__write,
+       host_pending_design_17$port1__read,
+       host_pending_design_17$port2__read,
+       host_pending_design_18$EN_port1__write,
+       host_pending_design_18$port1__read,
+       host_pending_design_18$port2__read,
+       host_pending_design_19$EN_port1__write,
+       host_pending_design_19$port1__read,
+       host_pending_design_19$port2__read,
+       host_pending_design_2$EN_port1__write,
+       host_pending_design_2$port1__read,
+       host_pending_design_2$port2__read,
+       host_pending_design_20$EN_port1__write,
+       host_pending_design_20$port1__read,
+       host_pending_design_20$port2__read,
+       host_pending_design_21$EN_port1__write,
+       host_pending_design_21$port1__read,
+       host_pending_design_21$port2__read,
+       host_pending_design_22$EN_port1__write,
+       host_pending_design_22$port1__read,
+       host_pending_design_22$port2__read,
+       host_pending_design_23$EN_port1__write,
+       host_pending_design_23$port1__read,
+       host_pending_design_23$port2__read,
+       host_pending_design_24$EN_port1__write,
+       host_pending_design_24$port1__read,
+       host_pending_design_24$port2__read,
+       host_pending_design_25$EN_port1__write,
+       host_pending_design_25$port1__read,
+       host_pending_design_25$port2__read,
+       host_pending_design_26$EN_port1__write,
+       host_pending_design_26$port1__read,
+       host_pending_design_26$port2__read,
+       host_pending_design_27$EN_port1__write,
+       host_pending_design_27$port1__read,
+       host_pending_design_27$port2__read,
+       host_pending_design_28$EN_port1__write,
+       host_pending_design_28$port1__read,
+       host_pending_design_28$port2__read,
+       host_pending_design_29$EN_port1__write,
+       host_pending_design_29$port1__read,
+       host_pending_design_29$port2__read,
+       host_pending_design_3$EN_port1__write,
+       host_pending_design_3$port1__read,
+       host_pending_design_3$port2__read,
+       host_pending_design_30$EN_port1__write,
+       host_pending_design_30$port1__read,
+       host_pending_design_30$port2__read,
+       host_pending_design_31$EN_port1__write,
+       host_pending_design_31$port1__read,
+       host_pending_design_31$port2__read,
+       host_pending_design_32$EN_port1__write,
+       host_pending_design_32$port1__read,
+       host_pending_design_32$port2__read,
+       host_pending_design_33$EN_port1__write,
+       host_pending_design_33$port1__read,
+       host_pending_design_33$port2__read,
+       host_pending_design_34$EN_port1__write,
+       host_pending_design_34$port1__read,
+       host_pending_design_34$port2__read,
+       host_pending_design_35$EN_port1__write,
+       host_pending_design_35$port1__read,
+       host_pending_design_35$port2__read,
+       host_pending_design_36$EN_port1__write,
+       host_pending_design_36$port1__read,
+       host_pending_design_36$port2__read,
+       host_pending_design_37$EN_port1__write,
+       host_pending_design_37$port1__read,
+       host_pending_design_37$port2__read,
+       host_pending_design_38$EN_port1__write,
+       host_pending_design_38$port1__read,
+       host_pending_design_38$port2__read,
+       host_pending_design_39$EN_port1__write,
+       host_pending_design_39$port1__read,
+       host_pending_design_39$port2__read,
+       host_pending_design_4$EN_port1__write,
+       host_pending_design_4$port1__read,
+       host_pending_design_4$port2__read,
+       host_pending_design_40$EN_port1__write,
+       host_pending_design_40$port1__read,
+       host_pending_design_40$port2__read,
+       host_pending_design_41$EN_port1__write,
+       host_pending_design_41$port1__read,
+       host_pending_design_41$port2__read,
+       host_pending_design_42$EN_port1__write,
+       host_pending_design_42$port1__read,
+       host_pending_design_42$port2__read,
+       host_pending_design_43$EN_port1__write,
+       host_pending_design_43$port1__read,
+       host_pending_design_43$port2__read,
+       host_pending_design_44$EN_port1__write,
+       host_pending_design_44$port1__read,
+       host_pending_design_44$port2__read,
+       host_pending_design_45$EN_port1__write,
+       host_pending_design_45$port1__read,
+       host_pending_design_45$port2__read,
+       host_pending_design_46$EN_port1__write,
+       host_pending_design_46$port1__read,
+       host_pending_design_46$port2__read,
+       host_pending_design_47$EN_port1__write,
+       host_pending_design_47$port1__read,
+       host_pending_design_47$port2__read,
+       host_pending_design_48$EN_port1__write,
+       host_pending_design_48$port1__read,
+       host_pending_design_48$port2__read,
+       host_pending_design_49$EN_port1__write,
+       host_pending_design_49$port1__read,
+       host_pending_design_49$port2__read,
+       host_pending_design_5$EN_port1__write,
+       host_pending_design_5$port1__read,
+       host_pending_design_5$port2__read,
+       host_pending_design_50$EN_port1__write,
+       host_pending_design_50$port1__read,
+       host_pending_design_50$port2__read,
+       host_pending_design_51$EN_port1__write,
+       host_pending_design_51$port1__read,
+       host_pending_design_51$port2__read,
+       host_pending_design_52$EN_port1__write,
+       host_pending_design_52$port1__read,
+       host_pending_design_52$port2__read,
+       host_pending_design_53$EN_port1__write,
+       host_pending_design_53$port1__read,
+       host_pending_design_53$port2__read,
+       host_pending_design_54$EN_port1__write,
+       host_pending_design_54$port1__read,
+       host_pending_design_54$port2__read,
+       host_pending_design_55$EN_port1__write,
+       host_pending_design_55$port1__read,
+       host_pending_design_55$port2__read,
+       host_pending_design_56$EN_port1__write,
+       host_pending_design_56$port1__read,
+       host_pending_design_56$port2__read,
+       host_pending_design_57$EN_port1__write,
+       host_pending_design_57$port1__read,
+       host_pending_design_57$port2__read,
+       host_pending_design_58$EN_port1__write,
+       host_pending_design_58$port1__read,
+       host_pending_design_58$port2__read,
+       host_pending_design_59$EN_port1__write,
+       host_pending_design_59$port1__read,
+       host_pending_design_59$port2__read,
+       host_pending_design_6$EN_port1__write,
+       host_pending_design_6$port1__read,
+       host_pending_design_6$port2__read,
+       host_pending_design_60$EN_port1__write,
+       host_pending_design_60$port1__read,
+       host_pending_design_60$port2__read,
+       host_pending_design_61$EN_port1__write,
+       host_pending_design_61$port1__read,
+       host_pending_design_61$port2__read,
+       host_pending_design_62$EN_port1__write,
+       host_pending_design_62$port1__read,
+       host_pending_design_62$port2__read,
+       host_pending_design_63$EN_port1__write,
+       host_pending_design_63$port1__read,
+       host_pending_design_63$port2__read,
+       host_pending_design_64$EN_port1__write,
+       host_pending_design_64$port1__read,
+       host_pending_design_64$port2__read,
+       host_pending_design_65$EN_port1__write,
+       host_pending_design_65$port1__read,
+       host_pending_design_65$port2__read,
+       host_pending_design_66$EN_port1__write,
+       host_pending_design_66$port1__read,
+       host_pending_design_66$port2__read,
+       host_pending_design_67$EN_port1__write,
+       host_pending_design_67$port1__read,
+       host_pending_design_67$port2__read,
+       host_pending_design_68$EN_port1__write,
+       host_pending_design_68$port1__read,
+       host_pending_design_68$port2__read,
+       host_pending_design_69$EN_port1__write,
+       host_pending_design_69$port1__read,
+       host_pending_design_69$port2__read,
+       host_pending_design_7$EN_port1__write,
+       host_pending_design_7$port1__read,
+       host_pending_design_7$port2__read,
+       host_pending_design_70$EN_port1__write,
+       host_pending_design_70$port1__read,
+       host_pending_design_70$port2__read,
+       host_pending_design_71$EN_port1__write,
+       host_pending_design_71$port1__read,
+       host_pending_design_71$port2__read,
+       host_pending_design_72$EN_port1__write,
+       host_pending_design_72$port1__read,
+       host_pending_design_72$port2__read,
+       host_pending_design_73$EN_port1__write,
+       host_pending_design_73$port1__read,
+       host_pending_design_73$port2__read,
+       host_pending_design_74$EN_port1__write,
+       host_pending_design_74$port1__read,
+       host_pending_design_74$port2__read,
+       host_pending_design_75$EN_port1__write,
+       host_pending_design_75$port1__read,
+       host_pending_design_75$port2__read,
+       host_pending_design_76$EN_port1__write,
+       host_pending_design_76$port1__read,
+       host_pending_design_76$port2__read,
+       host_pending_design_77$EN_port1__write,
+       host_pending_design_77$port1__read,
+       host_pending_design_77$port2__read,
+       host_pending_design_78$EN_port1__write,
+       host_pending_design_78$port1__read,
+       host_pending_design_78$port2__read,
+       host_pending_design_79$EN_port1__write,
+       host_pending_design_79$port1__read,
+       host_pending_design_79$port2__read,
+       host_pending_design_8$EN_port1__write,
+       host_pending_design_8$port1__read,
+       host_pending_design_8$port2__read,
+       host_pending_design_80$EN_port1__write,
+       host_pending_design_80$port1__read,
+       host_pending_design_80$port2__read,
+       host_pending_design_81$EN_port1__write,
+       host_pending_design_81$port1__read,
+       host_pending_design_81$port2__read,
+       host_pending_design_82$EN_port1__write,
+       host_pending_design_82$port1__read,
+       host_pending_design_82$port2__read,
+       host_pending_design_83$EN_port1__write,
+       host_pending_design_83$port1__read,
+       host_pending_design_83$port2__read,
+       host_pending_design_84$EN_port1__write,
+       host_pending_design_84$port1__read,
+       host_pending_design_84$port2__read,
+       host_pending_design_85$EN_port1__write,
+       host_pending_design_85$port1__read,
+       host_pending_design_85$port2__read,
+       host_pending_design_86$EN_port1__write,
+       host_pending_design_86$port1__read,
+       host_pending_design_86$port2__read,
+       host_pending_design_87$EN_port1__write,
+       host_pending_design_87$port1__read,
+       host_pending_design_87$port2__read,
+       host_pending_design_88$EN_port1__write,
+       host_pending_design_88$port1__read,
+       host_pending_design_88$port2__read,
+       host_pending_design_89$EN_port1__write,
+       host_pending_design_89$port1__read,
+       host_pending_design_89$port2__read,
+       host_pending_design_9$EN_port1__write,
+       host_pending_design_9$port1__read,
+       host_pending_design_9$port2__read,
+       host_pending_design_90$EN_port1__write,
+       host_pending_design_90$port1__read,
+       host_pending_design_90$port2__read,
+       host_pending_design_91$EN_port1__write,
+       host_pending_design_91$port1__read,
+       host_pending_design_91$port2__read,
+       host_pending_design_92$EN_port1__write,
+       host_pending_design_92$port1__read,
+       host_pending_design_92$port2__read,
+       host_pending_design_93$EN_port1__write,
+       host_pending_design_93$port1__read,
+       host_pending_design_93$port2__read,
+       host_pending_design_94$EN_port1__write,
+       host_pending_design_94$port1__read,
+       host_pending_design_94$port2__read,
+       host_pending_design_95$EN_port1__write,
+       host_pending_design_95$port1__read,
+       host_pending_design_95$port2__read,
+       host_pending_design_96$EN_port1__write,
+       host_pending_design_96$port1__read,
+       host_pending_design_96$port2__read,
+       host_pending_design_97$EN_port1__write,
+       host_pending_design_97$port1__read,
+       host_pending_design_97$port2__read,
+       host_pending_design_98$EN_port1__write,
+       host_pending_design_98$port1__read,
+       host_pending_design_98$port2__read,
+       host_pending_design_99$EN_port1__write,
+       host_pending_design_99$port1__read,
+       host_pending_design_99$port2__read,
+       host_pending_pcie_0$EN_port1__write,
+       host_pending_pcie_0$port1__read,
+       host_pending_pcie_0$port2__read,
+       host_pending_pcie_1$EN_port1__write,
+       host_pending_pcie_1$port1__read,
+       host_pending_pcie_1$port2__read,
+       host_pending_pcie_2$EN_port1__write,
+       host_pending_pcie_2$port1__read,
+       host_pending_pcie_2$port2__read,
+       host_pending_pcie_3$EN_port1__write,
+       host_pending_pcie_3$port1__read,
+       host_pending_pcie_3$port2__read,
+       s_config_readIsHandled$whas,
+       s_config_writeIsHandled$whas,
+       s_config_writeSlave_addrIn_rv$EN_port0__write,
+       s_config_writeSlave_addrIn_rv$EN_port1__write,
+       s_config_writeSlave_dataIn_rv$EN_port0__write,
+       s_config_writeSlave_dataIn_rv$EN_port1__write,
+       sh_active_0_1$whas,
+       sh_active_1_1$whas,
+       sh_active_2_1$whas,
+       sh_active_3_1$whas,
+       sh_active_4_1$whas,
+       sh_active_5_1$whas,
+       sh_active_6_1$whas,
+       sh_active_7_1$whas,
+       sh_wait_ack_0$EN_port1__write,
+       sh_wait_ack_0$port1__read,
+       sh_wait_ack_0$port2__read,
+       sh_wait_ack_1$EN_port1__write,
+       sh_wait_ack_1$port1__read,
+       sh_wait_ack_1$port2__read,
+       sh_wait_ack_10$port1__read,
+       sh_wait_ack_11$port1__read,
+       sh_wait_ack_12$port1__read,
+       sh_wait_ack_13$port1__read,
+       sh_wait_ack_14$port1__read,
+       sh_wait_ack_15$port1__read,
+       sh_wait_ack_2$EN_port1__write,
+       sh_wait_ack_2$port1__read,
+       sh_wait_ack_2$port2__read,
+       sh_wait_ack_3$EN_port1__write,
+       sh_wait_ack_3$port1__read,
+       sh_wait_ack_3$port2__read,
+       sh_wait_ack_4$EN_port1__write,
+       sh_wait_ack_4$port1__read,
+       sh_wait_ack_4$port2__read,
+       sh_wait_ack_5$EN_port1__write,
+       sh_wait_ack_5$port1__read,
+       sh_wait_ack_5$port2__read,
+       sh_wait_ack_6$EN_port1__write,
+       sh_wait_ack_6$port1__read,
+       sh_wait_ack_6$port2__read,
+       sh_wait_ack_7$EN_port1__write,
+       sh_wait_ack_7$port1__read,
+       sh_wait_ack_7$port2__read,
+       sh_wait_ack_8$port1__read,
+       sh_wait_ack_9$port1__read;
+
+  // register completionReg
+  reg [31 : 0] completionReg;
+  wire [31 : 0] completionReg$D_IN;
+  wire completionReg$EN;
+
+  // register designGIER
+  reg designGIER;
+  wire designGIER$D_IN, designGIER$EN;
+
+  // register host_is_ready_0
+  reg host_is_ready_0;
+  wire host_is_ready_0$D_IN, host_is_ready_0$EN;
+
+  // register host_is_ready_1
+  reg host_is_ready_1;
+  wire host_is_ready_1$D_IN, host_is_ready_1$EN;
+
+  // register host_is_ready_2
+  reg host_is_ready_2;
+  wire host_is_ready_2$D_IN, host_is_ready_2$EN;
+
+  // register host_is_ready_3
+  reg host_is_ready_3;
+  wire host_is_ready_3$D_IN, host_is_ready_3$EN;
+
+  // register host_pending_design_0
+  reg host_pending_design_0;
+  wire host_pending_design_0$D_IN, host_pending_design_0$EN;
+
+  // register host_pending_design_1
+  reg host_pending_design_1;
+  wire host_pending_design_1$D_IN, host_pending_design_1$EN;
+
+  // register host_pending_design_10
+  reg host_pending_design_10;
+  wire host_pending_design_10$D_IN, host_pending_design_10$EN;
+
+  // register host_pending_design_100
+  reg host_pending_design_100;
+  wire host_pending_design_100$D_IN, host_pending_design_100$EN;
+
+  // register host_pending_design_101
+  reg host_pending_design_101;
+  wire host_pending_design_101$D_IN, host_pending_design_101$EN;
+
+  // register host_pending_design_102
+  reg host_pending_design_102;
+  wire host_pending_design_102$D_IN, host_pending_design_102$EN;
+
+  // register host_pending_design_103
+  reg host_pending_design_103;
+  wire host_pending_design_103$D_IN, host_pending_design_103$EN;
+
+  // register host_pending_design_104
+  reg host_pending_design_104;
+  wire host_pending_design_104$D_IN, host_pending_design_104$EN;
+
+  // register host_pending_design_105
+  reg host_pending_design_105;
+  wire host_pending_design_105$D_IN, host_pending_design_105$EN;
+
+  // register host_pending_design_106
+  reg host_pending_design_106;
+  wire host_pending_design_106$D_IN, host_pending_design_106$EN;
+
+  // register host_pending_design_107
+  reg host_pending_design_107;
+  wire host_pending_design_107$D_IN, host_pending_design_107$EN;
+
+  // register host_pending_design_108
+  reg host_pending_design_108;
+  wire host_pending_design_108$D_IN, host_pending_design_108$EN;
+
+  // register host_pending_design_109
+  reg host_pending_design_109;
+  wire host_pending_design_109$D_IN, host_pending_design_109$EN;
+
+  // register host_pending_design_11
+  reg host_pending_design_11;
+  wire host_pending_design_11$D_IN, host_pending_design_11$EN;
+
+  // register host_pending_design_110
+  reg host_pending_design_110;
+  wire host_pending_design_110$D_IN, host_pending_design_110$EN;
+
+  // register host_pending_design_111
+  reg host_pending_design_111;
+  wire host_pending_design_111$D_IN, host_pending_design_111$EN;
+
+  // register host_pending_design_112
+  reg host_pending_design_112;
+  wire host_pending_design_112$D_IN, host_pending_design_112$EN;
+
+  // register host_pending_design_113
+  reg host_pending_design_113;
+  wire host_pending_design_113$D_IN, host_pending_design_113$EN;
+
+  // register host_pending_design_114
+  reg host_pending_design_114;
+  wire host_pending_design_114$D_IN, host_pending_design_114$EN;
+
+  // register host_pending_design_115
+  reg host_pending_design_115;
+  wire host_pending_design_115$D_IN, host_pending_design_115$EN;
+
+  // register host_pending_design_116
+  reg host_pending_design_116;
+  wire host_pending_design_116$D_IN, host_pending_design_116$EN;
+
+  // register host_pending_design_117
+  reg host_pending_design_117;
+  wire host_pending_design_117$D_IN, host_pending_design_117$EN;
+
+  // register host_pending_design_118
+  reg host_pending_design_118;
+  wire host_pending_design_118$D_IN, host_pending_design_118$EN;
+
+  // register host_pending_design_119
+  reg host_pending_design_119;
+  wire host_pending_design_119$D_IN, host_pending_design_119$EN;
+
+  // register host_pending_design_12
+  reg host_pending_design_12;
+  wire host_pending_design_12$D_IN, host_pending_design_12$EN;
+
+  // register host_pending_design_120
+  reg host_pending_design_120;
+  wire host_pending_design_120$D_IN, host_pending_design_120$EN;
+
+  // register host_pending_design_121
+  reg host_pending_design_121;
+  wire host_pending_design_121$D_IN, host_pending_design_121$EN;
+
+  // register host_pending_design_122
+  reg host_pending_design_122;
+  wire host_pending_design_122$D_IN, host_pending_design_122$EN;
+
+  // register host_pending_design_123
+  reg host_pending_design_123;
+  wire host_pending_design_123$D_IN, host_pending_design_123$EN;
+
+  // register host_pending_design_124
+  reg host_pending_design_124;
+  wire host_pending_design_124$D_IN, host_pending_design_124$EN;
+
+  // register host_pending_design_125
+  reg host_pending_design_125;
+  wire host_pending_design_125$D_IN, host_pending_design_125$EN;
+
+  // register host_pending_design_126
+  reg host_pending_design_126;
+  wire host_pending_design_126$D_IN, host_pending_design_126$EN;
+
+  // register host_pending_design_127
+  reg host_pending_design_127;
+  wire host_pending_design_127$D_IN, host_pending_design_127$EN;
+
+  // register host_pending_design_13
+  reg host_pending_design_13;
+  wire host_pending_design_13$D_IN, host_pending_design_13$EN;
+
+  // register host_pending_design_14
+  reg host_pending_design_14;
+  wire host_pending_design_14$D_IN, host_pending_design_14$EN;
+
+  // register host_pending_design_15
+  reg host_pending_design_15;
+  wire host_pending_design_15$D_IN, host_pending_design_15$EN;
+
+  // register host_pending_design_16
+  reg host_pending_design_16;
+  wire host_pending_design_16$D_IN, host_pending_design_16$EN;
+
+  // register host_pending_design_17
+  reg host_pending_design_17;
+  wire host_pending_design_17$D_IN, host_pending_design_17$EN;
+
+  // register host_pending_design_18
+  reg host_pending_design_18;
+  wire host_pending_design_18$D_IN, host_pending_design_18$EN;
+
+  // register host_pending_design_19
+  reg host_pending_design_19;
+  wire host_pending_design_19$D_IN, host_pending_design_19$EN;
+
+  // register host_pending_design_2
+  reg host_pending_design_2;
+  wire host_pending_design_2$D_IN, host_pending_design_2$EN;
+
+  // register host_pending_design_20
+  reg host_pending_design_20;
+  wire host_pending_design_20$D_IN, host_pending_design_20$EN;
+
+  // register host_pending_design_21
+  reg host_pending_design_21;
+  wire host_pending_design_21$D_IN, host_pending_design_21$EN;
+
+  // register host_pending_design_22
+  reg host_pending_design_22;
+  wire host_pending_design_22$D_IN, host_pending_design_22$EN;
+
+  // register host_pending_design_23
+  reg host_pending_design_23;
+  wire host_pending_design_23$D_IN, host_pending_design_23$EN;
+
+  // register host_pending_design_24
+  reg host_pending_design_24;
+  wire host_pending_design_24$D_IN, host_pending_design_24$EN;
+
+  // register host_pending_design_25
+  reg host_pending_design_25;
+  wire host_pending_design_25$D_IN, host_pending_design_25$EN;
+
+  // register host_pending_design_26
+  reg host_pending_design_26;
+  wire host_pending_design_26$D_IN, host_pending_design_26$EN;
+
+  // register host_pending_design_27
+  reg host_pending_design_27;
+  wire host_pending_design_27$D_IN, host_pending_design_27$EN;
+
+  // register host_pending_design_28
+  reg host_pending_design_28;
+  wire host_pending_design_28$D_IN, host_pending_design_28$EN;
+
+  // register host_pending_design_29
+  reg host_pending_design_29;
+  wire host_pending_design_29$D_IN, host_pending_design_29$EN;
+
+  // register host_pending_design_3
+  reg host_pending_design_3;
+  wire host_pending_design_3$D_IN, host_pending_design_3$EN;
+
+  // register host_pending_design_30
+  reg host_pending_design_30;
+  wire host_pending_design_30$D_IN, host_pending_design_30$EN;
+
+  // register host_pending_design_31
+  reg host_pending_design_31;
+  wire host_pending_design_31$D_IN, host_pending_design_31$EN;
+
+  // register host_pending_design_32
+  reg host_pending_design_32;
+  wire host_pending_design_32$D_IN, host_pending_design_32$EN;
+
+  // register host_pending_design_33
+  reg host_pending_design_33;
+  wire host_pending_design_33$D_IN, host_pending_design_33$EN;
+
+  // register host_pending_design_34
+  reg host_pending_design_34;
+  wire host_pending_design_34$D_IN, host_pending_design_34$EN;
+
+  // register host_pending_design_35
+  reg host_pending_design_35;
+  wire host_pending_design_35$D_IN, host_pending_design_35$EN;
+
+  // register host_pending_design_36
+  reg host_pending_design_36;
+  wire host_pending_design_36$D_IN, host_pending_design_36$EN;
+
+  // register host_pending_design_37
+  reg host_pending_design_37;
+  wire host_pending_design_37$D_IN, host_pending_design_37$EN;
+
+  // register host_pending_design_38
+  reg host_pending_design_38;
+  wire host_pending_design_38$D_IN, host_pending_design_38$EN;
+
+  // register host_pending_design_39
+  reg host_pending_design_39;
+  wire host_pending_design_39$D_IN, host_pending_design_39$EN;
+
+  // register host_pending_design_4
+  reg host_pending_design_4;
+  wire host_pending_design_4$D_IN, host_pending_design_4$EN;
+
+  // register host_pending_design_40
+  reg host_pending_design_40;
+  wire host_pending_design_40$D_IN, host_pending_design_40$EN;
+
+  // register host_pending_design_41
+  reg host_pending_design_41;
+  wire host_pending_design_41$D_IN, host_pending_design_41$EN;
+
+  // register host_pending_design_42
+  reg host_pending_design_42;
+  wire host_pending_design_42$D_IN, host_pending_design_42$EN;
+
+  // register host_pending_design_43
+  reg host_pending_design_43;
+  wire host_pending_design_43$D_IN, host_pending_design_43$EN;
+
+  // register host_pending_design_44
+  reg host_pending_design_44;
+  wire host_pending_design_44$D_IN, host_pending_design_44$EN;
+
+  // register host_pending_design_45
+  reg host_pending_design_45;
+  wire host_pending_design_45$D_IN, host_pending_design_45$EN;
+
+  // register host_pending_design_46
+  reg host_pending_design_46;
+  wire host_pending_design_46$D_IN, host_pending_design_46$EN;
+
+  // register host_pending_design_47
+  reg host_pending_design_47;
+  wire host_pending_design_47$D_IN, host_pending_design_47$EN;
+
+  // register host_pending_design_48
+  reg host_pending_design_48;
+  wire host_pending_design_48$D_IN, host_pending_design_48$EN;
+
+  // register host_pending_design_49
+  reg host_pending_design_49;
+  wire host_pending_design_49$D_IN, host_pending_design_49$EN;
+
+  // register host_pending_design_5
+  reg host_pending_design_5;
+  wire host_pending_design_5$D_IN, host_pending_design_5$EN;
+
+  // register host_pending_design_50
+  reg host_pending_design_50;
+  wire host_pending_design_50$D_IN, host_pending_design_50$EN;
+
+  // register host_pending_design_51
+  reg host_pending_design_51;
+  wire host_pending_design_51$D_IN, host_pending_design_51$EN;
+
+  // register host_pending_design_52
+  reg host_pending_design_52;
+  wire host_pending_design_52$D_IN, host_pending_design_52$EN;
+
+  // register host_pending_design_53
+  reg host_pending_design_53;
+  wire host_pending_design_53$D_IN, host_pending_design_53$EN;
+
+  // register host_pending_design_54
+  reg host_pending_design_54;
+  wire host_pending_design_54$D_IN, host_pending_design_54$EN;
+
+  // register host_pending_design_55
+  reg host_pending_design_55;
+  wire host_pending_design_55$D_IN, host_pending_design_55$EN;
+
+  // register host_pending_design_56
+  reg host_pending_design_56;
+  wire host_pending_design_56$D_IN, host_pending_design_56$EN;
+
+  // register host_pending_design_57
+  reg host_pending_design_57;
+  wire host_pending_design_57$D_IN, host_pending_design_57$EN;
+
+  // register host_pending_design_58
+  reg host_pending_design_58;
+  wire host_pending_design_58$D_IN, host_pending_design_58$EN;
+
+  // register host_pending_design_59
+  reg host_pending_design_59;
+  wire host_pending_design_59$D_IN, host_pending_design_59$EN;
+
+  // register host_pending_design_6
+  reg host_pending_design_6;
+  wire host_pending_design_6$D_IN, host_pending_design_6$EN;
+
+  // register host_pending_design_60
+  reg host_pending_design_60;
+  wire host_pending_design_60$D_IN, host_pending_design_60$EN;
+
+  // register host_pending_design_61
+  reg host_pending_design_61;
+  wire host_pending_design_61$D_IN, host_pending_design_61$EN;
+
+  // register host_pending_design_62
+  reg host_pending_design_62;
+  wire host_pending_design_62$D_IN, host_pending_design_62$EN;
+
+  // register host_pending_design_63
+  reg host_pending_design_63;
+  wire host_pending_design_63$D_IN, host_pending_design_63$EN;
+
+  // register host_pending_design_64
+  reg host_pending_design_64;
+  wire host_pending_design_64$D_IN, host_pending_design_64$EN;
+
+  // register host_pending_design_65
+  reg host_pending_design_65;
+  wire host_pending_design_65$D_IN, host_pending_design_65$EN;
+
+  // register host_pending_design_66
+  reg host_pending_design_66;
+  wire host_pending_design_66$D_IN, host_pending_design_66$EN;
+
+  // register host_pending_design_67
+  reg host_pending_design_67;
+  wire host_pending_design_67$D_IN, host_pending_design_67$EN;
+
+  // register host_pending_design_68
+  reg host_pending_design_68;
+  wire host_pending_design_68$D_IN, host_pending_design_68$EN;
+
+  // register host_pending_design_69
+  reg host_pending_design_69;
+  wire host_pending_design_69$D_IN, host_pending_design_69$EN;
+
+  // register host_pending_design_7
+  reg host_pending_design_7;
+  wire host_pending_design_7$D_IN, host_pending_design_7$EN;
+
+  // register host_pending_design_70
+  reg host_pending_design_70;
+  wire host_pending_design_70$D_IN, host_pending_design_70$EN;
+
+  // register host_pending_design_71
+  reg host_pending_design_71;
+  wire host_pending_design_71$D_IN, host_pending_design_71$EN;
+
+  // register host_pending_design_72
+  reg host_pending_design_72;
+  wire host_pending_design_72$D_IN, host_pending_design_72$EN;
+
+  // register host_pending_design_73
+  reg host_pending_design_73;
+  wire host_pending_design_73$D_IN, host_pending_design_73$EN;
+
+  // register host_pending_design_74
+  reg host_pending_design_74;
+  wire host_pending_design_74$D_IN, host_pending_design_74$EN;
+
+  // register host_pending_design_75
+  reg host_pending_design_75;
+  wire host_pending_design_75$D_IN, host_pending_design_75$EN;
+
+  // register host_pending_design_76
+  reg host_pending_design_76;
+  wire host_pending_design_76$D_IN, host_pending_design_76$EN;
+
+  // register host_pending_design_77
+  reg host_pending_design_77;
+  wire host_pending_design_77$D_IN, host_pending_design_77$EN;
+
+  // register host_pending_design_78
+  reg host_pending_design_78;
+  wire host_pending_design_78$D_IN, host_pending_design_78$EN;
+
+  // register host_pending_design_79
+  reg host_pending_design_79;
+  wire host_pending_design_79$D_IN, host_pending_design_79$EN;
+
+  // register host_pending_design_8
+  reg host_pending_design_8;
+  wire host_pending_design_8$D_IN, host_pending_design_8$EN;
+
+  // register host_pending_design_80
+  reg host_pending_design_80;
+  wire host_pending_design_80$D_IN, host_pending_design_80$EN;
+
+  // register host_pending_design_81
+  reg host_pending_design_81;
+  wire host_pending_design_81$D_IN, host_pending_design_81$EN;
+
+  // register host_pending_design_82
+  reg host_pending_design_82;
+  wire host_pending_design_82$D_IN, host_pending_design_82$EN;
+
+  // register host_pending_design_83
+  reg host_pending_design_83;
+  wire host_pending_design_83$D_IN, host_pending_design_83$EN;
+
+  // register host_pending_design_84
+  reg host_pending_design_84;
+  wire host_pending_design_84$D_IN, host_pending_design_84$EN;
+
+  // register host_pending_design_85
+  reg host_pending_design_85;
+  wire host_pending_design_85$D_IN, host_pending_design_85$EN;
+
+  // register host_pending_design_86
+  reg host_pending_design_86;
+  wire host_pending_design_86$D_IN, host_pending_design_86$EN;
+
+  // register host_pending_design_87
+  reg host_pending_design_87;
+  wire host_pending_design_87$D_IN, host_pending_design_87$EN;
+
+  // register host_pending_design_88
+  reg host_pending_design_88;
+  wire host_pending_design_88$D_IN, host_pending_design_88$EN;
+
+  // register host_pending_design_89
+  reg host_pending_design_89;
+  wire host_pending_design_89$D_IN, host_pending_design_89$EN;
+
+  // register host_pending_design_9
+  reg host_pending_design_9;
+  wire host_pending_design_9$D_IN, host_pending_design_9$EN;
+
+  // register host_pending_design_90
+  reg host_pending_design_90;
+  wire host_pending_design_90$D_IN, host_pending_design_90$EN;
+
+  // register host_pending_design_91
+  reg host_pending_design_91;
+  wire host_pending_design_91$D_IN, host_pending_design_91$EN;
+
+  // register host_pending_design_92
+  reg host_pending_design_92;
+  wire host_pending_design_92$D_IN, host_pending_design_92$EN;
+
+  // register host_pending_design_93
+  reg host_pending_design_93;
+  wire host_pending_design_93$D_IN, host_pending_design_93$EN;
+
+  // register host_pending_design_94
+  reg host_pending_design_94;
+  wire host_pending_design_94$D_IN, host_pending_design_94$EN;
+
+  // register host_pending_design_95
+  reg host_pending_design_95;
+  wire host_pending_design_95$D_IN, host_pending_design_95$EN;
+
+  // register host_pending_design_96
+  reg host_pending_design_96;
+  wire host_pending_design_96$D_IN, host_pending_design_96$EN;
+
+  // register host_pending_design_97
+  reg host_pending_design_97;
+  wire host_pending_design_97$D_IN, host_pending_design_97$EN;
+
+  // register host_pending_design_98
+  reg host_pending_design_98;
+  wire host_pending_design_98$D_IN, host_pending_design_98$EN;
+
+  // register host_pending_design_99
+  reg host_pending_design_99;
+  wire host_pending_design_99$D_IN, host_pending_design_99$EN;
+
+  // register host_pending_pcie_0
+  reg host_pending_pcie_0;
+  wire host_pending_pcie_0$D_IN, host_pending_pcie_0$EN;
+
+  // register host_pending_pcie_1
+  reg host_pending_pcie_1;
+  wire host_pending_pcie_1$D_IN, host_pending_pcie_1$EN;
+
+  // register host_pending_pcie_2
+  reg host_pending_pcie_2;
+  wire host_pending_pcie_2$D_IN, host_pending_pcie_2$EN;
+
+  // register host_pending_pcie_3
+  reg host_pending_pcie_3;
+  wire host_pending_pcie_3$D_IN, host_pending_pcie_3$EN;
+
+  // register id
+  reg [31 : 0] id;
+  wire [31 : 0] id$D_IN;
+  wire id$EN;
+
+  // register interrupt_last_0
+  reg interrupt_last_0;
+  wire interrupt_last_0$D_IN, interrupt_last_0$EN;
+
+  // register interrupt_last_1
+  reg interrupt_last_1;
+  wire interrupt_last_1$D_IN, interrupt_last_1$EN;
+
+  // register interrupt_last_10
+  reg interrupt_last_10;
+  wire interrupt_last_10$D_IN, interrupt_last_10$EN;
+
+  // register interrupt_last_100
+  reg interrupt_last_100;
+  wire interrupt_last_100$D_IN, interrupt_last_100$EN;
+
+  // register interrupt_last_101
+  reg interrupt_last_101;
+  wire interrupt_last_101$D_IN, interrupt_last_101$EN;
+
+  // register interrupt_last_102
+  reg interrupt_last_102;
+  wire interrupt_last_102$D_IN, interrupt_last_102$EN;
+
+  // register interrupt_last_103
+  reg interrupt_last_103;
+  wire interrupt_last_103$D_IN, interrupt_last_103$EN;
+
+  // register interrupt_last_104
+  reg interrupt_last_104;
+  wire interrupt_last_104$D_IN, interrupt_last_104$EN;
+
+  // register interrupt_last_105
+  reg interrupt_last_105;
+  wire interrupt_last_105$D_IN, interrupt_last_105$EN;
+
+  // register interrupt_last_106
+  reg interrupt_last_106;
+  wire interrupt_last_106$D_IN, interrupt_last_106$EN;
+
+  // register interrupt_last_107
+  reg interrupt_last_107;
+  wire interrupt_last_107$D_IN, interrupt_last_107$EN;
+
+  // register interrupt_last_108
+  reg interrupt_last_108;
+  wire interrupt_last_108$D_IN, interrupt_last_108$EN;
+
+  // register interrupt_last_109
+  reg interrupt_last_109;
+  wire interrupt_last_109$D_IN, interrupt_last_109$EN;
+
+  // register interrupt_last_11
+  reg interrupt_last_11;
+  wire interrupt_last_11$D_IN, interrupt_last_11$EN;
+
+  // register interrupt_last_110
+  reg interrupt_last_110;
+  wire interrupt_last_110$D_IN, interrupt_last_110$EN;
+
+  // register interrupt_last_111
+  reg interrupt_last_111;
+  wire interrupt_last_111$D_IN, interrupt_last_111$EN;
+
+  // register interrupt_last_112
+  reg interrupt_last_112;
+  wire interrupt_last_112$D_IN, interrupt_last_112$EN;
+
+  // register interrupt_last_113
+  reg interrupt_last_113;
+  wire interrupt_last_113$D_IN, interrupt_last_113$EN;
+
+  // register interrupt_last_114
+  reg interrupt_last_114;
+  wire interrupt_last_114$D_IN, interrupt_last_114$EN;
+
+  // register interrupt_last_115
+  reg interrupt_last_115;
+  wire interrupt_last_115$D_IN, interrupt_last_115$EN;
+
+  // register interrupt_last_116
+  reg interrupt_last_116;
+  wire interrupt_last_116$D_IN, interrupt_last_116$EN;
+
+  // register interrupt_last_117
+  reg interrupt_last_117;
+  wire interrupt_last_117$D_IN, interrupt_last_117$EN;
+
+  // register interrupt_last_118
+  reg interrupt_last_118;
+  wire interrupt_last_118$D_IN, interrupt_last_118$EN;
+
+  // register interrupt_last_119
+  reg interrupt_last_119;
+  wire interrupt_last_119$D_IN, interrupt_last_119$EN;
+
+  // register interrupt_last_12
+  reg interrupt_last_12;
+  wire interrupt_last_12$D_IN, interrupt_last_12$EN;
+
+  // register interrupt_last_120
+  reg interrupt_last_120;
+  wire interrupt_last_120$D_IN, interrupt_last_120$EN;
+
+  // register interrupt_last_121
+  reg interrupt_last_121;
+  wire interrupt_last_121$D_IN, interrupt_last_121$EN;
+
+  // register interrupt_last_122
+  reg interrupt_last_122;
+  wire interrupt_last_122$D_IN, interrupt_last_122$EN;
+
+  // register interrupt_last_123
+  reg interrupt_last_123;
+  wire interrupt_last_123$D_IN, interrupt_last_123$EN;
+
+  // register interrupt_last_124
+  reg interrupt_last_124;
+  wire interrupt_last_124$D_IN, interrupt_last_124$EN;
+
+  // register interrupt_last_125
+  reg interrupt_last_125;
+  wire interrupt_last_125$D_IN, interrupt_last_125$EN;
+
+  // register interrupt_last_126
+  reg interrupt_last_126;
+  wire interrupt_last_126$D_IN, interrupt_last_126$EN;
+
+  // register interrupt_last_127
+  reg interrupt_last_127;
+  wire interrupt_last_127$D_IN, interrupt_last_127$EN;
+
+  // register interrupt_last_128
+  reg interrupt_last_128;
+  wire interrupt_last_128$D_IN, interrupt_last_128$EN;
+
+  // register interrupt_last_129
+  reg interrupt_last_129;
+  wire interrupt_last_129$D_IN, interrupt_last_129$EN;
+
+  // register interrupt_last_13
+  reg interrupt_last_13;
+  wire interrupt_last_13$D_IN, interrupt_last_13$EN;
+
+  // register interrupt_last_130
+  reg interrupt_last_130;
+  wire interrupt_last_130$D_IN, interrupt_last_130$EN;
+
+  // register interrupt_last_131
+  reg interrupt_last_131;
+  wire interrupt_last_131$D_IN, interrupt_last_131$EN;
+
+  // register interrupt_last_14
+  reg interrupt_last_14;
+  wire interrupt_last_14$D_IN, interrupt_last_14$EN;
+
+  // register interrupt_last_15
+  reg interrupt_last_15;
+  wire interrupt_last_15$D_IN, interrupt_last_15$EN;
+
+  // register interrupt_last_16
+  reg interrupt_last_16;
+  wire interrupt_last_16$D_IN, interrupt_last_16$EN;
+
+  // register interrupt_last_17
+  reg interrupt_last_17;
+  wire interrupt_last_17$D_IN, interrupt_last_17$EN;
+
+  // register interrupt_last_18
+  reg interrupt_last_18;
+  wire interrupt_last_18$D_IN, interrupt_last_18$EN;
+
+  // register interrupt_last_19
+  reg interrupt_last_19;
+  wire interrupt_last_19$D_IN, interrupt_last_19$EN;
+
+  // register interrupt_last_2
+  reg interrupt_last_2;
+  wire interrupt_last_2$D_IN, interrupt_last_2$EN;
+
+  // register interrupt_last_20
+  reg interrupt_last_20;
+  wire interrupt_last_20$D_IN, interrupt_last_20$EN;
+
+  // register interrupt_last_21
+  reg interrupt_last_21;
+  wire interrupt_last_21$D_IN, interrupt_last_21$EN;
+
+  // register interrupt_last_22
+  reg interrupt_last_22;
+  wire interrupt_last_22$D_IN, interrupt_last_22$EN;
+
+  // register interrupt_last_23
+  reg interrupt_last_23;
+  wire interrupt_last_23$D_IN, interrupt_last_23$EN;
+
+  // register interrupt_last_24
+  reg interrupt_last_24;
+  wire interrupt_last_24$D_IN, interrupt_last_24$EN;
+
+  // register interrupt_last_25
+  reg interrupt_last_25;
+  wire interrupt_last_25$D_IN, interrupt_last_25$EN;
+
+  // register interrupt_last_26
+  reg interrupt_last_26;
+  wire interrupt_last_26$D_IN, interrupt_last_26$EN;
+
+  // register interrupt_last_27
+  reg interrupt_last_27;
+  wire interrupt_last_27$D_IN, interrupt_last_27$EN;
+
+  // register interrupt_last_28
+  reg interrupt_last_28;
+  wire interrupt_last_28$D_IN, interrupt_last_28$EN;
+
+  // register interrupt_last_29
+  reg interrupt_last_29;
+  wire interrupt_last_29$D_IN, interrupt_last_29$EN;
+
+  // register interrupt_last_3
+  reg interrupt_last_3;
+  wire interrupt_last_3$D_IN, interrupt_last_3$EN;
+
+  // register interrupt_last_30
+  reg interrupt_last_30;
+  wire interrupt_last_30$D_IN, interrupt_last_30$EN;
+
+  // register interrupt_last_31
+  reg interrupt_last_31;
+  wire interrupt_last_31$D_IN, interrupt_last_31$EN;
+
+  // register interrupt_last_32
+  reg interrupt_last_32;
+  wire interrupt_last_32$D_IN, interrupt_last_32$EN;
+
+  // register interrupt_last_33
+  reg interrupt_last_33;
+  wire interrupt_last_33$D_IN, interrupt_last_33$EN;
+
+  // register interrupt_last_34
+  reg interrupt_last_34;
+  wire interrupt_last_34$D_IN, interrupt_last_34$EN;
+
+  // register interrupt_last_35
+  reg interrupt_last_35;
+  wire interrupt_last_35$D_IN, interrupt_last_35$EN;
+
+  // register interrupt_last_36
+  reg interrupt_last_36;
+  wire interrupt_last_36$D_IN, interrupt_last_36$EN;
+
+  // register interrupt_last_37
+  reg interrupt_last_37;
+  wire interrupt_last_37$D_IN, interrupt_last_37$EN;
+
+  // register interrupt_last_38
+  reg interrupt_last_38;
+  wire interrupt_last_38$D_IN, interrupt_last_38$EN;
+
+  // register interrupt_last_39
+  reg interrupt_last_39;
+  wire interrupt_last_39$D_IN, interrupt_last_39$EN;
+
+  // register interrupt_last_4
+  reg interrupt_last_4;
+  wire interrupt_last_4$D_IN, interrupt_last_4$EN;
+
+  // register interrupt_last_40
+  reg interrupt_last_40;
+  wire interrupt_last_40$D_IN, interrupt_last_40$EN;
+
+  // register interrupt_last_41
+  reg interrupt_last_41;
+  wire interrupt_last_41$D_IN, interrupt_last_41$EN;
+
+  // register interrupt_last_42
+  reg interrupt_last_42;
+  wire interrupt_last_42$D_IN, interrupt_last_42$EN;
+
+  // register interrupt_last_43
+  reg interrupt_last_43;
+  wire interrupt_last_43$D_IN, interrupt_last_43$EN;
+
+  // register interrupt_last_44
+  reg interrupt_last_44;
+  wire interrupt_last_44$D_IN, interrupt_last_44$EN;
+
+  // register interrupt_last_45
+  reg interrupt_last_45;
+  wire interrupt_last_45$D_IN, interrupt_last_45$EN;
+
+  // register interrupt_last_46
+  reg interrupt_last_46;
+  wire interrupt_last_46$D_IN, interrupt_last_46$EN;
+
+  // register interrupt_last_47
+  reg interrupt_last_47;
+  wire interrupt_last_47$D_IN, interrupt_last_47$EN;
+
+  // register interrupt_last_48
+  reg interrupt_last_48;
+  wire interrupt_last_48$D_IN, interrupt_last_48$EN;
+
+  // register interrupt_last_49
+  reg interrupt_last_49;
+  wire interrupt_last_49$D_IN, interrupt_last_49$EN;
+
+  // register interrupt_last_5
+  reg interrupt_last_5;
+  wire interrupt_last_5$D_IN, interrupt_last_5$EN;
+
+  // register interrupt_last_50
+  reg interrupt_last_50;
+  wire interrupt_last_50$D_IN, interrupt_last_50$EN;
+
+  // register interrupt_last_51
+  reg interrupt_last_51;
+  wire interrupt_last_51$D_IN, interrupt_last_51$EN;
+
+  // register interrupt_last_52
+  reg interrupt_last_52;
+  wire interrupt_last_52$D_IN, interrupt_last_52$EN;
+
+  // register interrupt_last_53
+  reg interrupt_last_53;
+  wire interrupt_last_53$D_IN, interrupt_last_53$EN;
+
+  // register interrupt_last_54
+  reg interrupt_last_54;
+  wire interrupt_last_54$D_IN, interrupt_last_54$EN;
+
+  // register interrupt_last_55
+  reg interrupt_last_55;
+  wire interrupt_last_55$D_IN, interrupt_last_55$EN;
+
+  // register interrupt_last_56
+  reg interrupt_last_56;
+  wire interrupt_last_56$D_IN, interrupt_last_56$EN;
+
+  // register interrupt_last_57
+  reg interrupt_last_57;
+  wire interrupt_last_57$D_IN, interrupt_last_57$EN;
+
+  // register interrupt_last_58
+  reg interrupt_last_58;
+  wire interrupt_last_58$D_IN, interrupt_last_58$EN;
+
+  // register interrupt_last_59
+  reg interrupt_last_59;
+  wire interrupt_last_59$D_IN, interrupt_last_59$EN;
+
+  // register interrupt_last_6
+  reg interrupt_last_6;
+  wire interrupt_last_6$D_IN, interrupt_last_6$EN;
+
+  // register interrupt_last_60
+  reg interrupt_last_60;
+  wire interrupt_last_60$D_IN, interrupt_last_60$EN;
+
+  // register interrupt_last_61
+  reg interrupt_last_61;
+  wire interrupt_last_61$D_IN, interrupt_last_61$EN;
+
+  // register interrupt_last_62
+  reg interrupt_last_62;
+  wire interrupt_last_62$D_IN, interrupt_last_62$EN;
+
+  // register interrupt_last_63
+  reg interrupt_last_63;
+  wire interrupt_last_63$D_IN, interrupt_last_63$EN;
+
+  // register interrupt_last_64
+  reg interrupt_last_64;
+  wire interrupt_last_64$D_IN, interrupt_last_64$EN;
+
+  // register interrupt_last_65
+  reg interrupt_last_65;
+  wire interrupt_last_65$D_IN, interrupt_last_65$EN;
+
+  // register interrupt_last_66
+  reg interrupt_last_66;
+  wire interrupt_last_66$D_IN, interrupt_last_66$EN;
+
+  // register interrupt_last_67
+  reg interrupt_last_67;
+  wire interrupt_last_67$D_IN, interrupt_last_67$EN;
+
+  // register interrupt_last_68
+  reg interrupt_last_68;
+  wire interrupt_last_68$D_IN, interrupt_last_68$EN;
+
+  // register interrupt_last_69
+  reg interrupt_last_69;
+  wire interrupt_last_69$D_IN, interrupt_last_69$EN;
+
+  // register interrupt_last_7
+  reg interrupt_last_7;
+  wire interrupt_last_7$D_IN, interrupt_last_7$EN;
+
+  // register interrupt_last_70
+  reg interrupt_last_70;
+  wire interrupt_last_70$D_IN, interrupt_last_70$EN;
+
+  // register interrupt_last_71
+  reg interrupt_last_71;
+  wire interrupt_last_71$D_IN, interrupt_last_71$EN;
+
+  // register interrupt_last_72
+  reg interrupt_last_72;
+  wire interrupt_last_72$D_IN, interrupt_last_72$EN;
+
+  // register interrupt_last_73
+  reg interrupt_last_73;
+  wire interrupt_last_73$D_IN, interrupt_last_73$EN;
+
+  // register interrupt_last_74
+  reg interrupt_last_74;
+  wire interrupt_last_74$D_IN, interrupt_last_74$EN;
+
+  // register interrupt_last_75
+  reg interrupt_last_75;
+  wire interrupt_last_75$D_IN, interrupt_last_75$EN;
+
+  // register interrupt_last_76
+  reg interrupt_last_76;
+  wire interrupt_last_76$D_IN, interrupt_last_76$EN;
+
+  // register interrupt_last_77
+  reg interrupt_last_77;
+  wire interrupt_last_77$D_IN, interrupt_last_77$EN;
+
+  // register interrupt_last_78
+  reg interrupt_last_78;
+  wire interrupt_last_78$D_IN, interrupt_last_78$EN;
+
+  // register interrupt_last_79
+  reg interrupt_last_79;
+  wire interrupt_last_79$D_IN, interrupt_last_79$EN;
+
+  // register interrupt_last_8
+  reg interrupt_last_8;
+  wire interrupt_last_8$D_IN, interrupt_last_8$EN;
+
+  // register interrupt_last_80
+  reg interrupt_last_80;
+  wire interrupt_last_80$D_IN, interrupt_last_80$EN;
+
+  // register interrupt_last_81
+  reg interrupt_last_81;
+  wire interrupt_last_81$D_IN, interrupt_last_81$EN;
+
+  // register interrupt_last_82
+  reg interrupt_last_82;
+  wire interrupt_last_82$D_IN, interrupt_last_82$EN;
+
+  // register interrupt_last_83
+  reg interrupt_last_83;
+  wire interrupt_last_83$D_IN, interrupt_last_83$EN;
+
+  // register interrupt_last_84
+  reg interrupt_last_84;
+  wire interrupt_last_84$D_IN, interrupt_last_84$EN;
+
+  // register interrupt_last_85
+  reg interrupt_last_85;
+  wire interrupt_last_85$D_IN, interrupt_last_85$EN;
+
+  // register interrupt_last_86
+  reg interrupt_last_86;
+  wire interrupt_last_86$D_IN, interrupt_last_86$EN;
+
+  // register interrupt_last_87
+  reg interrupt_last_87;
+  wire interrupt_last_87$D_IN, interrupt_last_87$EN;
+
+  // register interrupt_last_88
+  reg interrupt_last_88;
+  wire interrupt_last_88$D_IN, interrupt_last_88$EN;
+
+  // register interrupt_last_89
+  reg interrupt_last_89;
+  wire interrupt_last_89$D_IN, interrupt_last_89$EN;
+
+  // register interrupt_last_9
+  reg interrupt_last_9;
+  wire interrupt_last_9$D_IN, interrupt_last_9$EN;
+
+  // register interrupt_last_90
+  reg interrupt_last_90;
+  wire interrupt_last_90$D_IN, interrupt_last_90$EN;
+
+  // register interrupt_last_91
+  reg interrupt_last_91;
+  wire interrupt_last_91$D_IN, interrupt_last_91$EN;
+
+  // register interrupt_last_92
+  reg interrupt_last_92;
+  wire interrupt_last_92$D_IN, interrupt_last_92$EN;
+
+  // register interrupt_last_93
+  reg interrupt_last_93;
+  wire interrupt_last_93$D_IN, interrupt_last_93$EN;
+
+  // register interrupt_last_94
+  reg interrupt_last_94;
+  wire interrupt_last_94$D_IN, interrupt_last_94$EN;
+
+  // register interrupt_last_95
+  reg interrupt_last_95;
+  wire interrupt_last_95$D_IN, interrupt_last_95$EN;
+
+  // register interrupt_last_96
+  reg interrupt_last_96;
+  wire interrupt_last_96$D_IN, interrupt_last_96$EN;
+
+  // register interrupt_last_97
+  reg interrupt_last_97;
+  wire interrupt_last_97$D_IN, interrupt_last_97$EN;
+
+  // register interrupt_last_98
+  reg interrupt_last_98;
+  wire interrupt_last_98$D_IN, interrupt_last_98$EN;
+
+  // register interrupt_last_99
+  reg interrupt_last_99;
+  wire interrupt_last_99$D_IN, interrupt_last_99$EN;
+
+  // register s_config_readBusy
+  reg s_config_readBusy;
+  wire s_config_readBusy$D_IN, s_config_readBusy$EN;
+
+  // register s_config_writeBusy
+  reg s_config_writeBusy;
+  wire s_config_writeBusy$D_IN, s_config_writeBusy$EN;
+
+  // register s_config_writeSlave_addrIn_rv
+  reg [19 : 0] s_config_writeSlave_addrIn_rv;
+  wire [19 : 0] s_config_writeSlave_addrIn_rv$D_IN;
+  wire s_config_writeSlave_addrIn_rv$EN;
+
+  // register s_config_writeSlave_dataIn_rv
+  reg [36 : 0] s_config_writeSlave_dataIn_rv;
+  wire [36 : 0] s_config_writeSlave_dataIn_rv$D_IN;
+  wire s_config_writeSlave_dataIn_rv$EN;
+
+  // register sh_active_0
+  reg sh_active_0;
+  wire sh_active_0$D_IN, sh_active_0$EN;
+
+  // register sh_active_1
+  reg sh_active_1;
+  wire sh_active_1$D_IN, sh_active_1$EN;
+
+  // register sh_active_10
+  reg sh_active_10;
+  wire sh_active_10$D_IN, sh_active_10$EN;
+
+  // register sh_active_11
+  reg sh_active_11;
+  wire sh_active_11$D_IN, sh_active_11$EN;
+
+  // register sh_active_12
+  reg sh_active_12;
+  wire sh_active_12$D_IN, sh_active_12$EN;
+
+  // register sh_active_13
+  reg sh_active_13;
+  wire sh_active_13$D_IN, sh_active_13$EN;
+
+  // register sh_active_14
+  reg sh_active_14;
+  wire sh_active_14$D_IN, sh_active_14$EN;
+
+  // register sh_active_15
+  reg sh_active_15;
+  wire sh_active_15$D_IN, sh_active_15$EN;
+
+  // register sh_active_2
+  reg sh_active_2;
+  wire sh_active_2$D_IN, sh_active_2$EN;
+
+  // register sh_active_3
+  reg sh_active_3;
+  wire sh_active_3$D_IN, sh_active_3$EN;
+
+  // register sh_active_4
+  reg sh_active_4;
+  wire sh_active_4$D_IN, sh_active_4$EN;
+
+  // register sh_active_5
+  reg sh_active_5;
+  wire sh_active_5$D_IN, sh_active_5$EN;
+
+  // register sh_active_6
+  reg sh_active_6;
+  wire sh_active_6$D_IN, sh_active_6$EN;
+
+  // register sh_active_7
+  reg sh_active_7;
+  wire sh_active_7$D_IN, sh_active_7$EN;
+
+  // register sh_active_8
+  reg sh_active_8;
+  wire sh_active_8$D_IN, sh_active_8$EN;
+
+  // register sh_active_9
+  reg sh_active_9;
+  wire sh_active_9$D_IN, sh_active_9$EN;
+
+  // register sh_wait_ack_0
+  reg sh_wait_ack_0;
+  wire sh_wait_ack_0$D_IN, sh_wait_ack_0$EN;
+
+  // register sh_wait_ack_1
+  reg sh_wait_ack_1;
+  wire sh_wait_ack_1$D_IN, sh_wait_ack_1$EN;
+
+  // register sh_wait_ack_10
+  reg sh_wait_ack_10;
+  wire sh_wait_ack_10$D_IN, sh_wait_ack_10$EN;
+
+  // register sh_wait_ack_11
+  reg sh_wait_ack_11;
+  wire sh_wait_ack_11$D_IN, sh_wait_ack_11$EN;
+
+  // register sh_wait_ack_12
+  reg sh_wait_ack_12;
+  wire sh_wait_ack_12$D_IN, sh_wait_ack_12$EN;
+
+  // register sh_wait_ack_13
+  reg sh_wait_ack_13;
+  wire sh_wait_ack_13$D_IN, sh_wait_ack_13$EN;
+
+  // register sh_wait_ack_14
+  reg sh_wait_ack_14;
+  wire sh_wait_ack_14$D_IN, sh_wait_ack_14$EN;
+
+  // register sh_wait_ack_15
+  reg sh_wait_ack_15;
+  wire sh_wait_ack_15$D_IN, sh_wait_ack_15$EN;
+
+  // register sh_wait_ack_2
+  reg sh_wait_ack_2;
+  wire sh_wait_ack_2$D_IN, sh_wait_ack_2$EN;
+
+  // register sh_wait_ack_3
+  reg sh_wait_ack_3;
+  wire sh_wait_ack_3$D_IN, sh_wait_ack_3$EN;
+
+  // register sh_wait_ack_4
+  reg sh_wait_ack_4;
+  wire sh_wait_ack_4$D_IN, sh_wait_ack_4$EN;
+
+  // register sh_wait_ack_5
+  reg sh_wait_ack_5;
+  wire sh_wait_ack_5$D_IN, sh_wait_ack_5$EN;
+
+  // register sh_wait_ack_6
+  reg sh_wait_ack_6;
+  wire sh_wait_ack_6$D_IN, sh_wait_ack_6$EN;
+
+  // register sh_wait_ack_7
+  reg sh_wait_ack_7;
+  wire sh_wait_ack_7$D_IN, sh_wait_ack_7$EN;
+
+  // register sh_wait_ack_8
+  reg sh_wait_ack_8;
+  wire sh_wait_ack_8$D_IN, sh_wait_ack_8$EN;
+
+  // register sh_wait_ack_9
+  reg sh_wait_ack_9;
+  wire sh_wait_ack_9$D_IN, sh_wait_ack_9$EN;
+
+  // ports of submodule ackFIFO
+  wire [7 : 0] ackFIFO$D_IN, ackFIFO$D_OUT;
+  wire ackFIFO$CLR, ackFIFO$DEQ, ackFIFO$EMPTY_N, ackFIFO$ENQ, ackFIFO$FULL_N;
+
+  // ports of submodule pending_interrupts_0
+  wire pending_interrupts_0$CLR,
+       pending_interrupts_0$DEQ,
+       pending_interrupts_0$D_IN,
+       pending_interrupts_0$EMPTY_N,
+       pending_interrupts_0$ENQ,
+       pending_interrupts_0$FULL_N;
+
+  // ports of submodule pending_interrupts_1
+  wire pending_interrupts_1$CLR,
+       pending_interrupts_1$DEQ,
+       pending_interrupts_1$D_IN,
+       pending_interrupts_1$EMPTY_N,
+       pending_interrupts_1$ENQ,
+       pending_interrupts_1$FULL_N;
+
+  // ports of submodule pending_interrupts_10
+  wire pending_interrupts_10$CLR,
+       pending_interrupts_10$DEQ,
+       pending_interrupts_10$D_IN,
+       pending_interrupts_10$EMPTY_N,
+       pending_interrupts_10$ENQ,
+       pending_interrupts_10$FULL_N;
+
+  // ports of submodule pending_interrupts_100
+  wire pending_interrupts_100$CLR,
+       pending_interrupts_100$DEQ,
+       pending_interrupts_100$D_IN,
+       pending_interrupts_100$EMPTY_N,
+       pending_interrupts_100$ENQ,
+       pending_interrupts_100$FULL_N;
+
+  // ports of submodule pending_interrupts_101
+  wire pending_interrupts_101$CLR,
+       pending_interrupts_101$DEQ,
+       pending_interrupts_101$D_IN,
+       pending_interrupts_101$EMPTY_N,
+       pending_interrupts_101$ENQ,
+       pending_interrupts_101$FULL_N;
+
+  // ports of submodule pending_interrupts_102
+  wire pending_interrupts_102$CLR,
+       pending_interrupts_102$DEQ,
+       pending_interrupts_102$D_IN,
+       pending_interrupts_102$EMPTY_N,
+       pending_interrupts_102$ENQ,
+       pending_interrupts_102$FULL_N;
+
+  // ports of submodule pending_interrupts_103
+  wire pending_interrupts_103$CLR,
+       pending_interrupts_103$DEQ,
+       pending_interrupts_103$D_IN,
+       pending_interrupts_103$EMPTY_N,
+       pending_interrupts_103$ENQ,
+       pending_interrupts_103$FULL_N;
+
+  // ports of submodule pending_interrupts_104
+  wire pending_interrupts_104$CLR,
+       pending_interrupts_104$DEQ,
+       pending_interrupts_104$D_IN,
+       pending_interrupts_104$EMPTY_N,
+       pending_interrupts_104$ENQ,
+       pending_interrupts_104$FULL_N;
+
+  // ports of submodule pending_interrupts_105
+  wire pending_interrupts_105$CLR,
+       pending_interrupts_105$DEQ,
+       pending_interrupts_105$D_IN,
+       pending_interrupts_105$EMPTY_N,
+       pending_interrupts_105$ENQ,
+       pending_interrupts_105$FULL_N;
+
+  // ports of submodule pending_interrupts_106
+  wire pending_interrupts_106$CLR,
+       pending_interrupts_106$DEQ,
+       pending_interrupts_106$D_IN,
+       pending_interrupts_106$EMPTY_N,
+       pending_interrupts_106$ENQ,
+       pending_interrupts_106$FULL_N;
+
+  // ports of submodule pending_interrupts_107
+  wire pending_interrupts_107$CLR,
+       pending_interrupts_107$DEQ,
+       pending_interrupts_107$D_IN,
+       pending_interrupts_107$EMPTY_N,
+       pending_interrupts_107$ENQ,
+       pending_interrupts_107$FULL_N;
+
+  // ports of submodule pending_interrupts_108
+  wire pending_interrupts_108$CLR,
+       pending_interrupts_108$DEQ,
+       pending_interrupts_108$D_IN,
+       pending_interrupts_108$EMPTY_N,
+       pending_interrupts_108$ENQ,
+       pending_interrupts_108$FULL_N;
+
+  // ports of submodule pending_interrupts_109
+  wire pending_interrupts_109$CLR,
+       pending_interrupts_109$DEQ,
+       pending_interrupts_109$D_IN,
+       pending_interrupts_109$EMPTY_N,
+       pending_interrupts_109$ENQ,
+       pending_interrupts_109$FULL_N;
+
+  // ports of submodule pending_interrupts_11
+  wire pending_interrupts_11$CLR,
+       pending_interrupts_11$DEQ,
+       pending_interrupts_11$D_IN,
+       pending_interrupts_11$EMPTY_N,
+       pending_interrupts_11$ENQ,
+       pending_interrupts_11$FULL_N;
+
+  // ports of submodule pending_interrupts_110
+  wire pending_interrupts_110$CLR,
+       pending_interrupts_110$DEQ,
+       pending_interrupts_110$D_IN,
+       pending_interrupts_110$EMPTY_N,
+       pending_interrupts_110$ENQ,
+       pending_interrupts_110$FULL_N;
+
+  // ports of submodule pending_interrupts_111
+  wire pending_interrupts_111$CLR,
+       pending_interrupts_111$DEQ,
+       pending_interrupts_111$D_IN,
+       pending_interrupts_111$EMPTY_N,
+       pending_interrupts_111$ENQ,
+       pending_interrupts_111$FULL_N;
+
+  // ports of submodule pending_interrupts_112
+  wire pending_interrupts_112$CLR,
+       pending_interrupts_112$DEQ,
+       pending_interrupts_112$D_IN,
+       pending_interrupts_112$EMPTY_N,
+       pending_interrupts_112$ENQ,
+       pending_interrupts_112$FULL_N;
+
+  // ports of submodule pending_interrupts_113
+  wire pending_interrupts_113$CLR,
+       pending_interrupts_113$DEQ,
+       pending_interrupts_113$D_IN,
+       pending_interrupts_113$EMPTY_N,
+       pending_interrupts_113$ENQ,
+       pending_interrupts_113$FULL_N;
+
+  // ports of submodule pending_interrupts_114
+  wire pending_interrupts_114$CLR,
+       pending_interrupts_114$DEQ,
+       pending_interrupts_114$D_IN,
+       pending_interrupts_114$EMPTY_N,
+       pending_interrupts_114$ENQ,
+       pending_interrupts_114$FULL_N;
+
+  // ports of submodule pending_interrupts_115
+  wire pending_interrupts_115$CLR,
+       pending_interrupts_115$DEQ,
+       pending_interrupts_115$D_IN,
+       pending_interrupts_115$EMPTY_N,
+       pending_interrupts_115$ENQ,
+       pending_interrupts_115$FULL_N;
+
+  // ports of submodule pending_interrupts_116
+  wire pending_interrupts_116$CLR,
+       pending_interrupts_116$DEQ,
+       pending_interrupts_116$D_IN,
+       pending_interrupts_116$EMPTY_N,
+       pending_interrupts_116$ENQ,
+       pending_interrupts_116$FULL_N;
+
+  // ports of submodule pending_interrupts_117
+  wire pending_interrupts_117$CLR,
+       pending_interrupts_117$DEQ,
+       pending_interrupts_117$D_IN,
+       pending_interrupts_117$EMPTY_N,
+       pending_interrupts_117$ENQ,
+       pending_interrupts_117$FULL_N;
+
+  // ports of submodule pending_interrupts_118
+  wire pending_interrupts_118$CLR,
+       pending_interrupts_118$DEQ,
+       pending_interrupts_118$D_IN,
+       pending_interrupts_118$EMPTY_N,
+       pending_interrupts_118$ENQ,
+       pending_interrupts_118$FULL_N;
+
+  // ports of submodule pending_interrupts_119
+  wire pending_interrupts_119$CLR,
+       pending_interrupts_119$DEQ,
+       pending_interrupts_119$D_IN,
+       pending_interrupts_119$EMPTY_N,
+       pending_interrupts_119$ENQ,
+       pending_interrupts_119$FULL_N;
+
+  // ports of submodule pending_interrupts_12
+  wire pending_interrupts_12$CLR,
+       pending_interrupts_12$DEQ,
+       pending_interrupts_12$D_IN,
+       pending_interrupts_12$EMPTY_N,
+       pending_interrupts_12$ENQ,
+       pending_interrupts_12$FULL_N;
+
+  // ports of submodule pending_interrupts_120
+  wire pending_interrupts_120$CLR,
+       pending_interrupts_120$DEQ,
+       pending_interrupts_120$D_IN,
+       pending_interrupts_120$EMPTY_N,
+       pending_interrupts_120$ENQ,
+       pending_interrupts_120$FULL_N;
+
+  // ports of submodule pending_interrupts_121
+  wire pending_interrupts_121$CLR,
+       pending_interrupts_121$DEQ,
+       pending_interrupts_121$D_IN,
+       pending_interrupts_121$EMPTY_N,
+       pending_interrupts_121$ENQ,
+       pending_interrupts_121$FULL_N;
+
+  // ports of submodule pending_interrupts_122
+  wire pending_interrupts_122$CLR,
+       pending_interrupts_122$DEQ,
+       pending_interrupts_122$D_IN,
+       pending_interrupts_122$EMPTY_N,
+       pending_interrupts_122$ENQ,
+       pending_interrupts_122$FULL_N;
+
+  // ports of submodule pending_interrupts_123
+  wire pending_interrupts_123$CLR,
+       pending_interrupts_123$DEQ,
+       pending_interrupts_123$D_IN,
+       pending_interrupts_123$EMPTY_N,
+       pending_interrupts_123$ENQ,
+       pending_interrupts_123$FULL_N;
+
+  // ports of submodule pending_interrupts_124
+  wire pending_interrupts_124$CLR,
+       pending_interrupts_124$DEQ,
+       pending_interrupts_124$D_IN,
+       pending_interrupts_124$EMPTY_N,
+       pending_interrupts_124$ENQ,
+       pending_interrupts_124$FULL_N;
+
+  // ports of submodule pending_interrupts_125
+  wire pending_interrupts_125$CLR,
+       pending_interrupts_125$DEQ,
+       pending_interrupts_125$D_IN,
+       pending_interrupts_125$EMPTY_N,
+       pending_interrupts_125$ENQ,
+       pending_interrupts_125$FULL_N;
+
+  // ports of submodule pending_interrupts_126
+  wire pending_interrupts_126$CLR,
+       pending_interrupts_126$DEQ,
+       pending_interrupts_126$D_IN,
+       pending_interrupts_126$EMPTY_N,
+       pending_interrupts_126$ENQ,
+       pending_interrupts_126$FULL_N;
+
+  // ports of submodule pending_interrupts_127
+  wire pending_interrupts_127$CLR,
+       pending_interrupts_127$DEQ,
+       pending_interrupts_127$D_IN,
+       pending_interrupts_127$EMPTY_N,
+       pending_interrupts_127$ENQ,
+       pending_interrupts_127$FULL_N;
+
+  // ports of submodule pending_interrupts_128
+  wire pending_interrupts_128$CLR,
+       pending_interrupts_128$DEQ,
+       pending_interrupts_128$D_IN,
+       pending_interrupts_128$EMPTY_N,
+       pending_interrupts_128$ENQ,
+       pending_interrupts_128$FULL_N;
+
+  // ports of submodule pending_interrupts_129
+  wire pending_interrupts_129$CLR,
+       pending_interrupts_129$DEQ,
+       pending_interrupts_129$D_IN,
+       pending_interrupts_129$EMPTY_N,
+       pending_interrupts_129$ENQ,
+       pending_interrupts_129$FULL_N;
+
+  // ports of submodule pending_interrupts_13
+  wire pending_interrupts_13$CLR,
+       pending_interrupts_13$DEQ,
+       pending_interrupts_13$D_IN,
+       pending_interrupts_13$EMPTY_N,
+       pending_interrupts_13$ENQ,
+       pending_interrupts_13$FULL_N;
+
+  // ports of submodule pending_interrupts_130
+  wire pending_interrupts_130$CLR,
+       pending_interrupts_130$DEQ,
+       pending_interrupts_130$D_IN,
+       pending_interrupts_130$EMPTY_N,
+       pending_interrupts_130$ENQ,
+       pending_interrupts_130$FULL_N;
+
+  // ports of submodule pending_interrupts_131
+  wire pending_interrupts_131$CLR,
+       pending_interrupts_131$DEQ,
+       pending_interrupts_131$D_IN,
+       pending_interrupts_131$EMPTY_N,
+       pending_interrupts_131$ENQ,
+       pending_interrupts_131$FULL_N;
+
+  // ports of submodule pending_interrupts_14
+  wire pending_interrupts_14$CLR,
+       pending_interrupts_14$DEQ,
+       pending_interrupts_14$D_IN,
+       pending_interrupts_14$EMPTY_N,
+       pending_interrupts_14$ENQ,
+       pending_interrupts_14$FULL_N;
+
+  // ports of submodule pending_interrupts_15
+  wire pending_interrupts_15$CLR,
+       pending_interrupts_15$DEQ,
+       pending_interrupts_15$D_IN,
+       pending_interrupts_15$EMPTY_N,
+       pending_interrupts_15$ENQ,
+       pending_interrupts_15$FULL_N;
+
+  // ports of submodule pending_interrupts_16
+  wire pending_interrupts_16$CLR,
+       pending_interrupts_16$DEQ,
+       pending_interrupts_16$D_IN,
+       pending_interrupts_16$EMPTY_N,
+       pending_interrupts_16$ENQ,
+       pending_interrupts_16$FULL_N;
+
+  // ports of submodule pending_interrupts_17
+  wire pending_interrupts_17$CLR,
+       pending_interrupts_17$DEQ,
+       pending_interrupts_17$D_IN,
+       pending_interrupts_17$EMPTY_N,
+       pending_interrupts_17$ENQ,
+       pending_interrupts_17$FULL_N;
+
+  // ports of submodule pending_interrupts_18
+  wire pending_interrupts_18$CLR,
+       pending_interrupts_18$DEQ,
+       pending_interrupts_18$D_IN,
+       pending_interrupts_18$EMPTY_N,
+       pending_interrupts_18$ENQ,
+       pending_interrupts_18$FULL_N;
+
+  // ports of submodule pending_interrupts_19
+  wire pending_interrupts_19$CLR,
+       pending_interrupts_19$DEQ,
+       pending_interrupts_19$D_IN,
+       pending_interrupts_19$EMPTY_N,
+       pending_interrupts_19$ENQ,
+       pending_interrupts_19$FULL_N;
+
+  // ports of submodule pending_interrupts_2
+  wire pending_interrupts_2$CLR,
+       pending_interrupts_2$DEQ,
+       pending_interrupts_2$D_IN,
+       pending_interrupts_2$EMPTY_N,
+       pending_interrupts_2$ENQ,
+       pending_interrupts_2$FULL_N;
+
+  // ports of submodule pending_interrupts_20
+  wire pending_interrupts_20$CLR,
+       pending_interrupts_20$DEQ,
+       pending_interrupts_20$D_IN,
+       pending_interrupts_20$EMPTY_N,
+       pending_interrupts_20$ENQ,
+       pending_interrupts_20$FULL_N;
+
+  // ports of submodule pending_interrupts_21
+  wire pending_interrupts_21$CLR,
+       pending_interrupts_21$DEQ,
+       pending_interrupts_21$D_IN,
+       pending_interrupts_21$EMPTY_N,
+       pending_interrupts_21$ENQ,
+       pending_interrupts_21$FULL_N;
+
+  // ports of submodule pending_interrupts_22
+  wire pending_interrupts_22$CLR,
+       pending_interrupts_22$DEQ,
+       pending_interrupts_22$D_IN,
+       pending_interrupts_22$EMPTY_N,
+       pending_interrupts_22$ENQ,
+       pending_interrupts_22$FULL_N;
+
+  // ports of submodule pending_interrupts_23
+  wire pending_interrupts_23$CLR,
+       pending_interrupts_23$DEQ,
+       pending_interrupts_23$D_IN,
+       pending_interrupts_23$EMPTY_N,
+       pending_interrupts_23$ENQ,
+       pending_interrupts_23$FULL_N;
+
+  // ports of submodule pending_interrupts_24
+  wire pending_interrupts_24$CLR,
+       pending_interrupts_24$DEQ,
+       pending_interrupts_24$D_IN,
+       pending_interrupts_24$EMPTY_N,
+       pending_interrupts_24$ENQ,
+       pending_interrupts_24$FULL_N;
+
+  // ports of submodule pending_interrupts_25
+  wire pending_interrupts_25$CLR,
+       pending_interrupts_25$DEQ,
+       pending_interrupts_25$D_IN,
+       pending_interrupts_25$EMPTY_N,
+       pending_interrupts_25$ENQ,
+       pending_interrupts_25$FULL_N;
+
+  // ports of submodule pending_interrupts_26
+  wire pending_interrupts_26$CLR,
+       pending_interrupts_26$DEQ,
+       pending_interrupts_26$D_IN,
+       pending_interrupts_26$EMPTY_N,
+       pending_interrupts_26$ENQ,
+       pending_interrupts_26$FULL_N;
+
+  // ports of submodule pending_interrupts_27
+  wire pending_interrupts_27$CLR,
+       pending_interrupts_27$DEQ,
+       pending_interrupts_27$D_IN,
+       pending_interrupts_27$EMPTY_N,
+       pending_interrupts_27$ENQ,
+       pending_interrupts_27$FULL_N;
+
+  // ports of submodule pending_interrupts_28
+  wire pending_interrupts_28$CLR,
+       pending_interrupts_28$DEQ,
+       pending_interrupts_28$D_IN,
+       pending_interrupts_28$EMPTY_N,
+       pending_interrupts_28$ENQ,
+       pending_interrupts_28$FULL_N;
+
+  // ports of submodule pending_interrupts_29
+  wire pending_interrupts_29$CLR,
+       pending_interrupts_29$DEQ,
+       pending_interrupts_29$D_IN,
+       pending_interrupts_29$EMPTY_N,
+       pending_interrupts_29$ENQ,
+       pending_interrupts_29$FULL_N;
+
+  // ports of submodule pending_interrupts_3
+  wire pending_interrupts_3$CLR,
+       pending_interrupts_3$DEQ,
+       pending_interrupts_3$D_IN,
+       pending_interrupts_3$EMPTY_N,
+       pending_interrupts_3$ENQ,
+       pending_interrupts_3$FULL_N;
+
+  // ports of submodule pending_interrupts_30
+  wire pending_interrupts_30$CLR,
+       pending_interrupts_30$DEQ,
+       pending_interrupts_30$D_IN,
+       pending_interrupts_30$EMPTY_N,
+       pending_interrupts_30$ENQ,
+       pending_interrupts_30$FULL_N;
+
+  // ports of submodule pending_interrupts_31
+  wire pending_interrupts_31$CLR,
+       pending_interrupts_31$DEQ,
+       pending_interrupts_31$D_IN,
+       pending_interrupts_31$EMPTY_N,
+       pending_interrupts_31$ENQ,
+       pending_interrupts_31$FULL_N;
+
+  // ports of submodule pending_interrupts_32
+  wire pending_interrupts_32$CLR,
+       pending_interrupts_32$DEQ,
+       pending_interrupts_32$D_IN,
+       pending_interrupts_32$EMPTY_N,
+       pending_interrupts_32$ENQ,
+       pending_interrupts_32$FULL_N;
+
+  // ports of submodule pending_interrupts_33
+  wire pending_interrupts_33$CLR,
+       pending_interrupts_33$DEQ,
+       pending_interrupts_33$D_IN,
+       pending_interrupts_33$EMPTY_N,
+       pending_interrupts_33$ENQ,
+       pending_interrupts_33$FULL_N;
+
+  // ports of submodule pending_interrupts_34
+  wire pending_interrupts_34$CLR,
+       pending_interrupts_34$DEQ,
+       pending_interrupts_34$D_IN,
+       pending_interrupts_34$EMPTY_N,
+       pending_interrupts_34$ENQ,
+       pending_interrupts_34$FULL_N;
+
+  // ports of submodule pending_interrupts_35
+  wire pending_interrupts_35$CLR,
+       pending_interrupts_35$DEQ,
+       pending_interrupts_35$D_IN,
+       pending_interrupts_35$EMPTY_N,
+       pending_interrupts_35$ENQ,
+       pending_interrupts_35$FULL_N;
+
+  // ports of submodule pending_interrupts_36
+  wire pending_interrupts_36$CLR,
+       pending_interrupts_36$DEQ,
+       pending_interrupts_36$D_IN,
+       pending_interrupts_36$EMPTY_N,
+       pending_interrupts_36$ENQ,
+       pending_interrupts_36$FULL_N;
+
+  // ports of submodule pending_interrupts_37
+  wire pending_interrupts_37$CLR,
+       pending_interrupts_37$DEQ,
+       pending_interrupts_37$D_IN,
+       pending_interrupts_37$EMPTY_N,
+       pending_interrupts_37$ENQ,
+       pending_interrupts_37$FULL_N;
+
+  // ports of submodule pending_interrupts_38
+  wire pending_interrupts_38$CLR,
+       pending_interrupts_38$DEQ,
+       pending_interrupts_38$D_IN,
+       pending_interrupts_38$EMPTY_N,
+       pending_interrupts_38$ENQ,
+       pending_interrupts_38$FULL_N;
+
+  // ports of submodule pending_interrupts_39
+  wire pending_interrupts_39$CLR,
+       pending_interrupts_39$DEQ,
+       pending_interrupts_39$D_IN,
+       pending_interrupts_39$EMPTY_N,
+       pending_interrupts_39$ENQ,
+       pending_interrupts_39$FULL_N;
+
+  // ports of submodule pending_interrupts_4
+  wire pending_interrupts_4$CLR,
+       pending_interrupts_4$DEQ,
+       pending_interrupts_4$D_IN,
+       pending_interrupts_4$EMPTY_N,
+       pending_interrupts_4$ENQ,
+       pending_interrupts_4$FULL_N;
+
+  // ports of submodule pending_interrupts_40
+  wire pending_interrupts_40$CLR,
+       pending_interrupts_40$DEQ,
+       pending_interrupts_40$D_IN,
+       pending_interrupts_40$EMPTY_N,
+       pending_interrupts_40$ENQ,
+       pending_interrupts_40$FULL_N;
+
+  // ports of submodule pending_interrupts_41
+  wire pending_interrupts_41$CLR,
+       pending_interrupts_41$DEQ,
+       pending_interrupts_41$D_IN,
+       pending_interrupts_41$EMPTY_N,
+       pending_interrupts_41$ENQ,
+       pending_interrupts_41$FULL_N;
+
+  // ports of submodule pending_interrupts_42
+  wire pending_interrupts_42$CLR,
+       pending_interrupts_42$DEQ,
+       pending_interrupts_42$D_IN,
+       pending_interrupts_42$EMPTY_N,
+       pending_interrupts_42$ENQ,
+       pending_interrupts_42$FULL_N;
+
+  // ports of submodule pending_interrupts_43
+  wire pending_interrupts_43$CLR,
+       pending_interrupts_43$DEQ,
+       pending_interrupts_43$D_IN,
+       pending_interrupts_43$EMPTY_N,
+       pending_interrupts_43$ENQ,
+       pending_interrupts_43$FULL_N;
+
+  // ports of submodule pending_interrupts_44
+  wire pending_interrupts_44$CLR,
+       pending_interrupts_44$DEQ,
+       pending_interrupts_44$D_IN,
+       pending_interrupts_44$EMPTY_N,
+       pending_interrupts_44$ENQ,
+       pending_interrupts_44$FULL_N;
+
+  // ports of submodule pending_interrupts_45
+  wire pending_interrupts_45$CLR,
+       pending_interrupts_45$DEQ,
+       pending_interrupts_45$D_IN,
+       pending_interrupts_45$EMPTY_N,
+       pending_interrupts_45$ENQ,
+       pending_interrupts_45$FULL_N;
+
+  // ports of submodule pending_interrupts_46
+  wire pending_interrupts_46$CLR,
+       pending_interrupts_46$DEQ,
+       pending_interrupts_46$D_IN,
+       pending_interrupts_46$EMPTY_N,
+       pending_interrupts_46$ENQ,
+       pending_interrupts_46$FULL_N;
+
+  // ports of submodule pending_interrupts_47
+  wire pending_interrupts_47$CLR,
+       pending_interrupts_47$DEQ,
+       pending_interrupts_47$D_IN,
+       pending_interrupts_47$EMPTY_N,
+       pending_interrupts_47$ENQ,
+       pending_interrupts_47$FULL_N;
+
+  // ports of submodule pending_interrupts_48
+  wire pending_interrupts_48$CLR,
+       pending_interrupts_48$DEQ,
+       pending_interrupts_48$D_IN,
+       pending_interrupts_48$EMPTY_N,
+       pending_interrupts_48$ENQ,
+       pending_interrupts_48$FULL_N;
+
+  // ports of submodule pending_interrupts_49
+  wire pending_interrupts_49$CLR,
+       pending_interrupts_49$DEQ,
+       pending_interrupts_49$D_IN,
+       pending_interrupts_49$EMPTY_N,
+       pending_interrupts_49$ENQ,
+       pending_interrupts_49$FULL_N;
+
+  // ports of submodule pending_interrupts_5
+  wire pending_interrupts_5$CLR,
+       pending_interrupts_5$DEQ,
+       pending_interrupts_5$D_IN,
+       pending_interrupts_5$EMPTY_N,
+       pending_interrupts_5$ENQ,
+       pending_interrupts_5$FULL_N;
+
+  // ports of submodule pending_interrupts_50
+  wire pending_interrupts_50$CLR,
+       pending_interrupts_50$DEQ,
+       pending_interrupts_50$D_IN,
+       pending_interrupts_50$EMPTY_N,
+       pending_interrupts_50$ENQ,
+       pending_interrupts_50$FULL_N;
+
+  // ports of submodule pending_interrupts_51
+  wire pending_interrupts_51$CLR,
+       pending_interrupts_51$DEQ,
+       pending_interrupts_51$D_IN,
+       pending_interrupts_51$EMPTY_N,
+       pending_interrupts_51$ENQ,
+       pending_interrupts_51$FULL_N;
+
+  // ports of submodule pending_interrupts_52
+  wire pending_interrupts_52$CLR,
+       pending_interrupts_52$DEQ,
+       pending_interrupts_52$D_IN,
+       pending_interrupts_52$EMPTY_N,
+       pending_interrupts_52$ENQ,
+       pending_interrupts_52$FULL_N;
+
+  // ports of submodule pending_interrupts_53
+  wire pending_interrupts_53$CLR,
+       pending_interrupts_53$DEQ,
+       pending_interrupts_53$D_IN,
+       pending_interrupts_53$EMPTY_N,
+       pending_interrupts_53$ENQ,
+       pending_interrupts_53$FULL_N;
+
+  // ports of submodule pending_interrupts_54
+  wire pending_interrupts_54$CLR,
+       pending_interrupts_54$DEQ,
+       pending_interrupts_54$D_IN,
+       pending_interrupts_54$EMPTY_N,
+       pending_interrupts_54$ENQ,
+       pending_interrupts_54$FULL_N;
+
+  // ports of submodule pending_interrupts_55
+  wire pending_interrupts_55$CLR,
+       pending_interrupts_55$DEQ,
+       pending_interrupts_55$D_IN,
+       pending_interrupts_55$EMPTY_N,
+       pending_interrupts_55$ENQ,
+       pending_interrupts_55$FULL_N;
+
+  // ports of submodule pending_interrupts_56
+  wire pending_interrupts_56$CLR,
+       pending_interrupts_56$DEQ,
+       pending_interrupts_56$D_IN,
+       pending_interrupts_56$EMPTY_N,
+       pending_interrupts_56$ENQ,
+       pending_interrupts_56$FULL_N;
+
+  // ports of submodule pending_interrupts_57
+  wire pending_interrupts_57$CLR,
+       pending_interrupts_57$DEQ,
+       pending_interrupts_57$D_IN,
+       pending_interrupts_57$EMPTY_N,
+       pending_interrupts_57$ENQ,
+       pending_interrupts_57$FULL_N;
+
+  // ports of submodule pending_interrupts_58
+  wire pending_interrupts_58$CLR,
+       pending_interrupts_58$DEQ,
+       pending_interrupts_58$D_IN,
+       pending_interrupts_58$EMPTY_N,
+       pending_interrupts_58$ENQ,
+       pending_interrupts_58$FULL_N;
+
+  // ports of submodule pending_interrupts_59
+  wire pending_interrupts_59$CLR,
+       pending_interrupts_59$DEQ,
+       pending_interrupts_59$D_IN,
+       pending_interrupts_59$EMPTY_N,
+       pending_interrupts_59$ENQ,
+       pending_interrupts_59$FULL_N;
+
+  // ports of submodule pending_interrupts_6
+  wire pending_interrupts_6$CLR,
+       pending_interrupts_6$DEQ,
+       pending_interrupts_6$D_IN,
+       pending_interrupts_6$EMPTY_N,
+       pending_interrupts_6$ENQ,
+       pending_interrupts_6$FULL_N;
+
+  // ports of submodule pending_interrupts_60
+  wire pending_interrupts_60$CLR,
+       pending_interrupts_60$DEQ,
+       pending_interrupts_60$D_IN,
+       pending_interrupts_60$EMPTY_N,
+       pending_interrupts_60$ENQ,
+       pending_interrupts_60$FULL_N;
+
+  // ports of submodule pending_interrupts_61
+  wire pending_interrupts_61$CLR,
+       pending_interrupts_61$DEQ,
+       pending_interrupts_61$D_IN,
+       pending_interrupts_61$EMPTY_N,
+       pending_interrupts_61$ENQ,
+       pending_interrupts_61$FULL_N;
+
+  // ports of submodule pending_interrupts_62
+  wire pending_interrupts_62$CLR,
+       pending_interrupts_62$DEQ,
+       pending_interrupts_62$D_IN,
+       pending_interrupts_62$EMPTY_N,
+       pending_interrupts_62$ENQ,
+       pending_interrupts_62$FULL_N;
+
+  // ports of submodule pending_interrupts_63
+  wire pending_interrupts_63$CLR,
+       pending_interrupts_63$DEQ,
+       pending_interrupts_63$D_IN,
+       pending_interrupts_63$EMPTY_N,
+       pending_interrupts_63$ENQ,
+       pending_interrupts_63$FULL_N;
+
+  // ports of submodule pending_interrupts_64
+  wire pending_interrupts_64$CLR,
+       pending_interrupts_64$DEQ,
+       pending_interrupts_64$D_IN,
+       pending_interrupts_64$EMPTY_N,
+       pending_interrupts_64$ENQ,
+       pending_interrupts_64$FULL_N;
+
+  // ports of submodule pending_interrupts_65
+  wire pending_interrupts_65$CLR,
+       pending_interrupts_65$DEQ,
+       pending_interrupts_65$D_IN,
+       pending_interrupts_65$EMPTY_N,
+       pending_interrupts_65$ENQ,
+       pending_interrupts_65$FULL_N;
+
+  // ports of submodule pending_interrupts_66
+  wire pending_interrupts_66$CLR,
+       pending_interrupts_66$DEQ,
+       pending_interrupts_66$D_IN,
+       pending_interrupts_66$EMPTY_N,
+       pending_interrupts_66$ENQ,
+       pending_interrupts_66$FULL_N;
+
+  // ports of submodule pending_interrupts_67
+  wire pending_interrupts_67$CLR,
+       pending_interrupts_67$DEQ,
+       pending_interrupts_67$D_IN,
+       pending_interrupts_67$EMPTY_N,
+       pending_interrupts_67$ENQ,
+       pending_interrupts_67$FULL_N;
+
+  // ports of submodule pending_interrupts_68
+  wire pending_interrupts_68$CLR,
+       pending_interrupts_68$DEQ,
+       pending_interrupts_68$D_IN,
+       pending_interrupts_68$EMPTY_N,
+       pending_interrupts_68$ENQ,
+       pending_interrupts_68$FULL_N;
+
+  // ports of submodule pending_interrupts_69
+  wire pending_interrupts_69$CLR,
+       pending_interrupts_69$DEQ,
+       pending_interrupts_69$D_IN,
+       pending_interrupts_69$EMPTY_N,
+       pending_interrupts_69$ENQ,
+       pending_interrupts_69$FULL_N;
+
+  // ports of submodule pending_interrupts_7
+  wire pending_interrupts_7$CLR,
+       pending_interrupts_7$DEQ,
+       pending_interrupts_7$D_IN,
+       pending_interrupts_7$EMPTY_N,
+       pending_interrupts_7$ENQ,
+       pending_interrupts_7$FULL_N;
+
+  // ports of submodule pending_interrupts_70
+  wire pending_interrupts_70$CLR,
+       pending_interrupts_70$DEQ,
+       pending_interrupts_70$D_IN,
+       pending_interrupts_70$EMPTY_N,
+       pending_interrupts_70$ENQ,
+       pending_interrupts_70$FULL_N;
+
+  // ports of submodule pending_interrupts_71
+  wire pending_interrupts_71$CLR,
+       pending_interrupts_71$DEQ,
+       pending_interrupts_71$D_IN,
+       pending_interrupts_71$EMPTY_N,
+       pending_interrupts_71$ENQ,
+       pending_interrupts_71$FULL_N;
+
+  // ports of submodule pending_interrupts_72
+  wire pending_interrupts_72$CLR,
+       pending_interrupts_72$DEQ,
+       pending_interrupts_72$D_IN,
+       pending_interrupts_72$EMPTY_N,
+       pending_interrupts_72$ENQ,
+       pending_interrupts_72$FULL_N;
+
+  // ports of submodule pending_interrupts_73
+  wire pending_interrupts_73$CLR,
+       pending_interrupts_73$DEQ,
+       pending_interrupts_73$D_IN,
+       pending_interrupts_73$EMPTY_N,
+       pending_interrupts_73$ENQ,
+       pending_interrupts_73$FULL_N;
+
+  // ports of submodule pending_interrupts_74
+  wire pending_interrupts_74$CLR,
+       pending_interrupts_74$DEQ,
+       pending_interrupts_74$D_IN,
+       pending_interrupts_74$EMPTY_N,
+       pending_interrupts_74$ENQ,
+       pending_interrupts_74$FULL_N;
+
+  // ports of submodule pending_interrupts_75
+  wire pending_interrupts_75$CLR,
+       pending_interrupts_75$DEQ,
+       pending_interrupts_75$D_IN,
+       pending_interrupts_75$EMPTY_N,
+       pending_interrupts_75$ENQ,
+       pending_interrupts_75$FULL_N;
+
+  // ports of submodule pending_interrupts_76
+  wire pending_interrupts_76$CLR,
+       pending_interrupts_76$DEQ,
+       pending_interrupts_76$D_IN,
+       pending_interrupts_76$EMPTY_N,
+       pending_interrupts_76$ENQ,
+       pending_interrupts_76$FULL_N;
+
+  // ports of submodule pending_interrupts_77
+  wire pending_interrupts_77$CLR,
+       pending_interrupts_77$DEQ,
+       pending_interrupts_77$D_IN,
+       pending_interrupts_77$EMPTY_N,
+       pending_interrupts_77$ENQ,
+       pending_interrupts_77$FULL_N;
+
+  // ports of submodule pending_interrupts_78
+  wire pending_interrupts_78$CLR,
+       pending_interrupts_78$DEQ,
+       pending_interrupts_78$D_IN,
+       pending_interrupts_78$EMPTY_N,
+       pending_interrupts_78$ENQ,
+       pending_interrupts_78$FULL_N;
+
+  // ports of submodule pending_interrupts_79
+  wire pending_interrupts_79$CLR,
+       pending_interrupts_79$DEQ,
+       pending_interrupts_79$D_IN,
+       pending_interrupts_79$EMPTY_N,
+       pending_interrupts_79$ENQ,
+       pending_interrupts_79$FULL_N;
+
+  // ports of submodule pending_interrupts_8
+  wire pending_interrupts_8$CLR,
+       pending_interrupts_8$DEQ,
+       pending_interrupts_8$D_IN,
+       pending_interrupts_8$EMPTY_N,
+       pending_interrupts_8$ENQ,
+       pending_interrupts_8$FULL_N;
+
+  // ports of submodule pending_interrupts_80
+  wire pending_interrupts_80$CLR,
+       pending_interrupts_80$DEQ,
+       pending_interrupts_80$D_IN,
+       pending_interrupts_80$EMPTY_N,
+       pending_interrupts_80$ENQ,
+       pending_interrupts_80$FULL_N;
+
+  // ports of submodule pending_interrupts_81
+  wire pending_interrupts_81$CLR,
+       pending_interrupts_81$DEQ,
+       pending_interrupts_81$D_IN,
+       pending_interrupts_81$EMPTY_N,
+       pending_interrupts_81$ENQ,
+       pending_interrupts_81$FULL_N;
+
+  // ports of submodule pending_interrupts_82
+  wire pending_interrupts_82$CLR,
+       pending_interrupts_82$DEQ,
+       pending_interrupts_82$D_IN,
+       pending_interrupts_82$EMPTY_N,
+       pending_interrupts_82$ENQ,
+       pending_interrupts_82$FULL_N;
+
+  // ports of submodule pending_interrupts_83
+  wire pending_interrupts_83$CLR,
+       pending_interrupts_83$DEQ,
+       pending_interrupts_83$D_IN,
+       pending_interrupts_83$EMPTY_N,
+       pending_interrupts_83$ENQ,
+       pending_interrupts_83$FULL_N;
+
+  // ports of submodule pending_interrupts_84
+  wire pending_interrupts_84$CLR,
+       pending_interrupts_84$DEQ,
+       pending_interrupts_84$D_IN,
+       pending_interrupts_84$EMPTY_N,
+       pending_interrupts_84$ENQ,
+       pending_interrupts_84$FULL_N;
+
+  // ports of submodule pending_interrupts_85
+  wire pending_interrupts_85$CLR,
+       pending_interrupts_85$DEQ,
+       pending_interrupts_85$D_IN,
+       pending_interrupts_85$EMPTY_N,
+       pending_interrupts_85$ENQ,
+       pending_interrupts_85$FULL_N;
+
+  // ports of submodule pending_interrupts_86
+  wire pending_interrupts_86$CLR,
+       pending_interrupts_86$DEQ,
+       pending_interrupts_86$D_IN,
+       pending_interrupts_86$EMPTY_N,
+       pending_interrupts_86$ENQ,
+       pending_interrupts_86$FULL_N;
+
+  // ports of submodule pending_interrupts_87
+  wire pending_interrupts_87$CLR,
+       pending_interrupts_87$DEQ,
+       pending_interrupts_87$D_IN,
+       pending_interrupts_87$EMPTY_N,
+       pending_interrupts_87$ENQ,
+       pending_interrupts_87$FULL_N;
+
+  // ports of submodule pending_interrupts_88
+  wire pending_interrupts_88$CLR,
+       pending_interrupts_88$DEQ,
+       pending_interrupts_88$D_IN,
+       pending_interrupts_88$EMPTY_N,
+       pending_interrupts_88$ENQ,
+       pending_interrupts_88$FULL_N;
+
+  // ports of submodule pending_interrupts_89
+  wire pending_interrupts_89$CLR,
+       pending_interrupts_89$DEQ,
+       pending_interrupts_89$D_IN,
+       pending_interrupts_89$EMPTY_N,
+       pending_interrupts_89$ENQ,
+       pending_interrupts_89$FULL_N;
+
+  // ports of submodule pending_interrupts_9
+  wire pending_interrupts_9$CLR,
+       pending_interrupts_9$DEQ,
+       pending_interrupts_9$D_IN,
+       pending_interrupts_9$EMPTY_N,
+       pending_interrupts_9$ENQ,
+       pending_interrupts_9$FULL_N;
+
+  // ports of submodule pending_interrupts_90
+  wire pending_interrupts_90$CLR,
+       pending_interrupts_90$DEQ,
+       pending_interrupts_90$D_IN,
+       pending_interrupts_90$EMPTY_N,
+       pending_interrupts_90$ENQ,
+       pending_interrupts_90$FULL_N;
+
+  // ports of submodule pending_interrupts_91
+  wire pending_interrupts_91$CLR,
+       pending_interrupts_91$DEQ,
+       pending_interrupts_91$D_IN,
+       pending_interrupts_91$EMPTY_N,
+       pending_interrupts_91$ENQ,
+       pending_interrupts_91$FULL_N;
+
+  // ports of submodule pending_interrupts_92
+  wire pending_interrupts_92$CLR,
+       pending_interrupts_92$DEQ,
+       pending_interrupts_92$D_IN,
+       pending_interrupts_92$EMPTY_N,
+       pending_interrupts_92$ENQ,
+       pending_interrupts_92$FULL_N;
+
+  // ports of submodule pending_interrupts_93
+  wire pending_interrupts_93$CLR,
+       pending_interrupts_93$DEQ,
+       pending_interrupts_93$D_IN,
+       pending_interrupts_93$EMPTY_N,
+       pending_interrupts_93$ENQ,
+       pending_interrupts_93$FULL_N;
+
+  // ports of submodule pending_interrupts_94
+  wire pending_interrupts_94$CLR,
+       pending_interrupts_94$DEQ,
+       pending_interrupts_94$D_IN,
+       pending_interrupts_94$EMPTY_N,
+       pending_interrupts_94$ENQ,
+       pending_interrupts_94$FULL_N;
+
+  // ports of submodule pending_interrupts_95
+  wire pending_interrupts_95$CLR,
+       pending_interrupts_95$DEQ,
+       pending_interrupts_95$D_IN,
+       pending_interrupts_95$EMPTY_N,
+       pending_interrupts_95$ENQ,
+       pending_interrupts_95$FULL_N;
+
+  // ports of submodule pending_interrupts_96
+  wire pending_interrupts_96$CLR,
+       pending_interrupts_96$DEQ,
+       pending_interrupts_96$D_IN,
+       pending_interrupts_96$EMPTY_N,
+       pending_interrupts_96$ENQ,
+       pending_interrupts_96$FULL_N;
+
+  // ports of submodule pending_interrupts_97
+  wire pending_interrupts_97$CLR,
+       pending_interrupts_97$DEQ,
+       pending_interrupts_97$D_IN,
+       pending_interrupts_97$EMPTY_N,
+       pending_interrupts_97$ENQ,
+       pending_interrupts_97$FULL_N;
+
+  // ports of submodule pending_interrupts_98
+  wire pending_interrupts_98$CLR,
+       pending_interrupts_98$DEQ,
+       pending_interrupts_98$D_IN,
+       pending_interrupts_98$EMPTY_N,
+       pending_interrupts_98$ENQ,
+       pending_interrupts_98$FULL_N;
+
+  // ports of submodule pending_interrupts_99
+  wire pending_interrupts_99$CLR,
+       pending_interrupts_99$DEQ,
+       pending_interrupts_99$D_IN,
+       pending_interrupts_99$EMPTY_N,
+       pending_interrupts_99$ENQ,
+       pending_interrupts_99$FULL_N;
+
+  // ports of submodule s_config_readSlave_in
+  wire [18 : 0] s_config_readSlave_in$D_IN, s_config_readSlave_in$D_OUT;
+  wire s_config_readSlave_in$CLR,
+       s_config_readSlave_in$DEQ,
+       s_config_readSlave_in$EMPTY_N,
+       s_config_readSlave_in$ENQ,
+       s_config_readSlave_in$FULL_N;
+
+  // ports of submodule s_config_readSlave_out
+  reg [33 : 0] s_config_readSlave_out$D_IN;
+  wire [33 : 0] s_config_readSlave_out$D_OUT;
+  wire s_config_readSlave_out$CLR,
+       s_config_readSlave_out$DEQ,
+       s_config_readSlave_out$EMPTY_N,
+       s_config_readSlave_out$ENQ,
+       s_config_readSlave_out$FULL_N;
+
+  // ports of submodule s_config_writeSlave_in
+  wire [54 : 0] s_config_writeSlave_in$D_IN, s_config_writeSlave_in$D_OUT;
+  wire s_config_writeSlave_in$CLR,
+       s_config_writeSlave_in$DEQ,
+       s_config_writeSlave_in$EMPTY_N,
+       s_config_writeSlave_in$ENQ,
+       s_config_writeSlave_in$FULL_N;
+
+  // ports of submodule s_config_writeSlave_out
+  wire [1 : 0] s_config_writeSlave_out$D_IN, s_config_writeSlave_out$D_OUT;
+  wire s_config_writeSlave_out$CLR,
+       s_config_writeSlave_out$DEQ,
+       s_config_writeSlave_out$EMPTY_N,
+       s_config_writeSlave_out$ENQ,
+       s_config_writeSlave_out$FULL_N;
+
+  // ports of submodule sync_10
+  wire sync_10$dPulse, sync_10$sEN;
+
+  // ports of submodule sync_100
+  wire sync_100$dPulse, sync_100$sEN;
+
+  // ports of submodule sync_101
+  wire sync_101$dPulse, sync_101$sEN;
+
+  // ports of submodule sync_102
+  wire sync_102$dPulse, sync_102$sEN;
+
+  // ports of submodule sync_103
+  wire sync_103$dPulse, sync_103$sEN;
+
+  // ports of submodule sync_104
+  wire sync_104$dPulse, sync_104$sEN;
+
+  // ports of submodule sync_105
+  wire sync_105$dPulse, sync_105$sEN;
+
+  // ports of submodule sync_106
+  wire sync_106$dPulse, sync_106$sEN;
+
+  // ports of submodule sync_107
+  wire sync_107$dPulse, sync_107$sEN;
+
+  // ports of submodule sync_108
+  wire sync_108$dPulse, sync_108$sEN;
+
+  // ports of submodule sync_109
+  wire sync_109$dPulse, sync_109$sEN;
+
+  // ports of submodule sync_11
+  wire sync_11$dPulse, sync_11$sEN;
+
+  // ports of submodule sync_110
+  wire sync_110$dPulse, sync_110$sEN;
+
+  // ports of submodule sync_111
+  wire sync_111$dPulse, sync_111$sEN;
+
+  // ports of submodule sync_112
+  wire sync_112$dPulse, sync_112$sEN;
+
+  // ports of submodule sync_113
+  wire sync_113$dPulse, sync_113$sEN;
+
+  // ports of submodule sync_114
+  wire sync_114$dPulse, sync_114$sEN;
+
+  // ports of submodule sync_115
+  wire sync_115$dPulse, sync_115$sEN;
+
+  // ports of submodule sync_116
+  wire sync_116$dPulse, sync_116$sEN;
+
+  // ports of submodule sync_117
+  wire sync_117$dPulse, sync_117$sEN;
+
+  // ports of submodule sync_118
+  wire sync_118$dPulse, sync_118$sEN;
+
+  // ports of submodule sync_119
+  wire sync_119$dPulse, sync_119$sEN;
+
+  // ports of submodule sync_12
+  wire sync_12$dPulse, sync_12$sEN;
+
+  // ports of submodule sync_120
+  wire sync_120$dPulse, sync_120$sEN;
+
+  // ports of submodule sync_121
+  wire sync_121$dPulse, sync_121$sEN;
+
+  // ports of submodule sync_122
+  wire sync_122$dPulse, sync_122$sEN;
+
+  // ports of submodule sync_123
+  wire sync_123$dPulse, sync_123$sEN;
+
+  // ports of submodule sync_124
+  wire sync_124$dPulse, sync_124$sEN;
+
+  // ports of submodule sync_125
+  wire sync_125$dPulse, sync_125$sEN;
+
+  // ports of submodule sync_126
+  wire sync_126$dPulse, sync_126$sEN;
+
+  // ports of submodule sync_127
+  wire sync_127$dPulse, sync_127$sEN;
+
+  // ports of submodule sync_128
+  wire sync_128$dPulse, sync_128$sEN;
+
+  // ports of submodule sync_129
+  wire sync_129$dPulse, sync_129$sEN;
+
+  // ports of submodule sync_13
+  wire sync_13$dPulse, sync_13$sEN;
+
+  // ports of submodule sync_130
+  wire sync_130$dPulse, sync_130$sEN;
+
+  // ports of submodule sync_131
+  wire sync_131$dPulse, sync_131$sEN;
+
+  // ports of submodule sync_14
+  wire sync_14$dPulse, sync_14$sEN;
+
+  // ports of submodule sync_15
+  wire sync_15$dPulse, sync_15$sEN;
+
+  // ports of submodule sync_16
+  wire sync_16$dPulse, sync_16$sEN;
+
+  // ports of submodule sync_17
+  wire sync_17$dPulse, sync_17$sEN;
+
+  // ports of submodule sync_18
+  wire sync_18$dPulse, sync_18$sEN;
+
+  // ports of submodule sync_19
+  wire sync_19$dPulse, sync_19$sEN;
+
+  // ports of submodule sync_20
+  wire sync_20$dPulse, sync_20$sEN;
+
+  // ports of submodule sync_21
+  wire sync_21$dPulse, sync_21$sEN;
+
+  // ports of submodule sync_22
+  wire sync_22$dPulse, sync_22$sEN;
+
+  // ports of submodule sync_23
+  wire sync_23$dPulse, sync_23$sEN;
+
+  // ports of submodule sync_24
+  wire sync_24$dPulse, sync_24$sEN;
+
+  // ports of submodule sync_25
+  wire sync_25$dPulse, sync_25$sEN;
+
+  // ports of submodule sync_26
+  wire sync_26$dPulse, sync_26$sEN;
+
+  // ports of submodule sync_27
+  wire sync_27$dPulse, sync_27$sEN;
+
+  // ports of submodule sync_28
+  wire sync_28$dPulse, sync_28$sEN;
+
+  // ports of submodule sync_29
+  wire sync_29$dPulse, sync_29$sEN;
+
+  // ports of submodule sync_30
+  wire sync_30$dPulse, sync_30$sEN;
+
+  // ports of submodule sync_31
+  wire sync_31$dPulse, sync_31$sEN;
+
+  // ports of submodule sync_32
+  wire sync_32$dPulse, sync_32$sEN;
+
+  // ports of submodule sync_33
+  wire sync_33$dPulse, sync_33$sEN;
+
+  // ports of submodule sync_34
+  wire sync_34$dPulse, sync_34$sEN;
+
+  // ports of submodule sync_35
+  wire sync_35$dPulse, sync_35$sEN;
+
+  // ports of submodule sync_36
+  wire sync_36$dPulse, sync_36$sEN;
+
+  // ports of submodule sync_37
+  wire sync_37$dPulse, sync_37$sEN;
+
+  // ports of submodule sync_38
+  wire sync_38$dPulse, sync_38$sEN;
+
+  // ports of submodule sync_39
+  wire sync_39$dPulse, sync_39$sEN;
+
+  // ports of submodule sync_4
+  wire sync_4$dPulse, sync_4$sEN;
+
+  // ports of submodule sync_40
+  wire sync_40$dPulse, sync_40$sEN;
+
+  // ports of submodule sync_41
+  wire sync_41$dPulse, sync_41$sEN;
+
+  // ports of submodule sync_42
+  wire sync_42$dPulse, sync_42$sEN;
+
+  // ports of submodule sync_43
+  wire sync_43$dPulse, sync_43$sEN;
+
+  // ports of submodule sync_44
+  wire sync_44$dPulse, sync_44$sEN;
+
+  // ports of submodule sync_45
+  wire sync_45$dPulse, sync_45$sEN;
+
+  // ports of submodule sync_46
+  wire sync_46$dPulse, sync_46$sEN;
+
+  // ports of submodule sync_47
+  wire sync_47$dPulse, sync_47$sEN;
+
+  // ports of submodule sync_48
+  wire sync_48$dPulse, sync_48$sEN;
+
+  // ports of submodule sync_49
+  wire sync_49$dPulse, sync_49$sEN;
+
+  // ports of submodule sync_5
+  wire sync_5$dPulse, sync_5$sEN;
+
+  // ports of submodule sync_50
+  wire sync_50$dPulse, sync_50$sEN;
+
+  // ports of submodule sync_51
+  wire sync_51$dPulse, sync_51$sEN;
+
+  // ports of submodule sync_52
+  wire sync_52$dPulse, sync_52$sEN;
+
+  // ports of submodule sync_53
+  wire sync_53$dPulse, sync_53$sEN;
+
+  // ports of submodule sync_54
+  wire sync_54$dPulse, sync_54$sEN;
+
+  // ports of submodule sync_55
+  wire sync_55$dPulse, sync_55$sEN;
+
+  // ports of submodule sync_56
+  wire sync_56$dPulse, sync_56$sEN;
+
+  // ports of submodule sync_57
+  wire sync_57$dPulse, sync_57$sEN;
+
+  // ports of submodule sync_58
+  wire sync_58$dPulse, sync_58$sEN;
+
+  // ports of submodule sync_59
+  wire sync_59$dPulse, sync_59$sEN;
+
+  // ports of submodule sync_6
+  wire sync_6$dPulse, sync_6$sEN;
+
+  // ports of submodule sync_60
+  wire sync_60$dPulse, sync_60$sEN;
+
+  // ports of submodule sync_61
+  wire sync_61$dPulse, sync_61$sEN;
+
+  // ports of submodule sync_62
+  wire sync_62$dPulse, sync_62$sEN;
+
+  // ports of submodule sync_63
+  wire sync_63$dPulse, sync_63$sEN;
+
+  // ports of submodule sync_64
+  wire sync_64$dPulse, sync_64$sEN;
+
+  // ports of submodule sync_65
+  wire sync_65$dPulse, sync_65$sEN;
+
+  // ports of submodule sync_66
+  wire sync_66$dPulse, sync_66$sEN;
+
+  // ports of submodule sync_67
+  wire sync_67$dPulse, sync_67$sEN;
+
+  // ports of submodule sync_68
+  wire sync_68$dPulse, sync_68$sEN;
+
+  // ports of submodule sync_69
+  wire sync_69$dPulse, sync_69$sEN;
+
+  // ports of submodule sync_7
+  wire sync_7$dPulse, sync_7$sEN;
+
+  // ports of submodule sync_70
+  wire sync_70$dPulse, sync_70$sEN;
+
+  // ports of submodule sync_71
+  wire sync_71$dPulse, sync_71$sEN;
+
+  // ports of submodule sync_72
+  wire sync_72$dPulse, sync_72$sEN;
+
+  // ports of submodule sync_73
+  wire sync_73$dPulse, sync_73$sEN;
+
+  // ports of submodule sync_74
+  wire sync_74$dPulse, sync_74$sEN;
+
+  // ports of submodule sync_75
+  wire sync_75$dPulse, sync_75$sEN;
+
+  // ports of submodule sync_76
+  wire sync_76$dPulse, sync_76$sEN;
+
+  // ports of submodule sync_77
+  wire sync_77$dPulse, sync_77$sEN;
+
+  // ports of submodule sync_78
+  wire sync_78$dPulse, sync_78$sEN;
+
+  // ports of submodule sync_79
+  wire sync_79$dPulse, sync_79$sEN;
+
+  // ports of submodule sync_8
+  wire sync_8$dPulse, sync_8$sEN;
+
+  // ports of submodule sync_80
+  wire sync_80$dPulse, sync_80$sEN;
+
+  // ports of submodule sync_81
+  wire sync_81$dPulse, sync_81$sEN;
+
+  // ports of submodule sync_82
+  wire sync_82$dPulse, sync_82$sEN;
+
+  // ports of submodule sync_83
+  wire sync_83$dPulse, sync_83$sEN;
+
+  // ports of submodule sync_84
+  wire sync_84$dPulse, sync_84$sEN;
+
+  // ports of submodule sync_85
+  wire sync_85$dPulse, sync_85$sEN;
+
+  // ports of submodule sync_86
+  wire sync_86$dPulse, sync_86$sEN;
+
+  // ports of submodule sync_87
+  wire sync_87$dPulse, sync_87$sEN;
+
+  // ports of submodule sync_88
+  wire sync_88$dPulse, sync_88$sEN;
+
+  // ports of submodule sync_89
+  wire sync_89$dPulse, sync_89$sEN;
+
+  // ports of submodule sync_9
+  wire sync_9$dPulse, sync_9$sEN;
+
+  // ports of submodule sync_90
+  wire sync_90$dPulse, sync_90$sEN;
+
+  // ports of submodule sync_91
+  wire sync_91$dPulse, sync_91$sEN;
+
+  // ports of submodule sync_92
+  wire sync_92$dPulse, sync_92$sEN;
+
+  // ports of submodule sync_93
+  wire sync_93$dPulse, sync_93$sEN;
+
+  // ports of submodule sync_94
+  wire sync_94$dPulse, sync_94$sEN;
+
+  // ports of submodule sync_95
+  wire sync_95$dPulse, sync_95$sEN;
+
+  // ports of submodule sync_96
+  wire sync_96$dPulse, sync_96$sEN;
+
+  // ports of submodule sync_97
+  wire sync_97$dPulse, sync_97$sEN;
+
+  // ports of submodule sync_98
+  wire sync_98$dPulse, sync_98$sEN;
+
+  // ports of submodule sync_99
+  wire sync_99$dPulse, sync_99$sEN;
+
+  // rule scheduling signals
+  wire WILL_FIRE_RL_assert_design_interrupt,
+       WILL_FIRE_RL_assert_design_interrupt_1,
+       WILL_FIRE_RL_assert_design_interrupt_2,
+       WILL_FIRE_RL_assert_design_interrupt_3,
+       WILL_FIRE_RL_doAck,
+       WILL_FIRE_RL_doAck_1,
+       WILL_FIRE_RL_doAck_2,
+       WILL_FIRE_RL_doAck_3,
+       WILL_FIRE_RL_dropInvalidACK,
+       WILL_FIRE_RL_s_config_1_axiWriteFallback,
+       WILL_FIRE_RL_s_config_1_axiWriteSpecial,
+       WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled,
+       WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled_1,
+       WILL_FIRE_RL_s_config_1_axiWriteSpecial_1,
+       WILL_FIRE_RL_s_config_axiReadFallback,
+       WILL_FIRE_RL_s_config_axiReadSpecial,
+       WILL_FIRE_RL_s_config_axiReadSpecialIsHandled,
+       WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_1,
+       WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2,
+       WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3,
+       WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4,
+       WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5,
+       WILL_FIRE_RL_s_config_axiReadSpecial_1,
+       WILL_FIRE_RL_s_config_axiReadSpecial_2,
+       WILL_FIRE_RL_s_config_axiReadSpecial_3,
+       WILL_FIRE_RL_s_config_axiReadSpecial_4,
+       WILL_FIRE_RL_s_config_axiReadSpecial_5;
+
+  // inputs to muxes for submodule ports
+  wire [33 : 0] MUX_s_config_readSlave_out$enq_1__VAL_1,
+		MUX_s_config_readSlave_out$enq_1__VAL_2,
+		MUX_s_config_readSlave_out$enq_1__VAL_3,
+		MUX_s_config_readSlave_out$enq_1__VAL_4,
+		MUX_s_config_readSlave_out$enq_1__VAL_5,
+		MUX_s_config_readSlave_out$enq_1__VAL_6;
+
+  // remaining internal signals
+  wire [31 : 0] v__h30120, v__h40181, v__h46646, v__h53111, x__h194023;
+  wire [7 : 0] IF_s_config_writeSlave_inD_OUT_BIT_3_THEN_s_c_ETC__q1;
+  wire [4 : 0] value__h194024;
+  wire host_pending_design_0_port1__read__693_OR_host_ETC___d2218,
+       host_pending_design_104_port1__read__109_OR_ho_ETC___d2342,
+       host_pending_design_112_port1__read__141_OR_ho_ETC___d2350,
+       host_pending_design_120_port1__read__173_OR_ho_ETC___d2357,
+       host_pending_design_16_port1__read__757_OR_hos_ETC___d2233,
+       host_pending_design_24_port1__read__789_OR_hos_ETC___d2240,
+       host_pending_design_32_port1__read__821_OR_hos_ETC___d2257,
+       host_pending_design_40_port1__read__853_OR_hos_ETC___d2264,
+       host_pending_design_48_port1__read__885_OR_hos_ETC___d2272,
+       host_pending_design_56_port1__read__917_OR_hos_ETC___d2279,
+       host_pending_design_64_port1__read__949_OR_hos_ETC___d2296,
+       host_pending_design_72_port1__read__981_OR_hos_ETC___d2303,
+       host_pending_design_80_port1__read__013_OR_hos_ETC___d2311,
+       host_pending_design_88_port1__read__045_OR_hos_ETC___d2318,
+       host_pending_design_8_port1__read__725_OR_host_ETC___d2225,
+       host_pending_design_96_port1__read__077_OR_hos_ETC___d2335;
+
+  // value method s_rd_arready
+  assign S_AXI_arready = s_config_readSlave_in$FULL_N ;
+
+  // value method s_rd_rvalid
+  assign S_AXI_rvalid = s_config_readSlave_out$EMPTY_N ;
+
+  // value method s_rd_rdata
+  assign S_AXI_rdata =
+	     s_config_readSlave_out$EMPTY_N ?
+	       s_config_readSlave_out$D_OUT[33:2] :
+	       32'd0 ;
+
+  // value method s_rd_rresp
+  assign S_AXI_rresp =
+	     s_config_readSlave_out$EMPTY_N ?
+	       s_config_readSlave_out$D_OUT[1:0] :
+	       2'd0 ;
+
+  // value method s_wr_awready
+  assign S_AXI_awready = !s_config_writeSlave_addrIn_rv[19] ;
+
+  // value method s_wr_wready
+  assign S_AXI_wready = !s_config_writeSlave_dataIn_rv[36] ;
+
+  // value method s_wr_bvalid
+  assign S_AXI_bvalid = s_config_writeSlave_out$EMPTY_N ;
+
+  // value method s_wr_bresp
+  assign S_AXI_bresp =
+	     s_config_writeSlave_out$EMPTY_N ?
+	       s_config_writeSlave_out$D_OUT :
+	       2'd0 ;
+
+  // value method _shell_irq_req
+  assign irq_req =
+	     { sh_active_15,
+	       sh_active_14,
+	       sh_active_13,
+	       sh_active_12,
+	       sh_active_11,
+	       sh_active_10,
+	       sh_active_9,
+	       sh_active_8,
+	       sh_active_7,
+	       sh_active_6,
+	       sh_active_5,
+	       sh_active_4,
+	       sh_active_3,
+	       sh_active_2,
+	       sh_active_1,
+	       sh_active_0 } ;
+
+  // submodule ackFIFO
+  SizedFIFO #(.p1width(32'd8),
+	      .p2depth(32'd32),
+	      .p3cntr_width(32'd5),
+	      .guarded(32'd1)) ackFIFO(.RST(S_AXI_ARESETN),
+				       .CLK(S_AXI_ACLK),
+				       .D_IN(ackFIFO$D_IN),
+				       .ENQ(ackFIFO$ENQ),
+				       .DEQ(ackFIFO$DEQ),
+				       .CLR(ackFIFO$CLR),
+				       .D_OUT(ackFIFO$D_OUT),
+				       .FULL_N(ackFIFO$FULL_N),
+				       .EMPTY_N(ackFIFO$EMPTY_N));
+
+  // submodule pending_interrupts_0
+  SizedFIFO #(.p1width(32'd1),
+	      .p2depth(32'd32),
+	      .p3cntr_width(32'd5),
+	      .guarded(32'd1)) pending_interrupts_0(.RST(S_AXI_ARESETN),
+						    .CLK(S_AXI_ACLK),
+						    .D_IN(pending_interrupts_0$D_IN),
+						    .ENQ(pending_interrupts_0$ENQ),
+						    .DEQ(pending_interrupts_0$DEQ),
+						    .CLR(pending_interrupts_0$CLR),
+						    .D_OUT(),
+						    .FULL_N(pending_interrupts_0$FULL_N),
+						    .EMPTY_N(pending_interrupts_0$EMPTY_N));
+
+  // submodule pending_interrupts_1
+  SizedFIFO #(.p1width(32'd1),
+	      .p2depth(32'd32),
+	      .p3cntr_width(32'd5),
+	      .guarded(32'd1)) pending_interrupts_1(.RST(S_AXI_ARESETN),
+						    .CLK(S_AXI_ACLK),
+						    .D_IN(pending_interrupts_1$D_IN),
+						    .ENQ(pending_interrupts_1$ENQ),
+						    .DEQ(pending_interrupts_1$DEQ),
+						    .CLR(pending_interrupts_1$CLR),
+						    .D_OUT(),
+						    .FULL_N(pending_interrupts_1$FULL_N),
+						    .EMPTY_N(pending_interrupts_1$EMPTY_N));
+
+  // submodule pending_interrupts_10
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_10(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_10$D_IN),
+						 .ENQ(pending_interrupts_10$ENQ),
+						 .DEQ(pending_interrupts_10$DEQ),
+						 .CLR(pending_interrupts_10$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_10$FULL_N),
+						 .EMPTY_N(pending_interrupts_10$EMPTY_N));
+
+  // submodule pending_interrupts_100
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_100(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_100$D_IN),
+						  .ENQ(pending_interrupts_100$ENQ),
+						  .DEQ(pending_interrupts_100$DEQ),
+						  .CLR(pending_interrupts_100$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_100$FULL_N),
+						  .EMPTY_N(pending_interrupts_100$EMPTY_N));
+
+  // submodule pending_interrupts_101
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_101(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_101$D_IN),
+						  .ENQ(pending_interrupts_101$ENQ),
+						  .DEQ(pending_interrupts_101$DEQ),
+						  .CLR(pending_interrupts_101$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_101$FULL_N),
+						  .EMPTY_N(pending_interrupts_101$EMPTY_N));
+
+  // submodule pending_interrupts_102
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_102(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_102$D_IN),
+						  .ENQ(pending_interrupts_102$ENQ),
+						  .DEQ(pending_interrupts_102$DEQ),
+						  .CLR(pending_interrupts_102$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_102$FULL_N),
+						  .EMPTY_N(pending_interrupts_102$EMPTY_N));
+
+  // submodule pending_interrupts_103
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_103(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_103$D_IN),
+						  .ENQ(pending_interrupts_103$ENQ),
+						  .DEQ(pending_interrupts_103$DEQ),
+						  .CLR(pending_interrupts_103$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_103$FULL_N),
+						  .EMPTY_N(pending_interrupts_103$EMPTY_N));
+
+  // submodule pending_interrupts_104
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_104(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_104$D_IN),
+						  .ENQ(pending_interrupts_104$ENQ),
+						  .DEQ(pending_interrupts_104$DEQ),
+						  .CLR(pending_interrupts_104$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_104$FULL_N),
+						  .EMPTY_N(pending_interrupts_104$EMPTY_N));
+
+  // submodule pending_interrupts_105
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_105(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_105$D_IN),
+						  .ENQ(pending_interrupts_105$ENQ),
+						  .DEQ(pending_interrupts_105$DEQ),
+						  .CLR(pending_interrupts_105$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_105$FULL_N),
+						  .EMPTY_N(pending_interrupts_105$EMPTY_N));
+
+  // submodule pending_interrupts_106
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_106(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_106$D_IN),
+						  .ENQ(pending_interrupts_106$ENQ),
+						  .DEQ(pending_interrupts_106$DEQ),
+						  .CLR(pending_interrupts_106$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_106$FULL_N),
+						  .EMPTY_N(pending_interrupts_106$EMPTY_N));
+
+  // submodule pending_interrupts_107
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_107(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_107$D_IN),
+						  .ENQ(pending_interrupts_107$ENQ),
+						  .DEQ(pending_interrupts_107$DEQ),
+						  .CLR(pending_interrupts_107$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_107$FULL_N),
+						  .EMPTY_N(pending_interrupts_107$EMPTY_N));
+
+  // submodule pending_interrupts_108
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_108(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_108$D_IN),
+						  .ENQ(pending_interrupts_108$ENQ),
+						  .DEQ(pending_interrupts_108$DEQ),
+						  .CLR(pending_interrupts_108$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_108$FULL_N),
+						  .EMPTY_N(pending_interrupts_108$EMPTY_N));
+
+  // submodule pending_interrupts_109
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_109(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_109$D_IN),
+						  .ENQ(pending_interrupts_109$ENQ),
+						  .DEQ(pending_interrupts_109$DEQ),
+						  .CLR(pending_interrupts_109$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_109$FULL_N),
+						  .EMPTY_N(pending_interrupts_109$EMPTY_N));
+
+  // submodule pending_interrupts_11
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_11(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_11$D_IN),
+						 .ENQ(pending_interrupts_11$ENQ),
+						 .DEQ(pending_interrupts_11$DEQ),
+						 .CLR(pending_interrupts_11$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_11$FULL_N),
+						 .EMPTY_N(pending_interrupts_11$EMPTY_N));
+
+  // submodule pending_interrupts_110
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_110(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_110$D_IN),
+						  .ENQ(pending_interrupts_110$ENQ),
+						  .DEQ(pending_interrupts_110$DEQ),
+						  .CLR(pending_interrupts_110$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_110$FULL_N),
+						  .EMPTY_N(pending_interrupts_110$EMPTY_N));
+
+  // submodule pending_interrupts_111
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_111(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_111$D_IN),
+						  .ENQ(pending_interrupts_111$ENQ),
+						  .DEQ(pending_interrupts_111$DEQ),
+						  .CLR(pending_interrupts_111$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_111$FULL_N),
+						  .EMPTY_N(pending_interrupts_111$EMPTY_N));
+
+  // submodule pending_interrupts_112
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_112(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_112$D_IN),
+						  .ENQ(pending_interrupts_112$ENQ),
+						  .DEQ(pending_interrupts_112$DEQ),
+						  .CLR(pending_interrupts_112$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_112$FULL_N),
+						  .EMPTY_N(pending_interrupts_112$EMPTY_N));
+
+  // submodule pending_interrupts_113
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_113(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_113$D_IN),
+						  .ENQ(pending_interrupts_113$ENQ),
+						  .DEQ(pending_interrupts_113$DEQ),
+						  .CLR(pending_interrupts_113$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_113$FULL_N),
+						  .EMPTY_N(pending_interrupts_113$EMPTY_N));
+
+  // submodule pending_interrupts_114
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_114(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_114$D_IN),
+						  .ENQ(pending_interrupts_114$ENQ),
+						  .DEQ(pending_interrupts_114$DEQ),
+						  .CLR(pending_interrupts_114$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_114$FULL_N),
+						  .EMPTY_N(pending_interrupts_114$EMPTY_N));
+
+  // submodule pending_interrupts_115
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_115(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_115$D_IN),
+						  .ENQ(pending_interrupts_115$ENQ),
+						  .DEQ(pending_interrupts_115$DEQ),
+						  .CLR(pending_interrupts_115$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_115$FULL_N),
+						  .EMPTY_N(pending_interrupts_115$EMPTY_N));
+
+  // submodule pending_interrupts_116
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_116(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_116$D_IN),
+						  .ENQ(pending_interrupts_116$ENQ),
+						  .DEQ(pending_interrupts_116$DEQ),
+						  .CLR(pending_interrupts_116$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_116$FULL_N),
+						  .EMPTY_N(pending_interrupts_116$EMPTY_N));
+
+  // submodule pending_interrupts_117
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_117(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_117$D_IN),
+						  .ENQ(pending_interrupts_117$ENQ),
+						  .DEQ(pending_interrupts_117$DEQ),
+						  .CLR(pending_interrupts_117$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_117$FULL_N),
+						  .EMPTY_N(pending_interrupts_117$EMPTY_N));
+
+  // submodule pending_interrupts_118
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_118(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_118$D_IN),
+						  .ENQ(pending_interrupts_118$ENQ),
+						  .DEQ(pending_interrupts_118$DEQ),
+						  .CLR(pending_interrupts_118$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_118$FULL_N),
+						  .EMPTY_N(pending_interrupts_118$EMPTY_N));
+
+  // submodule pending_interrupts_119
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_119(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_119$D_IN),
+						  .ENQ(pending_interrupts_119$ENQ),
+						  .DEQ(pending_interrupts_119$DEQ),
+						  .CLR(pending_interrupts_119$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_119$FULL_N),
+						  .EMPTY_N(pending_interrupts_119$EMPTY_N));
+
+  // submodule pending_interrupts_12
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_12(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_12$D_IN),
+						 .ENQ(pending_interrupts_12$ENQ),
+						 .DEQ(pending_interrupts_12$DEQ),
+						 .CLR(pending_interrupts_12$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_12$FULL_N),
+						 .EMPTY_N(pending_interrupts_12$EMPTY_N));
+
+  // submodule pending_interrupts_120
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_120(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_120$D_IN),
+						  .ENQ(pending_interrupts_120$ENQ),
+						  .DEQ(pending_interrupts_120$DEQ),
+						  .CLR(pending_interrupts_120$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_120$FULL_N),
+						  .EMPTY_N(pending_interrupts_120$EMPTY_N));
+
+  // submodule pending_interrupts_121
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_121(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_121$D_IN),
+						  .ENQ(pending_interrupts_121$ENQ),
+						  .DEQ(pending_interrupts_121$DEQ),
+						  .CLR(pending_interrupts_121$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_121$FULL_N),
+						  .EMPTY_N(pending_interrupts_121$EMPTY_N));
+
+  // submodule pending_interrupts_122
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_122(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_122$D_IN),
+						  .ENQ(pending_interrupts_122$ENQ),
+						  .DEQ(pending_interrupts_122$DEQ),
+						  .CLR(pending_interrupts_122$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_122$FULL_N),
+						  .EMPTY_N(pending_interrupts_122$EMPTY_N));
+
+  // submodule pending_interrupts_123
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_123(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_123$D_IN),
+						  .ENQ(pending_interrupts_123$ENQ),
+						  .DEQ(pending_interrupts_123$DEQ),
+						  .CLR(pending_interrupts_123$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_123$FULL_N),
+						  .EMPTY_N(pending_interrupts_123$EMPTY_N));
+
+  // submodule pending_interrupts_124
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_124(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_124$D_IN),
+						  .ENQ(pending_interrupts_124$ENQ),
+						  .DEQ(pending_interrupts_124$DEQ),
+						  .CLR(pending_interrupts_124$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_124$FULL_N),
+						  .EMPTY_N(pending_interrupts_124$EMPTY_N));
+
+  // submodule pending_interrupts_125
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_125(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_125$D_IN),
+						  .ENQ(pending_interrupts_125$ENQ),
+						  .DEQ(pending_interrupts_125$DEQ),
+						  .CLR(pending_interrupts_125$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_125$FULL_N),
+						  .EMPTY_N(pending_interrupts_125$EMPTY_N));
+
+  // submodule pending_interrupts_126
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_126(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_126$D_IN),
+						  .ENQ(pending_interrupts_126$ENQ),
+						  .DEQ(pending_interrupts_126$DEQ),
+						  .CLR(pending_interrupts_126$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_126$FULL_N),
+						  .EMPTY_N(pending_interrupts_126$EMPTY_N));
+
+  // submodule pending_interrupts_127
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_127(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_127$D_IN),
+						  .ENQ(pending_interrupts_127$ENQ),
+						  .DEQ(pending_interrupts_127$DEQ),
+						  .CLR(pending_interrupts_127$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_127$FULL_N),
+						  .EMPTY_N(pending_interrupts_127$EMPTY_N));
+
+  // submodule pending_interrupts_128
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_128(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_128$D_IN),
+						  .ENQ(pending_interrupts_128$ENQ),
+						  .DEQ(pending_interrupts_128$DEQ),
+						  .CLR(pending_interrupts_128$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_128$FULL_N),
+						  .EMPTY_N(pending_interrupts_128$EMPTY_N));
+
+  // submodule pending_interrupts_129
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_129(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_129$D_IN),
+						  .ENQ(pending_interrupts_129$ENQ),
+						  .DEQ(pending_interrupts_129$DEQ),
+						  .CLR(pending_interrupts_129$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_129$FULL_N),
+						  .EMPTY_N(pending_interrupts_129$EMPTY_N));
+
+  // submodule pending_interrupts_13
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_13(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_13$D_IN),
+						 .ENQ(pending_interrupts_13$ENQ),
+						 .DEQ(pending_interrupts_13$DEQ),
+						 .CLR(pending_interrupts_13$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_13$FULL_N),
+						 .EMPTY_N(pending_interrupts_13$EMPTY_N));
+
+  // submodule pending_interrupts_130
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_130(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_130$D_IN),
+						  .ENQ(pending_interrupts_130$ENQ),
+						  .DEQ(pending_interrupts_130$DEQ),
+						  .CLR(pending_interrupts_130$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_130$FULL_N),
+						  .EMPTY_N(pending_interrupts_130$EMPTY_N));
+
+  // submodule pending_interrupts_131
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_131(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(pending_interrupts_131$D_IN),
+						  .ENQ(pending_interrupts_131$ENQ),
+						  .DEQ(pending_interrupts_131$DEQ),
+						  .CLR(pending_interrupts_131$CLR),
+						  .D_OUT(),
+						  .FULL_N(pending_interrupts_131$FULL_N),
+						  .EMPTY_N(pending_interrupts_131$EMPTY_N));
+
+  // submodule pending_interrupts_14
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_14(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_14$D_IN),
+						 .ENQ(pending_interrupts_14$ENQ),
+						 .DEQ(pending_interrupts_14$DEQ),
+						 .CLR(pending_interrupts_14$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_14$FULL_N),
+						 .EMPTY_N(pending_interrupts_14$EMPTY_N));
+
+  // submodule pending_interrupts_15
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_15(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_15$D_IN),
+						 .ENQ(pending_interrupts_15$ENQ),
+						 .DEQ(pending_interrupts_15$DEQ),
+						 .CLR(pending_interrupts_15$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_15$FULL_N),
+						 .EMPTY_N(pending_interrupts_15$EMPTY_N));
+
+  // submodule pending_interrupts_16
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_16(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_16$D_IN),
+						 .ENQ(pending_interrupts_16$ENQ),
+						 .DEQ(pending_interrupts_16$DEQ),
+						 .CLR(pending_interrupts_16$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_16$FULL_N),
+						 .EMPTY_N(pending_interrupts_16$EMPTY_N));
+
+  // submodule pending_interrupts_17
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_17(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_17$D_IN),
+						 .ENQ(pending_interrupts_17$ENQ),
+						 .DEQ(pending_interrupts_17$DEQ),
+						 .CLR(pending_interrupts_17$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_17$FULL_N),
+						 .EMPTY_N(pending_interrupts_17$EMPTY_N));
+
+  // submodule pending_interrupts_18
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_18(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_18$D_IN),
+						 .ENQ(pending_interrupts_18$ENQ),
+						 .DEQ(pending_interrupts_18$DEQ),
+						 .CLR(pending_interrupts_18$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_18$FULL_N),
+						 .EMPTY_N(pending_interrupts_18$EMPTY_N));
+
+  // submodule pending_interrupts_19
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_19(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_19$D_IN),
+						 .ENQ(pending_interrupts_19$ENQ),
+						 .DEQ(pending_interrupts_19$DEQ),
+						 .CLR(pending_interrupts_19$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_19$FULL_N),
+						 .EMPTY_N(pending_interrupts_19$EMPTY_N));
+
+  // submodule pending_interrupts_2
+  SizedFIFO #(.p1width(32'd1),
+	      .p2depth(32'd32),
+	      .p3cntr_width(32'd5),
+	      .guarded(32'd1)) pending_interrupts_2(.RST(S_AXI_ARESETN),
+						    .CLK(S_AXI_ACLK),
+						    .D_IN(pending_interrupts_2$D_IN),
+						    .ENQ(pending_interrupts_2$ENQ),
+						    .DEQ(pending_interrupts_2$DEQ),
+						    .CLR(pending_interrupts_2$CLR),
+						    .D_OUT(),
+						    .FULL_N(pending_interrupts_2$FULL_N),
+						    .EMPTY_N(pending_interrupts_2$EMPTY_N));
+
+  // submodule pending_interrupts_20
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_20(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_20$D_IN),
+						 .ENQ(pending_interrupts_20$ENQ),
+						 .DEQ(pending_interrupts_20$DEQ),
+						 .CLR(pending_interrupts_20$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_20$FULL_N),
+						 .EMPTY_N(pending_interrupts_20$EMPTY_N));
+
+  // submodule pending_interrupts_21
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_21(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_21$D_IN),
+						 .ENQ(pending_interrupts_21$ENQ),
+						 .DEQ(pending_interrupts_21$DEQ),
+						 .CLR(pending_interrupts_21$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_21$FULL_N),
+						 .EMPTY_N(pending_interrupts_21$EMPTY_N));
+
+  // submodule pending_interrupts_22
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_22(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_22$D_IN),
+						 .ENQ(pending_interrupts_22$ENQ),
+						 .DEQ(pending_interrupts_22$DEQ),
+						 .CLR(pending_interrupts_22$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_22$FULL_N),
+						 .EMPTY_N(pending_interrupts_22$EMPTY_N));
+
+  // submodule pending_interrupts_23
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_23(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_23$D_IN),
+						 .ENQ(pending_interrupts_23$ENQ),
+						 .DEQ(pending_interrupts_23$DEQ),
+						 .CLR(pending_interrupts_23$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_23$FULL_N),
+						 .EMPTY_N(pending_interrupts_23$EMPTY_N));
+
+  // submodule pending_interrupts_24
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_24(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_24$D_IN),
+						 .ENQ(pending_interrupts_24$ENQ),
+						 .DEQ(pending_interrupts_24$DEQ),
+						 .CLR(pending_interrupts_24$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_24$FULL_N),
+						 .EMPTY_N(pending_interrupts_24$EMPTY_N));
+
+  // submodule pending_interrupts_25
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_25(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_25$D_IN),
+						 .ENQ(pending_interrupts_25$ENQ),
+						 .DEQ(pending_interrupts_25$DEQ),
+						 .CLR(pending_interrupts_25$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_25$FULL_N),
+						 .EMPTY_N(pending_interrupts_25$EMPTY_N));
+
+  // submodule pending_interrupts_26
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_26(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_26$D_IN),
+						 .ENQ(pending_interrupts_26$ENQ),
+						 .DEQ(pending_interrupts_26$DEQ),
+						 .CLR(pending_interrupts_26$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_26$FULL_N),
+						 .EMPTY_N(pending_interrupts_26$EMPTY_N));
+
+  // submodule pending_interrupts_27
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_27(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_27$D_IN),
+						 .ENQ(pending_interrupts_27$ENQ),
+						 .DEQ(pending_interrupts_27$DEQ),
+						 .CLR(pending_interrupts_27$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_27$FULL_N),
+						 .EMPTY_N(pending_interrupts_27$EMPTY_N));
+
+  // submodule pending_interrupts_28
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_28(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_28$D_IN),
+						 .ENQ(pending_interrupts_28$ENQ),
+						 .DEQ(pending_interrupts_28$DEQ),
+						 .CLR(pending_interrupts_28$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_28$FULL_N),
+						 .EMPTY_N(pending_interrupts_28$EMPTY_N));
+
+  // submodule pending_interrupts_29
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_29(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_29$D_IN),
+						 .ENQ(pending_interrupts_29$ENQ),
+						 .DEQ(pending_interrupts_29$DEQ),
+						 .CLR(pending_interrupts_29$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_29$FULL_N),
+						 .EMPTY_N(pending_interrupts_29$EMPTY_N));
+
+  // submodule pending_interrupts_3
+  SizedFIFO #(.p1width(32'd1),
+	      .p2depth(32'd32),
+	      .p3cntr_width(32'd5),
+	      .guarded(32'd1)) pending_interrupts_3(.RST(S_AXI_ARESETN),
+						    .CLK(S_AXI_ACLK),
+						    .D_IN(pending_interrupts_3$D_IN),
+						    .ENQ(pending_interrupts_3$ENQ),
+						    .DEQ(pending_interrupts_3$DEQ),
+						    .CLR(pending_interrupts_3$CLR),
+						    .D_OUT(),
+						    .FULL_N(pending_interrupts_3$FULL_N),
+						    .EMPTY_N(pending_interrupts_3$EMPTY_N));
+
+  // submodule pending_interrupts_30
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_30(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_30$D_IN),
+						 .ENQ(pending_interrupts_30$ENQ),
+						 .DEQ(pending_interrupts_30$DEQ),
+						 .CLR(pending_interrupts_30$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_30$FULL_N),
+						 .EMPTY_N(pending_interrupts_30$EMPTY_N));
+
+  // submodule pending_interrupts_31
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_31(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_31$D_IN),
+						 .ENQ(pending_interrupts_31$ENQ),
+						 .DEQ(pending_interrupts_31$DEQ),
+						 .CLR(pending_interrupts_31$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_31$FULL_N),
+						 .EMPTY_N(pending_interrupts_31$EMPTY_N));
+
+  // submodule pending_interrupts_32
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_32(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_32$D_IN),
+						 .ENQ(pending_interrupts_32$ENQ),
+						 .DEQ(pending_interrupts_32$DEQ),
+						 .CLR(pending_interrupts_32$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_32$FULL_N),
+						 .EMPTY_N(pending_interrupts_32$EMPTY_N));
+
+  // submodule pending_interrupts_33
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_33(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_33$D_IN),
+						 .ENQ(pending_interrupts_33$ENQ),
+						 .DEQ(pending_interrupts_33$DEQ),
+						 .CLR(pending_interrupts_33$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_33$FULL_N),
+						 .EMPTY_N(pending_interrupts_33$EMPTY_N));
+
+  // submodule pending_interrupts_34
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_34(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_34$D_IN),
+						 .ENQ(pending_interrupts_34$ENQ),
+						 .DEQ(pending_interrupts_34$DEQ),
+						 .CLR(pending_interrupts_34$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_34$FULL_N),
+						 .EMPTY_N(pending_interrupts_34$EMPTY_N));
+
+  // submodule pending_interrupts_35
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_35(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_35$D_IN),
+						 .ENQ(pending_interrupts_35$ENQ),
+						 .DEQ(pending_interrupts_35$DEQ),
+						 .CLR(pending_interrupts_35$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_35$FULL_N),
+						 .EMPTY_N(pending_interrupts_35$EMPTY_N));
+
+  // submodule pending_interrupts_36
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_36(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_36$D_IN),
+						 .ENQ(pending_interrupts_36$ENQ),
+						 .DEQ(pending_interrupts_36$DEQ),
+						 .CLR(pending_interrupts_36$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_36$FULL_N),
+						 .EMPTY_N(pending_interrupts_36$EMPTY_N));
+
+  // submodule pending_interrupts_37
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_37(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_37$D_IN),
+						 .ENQ(pending_interrupts_37$ENQ),
+						 .DEQ(pending_interrupts_37$DEQ),
+						 .CLR(pending_interrupts_37$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_37$FULL_N),
+						 .EMPTY_N(pending_interrupts_37$EMPTY_N));
+
+  // submodule pending_interrupts_38
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_38(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_38$D_IN),
+						 .ENQ(pending_interrupts_38$ENQ),
+						 .DEQ(pending_interrupts_38$DEQ),
+						 .CLR(pending_interrupts_38$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_38$FULL_N),
+						 .EMPTY_N(pending_interrupts_38$EMPTY_N));
+
+  // submodule pending_interrupts_39
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_39(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_39$D_IN),
+						 .ENQ(pending_interrupts_39$ENQ),
+						 .DEQ(pending_interrupts_39$DEQ),
+						 .CLR(pending_interrupts_39$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_39$FULL_N),
+						 .EMPTY_N(pending_interrupts_39$EMPTY_N));
+
+  // submodule pending_interrupts_4
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_4(.RST(S_AXI_ARESETN),
+						.CLK(S_AXI_ACLK),
+						.D_IN(pending_interrupts_4$D_IN),
+						.ENQ(pending_interrupts_4$ENQ),
+						.DEQ(pending_interrupts_4$DEQ),
+						.CLR(pending_interrupts_4$CLR),
+						.D_OUT(),
+						.FULL_N(pending_interrupts_4$FULL_N),
+						.EMPTY_N(pending_interrupts_4$EMPTY_N));
+
+  // submodule pending_interrupts_40
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_40(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_40$D_IN),
+						 .ENQ(pending_interrupts_40$ENQ),
+						 .DEQ(pending_interrupts_40$DEQ),
+						 .CLR(pending_interrupts_40$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_40$FULL_N),
+						 .EMPTY_N(pending_interrupts_40$EMPTY_N));
+
+  // submodule pending_interrupts_41
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_41(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_41$D_IN),
+						 .ENQ(pending_interrupts_41$ENQ),
+						 .DEQ(pending_interrupts_41$DEQ),
+						 .CLR(pending_interrupts_41$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_41$FULL_N),
+						 .EMPTY_N(pending_interrupts_41$EMPTY_N));
+
+  // submodule pending_interrupts_42
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_42(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_42$D_IN),
+						 .ENQ(pending_interrupts_42$ENQ),
+						 .DEQ(pending_interrupts_42$DEQ),
+						 .CLR(pending_interrupts_42$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_42$FULL_N),
+						 .EMPTY_N(pending_interrupts_42$EMPTY_N));
+
+  // submodule pending_interrupts_43
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_43(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_43$D_IN),
+						 .ENQ(pending_interrupts_43$ENQ),
+						 .DEQ(pending_interrupts_43$DEQ),
+						 .CLR(pending_interrupts_43$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_43$FULL_N),
+						 .EMPTY_N(pending_interrupts_43$EMPTY_N));
+
+  // submodule pending_interrupts_44
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_44(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_44$D_IN),
+						 .ENQ(pending_interrupts_44$ENQ),
+						 .DEQ(pending_interrupts_44$DEQ),
+						 .CLR(pending_interrupts_44$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_44$FULL_N),
+						 .EMPTY_N(pending_interrupts_44$EMPTY_N));
+
+  // submodule pending_interrupts_45
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_45(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_45$D_IN),
+						 .ENQ(pending_interrupts_45$ENQ),
+						 .DEQ(pending_interrupts_45$DEQ),
+						 .CLR(pending_interrupts_45$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_45$FULL_N),
+						 .EMPTY_N(pending_interrupts_45$EMPTY_N));
+
+  // submodule pending_interrupts_46
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_46(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_46$D_IN),
+						 .ENQ(pending_interrupts_46$ENQ),
+						 .DEQ(pending_interrupts_46$DEQ),
+						 .CLR(pending_interrupts_46$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_46$FULL_N),
+						 .EMPTY_N(pending_interrupts_46$EMPTY_N));
+
+  // submodule pending_interrupts_47
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_47(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_47$D_IN),
+						 .ENQ(pending_interrupts_47$ENQ),
+						 .DEQ(pending_interrupts_47$DEQ),
+						 .CLR(pending_interrupts_47$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_47$FULL_N),
+						 .EMPTY_N(pending_interrupts_47$EMPTY_N));
+
+  // submodule pending_interrupts_48
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_48(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_48$D_IN),
+						 .ENQ(pending_interrupts_48$ENQ),
+						 .DEQ(pending_interrupts_48$DEQ),
+						 .CLR(pending_interrupts_48$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_48$FULL_N),
+						 .EMPTY_N(pending_interrupts_48$EMPTY_N));
+
+  // submodule pending_interrupts_49
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_49(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_49$D_IN),
+						 .ENQ(pending_interrupts_49$ENQ),
+						 .DEQ(pending_interrupts_49$DEQ),
+						 .CLR(pending_interrupts_49$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_49$FULL_N),
+						 .EMPTY_N(pending_interrupts_49$EMPTY_N));
+
+  // submodule pending_interrupts_5
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_5(.RST(S_AXI_ARESETN),
+						.CLK(S_AXI_ACLK),
+						.D_IN(pending_interrupts_5$D_IN),
+						.ENQ(pending_interrupts_5$ENQ),
+						.DEQ(pending_interrupts_5$DEQ),
+						.CLR(pending_interrupts_5$CLR),
+						.D_OUT(),
+						.FULL_N(pending_interrupts_5$FULL_N),
+						.EMPTY_N(pending_interrupts_5$EMPTY_N));
+
+  // submodule pending_interrupts_50
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_50(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_50$D_IN),
+						 .ENQ(pending_interrupts_50$ENQ),
+						 .DEQ(pending_interrupts_50$DEQ),
+						 .CLR(pending_interrupts_50$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_50$FULL_N),
+						 .EMPTY_N(pending_interrupts_50$EMPTY_N));
+
+  // submodule pending_interrupts_51
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_51(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_51$D_IN),
+						 .ENQ(pending_interrupts_51$ENQ),
+						 .DEQ(pending_interrupts_51$DEQ),
+						 .CLR(pending_interrupts_51$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_51$FULL_N),
+						 .EMPTY_N(pending_interrupts_51$EMPTY_N));
+
+  // submodule pending_interrupts_52
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_52(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_52$D_IN),
+						 .ENQ(pending_interrupts_52$ENQ),
+						 .DEQ(pending_interrupts_52$DEQ),
+						 .CLR(pending_interrupts_52$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_52$FULL_N),
+						 .EMPTY_N(pending_interrupts_52$EMPTY_N));
+
+  // submodule pending_interrupts_53
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_53(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_53$D_IN),
+						 .ENQ(pending_interrupts_53$ENQ),
+						 .DEQ(pending_interrupts_53$DEQ),
+						 .CLR(pending_interrupts_53$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_53$FULL_N),
+						 .EMPTY_N(pending_interrupts_53$EMPTY_N));
+
+  // submodule pending_interrupts_54
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_54(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_54$D_IN),
+						 .ENQ(pending_interrupts_54$ENQ),
+						 .DEQ(pending_interrupts_54$DEQ),
+						 .CLR(pending_interrupts_54$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_54$FULL_N),
+						 .EMPTY_N(pending_interrupts_54$EMPTY_N));
+
+  // submodule pending_interrupts_55
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_55(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_55$D_IN),
+						 .ENQ(pending_interrupts_55$ENQ),
+						 .DEQ(pending_interrupts_55$DEQ),
+						 .CLR(pending_interrupts_55$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_55$FULL_N),
+						 .EMPTY_N(pending_interrupts_55$EMPTY_N));
+
+  // submodule pending_interrupts_56
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_56(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_56$D_IN),
+						 .ENQ(pending_interrupts_56$ENQ),
+						 .DEQ(pending_interrupts_56$DEQ),
+						 .CLR(pending_interrupts_56$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_56$FULL_N),
+						 .EMPTY_N(pending_interrupts_56$EMPTY_N));
+
+  // submodule pending_interrupts_57
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_57(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_57$D_IN),
+						 .ENQ(pending_interrupts_57$ENQ),
+						 .DEQ(pending_interrupts_57$DEQ),
+						 .CLR(pending_interrupts_57$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_57$FULL_N),
+						 .EMPTY_N(pending_interrupts_57$EMPTY_N));
+
+  // submodule pending_interrupts_58
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_58(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_58$D_IN),
+						 .ENQ(pending_interrupts_58$ENQ),
+						 .DEQ(pending_interrupts_58$DEQ),
+						 .CLR(pending_interrupts_58$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_58$FULL_N),
+						 .EMPTY_N(pending_interrupts_58$EMPTY_N));
+
+  // submodule pending_interrupts_59
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_59(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_59$D_IN),
+						 .ENQ(pending_interrupts_59$ENQ),
+						 .DEQ(pending_interrupts_59$DEQ),
+						 .CLR(pending_interrupts_59$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_59$FULL_N),
+						 .EMPTY_N(pending_interrupts_59$EMPTY_N));
+
+  // submodule pending_interrupts_6
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_6(.RST(S_AXI_ARESETN),
+						.CLK(S_AXI_ACLK),
+						.D_IN(pending_interrupts_6$D_IN),
+						.ENQ(pending_interrupts_6$ENQ),
+						.DEQ(pending_interrupts_6$DEQ),
+						.CLR(pending_interrupts_6$CLR),
+						.D_OUT(),
+						.FULL_N(pending_interrupts_6$FULL_N),
+						.EMPTY_N(pending_interrupts_6$EMPTY_N));
+
+  // submodule pending_interrupts_60
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_60(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_60$D_IN),
+						 .ENQ(pending_interrupts_60$ENQ),
+						 .DEQ(pending_interrupts_60$DEQ),
+						 .CLR(pending_interrupts_60$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_60$FULL_N),
+						 .EMPTY_N(pending_interrupts_60$EMPTY_N));
+
+  // submodule pending_interrupts_61
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_61(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_61$D_IN),
+						 .ENQ(pending_interrupts_61$ENQ),
+						 .DEQ(pending_interrupts_61$DEQ),
+						 .CLR(pending_interrupts_61$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_61$FULL_N),
+						 .EMPTY_N(pending_interrupts_61$EMPTY_N));
+
+  // submodule pending_interrupts_62
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_62(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_62$D_IN),
+						 .ENQ(pending_interrupts_62$ENQ),
+						 .DEQ(pending_interrupts_62$DEQ),
+						 .CLR(pending_interrupts_62$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_62$FULL_N),
+						 .EMPTY_N(pending_interrupts_62$EMPTY_N));
+
+  // submodule pending_interrupts_63
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_63(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_63$D_IN),
+						 .ENQ(pending_interrupts_63$ENQ),
+						 .DEQ(pending_interrupts_63$DEQ),
+						 .CLR(pending_interrupts_63$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_63$FULL_N),
+						 .EMPTY_N(pending_interrupts_63$EMPTY_N));
+
+  // submodule pending_interrupts_64
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_64(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_64$D_IN),
+						 .ENQ(pending_interrupts_64$ENQ),
+						 .DEQ(pending_interrupts_64$DEQ),
+						 .CLR(pending_interrupts_64$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_64$FULL_N),
+						 .EMPTY_N(pending_interrupts_64$EMPTY_N));
+
+  // submodule pending_interrupts_65
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_65(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_65$D_IN),
+						 .ENQ(pending_interrupts_65$ENQ),
+						 .DEQ(pending_interrupts_65$DEQ),
+						 .CLR(pending_interrupts_65$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_65$FULL_N),
+						 .EMPTY_N(pending_interrupts_65$EMPTY_N));
+
+  // submodule pending_interrupts_66
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_66(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_66$D_IN),
+						 .ENQ(pending_interrupts_66$ENQ),
+						 .DEQ(pending_interrupts_66$DEQ),
+						 .CLR(pending_interrupts_66$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_66$FULL_N),
+						 .EMPTY_N(pending_interrupts_66$EMPTY_N));
+
+  // submodule pending_interrupts_67
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_67(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_67$D_IN),
+						 .ENQ(pending_interrupts_67$ENQ),
+						 .DEQ(pending_interrupts_67$DEQ),
+						 .CLR(pending_interrupts_67$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_67$FULL_N),
+						 .EMPTY_N(pending_interrupts_67$EMPTY_N));
+
+  // submodule pending_interrupts_68
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_68(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_68$D_IN),
+						 .ENQ(pending_interrupts_68$ENQ),
+						 .DEQ(pending_interrupts_68$DEQ),
+						 .CLR(pending_interrupts_68$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_68$FULL_N),
+						 .EMPTY_N(pending_interrupts_68$EMPTY_N));
+
+  // submodule pending_interrupts_69
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_69(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_69$D_IN),
+						 .ENQ(pending_interrupts_69$ENQ),
+						 .DEQ(pending_interrupts_69$DEQ),
+						 .CLR(pending_interrupts_69$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_69$FULL_N),
+						 .EMPTY_N(pending_interrupts_69$EMPTY_N));
+
+  // submodule pending_interrupts_7
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_7(.RST(S_AXI_ARESETN),
+						.CLK(S_AXI_ACLK),
+						.D_IN(pending_interrupts_7$D_IN),
+						.ENQ(pending_interrupts_7$ENQ),
+						.DEQ(pending_interrupts_7$DEQ),
+						.CLR(pending_interrupts_7$CLR),
+						.D_OUT(),
+						.FULL_N(pending_interrupts_7$FULL_N),
+						.EMPTY_N(pending_interrupts_7$EMPTY_N));
+
+  // submodule pending_interrupts_70
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_70(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_70$D_IN),
+						 .ENQ(pending_interrupts_70$ENQ),
+						 .DEQ(pending_interrupts_70$DEQ),
+						 .CLR(pending_interrupts_70$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_70$FULL_N),
+						 .EMPTY_N(pending_interrupts_70$EMPTY_N));
+
+  // submodule pending_interrupts_71
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_71(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_71$D_IN),
+						 .ENQ(pending_interrupts_71$ENQ),
+						 .DEQ(pending_interrupts_71$DEQ),
+						 .CLR(pending_interrupts_71$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_71$FULL_N),
+						 .EMPTY_N(pending_interrupts_71$EMPTY_N));
+
+  // submodule pending_interrupts_72
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_72(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_72$D_IN),
+						 .ENQ(pending_interrupts_72$ENQ),
+						 .DEQ(pending_interrupts_72$DEQ),
+						 .CLR(pending_interrupts_72$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_72$FULL_N),
+						 .EMPTY_N(pending_interrupts_72$EMPTY_N));
+
+  // submodule pending_interrupts_73
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_73(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_73$D_IN),
+						 .ENQ(pending_interrupts_73$ENQ),
+						 .DEQ(pending_interrupts_73$DEQ),
+						 .CLR(pending_interrupts_73$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_73$FULL_N),
+						 .EMPTY_N(pending_interrupts_73$EMPTY_N));
+
+  // submodule pending_interrupts_74
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_74(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_74$D_IN),
+						 .ENQ(pending_interrupts_74$ENQ),
+						 .DEQ(pending_interrupts_74$DEQ),
+						 .CLR(pending_interrupts_74$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_74$FULL_N),
+						 .EMPTY_N(pending_interrupts_74$EMPTY_N));
+
+  // submodule pending_interrupts_75
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_75(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_75$D_IN),
+						 .ENQ(pending_interrupts_75$ENQ),
+						 .DEQ(pending_interrupts_75$DEQ),
+						 .CLR(pending_interrupts_75$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_75$FULL_N),
+						 .EMPTY_N(pending_interrupts_75$EMPTY_N));
+
+  // submodule pending_interrupts_76
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_76(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_76$D_IN),
+						 .ENQ(pending_interrupts_76$ENQ),
+						 .DEQ(pending_interrupts_76$DEQ),
+						 .CLR(pending_interrupts_76$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_76$FULL_N),
+						 .EMPTY_N(pending_interrupts_76$EMPTY_N));
+
+  // submodule pending_interrupts_77
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_77(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_77$D_IN),
+						 .ENQ(pending_interrupts_77$ENQ),
+						 .DEQ(pending_interrupts_77$DEQ),
+						 .CLR(pending_interrupts_77$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_77$FULL_N),
+						 .EMPTY_N(pending_interrupts_77$EMPTY_N));
+
+  // submodule pending_interrupts_78
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_78(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_78$D_IN),
+						 .ENQ(pending_interrupts_78$ENQ),
+						 .DEQ(pending_interrupts_78$DEQ),
+						 .CLR(pending_interrupts_78$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_78$FULL_N),
+						 .EMPTY_N(pending_interrupts_78$EMPTY_N));
+
+  // submodule pending_interrupts_79
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_79(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_79$D_IN),
+						 .ENQ(pending_interrupts_79$ENQ),
+						 .DEQ(pending_interrupts_79$DEQ),
+						 .CLR(pending_interrupts_79$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_79$FULL_N),
+						 .EMPTY_N(pending_interrupts_79$EMPTY_N));
+
+  // submodule pending_interrupts_8
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_8(.RST(S_AXI_ARESETN),
+						.CLK(S_AXI_ACLK),
+						.D_IN(pending_interrupts_8$D_IN),
+						.ENQ(pending_interrupts_8$ENQ),
+						.DEQ(pending_interrupts_8$DEQ),
+						.CLR(pending_interrupts_8$CLR),
+						.D_OUT(),
+						.FULL_N(pending_interrupts_8$FULL_N),
+						.EMPTY_N(pending_interrupts_8$EMPTY_N));
+
+  // submodule pending_interrupts_80
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_80(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_80$D_IN),
+						 .ENQ(pending_interrupts_80$ENQ),
+						 .DEQ(pending_interrupts_80$DEQ),
+						 .CLR(pending_interrupts_80$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_80$FULL_N),
+						 .EMPTY_N(pending_interrupts_80$EMPTY_N));
+
+  // submodule pending_interrupts_81
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_81(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_81$D_IN),
+						 .ENQ(pending_interrupts_81$ENQ),
+						 .DEQ(pending_interrupts_81$DEQ),
+						 .CLR(pending_interrupts_81$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_81$FULL_N),
+						 .EMPTY_N(pending_interrupts_81$EMPTY_N));
+
+  // submodule pending_interrupts_82
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_82(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_82$D_IN),
+						 .ENQ(pending_interrupts_82$ENQ),
+						 .DEQ(pending_interrupts_82$DEQ),
+						 .CLR(pending_interrupts_82$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_82$FULL_N),
+						 .EMPTY_N(pending_interrupts_82$EMPTY_N));
+
+  // submodule pending_interrupts_83
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_83(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_83$D_IN),
+						 .ENQ(pending_interrupts_83$ENQ),
+						 .DEQ(pending_interrupts_83$DEQ),
+						 .CLR(pending_interrupts_83$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_83$FULL_N),
+						 .EMPTY_N(pending_interrupts_83$EMPTY_N));
+
+  // submodule pending_interrupts_84
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_84(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_84$D_IN),
+						 .ENQ(pending_interrupts_84$ENQ),
+						 .DEQ(pending_interrupts_84$DEQ),
+						 .CLR(pending_interrupts_84$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_84$FULL_N),
+						 .EMPTY_N(pending_interrupts_84$EMPTY_N));
+
+  // submodule pending_interrupts_85
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_85(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_85$D_IN),
+						 .ENQ(pending_interrupts_85$ENQ),
+						 .DEQ(pending_interrupts_85$DEQ),
+						 .CLR(pending_interrupts_85$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_85$FULL_N),
+						 .EMPTY_N(pending_interrupts_85$EMPTY_N));
+
+  // submodule pending_interrupts_86
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_86(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_86$D_IN),
+						 .ENQ(pending_interrupts_86$ENQ),
+						 .DEQ(pending_interrupts_86$DEQ),
+						 .CLR(pending_interrupts_86$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_86$FULL_N),
+						 .EMPTY_N(pending_interrupts_86$EMPTY_N));
+
+  // submodule pending_interrupts_87
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_87(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_87$D_IN),
+						 .ENQ(pending_interrupts_87$ENQ),
+						 .DEQ(pending_interrupts_87$DEQ),
+						 .CLR(pending_interrupts_87$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_87$FULL_N),
+						 .EMPTY_N(pending_interrupts_87$EMPTY_N));
+
+  // submodule pending_interrupts_88
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_88(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_88$D_IN),
+						 .ENQ(pending_interrupts_88$ENQ),
+						 .DEQ(pending_interrupts_88$DEQ),
+						 .CLR(pending_interrupts_88$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_88$FULL_N),
+						 .EMPTY_N(pending_interrupts_88$EMPTY_N));
+
+  // submodule pending_interrupts_89
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_89(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_89$D_IN),
+						 .ENQ(pending_interrupts_89$ENQ),
+						 .DEQ(pending_interrupts_89$DEQ),
+						 .CLR(pending_interrupts_89$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_89$FULL_N),
+						 .EMPTY_N(pending_interrupts_89$EMPTY_N));
+
+  // submodule pending_interrupts_9
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_9(.RST(S_AXI_ARESETN),
+						.CLK(S_AXI_ACLK),
+						.D_IN(pending_interrupts_9$D_IN),
+						.ENQ(pending_interrupts_9$ENQ),
+						.DEQ(pending_interrupts_9$DEQ),
+						.CLR(pending_interrupts_9$CLR),
+						.D_OUT(),
+						.FULL_N(pending_interrupts_9$FULL_N),
+						.EMPTY_N(pending_interrupts_9$EMPTY_N));
+
+  // submodule pending_interrupts_90
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_90(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_90$D_IN),
+						 .ENQ(pending_interrupts_90$ENQ),
+						 .DEQ(pending_interrupts_90$DEQ),
+						 .CLR(pending_interrupts_90$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_90$FULL_N),
+						 .EMPTY_N(pending_interrupts_90$EMPTY_N));
+
+  // submodule pending_interrupts_91
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_91(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_91$D_IN),
+						 .ENQ(pending_interrupts_91$ENQ),
+						 .DEQ(pending_interrupts_91$DEQ),
+						 .CLR(pending_interrupts_91$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_91$FULL_N),
+						 .EMPTY_N(pending_interrupts_91$EMPTY_N));
+
+  // submodule pending_interrupts_92
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_92(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_92$D_IN),
+						 .ENQ(pending_interrupts_92$ENQ),
+						 .DEQ(pending_interrupts_92$DEQ),
+						 .CLR(pending_interrupts_92$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_92$FULL_N),
+						 .EMPTY_N(pending_interrupts_92$EMPTY_N));
+
+  // submodule pending_interrupts_93
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_93(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_93$D_IN),
+						 .ENQ(pending_interrupts_93$ENQ),
+						 .DEQ(pending_interrupts_93$DEQ),
+						 .CLR(pending_interrupts_93$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_93$FULL_N),
+						 .EMPTY_N(pending_interrupts_93$EMPTY_N));
+
+  // submodule pending_interrupts_94
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_94(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_94$D_IN),
+						 .ENQ(pending_interrupts_94$ENQ),
+						 .DEQ(pending_interrupts_94$DEQ),
+						 .CLR(pending_interrupts_94$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_94$FULL_N),
+						 .EMPTY_N(pending_interrupts_94$EMPTY_N));
+
+  // submodule pending_interrupts_95
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_95(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_95$D_IN),
+						 .ENQ(pending_interrupts_95$ENQ),
+						 .DEQ(pending_interrupts_95$DEQ),
+						 .CLR(pending_interrupts_95$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_95$FULL_N),
+						 .EMPTY_N(pending_interrupts_95$EMPTY_N));
+
+  // submodule pending_interrupts_96
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_96(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_96$D_IN),
+						 .ENQ(pending_interrupts_96$ENQ),
+						 .DEQ(pending_interrupts_96$DEQ),
+						 .CLR(pending_interrupts_96$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_96$FULL_N),
+						 .EMPTY_N(pending_interrupts_96$EMPTY_N));
+
+  // submodule pending_interrupts_97
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_97(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_97$D_IN),
+						 .ENQ(pending_interrupts_97$ENQ),
+						 .DEQ(pending_interrupts_97$DEQ),
+						 .CLR(pending_interrupts_97$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_97$FULL_N),
+						 .EMPTY_N(pending_interrupts_97$EMPTY_N));
+
+  // submodule pending_interrupts_98
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_98(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_98$D_IN),
+						 .ENQ(pending_interrupts_98$ENQ),
+						 .DEQ(pending_interrupts_98$DEQ),
+						 .CLR(pending_interrupts_98$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_98$FULL_N),
+						 .EMPTY_N(pending_interrupts_98$EMPTY_N));
+
+  // submodule pending_interrupts_99
+  FIFO2 #(.width(32'd1),
+	  .guarded(32'd1)) pending_interrupts_99(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(pending_interrupts_99$D_IN),
+						 .ENQ(pending_interrupts_99$ENQ),
+						 .DEQ(pending_interrupts_99$DEQ),
+						 .CLR(pending_interrupts_99$CLR),
+						 .D_OUT(),
+						 .FULL_N(pending_interrupts_99$FULL_N),
+						 .EMPTY_N(pending_interrupts_99$EMPTY_N));
+
+  // submodule s_config_readSlave_in
+  FIFO2 #(.width(32'd19),
+	  .guarded(32'd1)) s_config_readSlave_in(.RST(S_AXI_ARESETN),
+						 .CLK(S_AXI_ACLK),
+						 .D_IN(s_config_readSlave_in$D_IN),
+						 .ENQ(s_config_readSlave_in$ENQ),
+						 .DEQ(s_config_readSlave_in$DEQ),
+						 .CLR(s_config_readSlave_in$CLR),
+						 .D_OUT(s_config_readSlave_in$D_OUT),
+						 .FULL_N(s_config_readSlave_in$FULL_N),
+						 .EMPTY_N(s_config_readSlave_in$EMPTY_N));
+
+  // submodule s_config_readSlave_out
+  FIFO2 #(.width(32'd34),
+	  .guarded(32'd1)) s_config_readSlave_out(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(s_config_readSlave_out$D_IN),
+						  .ENQ(s_config_readSlave_out$ENQ),
+						  .DEQ(s_config_readSlave_out$DEQ),
+						  .CLR(s_config_readSlave_out$CLR),
+						  .D_OUT(s_config_readSlave_out$D_OUT),
+						  .FULL_N(s_config_readSlave_out$FULL_N),
+						  .EMPTY_N(s_config_readSlave_out$EMPTY_N));
+
+  // submodule s_config_writeSlave_in
+  FIFO2 #(.width(32'd55),
+	  .guarded(32'd1)) s_config_writeSlave_in(.RST(S_AXI_ARESETN),
+						  .CLK(S_AXI_ACLK),
+						  .D_IN(s_config_writeSlave_in$D_IN),
+						  .ENQ(s_config_writeSlave_in$ENQ),
+						  .DEQ(s_config_writeSlave_in$DEQ),
+						  .CLR(s_config_writeSlave_in$CLR),
+						  .D_OUT(s_config_writeSlave_in$D_OUT),
+						  .FULL_N(s_config_writeSlave_in$FULL_N),
+						  .EMPTY_N(s_config_writeSlave_in$EMPTY_N));
+
+  // submodule s_config_writeSlave_out
+  FIFO2 #(.width(32'd2),
+	  .guarded(32'd1)) s_config_writeSlave_out(.RST(S_AXI_ARESETN),
+						   .CLK(S_AXI_ACLK),
+						   .D_IN(s_config_writeSlave_out$D_IN),
+						   .ENQ(s_config_writeSlave_out$ENQ),
+						   .DEQ(s_config_writeSlave_out$DEQ),
+						   .CLR(s_config_writeSlave_out$CLR),
+						   .D_OUT(s_config_writeSlave_out$D_OUT),
+						   .FULL_N(s_config_writeSlave_out$FULL_N),
+						   .EMPTY_N(s_config_writeSlave_out$EMPTY_N));
+
+  // submodule sync_10
+  SyncPulse sync_10(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_10$sEN),
+		    .dPulse(sync_10$dPulse));
+
+  // submodule sync_100
+  SyncPulse sync_100(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_100$sEN),
+		     .dPulse(sync_100$dPulse));
+
+  // submodule sync_101
+  SyncPulse sync_101(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_101$sEN),
+		     .dPulse(sync_101$dPulse));
+
+  // submodule sync_102
+  SyncPulse sync_102(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_102$sEN),
+		     .dPulse(sync_102$dPulse));
+
+  // submodule sync_103
+  SyncPulse sync_103(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_103$sEN),
+		     .dPulse(sync_103$dPulse));
+
+  // submodule sync_104
+  SyncPulse sync_104(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_104$sEN),
+		     .dPulse(sync_104$dPulse));
+
+  // submodule sync_105
+  SyncPulse sync_105(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_105$sEN),
+		     .dPulse(sync_105$dPulse));
+
+  // submodule sync_106
+  SyncPulse sync_106(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_106$sEN),
+		     .dPulse(sync_106$dPulse));
+
+  // submodule sync_107
+  SyncPulse sync_107(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_107$sEN),
+		     .dPulse(sync_107$dPulse));
+
+  // submodule sync_108
+  SyncPulse sync_108(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_108$sEN),
+		     .dPulse(sync_108$dPulse));
+
+  // submodule sync_109
+  SyncPulse sync_109(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_109$sEN),
+		     .dPulse(sync_109$dPulse));
+
+  // submodule sync_11
+  SyncPulse sync_11(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_11$sEN),
+		    .dPulse(sync_11$dPulse));
+
+  // submodule sync_110
+  SyncPulse sync_110(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_110$sEN),
+		     .dPulse(sync_110$dPulse));
+
+  // submodule sync_111
+  SyncPulse sync_111(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_111$sEN),
+		     .dPulse(sync_111$dPulse));
+
+  // submodule sync_112
+  SyncPulse sync_112(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_112$sEN),
+		     .dPulse(sync_112$dPulse));
+
+  // submodule sync_113
+  SyncPulse sync_113(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_113$sEN),
+		     .dPulse(sync_113$dPulse));
+
+  // submodule sync_114
+  SyncPulse sync_114(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_114$sEN),
+		     .dPulse(sync_114$dPulse));
+
+  // submodule sync_115
+  SyncPulse sync_115(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_115$sEN),
+		     .dPulse(sync_115$dPulse));
+
+  // submodule sync_116
+  SyncPulse sync_116(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_116$sEN),
+		     .dPulse(sync_116$dPulse));
+
+  // submodule sync_117
+  SyncPulse sync_117(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_117$sEN),
+		     .dPulse(sync_117$dPulse));
+
+  // submodule sync_118
+  SyncPulse sync_118(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_118$sEN),
+		     .dPulse(sync_118$dPulse));
+
+  // submodule sync_119
+  SyncPulse sync_119(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_119$sEN),
+		     .dPulse(sync_119$dPulse));
+
+  // submodule sync_12
+  SyncPulse sync_12(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_12$sEN),
+		    .dPulse(sync_12$dPulse));
+
+  // submodule sync_120
+  SyncPulse sync_120(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_120$sEN),
+		     .dPulse(sync_120$dPulse));
+
+  // submodule sync_121
+  SyncPulse sync_121(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_121$sEN),
+		     .dPulse(sync_121$dPulse));
+
+  // submodule sync_122
+  SyncPulse sync_122(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_122$sEN),
+		     .dPulse(sync_122$dPulse));
+
+  // submodule sync_123
+  SyncPulse sync_123(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_123$sEN),
+		     .dPulse(sync_123$dPulse));
+
+  // submodule sync_124
+  SyncPulse sync_124(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_124$sEN),
+		     .dPulse(sync_124$dPulse));
+
+  // submodule sync_125
+  SyncPulse sync_125(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_125$sEN),
+		     .dPulse(sync_125$dPulse));
+
+  // submodule sync_126
+  SyncPulse sync_126(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_126$sEN),
+		     .dPulse(sync_126$dPulse));
+
+  // submodule sync_127
+  SyncPulse sync_127(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_127$sEN),
+		     .dPulse(sync_127$dPulse));
+
+  // submodule sync_128
+  SyncPulse sync_128(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_128$sEN),
+		     .dPulse(sync_128$dPulse));
+
+  // submodule sync_129
+  SyncPulse sync_129(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_129$sEN),
+		     .dPulse(sync_129$dPulse));
+
+  // submodule sync_13
+  SyncPulse sync_13(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_13$sEN),
+		    .dPulse(sync_13$dPulse));
+
+  // submodule sync_130
+  SyncPulse sync_130(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_130$sEN),
+		     .dPulse(sync_130$dPulse));
+
+  // submodule sync_131
+  SyncPulse sync_131(.sCLK(design_clk),
+		     .dCLK(S_AXI_ACLK),
+		     .sRST(design_rst),
+		     .sEN(sync_131$sEN),
+		     .dPulse(sync_131$dPulse));
+
+  // submodule sync_14
+  SyncPulse sync_14(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_14$sEN),
+		    .dPulse(sync_14$dPulse));
+
+  // submodule sync_15
+  SyncPulse sync_15(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_15$sEN),
+		    .dPulse(sync_15$dPulse));
+
+  // submodule sync_16
+  SyncPulse sync_16(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_16$sEN),
+		    .dPulse(sync_16$dPulse));
+
+  // submodule sync_17
+  SyncPulse sync_17(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_17$sEN),
+		    .dPulse(sync_17$dPulse));
+
+  // submodule sync_18
+  SyncPulse sync_18(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_18$sEN),
+		    .dPulse(sync_18$dPulse));
+
+  // submodule sync_19
+  SyncPulse sync_19(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_19$sEN),
+		    .dPulse(sync_19$dPulse));
+
+  // submodule sync_20
+  SyncPulse sync_20(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_20$sEN),
+		    .dPulse(sync_20$dPulse));
+
+  // submodule sync_21
+  SyncPulse sync_21(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_21$sEN),
+		    .dPulse(sync_21$dPulse));
+
+  // submodule sync_22
+  SyncPulse sync_22(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_22$sEN),
+		    .dPulse(sync_22$dPulse));
+
+  // submodule sync_23
+  SyncPulse sync_23(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_23$sEN),
+		    .dPulse(sync_23$dPulse));
+
+  // submodule sync_24
+  SyncPulse sync_24(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_24$sEN),
+		    .dPulse(sync_24$dPulse));
+
+  // submodule sync_25
+  SyncPulse sync_25(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_25$sEN),
+		    .dPulse(sync_25$dPulse));
+
+  // submodule sync_26
+  SyncPulse sync_26(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_26$sEN),
+		    .dPulse(sync_26$dPulse));
+
+  // submodule sync_27
+  SyncPulse sync_27(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_27$sEN),
+		    .dPulse(sync_27$dPulse));
+
+  // submodule sync_28
+  SyncPulse sync_28(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_28$sEN),
+		    .dPulse(sync_28$dPulse));
+
+  // submodule sync_29
+  SyncPulse sync_29(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_29$sEN),
+		    .dPulse(sync_29$dPulse));
+
+  // submodule sync_30
+  SyncPulse sync_30(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_30$sEN),
+		    .dPulse(sync_30$dPulse));
+
+  // submodule sync_31
+  SyncPulse sync_31(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_31$sEN),
+		    .dPulse(sync_31$dPulse));
+
+  // submodule sync_32
+  SyncPulse sync_32(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_32$sEN),
+		    .dPulse(sync_32$dPulse));
+
+  // submodule sync_33
+  SyncPulse sync_33(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_33$sEN),
+		    .dPulse(sync_33$dPulse));
+
+  // submodule sync_34
+  SyncPulse sync_34(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_34$sEN),
+		    .dPulse(sync_34$dPulse));
+
+  // submodule sync_35
+  SyncPulse sync_35(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_35$sEN),
+		    .dPulse(sync_35$dPulse));
+
+  // submodule sync_36
+  SyncPulse sync_36(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_36$sEN),
+		    .dPulse(sync_36$dPulse));
+
+  // submodule sync_37
+  SyncPulse sync_37(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_37$sEN),
+		    .dPulse(sync_37$dPulse));
+
+  // submodule sync_38
+  SyncPulse sync_38(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_38$sEN),
+		    .dPulse(sync_38$dPulse));
+
+  // submodule sync_39
+  SyncPulse sync_39(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_39$sEN),
+		    .dPulse(sync_39$dPulse));
+
+  // submodule sync_4
+  SyncPulse sync_4(.sCLK(design_clk),
+		   .dCLK(S_AXI_ACLK),
+		   .sRST(design_rst),
+		   .sEN(sync_4$sEN),
+		   .dPulse(sync_4$dPulse));
+
+  // submodule sync_40
+  SyncPulse sync_40(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_40$sEN),
+		    .dPulse(sync_40$dPulse));
+
+  // submodule sync_41
+  SyncPulse sync_41(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_41$sEN),
+		    .dPulse(sync_41$dPulse));
+
+  // submodule sync_42
+  SyncPulse sync_42(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_42$sEN),
+		    .dPulse(sync_42$dPulse));
+
+  // submodule sync_43
+  SyncPulse sync_43(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_43$sEN),
+		    .dPulse(sync_43$dPulse));
+
+  // submodule sync_44
+  SyncPulse sync_44(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_44$sEN),
+		    .dPulse(sync_44$dPulse));
+
+  // submodule sync_45
+  SyncPulse sync_45(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_45$sEN),
+		    .dPulse(sync_45$dPulse));
+
+  // submodule sync_46
+  SyncPulse sync_46(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_46$sEN),
+		    .dPulse(sync_46$dPulse));
+
+  // submodule sync_47
+  SyncPulse sync_47(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_47$sEN),
+		    .dPulse(sync_47$dPulse));
+
+  // submodule sync_48
+  SyncPulse sync_48(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_48$sEN),
+		    .dPulse(sync_48$dPulse));
+
+  // submodule sync_49
+  SyncPulse sync_49(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_49$sEN),
+		    .dPulse(sync_49$dPulse));
+
+  // submodule sync_5
+  SyncPulse sync_5(.sCLK(design_clk),
+		   .dCLK(S_AXI_ACLK),
+		   .sRST(design_rst),
+		   .sEN(sync_5$sEN),
+		   .dPulse(sync_5$dPulse));
+
+  // submodule sync_50
+  SyncPulse sync_50(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_50$sEN),
+		    .dPulse(sync_50$dPulse));
+
+  // submodule sync_51
+  SyncPulse sync_51(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_51$sEN),
+		    .dPulse(sync_51$dPulse));
+
+  // submodule sync_52
+  SyncPulse sync_52(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_52$sEN),
+		    .dPulse(sync_52$dPulse));
+
+  // submodule sync_53
+  SyncPulse sync_53(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_53$sEN),
+		    .dPulse(sync_53$dPulse));
+
+  // submodule sync_54
+  SyncPulse sync_54(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_54$sEN),
+		    .dPulse(sync_54$dPulse));
+
+  // submodule sync_55
+  SyncPulse sync_55(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_55$sEN),
+		    .dPulse(sync_55$dPulse));
+
+  // submodule sync_56
+  SyncPulse sync_56(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_56$sEN),
+		    .dPulse(sync_56$dPulse));
+
+  // submodule sync_57
+  SyncPulse sync_57(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_57$sEN),
+		    .dPulse(sync_57$dPulse));
+
+  // submodule sync_58
+  SyncPulse sync_58(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_58$sEN),
+		    .dPulse(sync_58$dPulse));
+
+  // submodule sync_59
+  SyncPulse sync_59(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_59$sEN),
+		    .dPulse(sync_59$dPulse));
+
+  // submodule sync_6
+  SyncPulse sync_6(.sCLK(design_clk),
+		   .dCLK(S_AXI_ACLK),
+		   .sRST(design_rst),
+		   .sEN(sync_6$sEN),
+		   .dPulse(sync_6$dPulse));
+
+  // submodule sync_60
+  SyncPulse sync_60(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_60$sEN),
+		    .dPulse(sync_60$dPulse));
+
+  // submodule sync_61
+  SyncPulse sync_61(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_61$sEN),
+		    .dPulse(sync_61$dPulse));
+
+  // submodule sync_62
+  SyncPulse sync_62(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_62$sEN),
+		    .dPulse(sync_62$dPulse));
+
+  // submodule sync_63
+  SyncPulse sync_63(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_63$sEN),
+		    .dPulse(sync_63$dPulse));
+
+  // submodule sync_64
+  SyncPulse sync_64(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_64$sEN),
+		    .dPulse(sync_64$dPulse));
+
+  // submodule sync_65
+  SyncPulse sync_65(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_65$sEN),
+		    .dPulse(sync_65$dPulse));
+
+  // submodule sync_66
+  SyncPulse sync_66(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_66$sEN),
+		    .dPulse(sync_66$dPulse));
+
+  // submodule sync_67
+  SyncPulse sync_67(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_67$sEN),
+		    .dPulse(sync_67$dPulse));
+
+  // submodule sync_68
+  SyncPulse sync_68(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_68$sEN),
+		    .dPulse(sync_68$dPulse));
+
+  // submodule sync_69
+  SyncPulse sync_69(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_69$sEN),
+		    .dPulse(sync_69$dPulse));
+
+  // submodule sync_7
+  SyncPulse sync_7(.sCLK(design_clk),
+		   .dCLK(S_AXI_ACLK),
+		   .sRST(design_rst),
+		   .sEN(sync_7$sEN),
+		   .dPulse(sync_7$dPulse));
+
+  // submodule sync_70
+  SyncPulse sync_70(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_70$sEN),
+		    .dPulse(sync_70$dPulse));
+
+  // submodule sync_71
+  SyncPulse sync_71(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_71$sEN),
+		    .dPulse(sync_71$dPulse));
+
+  // submodule sync_72
+  SyncPulse sync_72(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_72$sEN),
+		    .dPulse(sync_72$dPulse));
+
+  // submodule sync_73
+  SyncPulse sync_73(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_73$sEN),
+		    .dPulse(sync_73$dPulse));
+
+  // submodule sync_74
+  SyncPulse sync_74(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_74$sEN),
+		    .dPulse(sync_74$dPulse));
+
+  // submodule sync_75
+  SyncPulse sync_75(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_75$sEN),
+		    .dPulse(sync_75$dPulse));
+
+  // submodule sync_76
+  SyncPulse sync_76(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_76$sEN),
+		    .dPulse(sync_76$dPulse));
+
+  // submodule sync_77
+  SyncPulse sync_77(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_77$sEN),
+		    .dPulse(sync_77$dPulse));
+
+  // submodule sync_78
+  SyncPulse sync_78(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_78$sEN),
+		    .dPulse(sync_78$dPulse));
+
+  // submodule sync_79
+  SyncPulse sync_79(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_79$sEN),
+		    .dPulse(sync_79$dPulse));
+
+  // submodule sync_8
+  SyncPulse sync_8(.sCLK(design_clk),
+		   .dCLK(S_AXI_ACLK),
+		   .sRST(design_rst),
+		   .sEN(sync_8$sEN),
+		   .dPulse(sync_8$dPulse));
+
+  // submodule sync_80
+  SyncPulse sync_80(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_80$sEN),
+		    .dPulse(sync_80$dPulse));
+
+  // submodule sync_81
+  SyncPulse sync_81(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_81$sEN),
+		    .dPulse(sync_81$dPulse));
+
+  // submodule sync_82
+  SyncPulse sync_82(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_82$sEN),
+		    .dPulse(sync_82$dPulse));
+
+  // submodule sync_83
+  SyncPulse sync_83(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_83$sEN),
+		    .dPulse(sync_83$dPulse));
+
+  // submodule sync_84
+  SyncPulse sync_84(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_84$sEN),
+		    .dPulse(sync_84$dPulse));
+
+  // submodule sync_85
+  SyncPulse sync_85(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_85$sEN),
+		    .dPulse(sync_85$dPulse));
+
+  // submodule sync_86
+  SyncPulse sync_86(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_86$sEN),
+		    .dPulse(sync_86$dPulse));
+
+  // submodule sync_87
+  SyncPulse sync_87(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_87$sEN),
+		    .dPulse(sync_87$dPulse));
+
+  // submodule sync_88
+  SyncPulse sync_88(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_88$sEN),
+		    .dPulse(sync_88$dPulse));
+
+  // submodule sync_89
+  SyncPulse sync_89(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_89$sEN),
+		    .dPulse(sync_89$dPulse));
+
+  // submodule sync_9
+  SyncPulse sync_9(.sCLK(design_clk),
+		   .dCLK(S_AXI_ACLK),
+		   .sRST(design_rst),
+		   .sEN(sync_9$sEN),
+		   .dPulse(sync_9$dPulse));
+
+  // submodule sync_90
+  SyncPulse sync_90(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_90$sEN),
+		    .dPulse(sync_90$dPulse));
+
+  // submodule sync_91
+  SyncPulse sync_91(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_91$sEN),
+		    .dPulse(sync_91$dPulse));
+
+  // submodule sync_92
+  SyncPulse sync_92(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_92$sEN),
+		    .dPulse(sync_92$dPulse));
+
+  // submodule sync_93
+  SyncPulse sync_93(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_93$sEN),
+		    .dPulse(sync_93$dPulse));
+
+  // submodule sync_94
+  SyncPulse sync_94(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_94$sEN),
+		    .dPulse(sync_94$dPulse));
+
+  // submodule sync_95
+  SyncPulse sync_95(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_95$sEN),
+		    .dPulse(sync_95$dPulse));
+
+  // submodule sync_96
+  SyncPulse sync_96(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_96$sEN),
+		    .dPulse(sync_96$dPulse));
+
+  // submodule sync_97
+  SyncPulse sync_97(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_97$sEN),
+		    .dPulse(sync_97$dPulse));
+
+  // submodule sync_98
+  SyncPulse sync_98(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_98$sEN),
+		    .dPulse(sync_98$dPulse));
+
+  // submodule sync_99
+  SyncPulse sync_99(.sCLK(design_clk),
+		    .dCLK(S_AXI_ACLK),
+		    .sRST(design_rst),
+		    .sEN(sync_99$sEN),
+		    .dPulse(sync_99$dPulse));
+
+  // rule RL_dropInvalidACK
+  assign WILL_FIRE_RL_dropInvalidACK =
+	     ackFIFO$EMPTY_N && ackFIFO$D_OUT >= 8'd4 ;
+
+  // rule RL_doAck
+  assign WILL_FIRE_RL_doAck = ackFIFO$EMPTY_N && ackFIFO$D_OUT == 8'd0 ;
+
+  // rule RL_doAck_1
+  assign WILL_FIRE_RL_doAck_1 = ackFIFO$EMPTY_N && ackFIFO$D_OUT == 8'd1 ;
+
+  // rule RL_doAck_2
+  assign WILL_FIRE_RL_doAck_2 = ackFIFO$EMPTY_N && ackFIFO$D_OUT == 8'd2 ;
+
+  // rule RL_doAck_3
+  assign WILL_FIRE_RL_doAck_3 = ackFIFO$EMPTY_N && ackFIFO$D_OUT == 8'd3 ;
+
+  // rule RL_s_config_axiReadSpecialIsHandled
+  assign WILL_FIRE_RL_s_config_axiReadSpecialIsHandled =
+	     s_config_readSlave_in$EMPTY_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8256 ;
+
+  // rule RL_s_config_axiReadSpecialIsHandled_1
+  assign WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_1 =
+	     s_config_readSlave_in$EMPTY_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8258 ;
+
+  // rule RL_s_config_axiReadSpecialIsHandled_2
+  assign WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2 =
+	     s_config_readSlave_in$EMPTY_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8265 ;
+
+  // rule RL_s_config_axiReadSpecialIsHandled_3
+  assign WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3 =
+	     s_config_readSlave_in$EMPTY_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8266 ;
+
+  // rule RL_s_config_axiReadSpecialIsHandled_4
+  assign WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 =
+	     s_config_readSlave_in$EMPTY_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8267 ;
+
+  // rule RL_s_config_axiReadSpecialIsHandled_5
+  assign WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5 =
+	     s_config_readSlave_in$EMPTY_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8268 ;
+
+  // rule RL_s_config_axiReadSpecial
+  assign WILL_FIRE_RL_s_config_axiReadSpecial =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8256 &&
+	     !s_config_readBusy ;
+
+  // rule RL_s_config_axiReadSpecial_1
+  assign WILL_FIRE_RL_s_config_axiReadSpecial_1 =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8258 &&
+	     !s_config_readBusy ;
+
+  // rule RL_s_config_axiReadSpecial_2
+  assign WILL_FIRE_RL_s_config_axiReadSpecial_2 =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8265 &&
+	     !s_config_readBusy ;
+
+  // rule RL_assert_design_interrupt
+  assign WILL_FIRE_RL_assert_design_interrupt =
+	     designGIER && host_is_ready_0$port1__read && !sh_active_4 &&
+	     !sh_wait_ack_4$port1__read ;
+
+  // rule RL_s_config_axiReadSpecial_3
+  assign WILL_FIRE_RL_s_config_axiReadSpecial_3 =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8266 &&
+	     !s_config_readBusy ;
+
+  // rule RL_assert_design_interrupt_1
+  assign WILL_FIRE_RL_assert_design_interrupt_1 =
+	     designGIER && host_is_ready_1$port1__read && !sh_active_5 &&
+	     !sh_wait_ack_5$port1__read ;
+
+  // rule RL_s_config_axiReadSpecial_4
+  assign WILL_FIRE_RL_s_config_axiReadSpecial_4 =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8267 &&
+	     !s_config_readBusy ;
+
+  // rule RL_assert_design_interrupt_2
+  assign WILL_FIRE_RL_assert_design_interrupt_2 =
+	     designGIER && host_is_ready_2$port1__read && !sh_active_6 &&
+	     !sh_wait_ack_6$port1__read ;
+
+  // rule RL_s_config_axiReadSpecial_5
+  assign WILL_FIRE_RL_s_config_axiReadSpecial_5 =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     s_config_readSlave_in$D_OUT[18:5] == 14'd8268 &&
+	     !s_config_readBusy ;
+
+  // rule RL_assert_design_interrupt_3
+  assign WILL_FIRE_RL_assert_design_interrupt_3 =
+	     designGIER && host_is_ready_3$port1__read && !sh_active_7 &&
+	     !sh_wait_ack_7$port1__read ;
+
+  // rule RL_s_config_axiReadFallback
+  assign WILL_FIRE_RL_s_config_axiReadFallback =
+	     s_config_readSlave_in$EMPTY_N && s_config_readSlave_out$FULL_N &&
+	     !s_config_readIsHandled$whas ;
+
+  // rule RL_s_config_1_axiWriteSpecialIsHandled
+  assign WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled =
+	     s_config_writeSlave_in$EMPTY_N &&
+	     s_config_writeSlave_in$D_OUT[54:41] == 14'd8257 ;
+
+  // rule RL_s_config_1_axiWriteSpecial
+  assign WILL_FIRE_RL_s_config_1_axiWriteSpecial =
+	     s_config_writeSlave_in$EMPTY_N &&
+	     s_config_writeSlave_out$FULL_N &&
+	     s_config_writeSlave_in$D_OUT[54:41] == 14'd8257 &&
+	     !s_config_writeBusy ;
+
+  // rule RL_s_config_1_axiWriteSpecialIsHandled_1
+  assign WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled_1 =
+	     s_config_writeSlave_in$EMPTY_N &&
+	     s_config_writeSlave_in$D_OUT[54:41] == 14'd8264 ;
+
+  // rule RL_s_config_1_axiWriteSpecial_1
+  assign WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 =
+	     s_config_writeSlave_in$EMPTY_N &&
+	     s_config_writeSlave_out$FULL_N &&
+	     ackFIFO$FULL_N &&
+	     s_config_writeSlave_in$D_OUT[54:41] == 14'd8264 &&
+	     !s_config_writeBusy ;
+
+  // rule RL_s_config_1_axiWriteFallback
+  assign WILL_FIRE_RL_s_config_1_axiWriteFallback =
+	     s_config_writeSlave_in$EMPTY_N &&
+	     s_config_writeSlave_out$FULL_N &&
+	     !s_config_writeIsHandled$whas &&
+	     !WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 &&
+	     !WILL_FIRE_RL_s_config_1_axiWriteSpecial ;
+
+  // inputs to muxes for submodule ports
+  assign MUX_s_config_readSlave_out$enq_1__VAL_1 = { id, 2'd0 } ;
+  assign MUX_s_config_readSlave_out$enq_1__VAL_2 = { completionReg, 2'd0 } ;
+  assign MUX_s_config_readSlave_out$enq_1__VAL_3 = { v__h30120, 2'd0 } ;
+  assign MUX_s_config_readSlave_out$enq_1__VAL_4 = { v__h40181, 2'd0 } ;
+  assign MUX_s_config_readSlave_out$enq_1__VAL_5 = { v__h46646, 2'd0 } ;
+  assign MUX_s_config_readSlave_out$enq_1__VAL_6 = { v__h53111, 2'd0 } ;
+
+  // inlined wires
+  assign s_config_readIsHandled$whas =
+	     WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_1 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecialIsHandled ;
+  assign s_config_writeIsHandled$whas =
+	     WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled_1 ||
+	     WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled ;
+  assign sh_active_0_1$whas =
+	     pending_interrupts_0$EMPTY_N && !sh_active_0 &&
+	     !sh_wait_ack_0$port1__read &&
+	     !host_pending_pcie_0$port1__read ;
+  assign sh_active_1_1$whas =
+	     pending_interrupts_1$EMPTY_N && !sh_active_1 &&
+	     !sh_wait_ack_1$port1__read &&
+	     !host_pending_pcie_1$port1__read ;
+  assign sh_active_2_1$whas =
+	     pending_interrupts_2$EMPTY_N && !sh_active_2 &&
+	     !sh_wait_ack_2$port1__read &&
+	     !host_pending_pcie_2$port1__read ;
+  assign sh_active_3_1$whas =
+	     pending_interrupts_3$EMPTY_N && !sh_active_3 &&
+	     !sh_wait_ack_3$port1__read &&
+	     !host_pending_pcie_3$port1__read ;
+  assign sh_active_4_1$whas =
+	     WILL_FIRE_RL_assert_design_interrupt &&
+	     (host_pending_design_0_port1__read__693_OR_host_ETC___d2218 ||
+	      host_pending_design_8_port1__read__725_OR_host_ETC___d2225 ||
+	      host_pending_design_16_port1__read__757_OR_hos_ETC___d2233 ||
+	      host_pending_design_24_port1__read__789_OR_hos_ETC___d2240) ;
+  assign sh_active_5_1$whas =
+	     WILL_FIRE_RL_assert_design_interrupt_1 &&
+	     (host_pending_design_32_port1__read__821_OR_hos_ETC___d2257 ||
+	      host_pending_design_40_port1__read__853_OR_hos_ETC___d2264 ||
+	      host_pending_design_48_port1__read__885_OR_hos_ETC___d2272 ||
+	      host_pending_design_56_port1__read__917_OR_hos_ETC___d2279) ;
+  assign sh_active_6_1$whas =
+	     WILL_FIRE_RL_assert_design_interrupt_2 &&
+	     (host_pending_design_64_port1__read__949_OR_hos_ETC___d2296 ||
+	      host_pending_design_72_port1__read__981_OR_hos_ETC___d2303 ||
+	      host_pending_design_80_port1__read__013_OR_hos_ETC___d2311 ||
+	      host_pending_design_88_port1__read__045_OR_hos_ETC___d2318) ;
+  assign sh_active_7_1$whas =
+	     WILL_FIRE_RL_assert_design_interrupt_3 &&
+	     (host_pending_design_96_port1__read__077_OR_hos_ETC___d2335 ||
+	      host_pending_design_104_port1__read__109_OR_ho_ETC___d2342 ||
+	      host_pending_design_112_port1__read__141_OR_ho_ETC___d2350 ||
+	      host_pending_design_120_port1__read__173_OR_ho_ETC___d2357) ;
+  assign host_pending_pcie_0$port1__read =
+	     !WILL_FIRE_RL_doAck && host_pending_pcie_0 ;
+  assign host_pending_pcie_0$EN_port1__write =
+	     pending_interrupts_0$EMPTY_N && !sh_active_0 &&
+	     !sh_wait_ack_0$port1__read &&
+	     !host_pending_pcie_0$port1__read ;
+  assign host_pending_pcie_0$port2__read =
+	     host_pending_pcie_0$EN_port1__write ||
+	     host_pending_pcie_0$port1__read ;
+  assign host_pending_pcie_1$port1__read =
+	     !WILL_FIRE_RL_doAck_1 && host_pending_pcie_1 ;
+  assign host_pending_pcie_1$EN_port1__write =
+	     pending_interrupts_1$EMPTY_N && !sh_active_1 &&
+	     !sh_wait_ack_1$port1__read &&
+	     !host_pending_pcie_1$port1__read ;
+  assign host_pending_pcie_1$port2__read =
+	     host_pending_pcie_1$EN_port1__write ||
+	     host_pending_pcie_1$port1__read ;
+  assign host_pending_pcie_2$port1__read =
+	     !WILL_FIRE_RL_doAck_2 && host_pending_pcie_2 ;
+  assign host_pending_pcie_2$EN_port1__write =
+	     pending_interrupts_2$EMPTY_N && !sh_active_2 &&
+	     !sh_wait_ack_2$port1__read &&
+	     !host_pending_pcie_2$port1__read ;
+  assign host_pending_pcie_2$port2__read =
+	     host_pending_pcie_2$EN_port1__write ||
+	     host_pending_pcie_2$port1__read ;
+  assign host_pending_pcie_3$port1__read =
+	     !WILL_FIRE_RL_doAck_3 && host_pending_pcie_3 ;
+  assign host_pending_pcie_3$EN_port1__write =
+	     pending_interrupts_3$EMPTY_N && !sh_active_3 &&
+	     !sh_wait_ack_3$port1__read &&
+	     !host_pending_pcie_3$port1__read ;
+  assign host_pending_pcie_3$port2__read =
+	     host_pending_pcie_3$EN_port1__write ||
+	     host_pending_pcie_3$port1__read ;
+  assign host_pending_design_0$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_0 ;
+  assign host_pending_design_0$EN_port1__write =
+	     pending_interrupts_4$EMPTY_N &&
+	     !host_pending_design_0$port1__read ;
+  assign host_pending_design_0$port2__read =
+	     host_pending_design_0$EN_port1__write ||
+	     host_pending_design_0$port1__read ;
+  assign host_pending_design_1$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_1 ;
+  assign host_pending_design_1$EN_port1__write =
+	     pending_interrupts_5$EMPTY_N &&
+	     !host_pending_design_1$port1__read ;
+  assign host_pending_design_1$port2__read =
+	     host_pending_design_1$EN_port1__write ||
+	     host_pending_design_1$port1__read ;
+  assign host_pending_design_2$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_2 ;
+  assign host_pending_design_2$EN_port1__write =
+	     pending_interrupts_6$EMPTY_N &&
+	     !host_pending_design_2$port1__read ;
+  assign host_pending_design_2$port2__read =
+	     host_pending_design_2$EN_port1__write ||
+	     host_pending_design_2$port1__read ;
+  assign host_pending_design_3$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_3 ;
+  assign host_pending_design_3$EN_port1__write =
+	     pending_interrupts_7$EMPTY_N &&
+	     !host_pending_design_3$port1__read ;
+  assign host_pending_design_3$port2__read =
+	     host_pending_design_3$EN_port1__write ||
+	     host_pending_design_3$port1__read ;
+  assign host_pending_design_4$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_4 ;
+  assign host_pending_design_4$EN_port1__write =
+	     pending_interrupts_8$EMPTY_N &&
+	     !host_pending_design_4$port1__read ;
+  assign host_pending_design_4$port2__read =
+	     host_pending_design_4$EN_port1__write ||
+	     host_pending_design_4$port1__read ;
+  assign host_pending_design_5$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_5 ;
+  assign host_pending_design_5$EN_port1__write =
+	     pending_interrupts_9$EMPTY_N &&
+	     !host_pending_design_5$port1__read ;
+  assign host_pending_design_5$port2__read =
+	     host_pending_design_5$EN_port1__write ||
+	     host_pending_design_5$port1__read ;
+  assign host_pending_design_6$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_6 ;
+  assign host_pending_design_6$EN_port1__write =
+	     pending_interrupts_10$EMPTY_N &&
+	     !host_pending_design_6$port1__read ;
+  assign host_pending_design_6$port2__read =
+	     host_pending_design_6$EN_port1__write ||
+	     host_pending_design_6$port1__read ;
+  assign host_pending_design_7$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_7 ;
+  assign host_pending_design_7$EN_port1__write =
+	     pending_interrupts_11$EMPTY_N &&
+	     !host_pending_design_7$port1__read ;
+  assign host_pending_design_7$port2__read =
+	     host_pending_design_7$EN_port1__write ||
+	     host_pending_design_7$port1__read ;
+  assign host_pending_design_8$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_8 ;
+  assign host_pending_design_8$EN_port1__write =
+	     pending_interrupts_12$EMPTY_N &&
+	     !host_pending_design_8$port1__read ;
+  assign host_pending_design_8$port2__read =
+	     host_pending_design_8$EN_port1__write ||
+	     host_pending_design_8$port1__read ;
+  assign host_pending_design_9$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_9 ;
+  assign host_pending_design_9$EN_port1__write =
+	     pending_interrupts_13$EMPTY_N &&
+	     !host_pending_design_9$port1__read ;
+  assign host_pending_design_9$port2__read =
+	     host_pending_design_9$EN_port1__write ||
+	     host_pending_design_9$port1__read ;
+  assign host_pending_design_10$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_10 ;
+  assign host_pending_design_10$EN_port1__write =
+	     pending_interrupts_14$EMPTY_N &&
+	     !host_pending_design_10$port1__read ;
+  assign host_pending_design_10$port2__read =
+	     host_pending_design_10$EN_port1__write ||
+	     host_pending_design_10$port1__read ;
+  assign host_pending_design_11$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_11 ;
+  assign host_pending_design_11$EN_port1__write =
+	     pending_interrupts_15$EMPTY_N &&
+	     !host_pending_design_11$port1__read ;
+  assign host_pending_design_11$port2__read =
+	     host_pending_design_11$EN_port1__write ||
+	     host_pending_design_11$port1__read ;
+  assign host_pending_design_12$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_12 ;
+  assign host_pending_design_12$EN_port1__write =
+	     pending_interrupts_16$EMPTY_N &&
+	     !host_pending_design_12$port1__read ;
+  assign host_pending_design_12$port2__read =
+	     host_pending_design_12$EN_port1__write ||
+	     host_pending_design_12$port1__read ;
+  assign host_pending_design_13$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_13 ;
+  assign host_pending_design_13$EN_port1__write =
+	     pending_interrupts_17$EMPTY_N &&
+	     !host_pending_design_13$port1__read ;
+  assign host_pending_design_13$port2__read =
+	     host_pending_design_13$EN_port1__write ||
+	     host_pending_design_13$port1__read ;
+  assign host_pending_design_14$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_14 ;
+  assign host_pending_design_14$EN_port1__write =
+	     pending_interrupts_18$EMPTY_N &&
+	     !host_pending_design_14$port1__read ;
+  assign host_pending_design_14$port2__read =
+	     host_pending_design_14$EN_port1__write ||
+	     host_pending_design_14$port1__read ;
+  assign host_pending_design_15$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_15 ;
+  assign host_pending_design_15$EN_port1__write =
+	     pending_interrupts_19$EMPTY_N &&
+	     !host_pending_design_15$port1__read ;
+  assign host_pending_design_15$port2__read =
+	     host_pending_design_15$EN_port1__write ||
+	     host_pending_design_15$port1__read ;
+  assign host_pending_design_16$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_16 ;
+  assign host_pending_design_16$EN_port1__write =
+	     pending_interrupts_20$EMPTY_N &&
+	     !host_pending_design_16$port1__read ;
+  assign host_pending_design_16$port2__read =
+	     host_pending_design_16$EN_port1__write ||
+	     host_pending_design_16$port1__read ;
+  assign host_pending_design_17$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_17 ;
+  assign host_pending_design_17$EN_port1__write =
+	     pending_interrupts_21$EMPTY_N &&
+	     !host_pending_design_17$port1__read ;
+  assign host_pending_design_17$port2__read =
+	     host_pending_design_17$EN_port1__write ||
+	     host_pending_design_17$port1__read ;
+  assign host_pending_design_18$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_18 ;
+  assign host_pending_design_18$EN_port1__write =
+	     pending_interrupts_22$EMPTY_N &&
+	     !host_pending_design_18$port1__read ;
+  assign host_pending_design_18$port2__read =
+	     host_pending_design_18$EN_port1__write ||
+	     host_pending_design_18$port1__read ;
+  assign host_pending_design_19$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_19 ;
+  assign host_pending_design_19$EN_port1__write =
+	     pending_interrupts_23$EMPTY_N &&
+	     !host_pending_design_19$port1__read ;
+  assign host_pending_design_19$port2__read =
+	     host_pending_design_19$EN_port1__write ||
+	     host_pending_design_19$port1__read ;
+  assign host_pending_design_20$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_20 ;
+  assign host_pending_design_20$EN_port1__write =
+	     pending_interrupts_24$EMPTY_N &&
+	     !host_pending_design_20$port1__read ;
+  assign host_pending_design_20$port2__read =
+	     host_pending_design_20$EN_port1__write ||
+	     host_pending_design_20$port1__read ;
+  assign host_pending_design_21$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_21 ;
+  assign host_pending_design_21$EN_port1__write =
+	     pending_interrupts_25$EMPTY_N &&
+	     !host_pending_design_21$port1__read ;
+  assign host_pending_design_21$port2__read =
+	     host_pending_design_21$EN_port1__write ||
+	     host_pending_design_21$port1__read ;
+  assign host_pending_design_22$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_22 ;
+  assign host_pending_design_22$EN_port1__write =
+	     pending_interrupts_26$EMPTY_N &&
+	     !host_pending_design_22$port1__read ;
+  assign host_pending_design_22$port2__read =
+	     host_pending_design_22$EN_port1__write ||
+	     host_pending_design_22$port1__read ;
+  assign host_pending_design_23$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_23 ;
+  assign host_pending_design_23$EN_port1__write =
+	     pending_interrupts_27$EMPTY_N &&
+	     !host_pending_design_23$port1__read ;
+  assign host_pending_design_23$port2__read =
+	     host_pending_design_23$EN_port1__write ||
+	     host_pending_design_23$port1__read ;
+  assign host_pending_design_24$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_24 ;
+  assign host_pending_design_24$EN_port1__write =
+	     pending_interrupts_28$EMPTY_N &&
+	     !host_pending_design_24$port1__read ;
+  assign host_pending_design_24$port2__read =
+	     host_pending_design_24$EN_port1__write ||
+	     host_pending_design_24$port1__read ;
+  assign host_pending_design_25$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_25 ;
+  assign host_pending_design_25$EN_port1__write =
+	     pending_interrupts_29$EMPTY_N &&
+	     !host_pending_design_25$port1__read ;
+  assign host_pending_design_25$port2__read =
+	     host_pending_design_25$EN_port1__write ||
+	     host_pending_design_25$port1__read ;
+  assign host_pending_design_26$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_26 ;
+  assign host_pending_design_26$EN_port1__write =
+	     pending_interrupts_30$EMPTY_N &&
+	     !host_pending_design_26$port1__read ;
+  assign host_pending_design_26$port2__read =
+	     host_pending_design_26$EN_port1__write ||
+	     host_pending_design_26$port1__read ;
+  assign host_pending_design_27$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_27 ;
+  assign host_pending_design_27$EN_port1__write =
+	     pending_interrupts_31$EMPTY_N &&
+	     !host_pending_design_27$port1__read ;
+  assign host_pending_design_27$port2__read =
+	     host_pending_design_27$EN_port1__write ||
+	     host_pending_design_27$port1__read ;
+  assign host_pending_design_28$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_28 ;
+  assign host_pending_design_28$EN_port1__write =
+	     pending_interrupts_32$EMPTY_N &&
+	     !host_pending_design_28$port1__read ;
+  assign host_pending_design_28$port2__read =
+	     host_pending_design_28$EN_port1__write ||
+	     host_pending_design_28$port1__read ;
+  assign host_pending_design_29$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_29 ;
+  assign host_pending_design_29$EN_port1__write =
+	     pending_interrupts_33$EMPTY_N &&
+	     !host_pending_design_29$port1__read ;
+  assign host_pending_design_29$port2__read =
+	     host_pending_design_29$EN_port1__write ||
+	     host_pending_design_29$port1__read ;
+  assign host_pending_design_30$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_30 ;
+  assign host_pending_design_30$EN_port1__write =
+	     pending_interrupts_34$EMPTY_N &&
+	     !host_pending_design_30$port1__read ;
+  assign host_pending_design_30$port2__read =
+	     host_pending_design_30$EN_port1__write ||
+	     host_pending_design_30$port1__read ;
+  assign host_pending_design_31$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_2 &&
+	     host_pending_design_31 ;
+  assign host_pending_design_31$EN_port1__write =
+	     pending_interrupts_35$EMPTY_N &&
+	     !host_pending_design_31$port1__read ;
+  assign host_pending_design_31$port2__read =
+	     host_pending_design_31$EN_port1__write ||
+	     host_pending_design_31$port1__read ;
+  assign host_pending_design_32$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_32 ;
+  assign host_pending_design_32$EN_port1__write =
+	     pending_interrupts_36$EMPTY_N &&
+	     !host_pending_design_32$port1__read ;
+  assign host_pending_design_32$port2__read =
+	     host_pending_design_32$EN_port1__write ||
+	     host_pending_design_32$port1__read ;
+  assign host_pending_design_33$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_33 ;
+  assign host_pending_design_33$EN_port1__write =
+	     pending_interrupts_37$EMPTY_N &&
+	     !host_pending_design_33$port1__read ;
+  assign host_pending_design_33$port2__read =
+	     host_pending_design_33$EN_port1__write ||
+	     host_pending_design_33$port1__read ;
+  assign host_pending_design_34$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_34 ;
+  assign host_pending_design_34$EN_port1__write =
+	     pending_interrupts_38$EMPTY_N &&
+	     !host_pending_design_34$port1__read ;
+  assign host_pending_design_34$port2__read =
+	     host_pending_design_34$EN_port1__write ||
+	     host_pending_design_34$port1__read ;
+  assign host_pending_design_35$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_35 ;
+  assign host_pending_design_35$EN_port1__write =
+	     pending_interrupts_39$EMPTY_N &&
+	     !host_pending_design_35$port1__read ;
+  assign host_pending_design_35$port2__read =
+	     host_pending_design_35$EN_port1__write ||
+	     host_pending_design_35$port1__read ;
+  assign host_pending_design_36$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_36 ;
+  assign host_pending_design_36$EN_port1__write =
+	     pending_interrupts_40$EMPTY_N &&
+	     !host_pending_design_36$port1__read ;
+  assign host_pending_design_36$port2__read =
+	     host_pending_design_36$EN_port1__write ||
+	     host_pending_design_36$port1__read ;
+  assign host_pending_design_37$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_37 ;
+  assign host_pending_design_37$EN_port1__write =
+	     pending_interrupts_41$EMPTY_N &&
+	     !host_pending_design_37$port1__read ;
+  assign host_pending_design_37$port2__read =
+	     host_pending_design_37$EN_port1__write ||
+	     host_pending_design_37$port1__read ;
+  assign host_pending_design_38$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_38 ;
+  assign host_pending_design_38$EN_port1__write =
+	     pending_interrupts_42$EMPTY_N &&
+	     !host_pending_design_38$port1__read ;
+  assign host_pending_design_38$port2__read =
+	     host_pending_design_38$EN_port1__write ||
+	     host_pending_design_38$port1__read ;
+  assign host_pending_design_39$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_39 ;
+  assign host_pending_design_39$EN_port1__write =
+	     pending_interrupts_43$EMPTY_N &&
+	     !host_pending_design_39$port1__read ;
+  assign host_pending_design_39$port2__read =
+	     host_pending_design_39$EN_port1__write ||
+	     host_pending_design_39$port1__read ;
+  assign host_pending_design_40$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_40 ;
+  assign host_pending_design_40$EN_port1__write =
+	     pending_interrupts_44$EMPTY_N &&
+	     !host_pending_design_40$port1__read ;
+  assign host_pending_design_40$port2__read =
+	     host_pending_design_40$EN_port1__write ||
+	     host_pending_design_40$port1__read ;
+  assign host_pending_design_41$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_41 ;
+  assign host_pending_design_41$EN_port1__write =
+	     pending_interrupts_45$EMPTY_N &&
+	     !host_pending_design_41$port1__read ;
+  assign host_pending_design_41$port2__read =
+	     host_pending_design_41$EN_port1__write ||
+	     host_pending_design_41$port1__read ;
+  assign host_pending_design_42$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_42 ;
+  assign host_pending_design_42$EN_port1__write =
+	     pending_interrupts_46$EMPTY_N &&
+	     !host_pending_design_42$port1__read ;
+  assign host_pending_design_42$port2__read =
+	     host_pending_design_42$EN_port1__write ||
+	     host_pending_design_42$port1__read ;
+  assign host_pending_design_43$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_43 ;
+  assign host_pending_design_43$EN_port1__write =
+	     pending_interrupts_47$EMPTY_N &&
+	     !host_pending_design_43$port1__read ;
+  assign host_pending_design_43$port2__read =
+	     host_pending_design_43$EN_port1__write ||
+	     host_pending_design_43$port1__read ;
+  assign host_pending_design_44$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_44 ;
+  assign host_pending_design_44$EN_port1__write =
+	     pending_interrupts_48$EMPTY_N &&
+	     !host_pending_design_44$port1__read ;
+  assign host_pending_design_44$port2__read =
+	     host_pending_design_44$EN_port1__write ||
+	     host_pending_design_44$port1__read ;
+  assign host_pending_design_45$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_45 ;
+  assign host_pending_design_45$EN_port1__write =
+	     pending_interrupts_49$EMPTY_N &&
+	     !host_pending_design_45$port1__read ;
+  assign host_pending_design_45$port2__read =
+	     host_pending_design_45$EN_port1__write ||
+	     host_pending_design_45$port1__read ;
+  assign host_pending_design_46$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_46 ;
+  assign host_pending_design_46$EN_port1__write =
+	     pending_interrupts_50$EMPTY_N &&
+	     !host_pending_design_46$port1__read ;
+  assign host_pending_design_46$port2__read =
+	     host_pending_design_46$EN_port1__write ||
+	     host_pending_design_46$port1__read ;
+  assign host_pending_design_47$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_47 ;
+  assign host_pending_design_47$EN_port1__write =
+	     pending_interrupts_51$EMPTY_N &&
+	     !host_pending_design_47$port1__read ;
+  assign host_pending_design_47$port2__read =
+	     host_pending_design_47$EN_port1__write ||
+	     host_pending_design_47$port1__read ;
+  assign host_pending_design_48$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_48 ;
+  assign host_pending_design_48$EN_port1__write =
+	     pending_interrupts_52$EMPTY_N &&
+	     !host_pending_design_48$port1__read ;
+  assign host_pending_design_48$port2__read =
+	     host_pending_design_48$EN_port1__write ||
+	     host_pending_design_48$port1__read ;
+  assign host_pending_design_49$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_49 ;
+  assign host_pending_design_49$EN_port1__write =
+	     pending_interrupts_53$EMPTY_N &&
+	     !host_pending_design_49$port1__read ;
+  assign host_pending_design_49$port2__read =
+	     host_pending_design_49$EN_port1__write ||
+	     host_pending_design_49$port1__read ;
+  assign host_pending_design_50$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_50 ;
+  assign host_pending_design_50$EN_port1__write =
+	     pending_interrupts_54$EMPTY_N &&
+	     !host_pending_design_50$port1__read ;
+  assign host_pending_design_50$port2__read =
+	     host_pending_design_50$EN_port1__write ||
+	     host_pending_design_50$port1__read ;
+  assign host_pending_design_51$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_51 ;
+  assign host_pending_design_51$EN_port1__write =
+	     pending_interrupts_55$EMPTY_N &&
+	     !host_pending_design_51$port1__read ;
+  assign host_pending_design_51$port2__read =
+	     host_pending_design_51$EN_port1__write ||
+	     host_pending_design_51$port1__read ;
+  assign host_pending_design_52$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_52 ;
+  assign host_pending_design_52$EN_port1__write =
+	     pending_interrupts_56$EMPTY_N &&
+	     !host_pending_design_52$port1__read ;
+  assign host_pending_design_52$port2__read =
+	     host_pending_design_52$EN_port1__write ||
+	     host_pending_design_52$port1__read ;
+  assign host_pending_design_53$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_53 ;
+  assign host_pending_design_53$EN_port1__write =
+	     pending_interrupts_57$EMPTY_N &&
+	     !host_pending_design_53$port1__read ;
+  assign host_pending_design_53$port2__read =
+	     host_pending_design_53$EN_port1__write ||
+	     host_pending_design_53$port1__read ;
+  assign host_pending_design_54$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_54 ;
+  assign host_pending_design_54$EN_port1__write =
+	     pending_interrupts_58$EMPTY_N &&
+	     !host_pending_design_54$port1__read ;
+  assign host_pending_design_54$port2__read =
+	     host_pending_design_54$EN_port1__write ||
+	     host_pending_design_54$port1__read ;
+  assign host_pending_design_55$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_55 ;
+  assign host_pending_design_55$EN_port1__write =
+	     pending_interrupts_59$EMPTY_N &&
+	     !host_pending_design_55$port1__read ;
+  assign host_pending_design_55$port2__read =
+	     host_pending_design_55$EN_port1__write ||
+	     host_pending_design_55$port1__read ;
+  assign host_pending_design_56$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_56 ;
+  assign host_pending_design_56$EN_port1__write =
+	     pending_interrupts_60$EMPTY_N &&
+	     !host_pending_design_56$port1__read ;
+  assign host_pending_design_56$port2__read =
+	     host_pending_design_56$EN_port1__write ||
+	     host_pending_design_56$port1__read ;
+  assign host_pending_design_57$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_57 ;
+  assign host_pending_design_57$EN_port1__write =
+	     pending_interrupts_61$EMPTY_N &&
+	     !host_pending_design_57$port1__read ;
+  assign host_pending_design_57$port2__read =
+	     host_pending_design_57$EN_port1__write ||
+	     host_pending_design_57$port1__read ;
+  assign host_pending_design_58$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_58 ;
+  assign host_pending_design_58$EN_port1__write =
+	     pending_interrupts_62$EMPTY_N &&
+	     !host_pending_design_58$port1__read ;
+  assign host_pending_design_58$port2__read =
+	     host_pending_design_58$EN_port1__write ||
+	     host_pending_design_58$port1__read ;
+  assign host_pending_design_59$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_59 ;
+  assign host_pending_design_59$EN_port1__write =
+	     pending_interrupts_63$EMPTY_N &&
+	     !host_pending_design_59$port1__read ;
+  assign host_pending_design_59$port2__read =
+	     host_pending_design_59$EN_port1__write ||
+	     host_pending_design_59$port1__read ;
+  assign host_pending_design_60$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_60 ;
+  assign host_pending_design_60$EN_port1__write =
+	     pending_interrupts_64$EMPTY_N &&
+	     !host_pending_design_60$port1__read ;
+  assign host_pending_design_60$port2__read =
+	     host_pending_design_60$EN_port1__write ||
+	     host_pending_design_60$port1__read ;
+  assign host_pending_design_61$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_61 ;
+  assign host_pending_design_61$EN_port1__write =
+	     pending_interrupts_65$EMPTY_N &&
+	     !host_pending_design_61$port1__read ;
+  assign host_pending_design_61$port2__read =
+	     host_pending_design_61$EN_port1__write ||
+	     host_pending_design_61$port1__read ;
+  assign host_pending_design_62$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_62 ;
+  assign host_pending_design_62$EN_port1__write =
+	     pending_interrupts_66$EMPTY_N &&
+	     !host_pending_design_62$port1__read ;
+  assign host_pending_design_62$port2__read =
+	     host_pending_design_62$EN_port1__write ||
+	     host_pending_design_62$port1__read ;
+  assign host_pending_design_63$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_3 &&
+	     host_pending_design_63 ;
+  assign host_pending_design_63$EN_port1__write =
+	     pending_interrupts_67$EMPTY_N &&
+	     !host_pending_design_63$port1__read ;
+  assign host_pending_design_63$port2__read =
+	     host_pending_design_63$EN_port1__write ||
+	     host_pending_design_63$port1__read ;
+  assign host_pending_design_64$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_64 ;
+  assign host_pending_design_64$EN_port1__write =
+	     pending_interrupts_68$EMPTY_N &&
+	     !host_pending_design_64$port1__read ;
+  assign host_pending_design_64$port2__read =
+	     host_pending_design_64$EN_port1__write ||
+	     host_pending_design_64$port1__read ;
+  assign host_pending_design_65$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_65 ;
+  assign host_pending_design_65$EN_port1__write =
+	     pending_interrupts_69$EMPTY_N &&
+	     !host_pending_design_65$port1__read ;
+  assign host_pending_design_65$port2__read =
+	     host_pending_design_65$EN_port1__write ||
+	     host_pending_design_65$port1__read ;
+  assign host_pending_design_66$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_66 ;
+  assign host_pending_design_66$EN_port1__write =
+	     pending_interrupts_70$EMPTY_N &&
+	     !host_pending_design_66$port1__read ;
+  assign host_pending_design_66$port2__read =
+	     host_pending_design_66$EN_port1__write ||
+	     host_pending_design_66$port1__read ;
+  assign host_pending_design_67$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_67 ;
+  assign host_pending_design_67$EN_port1__write =
+	     pending_interrupts_71$EMPTY_N &&
+	     !host_pending_design_67$port1__read ;
+  assign host_pending_design_67$port2__read =
+	     host_pending_design_67$EN_port1__write ||
+	     host_pending_design_67$port1__read ;
+  assign host_pending_design_68$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_68 ;
+  assign host_pending_design_68$EN_port1__write =
+	     pending_interrupts_72$EMPTY_N &&
+	     !host_pending_design_68$port1__read ;
+  assign host_pending_design_68$port2__read =
+	     host_pending_design_68$EN_port1__write ||
+	     host_pending_design_68$port1__read ;
+  assign host_pending_design_69$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_69 ;
+  assign host_pending_design_69$EN_port1__write =
+	     pending_interrupts_73$EMPTY_N &&
+	     !host_pending_design_69$port1__read ;
+  assign host_pending_design_69$port2__read =
+	     host_pending_design_69$EN_port1__write ||
+	     host_pending_design_69$port1__read ;
+  assign host_pending_design_70$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_70 ;
+  assign host_pending_design_70$EN_port1__write =
+	     pending_interrupts_74$EMPTY_N &&
+	     !host_pending_design_70$port1__read ;
+  assign host_pending_design_70$port2__read =
+	     host_pending_design_70$EN_port1__write ||
+	     host_pending_design_70$port1__read ;
+  assign host_pending_design_71$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_71 ;
+  assign host_pending_design_71$EN_port1__write =
+	     pending_interrupts_75$EMPTY_N &&
+	     !host_pending_design_71$port1__read ;
+  assign host_pending_design_71$port2__read =
+	     host_pending_design_71$EN_port1__write ||
+	     host_pending_design_71$port1__read ;
+  assign host_pending_design_72$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_72 ;
+  assign host_pending_design_72$EN_port1__write =
+	     pending_interrupts_76$EMPTY_N &&
+	     !host_pending_design_72$port1__read ;
+  assign host_pending_design_72$port2__read =
+	     host_pending_design_72$EN_port1__write ||
+	     host_pending_design_72$port1__read ;
+  assign host_pending_design_73$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_73 ;
+  assign host_pending_design_73$EN_port1__write =
+	     pending_interrupts_77$EMPTY_N &&
+	     !host_pending_design_73$port1__read ;
+  assign host_pending_design_73$port2__read =
+	     host_pending_design_73$EN_port1__write ||
+	     host_pending_design_73$port1__read ;
+  assign host_pending_design_74$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_74 ;
+  assign host_pending_design_74$EN_port1__write =
+	     pending_interrupts_78$EMPTY_N &&
+	     !host_pending_design_74$port1__read ;
+  assign host_pending_design_74$port2__read =
+	     host_pending_design_74$EN_port1__write ||
+	     host_pending_design_74$port1__read ;
+  assign host_pending_design_75$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_75 ;
+  assign host_pending_design_75$EN_port1__write =
+	     pending_interrupts_79$EMPTY_N &&
+	     !host_pending_design_75$port1__read ;
+  assign host_pending_design_75$port2__read =
+	     host_pending_design_75$EN_port1__write ||
+	     host_pending_design_75$port1__read ;
+  assign host_pending_design_76$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_76 ;
+  assign host_pending_design_76$EN_port1__write =
+	     pending_interrupts_80$EMPTY_N &&
+	     !host_pending_design_76$port1__read ;
+  assign host_pending_design_76$port2__read =
+	     host_pending_design_76$EN_port1__write ||
+	     host_pending_design_76$port1__read ;
+  assign host_pending_design_77$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_77 ;
+  assign host_pending_design_77$EN_port1__write =
+	     pending_interrupts_81$EMPTY_N &&
+	     !host_pending_design_77$port1__read ;
+  assign host_pending_design_77$port2__read =
+	     host_pending_design_77$EN_port1__write ||
+	     host_pending_design_77$port1__read ;
+  assign host_pending_design_78$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_78 ;
+  assign host_pending_design_78$EN_port1__write =
+	     pending_interrupts_82$EMPTY_N &&
+	     !host_pending_design_78$port1__read ;
+  assign host_pending_design_78$port2__read =
+	     host_pending_design_78$EN_port1__write ||
+	     host_pending_design_78$port1__read ;
+  assign host_pending_design_79$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_79 ;
+  assign host_pending_design_79$EN_port1__write =
+	     pending_interrupts_83$EMPTY_N &&
+	     !host_pending_design_79$port1__read ;
+  assign host_pending_design_79$port2__read =
+	     host_pending_design_79$EN_port1__write ||
+	     host_pending_design_79$port1__read ;
+  assign host_pending_design_80$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_80 ;
+  assign host_pending_design_80$EN_port1__write =
+	     pending_interrupts_84$EMPTY_N &&
+	     !host_pending_design_80$port1__read ;
+  assign host_pending_design_80$port2__read =
+	     host_pending_design_80$EN_port1__write ||
+	     host_pending_design_80$port1__read ;
+  assign host_pending_design_81$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_81 ;
+  assign host_pending_design_81$EN_port1__write =
+	     pending_interrupts_85$EMPTY_N &&
+	     !host_pending_design_81$port1__read ;
+  assign host_pending_design_81$port2__read =
+	     host_pending_design_81$EN_port1__write ||
+	     host_pending_design_81$port1__read ;
+  assign host_pending_design_82$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_82 ;
+  assign host_pending_design_82$EN_port1__write =
+	     pending_interrupts_86$EMPTY_N &&
+	     !host_pending_design_82$port1__read ;
+  assign host_pending_design_82$port2__read =
+	     host_pending_design_82$EN_port1__write ||
+	     host_pending_design_82$port1__read ;
+  assign host_pending_design_83$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_83 ;
+  assign host_pending_design_83$EN_port1__write =
+	     pending_interrupts_87$EMPTY_N &&
+	     !host_pending_design_83$port1__read ;
+  assign host_pending_design_83$port2__read =
+	     host_pending_design_83$EN_port1__write ||
+	     host_pending_design_83$port1__read ;
+  assign host_pending_design_84$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_84 ;
+  assign host_pending_design_84$EN_port1__write =
+	     pending_interrupts_88$EMPTY_N &&
+	     !host_pending_design_84$port1__read ;
+  assign host_pending_design_84$port2__read =
+	     host_pending_design_84$EN_port1__write ||
+	     host_pending_design_84$port1__read ;
+  assign host_pending_design_85$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_85 ;
+  assign host_pending_design_85$EN_port1__write =
+	     pending_interrupts_89$EMPTY_N &&
+	     !host_pending_design_85$port1__read ;
+  assign host_pending_design_85$port2__read =
+	     host_pending_design_85$EN_port1__write ||
+	     host_pending_design_85$port1__read ;
+  assign host_pending_design_86$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_86 ;
+  assign host_pending_design_86$EN_port1__write =
+	     pending_interrupts_90$EMPTY_N &&
+	     !host_pending_design_86$port1__read ;
+  assign host_pending_design_86$port2__read =
+	     host_pending_design_86$EN_port1__write ||
+	     host_pending_design_86$port1__read ;
+  assign host_pending_design_87$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_87 ;
+  assign host_pending_design_87$EN_port1__write =
+	     pending_interrupts_91$EMPTY_N &&
+	     !host_pending_design_87$port1__read ;
+  assign host_pending_design_87$port2__read =
+	     host_pending_design_87$EN_port1__write ||
+	     host_pending_design_87$port1__read ;
+  assign host_pending_design_88$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_88 ;
+  assign host_pending_design_88$EN_port1__write =
+	     pending_interrupts_92$EMPTY_N &&
+	     !host_pending_design_88$port1__read ;
+  assign host_pending_design_88$port2__read =
+	     host_pending_design_88$EN_port1__write ||
+	     host_pending_design_88$port1__read ;
+  assign host_pending_design_89$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_89 ;
+  assign host_pending_design_89$EN_port1__write =
+	     pending_interrupts_93$EMPTY_N &&
+	     !host_pending_design_89$port1__read ;
+  assign host_pending_design_89$port2__read =
+	     host_pending_design_89$EN_port1__write ||
+	     host_pending_design_89$port1__read ;
+  assign host_pending_design_90$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_90 ;
+  assign host_pending_design_90$EN_port1__write =
+	     pending_interrupts_94$EMPTY_N &&
+	     !host_pending_design_90$port1__read ;
+  assign host_pending_design_90$port2__read =
+	     host_pending_design_90$EN_port1__write ||
+	     host_pending_design_90$port1__read ;
+  assign host_pending_design_91$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_91 ;
+  assign host_pending_design_91$EN_port1__write =
+	     pending_interrupts_95$EMPTY_N &&
+	     !host_pending_design_91$port1__read ;
+  assign host_pending_design_91$port2__read =
+	     host_pending_design_91$EN_port1__write ||
+	     host_pending_design_91$port1__read ;
+  assign host_pending_design_92$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_92 ;
+  assign host_pending_design_92$EN_port1__write =
+	     pending_interrupts_96$EMPTY_N &&
+	     !host_pending_design_92$port1__read ;
+  assign host_pending_design_92$port2__read =
+	     host_pending_design_92$EN_port1__write ||
+	     host_pending_design_92$port1__read ;
+  assign host_pending_design_93$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_93 ;
+  assign host_pending_design_93$EN_port1__write =
+	     pending_interrupts_97$EMPTY_N &&
+	     !host_pending_design_93$port1__read ;
+  assign host_pending_design_93$port2__read =
+	     host_pending_design_93$EN_port1__write ||
+	     host_pending_design_93$port1__read ;
+  assign host_pending_design_94$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_94 ;
+  assign host_pending_design_94$EN_port1__write =
+	     pending_interrupts_98$EMPTY_N &&
+	     !host_pending_design_94$port1__read ;
+  assign host_pending_design_94$port2__read =
+	     host_pending_design_94$EN_port1__write ||
+	     host_pending_design_94$port1__read ;
+  assign host_pending_design_95$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_4 &&
+	     host_pending_design_95 ;
+  assign host_pending_design_95$EN_port1__write =
+	     pending_interrupts_99$EMPTY_N &&
+	     !host_pending_design_95$port1__read ;
+  assign host_pending_design_95$port2__read =
+	     host_pending_design_95$EN_port1__write ||
+	     host_pending_design_95$port1__read ;
+  assign host_pending_design_96$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_96 ;
+  assign host_pending_design_96$EN_port1__write =
+	     pending_interrupts_100$EMPTY_N &&
+	     !host_pending_design_96$port1__read ;
+  assign host_pending_design_96$port2__read =
+	     host_pending_design_96$EN_port1__write ||
+	     host_pending_design_96$port1__read ;
+  assign host_pending_design_97$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_97 ;
+  assign host_pending_design_97$EN_port1__write =
+	     pending_interrupts_101$EMPTY_N &&
+	     !host_pending_design_97$port1__read ;
+  assign host_pending_design_97$port2__read =
+	     host_pending_design_97$EN_port1__write ||
+	     host_pending_design_97$port1__read ;
+  assign host_pending_design_98$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_98 ;
+  assign host_pending_design_98$EN_port1__write =
+	     pending_interrupts_102$EMPTY_N &&
+	     !host_pending_design_98$port1__read ;
+  assign host_pending_design_98$port2__read =
+	     host_pending_design_98$EN_port1__write ||
+	     host_pending_design_98$port1__read ;
+  assign host_pending_design_99$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_99 ;
+  assign host_pending_design_99$EN_port1__write =
+	     pending_interrupts_103$EMPTY_N &&
+	     !host_pending_design_99$port1__read ;
+  assign host_pending_design_99$port2__read =
+	     host_pending_design_99$EN_port1__write ||
+	     host_pending_design_99$port1__read ;
+  assign host_pending_design_100$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_100 ;
+  assign host_pending_design_100$EN_port1__write =
+	     pending_interrupts_104$EMPTY_N &&
+	     !host_pending_design_100$port1__read ;
+  assign host_pending_design_100$port2__read =
+	     host_pending_design_100$EN_port1__write ||
+	     host_pending_design_100$port1__read ;
+  assign host_pending_design_101$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_101 ;
+  assign host_pending_design_101$EN_port1__write =
+	     pending_interrupts_105$EMPTY_N &&
+	     !host_pending_design_101$port1__read ;
+  assign host_pending_design_101$port2__read =
+	     host_pending_design_101$EN_port1__write ||
+	     host_pending_design_101$port1__read ;
+  assign host_pending_design_102$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_102 ;
+  assign host_pending_design_102$EN_port1__write =
+	     pending_interrupts_106$EMPTY_N &&
+	     !host_pending_design_102$port1__read ;
+  assign host_pending_design_102$port2__read =
+	     host_pending_design_102$EN_port1__write ||
+	     host_pending_design_102$port1__read ;
+  assign host_pending_design_103$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_103 ;
+  assign host_pending_design_103$EN_port1__write =
+	     pending_interrupts_107$EMPTY_N &&
+	     !host_pending_design_103$port1__read ;
+  assign host_pending_design_103$port2__read =
+	     host_pending_design_103$EN_port1__write ||
+	     host_pending_design_103$port1__read ;
+  assign host_pending_design_104$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_104 ;
+  assign host_pending_design_104$EN_port1__write =
+	     pending_interrupts_108$EMPTY_N &&
+	     !host_pending_design_104$port1__read ;
+  assign host_pending_design_104$port2__read =
+	     host_pending_design_104$EN_port1__write ||
+	     host_pending_design_104$port1__read ;
+  assign host_pending_design_105$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_105 ;
+  assign host_pending_design_105$EN_port1__write =
+	     pending_interrupts_109$EMPTY_N &&
+	     !host_pending_design_105$port1__read ;
+  assign host_pending_design_105$port2__read =
+	     host_pending_design_105$EN_port1__write ||
+	     host_pending_design_105$port1__read ;
+  assign host_pending_design_106$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_106 ;
+  assign host_pending_design_106$EN_port1__write =
+	     pending_interrupts_110$EMPTY_N &&
+	     !host_pending_design_106$port1__read ;
+  assign host_pending_design_106$port2__read =
+	     host_pending_design_106$EN_port1__write ||
+	     host_pending_design_106$port1__read ;
+  assign host_pending_design_107$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_107 ;
+  assign host_pending_design_107$EN_port1__write =
+	     pending_interrupts_111$EMPTY_N &&
+	     !host_pending_design_107$port1__read ;
+  assign host_pending_design_107$port2__read =
+	     host_pending_design_107$EN_port1__write ||
+	     host_pending_design_107$port1__read ;
+  assign host_pending_design_108$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_108 ;
+  assign host_pending_design_108$EN_port1__write =
+	     pending_interrupts_112$EMPTY_N &&
+	     !host_pending_design_108$port1__read ;
+  assign host_pending_design_108$port2__read =
+	     host_pending_design_108$EN_port1__write ||
+	     host_pending_design_108$port1__read ;
+  assign host_pending_design_109$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_109 ;
+  assign host_pending_design_109$EN_port1__write =
+	     pending_interrupts_113$EMPTY_N &&
+	     !host_pending_design_109$port1__read ;
+  assign host_pending_design_109$port2__read =
+	     host_pending_design_109$EN_port1__write ||
+	     host_pending_design_109$port1__read ;
+  assign host_pending_design_110$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_110 ;
+  assign host_pending_design_110$EN_port1__write =
+	     pending_interrupts_114$EMPTY_N &&
+	     !host_pending_design_110$port1__read ;
+  assign host_pending_design_110$port2__read =
+	     host_pending_design_110$EN_port1__write ||
+	     host_pending_design_110$port1__read ;
+  assign host_pending_design_111$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_111 ;
+  assign host_pending_design_111$EN_port1__write =
+	     pending_interrupts_115$EMPTY_N &&
+	     !host_pending_design_111$port1__read ;
+  assign host_pending_design_111$port2__read =
+	     host_pending_design_111$EN_port1__write ||
+	     host_pending_design_111$port1__read ;
+  assign host_pending_design_112$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_112 ;
+  assign host_pending_design_112$EN_port1__write =
+	     pending_interrupts_116$EMPTY_N &&
+	     !host_pending_design_112$port1__read ;
+  assign host_pending_design_112$port2__read =
+	     host_pending_design_112$EN_port1__write ||
+	     host_pending_design_112$port1__read ;
+  assign host_pending_design_113$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_113 ;
+  assign host_pending_design_113$EN_port1__write =
+	     pending_interrupts_117$EMPTY_N &&
+	     !host_pending_design_113$port1__read ;
+  assign host_pending_design_113$port2__read =
+	     host_pending_design_113$EN_port1__write ||
+	     host_pending_design_113$port1__read ;
+  assign host_pending_design_114$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_114 ;
+  assign host_pending_design_114$EN_port1__write =
+	     pending_interrupts_118$EMPTY_N &&
+	     !host_pending_design_114$port1__read ;
+  assign host_pending_design_114$port2__read =
+	     host_pending_design_114$EN_port1__write ||
+	     host_pending_design_114$port1__read ;
+  assign host_pending_design_115$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_115 ;
+  assign host_pending_design_115$EN_port1__write =
+	     pending_interrupts_119$EMPTY_N &&
+	     !host_pending_design_115$port1__read ;
+  assign host_pending_design_115$port2__read =
+	     host_pending_design_115$EN_port1__write ||
+	     host_pending_design_115$port1__read ;
+  assign host_pending_design_116$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_116 ;
+  assign host_pending_design_116$EN_port1__write =
+	     pending_interrupts_120$EMPTY_N &&
+	     !host_pending_design_116$port1__read ;
+  assign host_pending_design_116$port2__read =
+	     host_pending_design_116$EN_port1__write ||
+	     host_pending_design_116$port1__read ;
+  assign host_pending_design_117$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_117 ;
+  assign host_pending_design_117$EN_port1__write =
+	     pending_interrupts_121$EMPTY_N &&
+	     !host_pending_design_117$port1__read ;
+  assign host_pending_design_117$port2__read =
+	     host_pending_design_117$EN_port1__write ||
+	     host_pending_design_117$port1__read ;
+  assign host_pending_design_118$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_118 ;
+  assign host_pending_design_118$EN_port1__write =
+	     pending_interrupts_122$EMPTY_N &&
+	     !host_pending_design_118$port1__read ;
+  assign host_pending_design_118$port2__read =
+	     host_pending_design_118$EN_port1__write ||
+	     host_pending_design_118$port1__read ;
+  assign host_pending_design_119$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_119 ;
+  assign host_pending_design_119$EN_port1__write =
+	     pending_interrupts_123$EMPTY_N &&
+	     !host_pending_design_119$port1__read ;
+  assign host_pending_design_119$port2__read =
+	     host_pending_design_119$EN_port1__write ||
+	     host_pending_design_119$port1__read ;
+  assign host_pending_design_120$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_120 ;
+  assign host_pending_design_120$EN_port1__write =
+	     pending_interrupts_124$EMPTY_N &&
+	     !host_pending_design_120$port1__read ;
+  assign host_pending_design_120$port2__read =
+	     host_pending_design_120$EN_port1__write ||
+	     host_pending_design_120$port1__read ;
+  assign host_pending_design_121$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_121 ;
+  assign host_pending_design_121$EN_port1__write =
+	     pending_interrupts_125$EMPTY_N &&
+	     !host_pending_design_121$port1__read ;
+  assign host_pending_design_121$port2__read =
+	     host_pending_design_121$EN_port1__write ||
+	     host_pending_design_121$port1__read ;
+  assign host_pending_design_122$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_122 ;
+  assign host_pending_design_122$EN_port1__write =
+	     pending_interrupts_126$EMPTY_N &&
+	     !host_pending_design_122$port1__read ;
+  assign host_pending_design_122$port2__read =
+	     host_pending_design_122$EN_port1__write ||
+	     host_pending_design_122$port1__read ;
+  assign host_pending_design_123$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_123 ;
+  assign host_pending_design_123$EN_port1__write =
+	     pending_interrupts_127$EMPTY_N &&
+	     !host_pending_design_123$port1__read ;
+  assign host_pending_design_123$port2__read =
+	     host_pending_design_123$EN_port1__write ||
+	     host_pending_design_123$port1__read ;
+  assign host_pending_design_124$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_124 ;
+  assign host_pending_design_124$EN_port1__write =
+	     pending_interrupts_128$EMPTY_N &&
+	     !host_pending_design_124$port1__read ;
+  assign host_pending_design_124$port2__read =
+	     host_pending_design_124$EN_port1__write ||
+	     host_pending_design_124$port1__read ;
+  assign host_pending_design_125$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_125 ;
+  assign host_pending_design_125$EN_port1__write =
+	     pending_interrupts_129$EMPTY_N &&
+	     !host_pending_design_125$port1__read ;
+  assign host_pending_design_125$port2__read =
+	     host_pending_design_125$EN_port1__write ||
+	     host_pending_design_125$port1__read ;
+  assign host_pending_design_126$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_126 ;
+  assign host_pending_design_126$EN_port1__write =
+	     pending_interrupts_130$EMPTY_N &&
+	     !host_pending_design_126$port1__read ;
+  assign host_pending_design_126$port2__read =
+	     host_pending_design_126$EN_port1__write ||
+	     host_pending_design_126$port1__read ;
+  assign host_pending_design_127$port1__read =
+	     !WILL_FIRE_RL_s_config_axiReadSpecial_5 &&
+	     host_pending_design_127 ;
+  assign host_pending_design_127$EN_port1__write =
+	     pending_interrupts_131$EMPTY_N &&
+	     !host_pending_design_127$port1__read ;
+  assign host_pending_design_127$port2__read =
+	     host_pending_design_127$EN_port1__write ||
+	     host_pending_design_127$port1__read ;
+  assign host_is_ready_0$port1__read =
+	     WILL_FIRE_RL_s_config_axiReadSpecial_2 || host_is_ready_0 ;
+  assign host_is_ready_0$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt &&
+	     (host_pending_design_0_port1__read__693_OR_host_ETC___d2218 ||
+	      host_pending_design_8_port1__read__725_OR_host_ETC___d2225 ||
+	      host_pending_design_16_port1__read__757_OR_hos_ETC___d2233 ||
+	      host_pending_design_24_port1__read__789_OR_hos_ETC___d2240) ;
+  assign host_is_ready_0$port2__read =
+	     !host_is_ready_0$EN_port1__write && host_is_ready_0$port1__read ;
+  assign host_is_ready_1$port1__read =
+	     WILL_FIRE_RL_s_config_axiReadSpecial_3 || host_is_ready_1 ;
+  assign host_is_ready_1$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt_1 &&
+	     (host_pending_design_32_port1__read__821_OR_hos_ETC___d2257 ||
+	      host_pending_design_40_port1__read__853_OR_hos_ETC___d2264 ||
+	      host_pending_design_48_port1__read__885_OR_hos_ETC___d2272 ||
+	      host_pending_design_56_port1__read__917_OR_hos_ETC___d2279) ;
+  assign host_is_ready_1$port2__read =
+	     !host_is_ready_1$EN_port1__write && host_is_ready_1$port1__read ;
+  assign host_is_ready_2$port1__read =
+	     WILL_FIRE_RL_s_config_axiReadSpecial_4 || host_is_ready_2 ;
+  assign host_is_ready_2$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt_2 &&
+	     (host_pending_design_64_port1__read__949_OR_hos_ETC___d2296 ||
+	      host_pending_design_72_port1__read__981_OR_hos_ETC___d2303 ||
+	      host_pending_design_80_port1__read__013_OR_hos_ETC___d2311 ||
+	      host_pending_design_88_port1__read__045_OR_hos_ETC___d2318) ;
+  assign host_is_ready_2$port2__read =
+	     !host_is_ready_2$EN_port1__write && host_is_ready_2$port1__read ;
+  assign host_is_ready_3$port1__read =
+	     WILL_FIRE_RL_s_config_axiReadSpecial_5 || host_is_ready_3 ;
+  assign host_is_ready_3$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt_3 &&
+	     (host_pending_design_96_port1__read__077_OR_hos_ETC___d2335 ||
+	      host_pending_design_104_port1__read__109_OR_ho_ETC___d2342 ||
+	      host_pending_design_112_port1__read__141_OR_ho_ETC___d2350 ||
+	      host_pending_design_120_port1__read__173_OR_ho_ETC___d2357) ;
+  assign host_is_ready_3$port2__read =
+	     !host_is_ready_3$EN_port1__write && host_is_ready_3$port1__read ;
+  assign s_config_writeSlave_addrIn_rv$EN_port0__write =
+	     !s_config_writeSlave_addrIn_rv[19] && S_AXI_awvalid ;
+  assign s_config_writeSlave_addrIn_rv$port0__write_1 =
+	     { 1'd1, S_AXI_awaddr, S_AXI_awprot } ;
+  assign s_config_writeSlave_addrIn_rv$port1__read =
+	     s_config_writeSlave_addrIn_rv$EN_port0__write ?
+	       s_config_writeSlave_addrIn_rv$port0__write_1 :
+	       s_config_writeSlave_addrIn_rv ;
+  assign s_config_writeSlave_addrIn_rv$EN_port1__write =
+	     s_config_writeSlave_addrIn_rv$port1__read[19] &&
+	     s_config_writeSlave_dataIn_rv$port1__read[36] &&
+	     s_config_writeSlave_in$FULL_N ;
+  assign s_config_writeSlave_addrIn_rv$port2__read =
+	     s_config_writeSlave_addrIn_rv$EN_port1__write ?
+	       20'd174762 :
+	       s_config_writeSlave_addrIn_rv$port1__read ;
+  assign s_config_writeSlave_dataIn_rv$EN_port0__write =
+	     !s_config_writeSlave_dataIn_rv[36] && S_AXI_wvalid ;
+  assign s_config_writeSlave_dataIn_rv$port0__write_1 =
+	     { 1'd1, S_AXI_wdata, S_AXI_wstrb } ;
+  assign s_config_writeSlave_dataIn_rv$port1__read =
+	     s_config_writeSlave_dataIn_rv$EN_port0__write ?
+	       s_config_writeSlave_dataIn_rv$port0__write_1 :
+	       s_config_writeSlave_dataIn_rv ;
+  assign s_config_writeSlave_dataIn_rv$EN_port1__write =
+	     s_config_writeSlave_addrIn_rv$port1__read[19] &&
+	     s_config_writeSlave_dataIn_rv$port1__read[36] &&
+	     s_config_writeSlave_in$FULL_N ;
+  assign s_config_writeSlave_dataIn_rv$port2__read =
+	     s_config_writeSlave_dataIn_rv$EN_port1__write ?
+	       37'h0AAAAAAAAA :
+	       s_config_writeSlave_dataIn_rv$port1__read ;
+  assign sh_wait_ack_0$port1__read = !irq_ack[0] && sh_wait_ack_0 ;
+  assign sh_wait_ack_0$EN_port1__write =
+	     pending_interrupts_0$EMPTY_N && !sh_active_0 &&
+	     !sh_wait_ack_0$port1__read &&
+	     !host_pending_pcie_0$port1__read ;
+  assign sh_wait_ack_0$port2__read =
+	     sh_wait_ack_0$EN_port1__write || sh_wait_ack_0$port1__read ;
+  assign sh_wait_ack_1$port1__read = !irq_ack[1] && sh_wait_ack_1 ;
+  assign sh_wait_ack_1$EN_port1__write =
+	     pending_interrupts_1$EMPTY_N && !sh_active_1 &&
+	     !sh_wait_ack_1$port1__read &&
+	     !host_pending_pcie_1$port1__read ;
+  assign sh_wait_ack_1$port2__read =
+	     sh_wait_ack_1$EN_port1__write || sh_wait_ack_1$port1__read ;
+  assign sh_wait_ack_2$port1__read = !irq_ack[2] && sh_wait_ack_2 ;
+  assign sh_wait_ack_2$EN_port1__write =
+	     pending_interrupts_2$EMPTY_N && !sh_active_2 &&
+	     !sh_wait_ack_2$port1__read &&
+	     !host_pending_pcie_2$port1__read ;
+  assign sh_wait_ack_2$port2__read =
+	     sh_wait_ack_2$EN_port1__write || sh_wait_ack_2$port1__read ;
+  assign sh_wait_ack_3$port1__read = !irq_ack[3] && sh_wait_ack_3 ;
+  assign sh_wait_ack_3$EN_port1__write =
+	     pending_interrupts_3$EMPTY_N && !sh_active_3 &&
+	     !sh_wait_ack_3$port1__read &&
+	     !host_pending_pcie_3$port1__read ;
+  assign sh_wait_ack_3$port2__read =
+	     sh_wait_ack_3$EN_port1__write || sh_wait_ack_3$port1__read ;
+  assign sh_wait_ack_4$port1__read = !irq_ack[4] && sh_wait_ack_4 ;
+  assign sh_wait_ack_4$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt &&
+	     (host_pending_design_0_port1__read__693_OR_host_ETC___d2218 ||
+	      host_pending_design_8_port1__read__725_OR_host_ETC___d2225 ||
+	      host_pending_design_16_port1__read__757_OR_hos_ETC___d2233 ||
+	      host_pending_design_24_port1__read__789_OR_hos_ETC___d2240) ;
+  assign sh_wait_ack_4$port2__read =
+	     sh_wait_ack_4$EN_port1__write || sh_wait_ack_4$port1__read ;
+  assign sh_wait_ack_5$port1__read = !irq_ack[5] && sh_wait_ack_5 ;
+  assign sh_wait_ack_5$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt_1 &&
+	     (host_pending_design_32_port1__read__821_OR_hos_ETC___d2257 ||
+	      host_pending_design_40_port1__read__853_OR_hos_ETC___d2264 ||
+	      host_pending_design_48_port1__read__885_OR_hos_ETC___d2272 ||
+	      host_pending_design_56_port1__read__917_OR_hos_ETC___d2279) ;
+  assign sh_wait_ack_5$port2__read =
+	     sh_wait_ack_5$EN_port1__write || sh_wait_ack_5$port1__read ;
+  assign sh_wait_ack_6$port1__read = !irq_ack[6] && sh_wait_ack_6 ;
+  assign sh_wait_ack_6$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt_2 &&
+	     (host_pending_design_64_port1__read__949_OR_hos_ETC___d2296 ||
+	      host_pending_design_72_port1__read__981_OR_hos_ETC___d2303 ||
+	      host_pending_design_80_port1__read__013_OR_hos_ETC___d2311 ||
+	      host_pending_design_88_port1__read__045_OR_hos_ETC___d2318) ;
+  assign sh_wait_ack_6$port2__read =
+	     sh_wait_ack_6$EN_port1__write || sh_wait_ack_6$port1__read ;
+  assign sh_wait_ack_7$port1__read = !irq_ack[7] && sh_wait_ack_7 ;
+  assign sh_wait_ack_7$EN_port1__write =
+	     WILL_FIRE_RL_assert_design_interrupt_3 &&
+	     (host_pending_design_96_port1__read__077_OR_hos_ETC___d2335 ||
+	      host_pending_design_104_port1__read__109_OR_ho_ETC___d2342 ||
+	      host_pending_design_112_port1__read__141_OR_ho_ETC___d2350 ||
+	      host_pending_design_120_port1__read__173_OR_ho_ETC___d2357) ;
+  assign sh_wait_ack_7$port2__read =
+	     sh_wait_ack_7$EN_port1__write || sh_wait_ack_7$port1__read ;
+  assign sh_wait_ack_8$port1__read = !irq_ack[8] && sh_wait_ack_8 ;
+  assign sh_wait_ack_9$port1__read = !irq_ack[9] && sh_wait_ack_9 ;
+  assign sh_wait_ack_10$port1__read = !irq_ack[10] && sh_wait_ack_10 ;
+  assign sh_wait_ack_11$port1__read = !irq_ack[11] && sh_wait_ack_11 ;
+  assign sh_wait_ack_12$port1__read = !irq_ack[12] && sh_wait_ack_12 ;
+  assign sh_wait_ack_13$port1__read = !irq_ack[13] && sh_wait_ack_13 ;
+  assign sh_wait_ack_14$port1__read = !irq_ack[14] && sh_wait_ack_14 ;
+  assign sh_wait_ack_15$port1__read = !irq_ack[15] && sh_wait_ack_15 ;
+
+  // register completionReg
+  assign completionReg$D_IN = completionReg + x__h194023 ;
+  assign completionReg$EN = 1'd1 ;
+
+  // register designGIER
+  assign designGIER$D_IN =
+	     IF_s_config_writeSlave_inD_OUT_BIT_3_THEN_s_c_ETC__q1[0] ;
+  assign designGIER$EN = WILL_FIRE_RL_s_config_1_axiWriteSpecial ;
+
+  // register host_is_ready_0
+  assign host_is_ready_0$D_IN = host_is_ready_0$port2__read ;
+  assign host_is_ready_0$EN = 1'b1 ;
+
+  // register host_is_ready_1
+  assign host_is_ready_1$D_IN = host_is_ready_1$port2__read ;
+  assign host_is_ready_1$EN = 1'b1 ;
+
+  // register host_is_ready_2
+  assign host_is_ready_2$D_IN = host_is_ready_2$port2__read ;
+  assign host_is_ready_2$EN = 1'b1 ;
+
+  // register host_is_ready_3
+  assign host_is_ready_3$D_IN = host_is_ready_3$port2__read ;
+  assign host_is_ready_3$EN = 1'b1 ;
+
+  // register host_pending_design_0
+  assign host_pending_design_0$D_IN = host_pending_design_0$port2__read ;
+  assign host_pending_design_0$EN = 1'b1 ;
+
+  // register host_pending_design_1
+  assign host_pending_design_1$D_IN = host_pending_design_1$port2__read ;
+  assign host_pending_design_1$EN = 1'b1 ;
+
+  // register host_pending_design_10
+  assign host_pending_design_10$D_IN = host_pending_design_10$port2__read ;
+  assign host_pending_design_10$EN = 1'b1 ;
+
+  // register host_pending_design_100
+  assign host_pending_design_100$D_IN = host_pending_design_100$port2__read ;
+  assign host_pending_design_100$EN = 1'b1 ;
+
+  // register host_pending_design_101
+  assign host_pending_design_101$D_IN = host_pending_design_101$port2__read ;
+  assign host_pending_design_101$EN = 1'b1 ;
+
+  // register host_pending_design_102
+  assign host_pending_design_102$D_IN = host_pending_design_102$port2__read ;
+  assign host_pending_design_102$EN = 1'b1 ;
+
+  // register host_pending_design_103
+  assign host_pending_design_103$D_IN = host_pending_design_103$port2__read ;
+  assign host_pending_design_103$EN = 1'b1 ;
+
+  // register host_pending_design_104
+  assign host_pending_design_104$D_IN = host_pending_design_104$port2__read ;
+  assign host_pending_design_104$EN = 1'b1 ;
+
+  // register host_pending_design_105
+  assign host_pending_design_105$D_IN = host_pending_design_105$port2__read ;
+  assign host_pending_design_105$EN = 1'b1 ;
+
+  // register host_pending_design_106
+  assign host_pending_design_106$D_IN = host_pending_design_106$port2__read ;
+  assign host_pending_design_106$EN = 1'b1 ;
+
+  // register host_pending_design_107
+  assign host_pending_design_107$D_IN = host_pending_design_107$port2__read ;
+  assign host_pending_design_107$EN = 1'b1 ;
+
+  // register host_pending_design_108
+  assign host_pending_design_108$D_IN = host_pending_design_108$port2__read ;
+  assign host_pending_design_108$EN = 1'b1 ;
+
+  // register host_pending_design_109
+  assign host_pending_design_109$D_IN = host_pending_design_109$port2__read ;
+  assign host_pending_design_109$EN = 1'b1 ;
+
+  // register host_pending_design_11
+  assign host_pending_design_11$D_IN = host_pending_design_11$port2__read ;
+  assign host_pending_design_11$EN = 1'b1 ;
+
+  // register host_pending_design_110
+  assign host_pending_design_110$D_IN = host_pending_design_110$port2__read ;
+  assign host_pending_design_110$EN = 1'b1 ;
+
+  // register host_pending_design_111
+  assign host_pending_design_111$D_IN = host_pending_design_111$port2__read ;
+  assign host_pending_design_111$EN = 1'b1 ;
+
+  // register host_pending_design_112
+  assign host_pending_design_112$D_IN = host_pending_design_112$port2__read ;
+  assign host_pending_design_112$EN = 1'b1 ;
+
+  // register host_pending_design_113
+  assign host_pending_design_113$D_IN = host_pending_design_113$port2__read ;
+  assign host_pending_design_113$EN = 1'b1 ;
+
+  // register host_pending_design_114
+  assign host_pending_design_114$D_IN = host_pending_design_114$port2__read ;
+  assign host_pending_design_114$EN = 1'b1 ;
+
+  // register host_pending_design_115
+  assign host_pending_design_115$D_IN = host_pending_design_115$port2__read ;
+  assign host_pending_design_115$EN = 1'b1 ;
+
+  // register host_pending_design_116
+  assign host_pending_design_116$D_IN = host_pending_design_116$port2__read ;
+  assign host_pending_design_116$EN = 1'b1 ;
+
+  // register host_pending_design_117
+  assign host_pending_design_117$D_IN = host_pending_design_117$port2__read ;
+  assign host_pending_design_117$EN = 1'b1 ;
+
+  // register host_pending_design_118
+  assign host_pending_design_118$D_IN = host_pending_design_118$port2__read ;
+  assign host_pending_design_118$EN = 1'b1 ;
+
+  // register host_pending_design_119
+  assign host_pending_design_119$D_IN = host_pending_design_119$port2__read ;
+  assign host_pending_design_119$EN = 1'b1 ;
+
+  // register host_pending_design_12
+  assign host_pending_design_12$D_IN = host_pending_design_12$port2__read ;
+  assign host_pending_design_12$EN = 1'b1 ;
+
+  // register host_pending_design_120
+  assign host_pending_design_120$D_IN = host_pending_design_120$port2__read ;
+  assign host_pending_design_120$EN = 1'b1 ;
+
+  // register host_pending_design_121
+  assign host_pending_design_121$D_IN = host_pending_design_121$port2__read ;
+  assign host_pending_design_121$EN = 1'b1 ;
+
+  // register host_pending_design_122
+  assign host_pending_design_122$D_IN = host_pending_design_122$port2__read ;
+  assign host_pending_design_122$EN = 1'b1 ;
+
+  // register host_pending_design_123
+  assign host_pending_design_123$D_IN = host_pending_design_123$port2__read ;
+  assign host_pending_design_123$EN = 1'b1 ;
+
+  // register host_pending_design_124
+  assign host_pending_design_124$D_IN = host_pending_design_124$port2__read ;
+  assign host_pending_design_124$EN = 1'b1 ;
+
+  // register host_pending_design_125
+  assign host_pending_design_125$D_IN = host_pending_design_125$port2__read ;
+  assign host_pending_design_125$EN = 1'b1 ;
+
+  // register host_pending_design_126
+  assign host_pending_design_126$D_IN = host_pending_design_126$port2__read ;
+  assign host_pending_design_126$EN = 1'b1 ;
+
+  // register host_pending_design_127
+  assign host_pending_design_127$D_IN = host_pending_design_127$port2__read ;
+  assign host_pending_design_127$EN = 1'b1 ;
+
+  // register host_pending_design_13
+  assign host_pending_design_13$D_IN = host_pending_design_13$port2__read ;
+  assign host_pending_design_13$EN = 1'b1 ;
+
+  // register host_pending_design_14
+  assign host_pending_design_14$D_IN = host_pending_design_14$port2__read ;
+  assign host_pending_design_14$EN = 1'b1 ;
+
+  // register host_pending_design_15
+  assign host_pending_design_15$D_IN = host_pending_design_15$port2__read ;
+  assign host_pending_design_15$EN = 1'b1 ;
+
+  // register host_pending_design_16
+  assign host_pending_design_16$D_IN = host_pending_design_16$port2__read ;
+  assign host_pending_design_16$EN = 1'b1 ;
+
+  // register host_pending_design_17
+  assign host_pending_design_17$D_IN = host_pending_design_17$port2__read ;
+  assign host_pending_design_17$EN = 1'b1 ;
+
+  // register host_pending_design_18
+  assign host_pending_design_18$D_IN = host_pending_design_18$port2__read ;
+  assign host_pending_design_18$EN = 1'b1 ;
+
+  // register host_pending_design_19
+  assign host_pending_design_19$D_IN = host_pending_design_19$port2__read ;
+  assign host_pending_design_19$EN = 1'b1 ;
+
+  // register host_pending_design_2
+  assign host_pending_design_2$D_IN = host_pending_design_2$port2__read ;
+  assign host_pending_design_2$EN = 1'b1 ;
+
+  // register host_pending_design_20
+  assign host_pending_design_20$D_IN = host_pending_design_20$port2__read ;
+  assign host_pending_design_20$EN = 1'b1 ;
+
+  // register host_pending_design_21
+  assign host_pending_design_21$D_IN = host_pending_design_21$port2__read ;
+  assign host_pending_design_21$EN = 1'b1 ;
+
+  // register host_pending_design_22
+  assign host_pending_design_22$D_IN = host_pending_design_22$port2__read ;
+  assign host_pending_design_22$EN = 1'b1 ;
+
+  // register host_pending_design_23
+  assign host_pending_design_23$D_IN = host_pending_design_23$port2__read ;
+  assign host_pending_design_23$EN = 1'b1 ;
+
+  // register host_pending_design_24
+  assign host_pending_design_24$D_IN = host_pending_design_24$port2__read ;
+  assign host_pending_design_24$EN = 1'b1 ;
+
+  // register host_pending_design_25
+  assign host_pending_design_25$D_IN = host_pending_design_25$port2__read ;
+  assign host_pending_design_25$EN = 1'b1 ;
+
+  // register host_pending_design_26
+  assign host_pending_design_26$D_IN = host_pending_design_26$port2__read ;
+  assign host_pending_design_26$EN = 1'b1 ;
+
+  // register host_pending_design_27
+  assign host_pending_design_27$D_IN = host_pending_design_27$port2__read ;
+  assign host_pending_design_27$EN = 1'b1 ;
+
+  // register host_pending_design_28
+  assign host_pending_design_28$D_IN = host_pending_design_28$port2__read ;
+  assign host_pending_design_28$EN = 1'b1 ;
+
+  // register host_pending_design_29
+  assign host_pending_design_29$D_IN = host_pending_design_29$port2__read ;
+  assign host_pending_design_29$EN = 1'b1 ;
+
+  // register host_pending_design_3
+  assign host_pending_design_3$D_IN = host_pending_design_3$port2__read ;
+  assign host_pending_design_3$EN = 1'b1 ;
+
+  // register host_pending_design_30
+  assign host_pending_design_30$D_IN = host_pending_design_30$port2__read ;
+  assign host_pending_design_30$EN = 1'b1 ;
+
+  // register host_pending_design_31
+  assign host_pending_design_31$D_IN = host_pending_design_31$port2__read ;
+  assign host_pending_design_31$EN = 1'b1 ;
+
+  // register host_pending_design_32
+  assign host_pending_design_32$D_IN = host_pending_design_32$port2__read ;
+  assign host_pending_design_32$EN = 1'b1 ;
+
+  // register host_pending_design_33
+  assign host_pending_design_33$D_IN = host_pending_design_33$port2__read ;
+  assign host_pending_design_33$EN = 1'b1 ;
+
+  // register host_pending_design_34
+  assign host_pending_design_34$D_IN = host_pending_design_34$port2__read ;
+  assign host_pending_design_34$EN = 1'b1 ;
+
+  // register host_pending_design_35
+  assign host_pending_design_35$D_IN = host_pending_design_35$port2__read ;
+  assign host_pending_design_35$EN = 1'b1 ;
+
+  // register host_pending_design_36
+  assign host_pending_design_36$D_IN = host_pending_design_36$port2__read ;
+  assign host_pending_design_36$EN = 1'b1 ;
+
+  // register host_pending_design_37
+  assign host_pending_design_37$D_IN = host_pending_design_37$port2__read ;
+  assign host_pending_design_37$EN = 1'b1 ;
+
+  // register host_pending_design_38
+  assign host_pending_design_38$D_IN = host_pending_design_38$port2__read ;
+  assign host_pending_design_38$EN = 1'b1 ;
+
+  // register host_pending_design_39
+  assign host_pending_design_39$D_IN = host_pending_design_39$port2__read ;
+  assign host_pending_design_39$EN = 1'b1 ;
+
+  // register host_pending_design_4
+  assign host_pending_design_4$D_IN = host_pending_design_4$port2__read ;
+  assign host_pending_design_4$EN = 1'b1 ;
+
+  // register host_pending_design_40
+  assign host_pending_design_40$D_IN = host_pending_design_40$port2__read ;
+  assign host_pending_design_40$EN = 1'b1 ;
+
+  // register host_pending_design_41
+  assign host_pending_design_41$D_IN = host_pending_design_41$port2__read ;
+  assign host_pending_design_41$EN = 1'b1 ;
+
+  // register host_pending_design_42
+  assign host_pending_design_42$D_IN = host_pending_design_42$port2__read ;
+  assign host_pending_design_42$EN = 1'b1 ;
+
+  // register host_pending_design_43
+  assign host_pending_design_43$D_IN = host_pending_design_43$port2__read ;
+  assign host_pending_design_43$EN = 1'b1 ;
+
+  // register host_pending_design_44
+  assign host_pending_design_44$D_IN = host_pending_design_44$port2__read ;
+  assign host_pending_design_44$EN = 1'b1 ;
+
+  // register host_pending_design_45
+  assign host_pending_design_45$D_IN = host_pending_design_45$port2__read ;
+  assign host_pending_design_45$EN = 1'b1 ;
+
+  // register host_pending_design_46
+  assign host_pending_design_46$D_IN = host_pending_design_46$port2__read ;
+  assign host_pending_design_46$EN = 1'b1 ;
+
+  // register host_pending_design_47
+  assign host_pending_design_47$D_IN = host_pending_design_47$port2__read ;
+  assign host_pending_design_47$EN = 1'b1 ;
+
+  // register host_pending_design_48
+  assign host_pending_design_48$D_IN = host_pending_design_48$port2__read ;
+  assign host_pending_design_48$EN = 1'b1 ;
+
+  // register host_pending_design_49
+  assign host_pending_design_49$D_IN = host_pending_design_49$port2__read ;
+  assign host_pending_design_49$EN = 1'b1 ;
+
+  // register host_pending_design_5
+  assign host_pending_design_5$D_IN = host_pending_design_5$port2__read ;
+  assign host_pending_design_5$EN = 1'b1 ;
+
+  // register host_pending_design_50
+  assign host_pending_design_50$D_IN = host_pending_design_50$port2__read ;
+  assign host_pending_design_50$EN = 1'b1 ;
+
+  // register host_pending_design_51
+  assign host_pending_design_51$D_IN = host_pending_design_51$port2__read ;
+  assign host_pending_design_51$EN = 1'b1 ;
+
+  // register host_pending_design_52
+  assign host_pending_design_52$D_IN = host_pending_design_52$port2__read ;
+  assign host_pending_design_52$EN = 1'b1 ;
+
+  // register host_pending_design_53
+  assign host_pending_design_53$D_IN = host_pending_design_53$port2__read ;
+  assign host_pending_design_53$EN = 1'b1 ;
+
+  // register host_pending_design_54
+  assign host_pending_design_54$D_IN = host_pending_design_54$port2__read ;
+  assign host_pending_design_54$EN = 1'b1 ;
+
+  // register host_pending_design_55
+  assign host_pending_design_55$D_IN = host_pending_design_55$port2__read ;
+  assign host_pending_design_55$EN = 1'b1 ;
+
+  // register host_pending_design_56
+  assign host_pending_design_56$D_IN = host_pending_design_56$port2__read ;
+  assign host_pending_design_56$EN = 1'b1 ;
+
+  // register host_pending_design_57
+  assign host_pending_design_57$D_IN = host_pending_design_57$port2__read ;
+  assign host_pending_design_57$EN = 1'b1 ;
+
+  // register host_pending_design_58
+  assign host_pending_design_58$D_IN = host_pending_design_58$port2__read ;
+  assign host_pending_design_58$EN = 1'b1 ;
+
+  // register host_pending_design_59
+  assign host_pending_design_59$D_IN = host_pending_design_59$port2__read ;
+  assign host_pending_design_59$EN = 1'b1 ;
+
+  // register host_pending_design_6
+  assign host_pending_design_6$D_IN = host_pending_design_6$port2__read ;
+  assign host_pending_design_6$EN = 1'b1 ;
+
+  // register host_pending_design_60
+  assign host_pending_design_60$D_IN = host_pending_design_60$port2__read ;
+  assign host_pending_design_60$EN = 1'b1 ;
+
+  // register host_pending_design_61
+  assign host_pending_design_61$D_IN = host_pending_design_61$port2__read ;
+  assign host_pending_design_61$EN = 1'b1 ;
+
+  // register host_pending_design_62
+  assign host_pending_design_62$D_IN = host_pending_design_62$port2__read ;
+  assign host_pending_design_62$EN = 1'b1 ;
+
+  // register host_pending_design_63
+  assign host_pending_design_63$D_IN = host_pending_design_63$port2__read ;
+  assign host_pending_design_63$EN = 1'b1 ;
+
+  // register host_pending_design_64
+  assign host_pending_design_64$D_IN = host_pending_design_64$port2__read ;
+  assign host_pending_design_64$EN = 1'b1 ;
+
+  // register host_pending_design_65
+  assign host_pending_design_65$D_IN = host_pending_design_65$port2__read ;
+  assign host_pending_design_65$EN = 1'b1 ;
+
+  // register host_pending_design_66
+  assign host_pending_design_66$D_IN = host_pending_design_66$port2__read ;
+  assign host_pending_design_66$EN = 1'b1 ;
+
+  // register host_pending_design_67
+  assign host_pending_design_67$D_IN = host_pending_design_67$port2__read ;
+  assign host_pending_design_67$EN = 1'b1 ;
+
+  // register host_pending_design_68
+  assign host_pending_design_68$D_IN = host_pending_design_68$port2__read ;
+  assign host_pending_design_68$EN = 1'b1 ;
+
+  // register host_pending_design_69
+  assign host_pending_design_69$D_IN = host_pending_design_69$port2__read ;
+  assign host_pending_design_69$EN = 1'b1 ;
+
+  // register host_pending_design_7
+  assign host_pending_design_7$D_IN = host_pending_design_7$port2__read ;
+  assign host_pending_design_7$EN = 1'b1 ;
+
+  // register host_pending_design_70
+  assign host_pending_design_70$D_IN = host_pending_design_70$port2__read ;
+  assign host_pending_design_70$EN = 1'b1 ;
+
+  // register host_pending_design_71
+  assign host_pending_design_71$D_IN = host_pending_design_71$port2__read ;
+  assign host_pending_design_71$EN = 1'b1 ;
+
+  // register host_pending_design_72
+  assign host_pending_design_72$D_IN = host_pending_design_72$port2__read ;
+  assign host_pending_design_72$EN = 1'b1 ;
+
+  // register host_pending_design_73
+  assign host_pending_design_73$D_IN = host_pending_design_73$port2__read ;
+  assign host_pending_design_73$EN = 1'b1 ;
+
+  // register host_pending_design_74
+  assign host_pending_design_74$D_IN = host_pending_design_74$port2__read ;
+  assign host_pending_design_74$EN = 1'b1 ;
+
+  // register host_pending_design_75
+  assign host_pending_design_75$D_IN = host_pending_design_75$port2__read ;
+  assign host_pending_design_75$EN = 1'b1 ;
+
+  // register host_pending_design_76
+  assign host_pending_design_76$D_IN = host_pending_design_76$port2__read ;
+  assign host_pending_design_76$EN = 1'b1 ;
+
+  // register host_pending_design_77
+  assign host_pending_design_77$D_IN = host_pending_design_77$port2__read ;
+  assign host_pending_design_77$EN = 1'b1 ;
+
+  // register host_pending_design_78
+  assign host_pending_design_78$D_IN = host_pending_design_78$port2__read ;
+  assign host_pending_design_78$EN = 1'b1 ;
+
+  // register host_pending_design_79
+  assign host_pending_design_79$D_IN = host_pending_design_79$port2__read ;
+  assign host_pending_design_79$EN = 1'b1 ;
+
+  // register host_pending_design_8
+  assign host_pending_design_8$D_IN = host_pending_design_8$port2__read ;
+  assign host_pending_design_8$EN = 1'b1 ;
+
+  // register host_pending_design_80
+  assign host_pending_design_80$D_IN = host_pending_design_80$port2__read ;
+  assign host_pending_design_80$EN = 1'b1 ;
+
+  // register host_pending_design_81
+  assign host_pending_design_81$D_IN = host_pending_design_81$port2__read ;
+  assign host_pending_design_81$EN = 1'b1 ;
+
+  // register host_pending_design_82
+  assign host_pending_design_82$D_IN = host_pending_design_82$port2__read ;
+  assign host_pending_design_82$EN = 1'b1 ;
+
+  // register host_pending_design_83
+  assign host_pending_design_83$D_IN = host_pending_design_83$port2__read ;
+  assign host_pending_design_83$EN = 1'b1 ;
+
+  // register host_pending_design_84
+  assign host_pending_design_84$D_IN = host_pending_design_84$port2__read ;
+  assign host_pending_design_84$EN = 1'b1 ;
+
+  // register host_pending_design_85
+  assign host_pending_design_85$D_IN = host_pending_design_85$port2__read ;
+  assign host_pending_design_85$EN = 1'b1 ;
+
+  // register host_pending_design_86
+  assign host_pending_design_86$D_IN = host_pending_design_86$port2__read ;
+  assign host_pending_design_86$EN = 1'b1 ;
+
+  // register host_pending_design_87
+  assign host_pending_design_87$D_IN = host_pending_design_87$port2__read ;
+  assign host_pending_design_87$EN = 1'b1 ;
+
+  // register host_pending_design_88
+  assign host_pending_design_88$D_IN = host_pending_design_88$port2__read ;
+  assign host_pending_design_88$EN = 1'b1 ;
+
+  // register host_pending_design_89
+  assign host_pending_design_89$D_IN = host_pending_design_89$port2__read ;
+  assign host_pending_design_89$EN = 1'b1 ;
+
+  // register host_pending_design_9
+  assign host_pending_design_9$D_IN = host_pending_design_9$port2__read ;
+  assign host_pending_design_9$EN = 1'b1 ;
+
+  // register host_pending_design_90
+  assign host_pending_design_90$D_IN = host_pending_design_90$port2__read ;
+  assign host_pending_design_90$EN = 1'b1 ;
+
+  // register host_pending_design_91
+  assign host_pending_design_91$D_IN = host_pending_design_91$port2__read ;
+  assign host_pending_design_91$EN = 1'b1 ;
+
+  // register host_pending_design_92
+  assign host_pending_design_92$D_IN = host_pending_design_92$port2__read ;
+  assign host_pending_design_92$EN = 1'b1 ;
+
+  // register host_pending_design_93
+  assign host_pending_design_93$D_IN = host_pending_design_93$port2__read ;
+  assign host_pending_design_93$EN = 1'b1 ;
+
+  // register host_pending_design_94
+  assign host_pending_design_94$D_IN = host_pending_design_94$port2__read ;
+  assign host_pending_design_94$EN = 1'b1 ;
+
+  // register host_pending_design_95
+  assign host_pending_design_95$D_IN = host_pending_design_95$port2__read ;
+  assign host_pending_design_95$EN = 1'b1 ;
+
+  // register host_pending_design_96
+  assign host_pending_design_96$D_IN = host_pending_design_96$port2__read ;
+  assign host_pending_design_96$EN = 1'b1 ;
+
+  // register host_pending_design_97
+  assign host_pending_design_97$D_IN = host_pending_design_97$port2__read ;
+  assign host_pending_design_97$EN = 1'b1 ;
+
+  // register host_pending_design_98
+  assign host_pending_design_98$D_IN = host_pending_design_98$port2__read ;
+  assign host_pending_design_98$EN = 1'b1 ;
+
+  // register host_pending_design_99
+  assign host_pending_design_99$D_IN = host_pending_design_99$port2__read ;
+  assign host_pending_design_99$EN = 1'b1 ;
+
+  // register host_pending_pcie_0
+  assign host_pending_pcie_0$D_IN = host_pending_pcie_0$port2__read ;
+  assign host_pending_pcie_0$EN = 1'b1 ;
+
+  // register host_pending_pcie_1
+  assign host_pending_pcie_1$D_IN = host_pending_pcie_1$port2__read ;
+  assign host_pending_pcie_1$EN = 1'b1 ;
+
+  // register host_pending_pcie_2
+  assign host_pending_pcie_2$D_IN = host_pending_pcie_2$port2__read ;
+  assign host_pending_pcie_2$EN = 1'b1 ;
+
+  // register host_pending_pcie_3
+  assign host_pending_pcie_3$D_IN = host_pending_pcie_3$port2__read ;
+  assign host_pending_pcie_3$EN = 1'b1 ;
+
+  // register id
+  assign id$D_IN = 32'h0 ;
+  assign id$EN = 1'b0 ;
+
+  // register interrupt_last_0
+  assign interrupt_last_0$D_IN = interrupt_pcie[0] ;
+  assign interrupt_last_0$EN = 1'd1 ;
+
+  // register interrupt_last_1
+  assign interrupt_last_1$D_IN = interrupt_pcie[1] ;
+  assign interrupt_last_1$EN = 1'd1 ;
+
+  // register interrupt_last_10
+  assign interrupt_last_10$D_IN = interrupt_design[6] ;
+  assign interrupt_last_10$EN = 1'd1 ;
+
+  // register interrupt_last_100
+  assign interrupt_last_100$D_IN = interrupt_design[96] ;
+  assign interrupt_last_100$EN = 1'd1 ;
+
+  // register interrupt_last_101
+  assign interrupt_last_101$D_IN = interrupt_design[97] ;
+  assign interrupt_last_101$EN = 1'd1 ;
+
+  // register interrupt_last_102
+  assign interrupt_last_102$D_IN = interrupt_design[98] ;
+  assign interrupt_last_102$EN = 1'd1 ;
+
+  // register interrupt_last_103
+  assign interrupt_last_103$D_IN = interrupt_design[99] ;
+  assign interrupt_last_103$EN = 1'd1 ;
+
+  // register interrupt_last_104
+  assign interrupt_last_104$D_IN = interrupt_design[100] ;
+  assign interrupt_last_104$EN = 1'd1 ;
+
+  // register interrupt_last_105
+  assign interrupt_last_105$D_IN = interrupt_design[101] ;
+  assign interrupt_last_105$EN = 1'd1 ;
+
+  // register interrupt_last_106
+  assign interrupt_last_106$D_IN = interrupt_design[102] ;
+  assign interrupt_last_106$EN = 1'd1 ;
+
+  // register interrupt_last_107
+  assign interrupt_last_107$D_IN = interrupt_design[103] ;
+  assign interrupt_last_107$EN = 1'd1 ;
+
+  // register interrupt_last_108
+  assign interrupt_last_108$D_IN = interrupt_design[104] ;
+  assign interrupt_last_108$EN = 1'd1 ;
+
+  // register interrupt_last_109
+  assign interrupt_last_109$D_IN = interrupt_design[105] ;
+  assign interrupt_last_109$EN = 1'd1 ;
+
+  // register interrupt_last_11
+  assign interrupt_last_11$D_IN = interrupt_design[7] ;
+  assign interrupt_last_11$EN = 1'd1 ;
+
+  // register interrupt_last_110
+  assign interrupt_last_110$D_IN = interrupt_design[106] ;
+  assign interrupt_last_110$EN = 1'd1 ;
+
+  // register interrupt_last_111
+  assign interrupt_last_111$D_IN = interrupt_design[107] ;
+  assign interrupt_last_111$EN = 1'd1 ;
+
+  // register interrupt_last_112
+  assign interrupt_last_112$D_IN = interrupt_design[108] ;
+  assign interrupt_last_112$EN = 1'd1 ;
+
+  // register interrupt_last_113
+  assign interrupt_last_113$D_IN = interrupt_design[109] ;
+  assign interrupt_last_113$EN = 1'd1 ;
+
+  // register interrupt_last_114
+  assign interrupt_last_114$D_IN = interrupt_design[110] ;
+  assign interrupt_last_114$EN = 1'd1 ;
+
+  // register interrupt_last_115
+  assign interrupt_last_115$D_IN = interrupt_design[111] ;
+  assign interrupt_last_115$EN = 1'd1 ;
+
+  // register interrupt_last_116
+  assign interrupt_last_116$D_IN = interrupt_design[112] ;
+  assign interrupt_last_116$EN = 1'd1 ;
+
+  // register interrupt_last_117
+  assign interrupt_last_117$D_IN = interrupt_design[113] ;
+  assign interrupt_last_117$EN = 1'd1 ;
+
+  // register interrupt_last_118
+  assign interrupt_last_118$D_IN = interrupt_design[114] ;
+  assign interrupt_last_118$EN = 1'd1 ;
+
+  // register interrupt_last_119
+  assign interrupt_last_119$D_IN = interrupt_design[115] ;
+  assign interrupt_last_119$EN = 1'd1 ;
+
+  // register interrupt_last_12
+  assign interrupt_last_12$D_IN = interrupt_design[8] ;
+  assign interrupt_last_12$EN = 1'd1 ;
+
+  // register interrupt_last_120
+  assign interrupt_last_120$D_IN = interrupt_design[116] ;
+  assign interrupt_last_120$EN = 1'd1 ;
+
+  // register interrupt_last_121
+  assign interrupt_last_121$D_IN = interrupt_design[117] ;
+  assign interrupt_last_121$EN = 1'd1 ;
+
+  // register interrupt_last_122
+  assign interrupt_last_122$D_IN = interrupt_design[118] ;
+  assign interrupt_last_122$EN = 1'd1 ;
+
+  // register interrupt_last_123
+  assign interrupt_last_123$D_IN = interrupt_design[119] ;
+  assign interrupt_last_123$EN = 1'd1 ;
+
+  // register interrupt_last_124
+  assign interrupt_last_124$D_IN = interrupt_design[120] ;
+  assign interrupt_last_124$EN = 1'd1 ;
+
+  // register interrupt_last_125
+  assign interrupt_last_125$D_IN = interrupt_design[121] ;
+  assign interrupt_last_125$EN = 1'd1 ;
+
+  // register interrupt_last_126
+  assign interrupt_last_126$D_IN = interrupt_design[122] ;
+  assign interrupt_last_126$EN = 1'd1 ;
+
+  // register interrupt_last_127
+  assign interrupt_last_127$D_IN = interrupt_design[123] ;
+  assign interrupt_last_127$EN = 1'd1 ;
+
+  // register interrupt_last_128
+  assign interrupt_last_128$D_IN = interrupt_design[124] ;
+  assign interrupt_last_128$EN = 1'd1 ;
+
+  // register interrupt_last_129
+  assign interrupt_last_129$D_IN = interrupt_design[125] ;
+  assign interrupt_last_129$EN = 1'd1 ;
+
+  // register interrupt_last_13
+  assign interrupt_last_13$D_IN = interrupt_design[9] ;
+  assign interrupt_last_13$EN = 1'd1 ;
+
+  // register interrupt_last_130
+  assign interrupt_last_130$D_IN = interrupt_design[126] ;
+  assign interrupt_last_130$EN = 1'd1 ;
+
+  // register interrupt_last_131
+  assign interrupt_last_131$D_IN = interrupt_design[127] ;
+  assign interrupt_last_131$EN = 1'd1 ;
+
+  // register interrupt_last_14
+  assign interrupt_last_14$D_IN = interrupt_design[10] ;
+  assign interrupt_last_14$EN = 1'd1 ;
+
+  // register interrupt_last_15
+  assign interrupt_last_15$D_IN = interrupt_design[11] ;
+  assign interrupt_last_15$EN = 1'd1 ;
+
+  // register interrupt_last_16
+  assign interrupt_last_16$D_IN = interrupt_design[12] ;
+  assign interrupt_last_16$EN = 1'd1 ;
+
+  // register interrupt_last_17
+  assign interrupt_last_17$D_IN = interrupt_design[13] ;
+  assign interrupt_last_17$EN = 1'd1 ;
+
+  // register interrupt_last_18
+  assign interrupt_last_18$D_IN = interrupt_design[14] ;
+  assign interrupt_last_18$EN = 1'd1 ;
+
+  // register interrupt_last_19
+  assign interrupt_last_19$D_IN = interrupt_design[15] ;
+  assign interrupt_last_19$EN = 1'd1 ;
+
+  // register interrupt_last_2
+  assign interrupt_last_2$D_IN = interrupt_pcie[2] ;
+  assign interrupt_last_2$EN = 1'd1 ;
+
+  // register interrupt_last_20
+  assign interrupt_last_20$D_IN = interrupt_design[16] ;
+  assign interrupt_last_20$EN = 1'd1 ;
+
+  // register interrupt_last_21
+  assign interrupt_last_21$D_IN = interrupt_design[17] ;
+  assign interrupt_last_21$EN = 1'd1 ;
+
+  // register interrupt_last_22
+  assign interrupt_last_22$D_IN = interrupt_design[18] ;
+  assign interrupt_last_22$EN = 1'd1 ;
+
+  // register interrupt_last_23
+  assign interrupt_last_23$D_IN = interrupt_design[19] ;
+  assign interrupt_last_23$EN = 1'd1 ;
+
+  // register interrupt_last_24
+  assign interrupt_last_24$D_IN = interrupt_design[20] ;
+  assign interrupt_last_24$EN = 1'd1 ;
+
+  // register interrupt_last_25
+  assign interrupt_last_25$D_IN = interrupt_design[21] ;
+  assign interrupt_last_25$EN = 1'd1 ;
+
+  // register interrupt_last_26
+  assign interrupt_last_26$D_IN = interrupt_design[22] ;
+  assign interrupt_last_26$EN = 1'd1 ;
+
+  // register interrupt_last_27
+  assign interrupt_last_27$D_IN = interrupt_design[23] ;
+  assign interrupt_last_27$EN = 1'd1 ;
+
+  // register interrupt_last_28
+  assign interrupt_last_28$D_IN = interrupt_design[24] ;
+  assign interrupt_last_28$EN = 1'd1 ;
+
+  // register interrupt_last_29
+  assign interrupt_last_29$D_IN = interrupt_design[25] ;
+  assign interrupt_last_29$EN = 1'd1 ;
+
+  // register interrupt_last_3
+  assign interrupt_last_3$D_IN = interrupt_pcie[3] ;
+  assign interrupt_last_3$EN = 1'd1 ;
+
+  // register interrupt_last_30
+  assign interrupt_last_30$D_IN = interrupt_design[26] ;
+  assign interrupt_last_30$EN = 1'd1 ;
+
+  // register interrupt_last_31
+  assign interrupt_last_31$D_IN = interrupt_design[27] ;
+  assign interrupt_last_31$EN = 1'd1 ;
+
+  // register interrupt_last_32
+  assign interrupt_last_32$D_IN = interrupt_design[28] ;
+  assign interrupt_last_32$EN = 1'd1 ;
+
+  // register interrupt_last_33
+  assign interrupt_last_33$D_IN = interrupt_design[29] ;
+  assign interrupt_last_33$EN = 1'd1 ;
+
+  // register interrupt_last_34
+  assign interrupt_last_34$D_IN = interrupt_design[30] ;
+  assign interrupt_last_34$EN = 1'd1 ;
+
+  // register interrupt_last_35
+  assign interrupt_last_35$D_IN = interrupt_design[31] ;
+  assign interrupt_last_35$EN = 1'd1 ;
+
+  // register interrupt_last_36
+  assign interrupt_last_36$D_IN = interrupt_design[32] ;
+  assign interrupt_last_36$EN = 1'd1 ;
+
+  // register interrupt_last_37
+  assign interrupt_last_37$D_IN = interrupt_design[33] ;
+  assign interrupt_last_37$EN = 1'd1 ;
+
+  // register interrupt_last_38
+  assign interrupt_last_38$D_IN = interrupt_design[34] ;
+  assign interrupt_last_38$EN = 1'd1 ;
+
+  // register interrupt_last_39
+  assign interrupt_last_39$D_IN = interrupt_design[35] ;
+  assign interrupt_last_39$EN = 1'd1 ;
+
+  // register interrupt_last_4
+  assign interrupt_last_4$D_IN = interrupt_design[0] ;
+  assign interrupt_last_4$EN = 1'd1 ;
+
+  // register interrupt_last_40
+  assign interrupt_last_40$D_IN = interrupt_design[36] ;
+  assign interrupt_last_40$EN = 1'd1 ;
+
+  // register interrupt_last_41
+  assign interrupt_last_41$D_IN = interrupt_design[37] ;
+  assign interrupt_last_41$EN = 1'd1 ;
+
+  // register interrupt_last_42
+  assign interrupt_last_42$D_IN = interrupt_design[38] ;
+  assign interrupt_last_42$EN = 1'd1 ;
+
+  // register interrupt_last_43
+  assign interrupt_last_43$D_IN = interrupt_design[39] ;
+  assign interrupt_last_43$EN = 1'd1 ;
+
+  // register interrupt_last_44
+  assign interrupt_last_44$D_IN = interrupt_design[40] ;
+  assign interrupt_last_44$EN = 1'd1 ;
+
+  // register interrupt_last_45
+  assign interrupt_last_45$D_IN = interrupt_design[41] ;
+  assign interrupt_last_45$EN = 1'd1 ;
+
+  // register interrupt_last_46
+  assign interrupt_last_46$D_IN = interrupt_design[42] ;
+  assign interrupt_last_46$EN = 1'd1 ;
+
+  // register interrupt_last_47
+  assign interrupt_last_47$D_IN = interrupt_design[43] ;
+  assign interrupt_last_47$EN = 1'd1 ;
+
+  // register interrupt_last_48
+  assign interrupt_last_48$D_IN = interrupt_design[44] ;
+  assign interrupt_last_48$EN = 1'd1 ;
+
+  // register interrupt_last_49
+  assign interrupt_last_49$D_IN = interrupt_design[45] ;
+  assign interrupt_last_49$EN = 1'd1 ;
+
+  // register interrupt_last_5
+  assign interrupt_last_5$D_IN = interrupt_design[1] ;
+  assign interrupt_last_5$EN = 1'd1 ;
+
+  // register interrupt_last_50
+  assign interrupt_last_50$D_IN = interrupt_design[46] ;
+  assign interrupt_last_50$EN = 1'd1 ;
+
+  // register interrupt_last_51
+  assign interrupt_last_51$D_IN = interrupt_design[47] ;
+  assign interrupt_last_51$EN = 1'd1 ;
+
+  // register interrupt_last_52
+  assign interrupt_last_52$D_IN = interrupt_design[48] ;
+  assign interrupt_last_52$EN = 1'd1 ;
+
+  // register interrupt_last_53
+  assign interrupt_last_53$D_IN = interrupt_design[49] ;
+  assign interrupt_last_53$EN = 1'd1 ;
+
+  // register interrupt_last_54
+  assign interrupt_last_54$D_IN = interrupt_design[50] ;
+  assign interrupt_last_54$EN = 1'd1 ;
+
+  // register interrupt_last_55
+  assign interrupt_last_55$D_IN = interrupt_design[51] ;
+  assign interrupt_last_55$EN = 1'd1 ;
+
+  // register interrupt_last_56
+  assign interrupt_last_56$D_IN = interrupt_design[52] ;
+  assign interrupt_last_56$EN = 1'd1 ;
+
+  // register interrupt_last_57
+  assign interrupt_last_57$D_IN = interrupt_design[53] ;
+  assign interrupt_last_57$EN = 1'd1 ;
+
+  // register interrupt_last_58
+  assign interrupt_last_58$D_IN = interrupt_design[54] ;
+  assign interrupt_last_58$EN = 1'd1 ;
+
+  // register interrupt_last_59
+  assign interrupt_last_59$D_IN = interrupt_design[55] ;
+  assign interrupt_last_59$EN = 1'd1 ;
+
+  // register interrupt_last_6
+  assign interrupt_last_6$D_IN = interrupt_design[2] ;
+  assign interrupt_last_6$EN = 1'd1 ;
+
+  // register interrupt_last_60
+  assign interrupt_last_60$D_IN = interrupt_design[56] ;
+  assign interrupt_last_60$EN = 1'd1 ;
+
+  // register interrupt_last_61
+  assign interrupt_last_61$D_IN = interrupt_design[57] ;
+  assign interrupt_last_61$EN = 1'd1 ;
+
+  // register interrupt_last_62
+  assign interrupt_last_62$D_IN = interrupt_design[58] ;
+  assign interrupt_last_62$EN = 1'd1 ;
+
+  // register interrupt_last_63
+  assign interrupt_last_63$D_IN = interrupt_design[59] ;
+  assign interrupt_last_63$EN = 1'd1 ;
+
+  // register interrupt_last_64
+  assign interrupt_last_64$D_IN = interrupt_design[60] ;
+  assign interrupt_last_64$EN = 1'd1 ;
+
+  // register interrupt_last_65
+  assign interrupt_last_65$D_IN = interrupt_design[61] ;
+  assign interrupt_last_65$EN = 1'd1 ;
+
+  // register interrupt_last_66
+  assign interrupt_last_66$D_IN = interrupt_design[62] ;
+  assign interrupt_last_66$EN = 1'd1 ;
+
+  // register interrupt_last_67
+  assign interrupt_last_67$D_IN = interrupt_design[63] ;
+  assign interrupt_last_67$EN = 1'd1 ;
+
+  // register interrupt_last_68
+  assign interrupt_last_68$D_IN = interrupt_design[64] ;
+  assign interrupt_last_68$EN = 1'd1 ;
+
+  // register interrupt_last_69
+  assign interrupt_last_69$D_IN = interrupt_design[65] ;
+  assign interrupt_last_69$EN = 1'd1 ;
+
+  // register interrupt_last_7
+  assign interrupt_last_7$D_IN = interrupt_design[3] ;
+  assign interrupt_last_7$EN = 1'd1 ;
+
+  // register interrupt_last_70
+  assign interrupt_last_70$D_IN = interrupt_design[66] ;
+  assign interrupt_last_70$EN = 1'd1 ;
+
+  // register interrupt_last_71
+  assign interrupt_last_71$D_IN = interrupt_design[67] ;
+  assign interrupt_last_71$EN = 1'd1 ;
+
+  // register interrupt_last_72
+  assign interrupt_last_72$D_IN = interrupt_design[68] ;
+  assign interrupt_last_72$EN = 1'd1 ;
+
+  // register interrupt_last_73
+  assign interrupt_last_73$D_IN = interrupt_design[69] ;
+  assign interrupt_last_73$EN = 1'd1 ;
+
+  // register interrupt_last_74
+  assign interrupt_last_74$D_IN = interrupt_design[70] ;
+  assign interrupt_last_74$EN = 1'd1 ;
+
+  // register interrupt_last_75
+  assign interrupt_last_75$D_IN = interrupt_design[71] ;
+  assign interrupt_last_75$EN = 1'd1 ;
+
+  // register interrupt_last_76
+  assign interrupt_last_76$D_IN = interrupt_design[72] ;
+  assign interrupt_last_76$EN = 1'd1 ;
+
+  // register interrupt_last_77
+  assign interrupt_last_77$D_IN = interrupt_design[73] ;
+  assign interrupt_last_77$EN = 1'd1 ;
+
+  // register interrupt_last_78
+  assign interrupt_last_78$D_IN = interrupt_design[74] ;
+  assign interrupt_last_78$EN = 1'd1 ;
+
+  // register interrupt_last_79
+  assign interrupt_last_79$D_IN = interrupt_design[75] ;
+  assign interrupt_last_79$EN = 1'd1 ;
+
+  // register interrupt_last_8
+  assign interrupt_last_8$D_IN = interrupt_design[4] ;
+  assign interrupt_last_8$EN = 1'd1 ;
+
+  // register interrupt_last_80
+  assign interrupt_last_80$D_IN = interrupt_design[76] ;
+  assign interrupt_last_80$EN = 1'd1 ;
+
+  // register interrupt_last_81
+  assign interrupt_last_81$D_IN = interrupt_design[77] ;
+  assign interrupt_last_81$EN = 1'd1 ;
+
+  // register interrupt_last_82
+  assign interrupt_last_82$D_IN = interrupt_design[78] ;
+  assign interrupt_last_82$EN = 1'd1 ;
+
+  // register interrupt_last_83
+  assign interrupt_last_83$D_IN = interrupt_design[79] ;
+  assign interrupt_last_83$EN = 1'd1 ;
+
+  // register interrupt_last_84
+  assign interrupt_last_84$D_IN = interrupt_design[80] ;
+  assign interrupt_last_84$EN = 1'd1 ;
+
+  // register interrupt_last_85
+  assign interrupt_last_85$D_IN = interrupt_design[81] ;
+  assign interrupt_last_85$EN = 1'd1 ;
+
+  // register interrupt_last_86
+  assign interrupt_last_86$D_IN = interrupt_design[82] ;
+  assign interrupt_last_86$EN = 1'd1 ;
+
+  // register interrupt_last_87
+  assign interrupt_last_87$D_IN = interrupt_design[83] ;
+  assign interrupt_last_87$EN = 1'd1 ;
+
+  // register interrupt_last_88
+  assign interrupt_last_88$D_IN = interrupt_design[84] ;
+  assign interrupt_last_88$EN = 1'd1 ;
+
+  // register interrupt_last_89
+  assign interrupt_last_89$D_IN = interrupt_design[85] ;
+  assign interrupt_last_89$EN = 1'd1 ;
+
+  // register interrupt_last_9
+  assign interrupt_last_9$D_IN = interrupt_design[5] ;
+  assign interrupt_last_9$EN = 1'd1 ;
+
+  // register interrupt_last_90
+  assign interrupt_last_90$D_IN = interrupt_design[86] ;
+  assign interrupt_last_90$EN = 1'd1 ;
+
+  // register interrupt_last_91
+  assign interrupt_last_91$D_IN = interrupt_design[87] ;
+  assign interrupt_last_91$EN = 1'd1 ;
+
+  // register interrupt_last_92
+  assign interrupt_last_92$D_IN = interrupt_design[88] ;
+  assign interrupt_last_92$EN = 1'd1 ;
+
+  // register interrupt_last_93
+  assign interrupt_last_93$D_IN = interrupt_design[89] ;
+  assign interrupt_last_93$EN = 1'd1 ;
+
+  // register interrupt_last_94
+  assign interrupt_last_94$D_IN = interrupt_design[90] ;
+  assign interrupt_last_94$EN = 1'd1 ;
+
+  // register interrupt_last_95
+  assign interrupt_last_95$D_IN = interrupt_design[91] ;
+  assign interrupt_last_95$EN = 1'd1 ;
+
+  // register interrupt_last_96
+  assign interrupt_last_96$D_IN = interrupt_design[92] ;
+  assign interrupt_last_96$EN = 1'd1 ;
+
+  // register interrupt_last_97
+  assign interrupt_last_97$D_IN = interrupt_design[93] ;
+  assign interrupt_last_97$EN = 1'd1 ;
+
+  // register interrupt_last_98
+  assign interrupt_last_98$D_IN = interrupt_design[94] ;
+  assign interrupt_last_98$EN = 1'd1 ;
+
+  // register interrupt_last_99
+  assign interrupt_last_99$D_IN = interrupt_design[95] ;
+  assign interrupt_last_99$EN = 1'd1 ;
+
+  // register s_config_readBusy
+  assign s_config_readBusy$D_IN = 1'b0 ;
+  assign s_config_readBusy$EN = 1'b0 ;
+
+  // register s_config_writeBusy
+  assign s_config_writeBusy$D_IN = 1'b0 ;
+  assign s_config_writeBusy$EN = 1'b0 ;
+
+  // register s_config_writeSlave_addrIn_rv
+  assign s_config_writeSlave_addrIn_rv$D_IN =
+	     s_config_writeSlave_addrIn_rv$port2__read ;
+  assign s_config_writeSlave_addrIn_rv$EN = 1'b1 ;
+
+  // register s_config_writeSlave_dataIn_rv
+  assign s_config_writeSlave_dataIn_rv$D_IN =
+	     s_config_writeSlave_dataIn_rv$port2__read ;
+  assign s_config_writeSlave_dataIn_rv$EN = 1'b1 ;
+
+  // register sh_active_0
+  assign sh_active_0$D_IN = sh_active_0_1$whas ;
+  assign sh_active_0$EN = 1'd1 ;
+
+  // register sh_active_1
+  assign sh_active_1$D_IN = sh_active_1_1$whas ;
+  assign sh_active_1$EN = 1'd1 ;
+
+  // register sh_active_10
+  assign sh_active_10$D_IN = 1'b0 ;
+  assign sh_active_10$EN = 1'd1 ;
+
+  // register sh_active_11
+  assign sh_active_11$D_IN = 1'b0 ;
+  assign sh_active_11$EN = 1'd1 ;
+
+  // register sh_active_12
+  assign sh_active_12$D_IN = 1'b0 ;
+  assign sh_active_12$EN = 1'd1 ;
+
+  // register sh_active_13
+  assign sh_active_13$D_IN = 1'b0 ;
+  assign sh_active_13$EN = 1'd1 ;
+
+  // register sh_active_14
+  assign sh_active_14$D_IN = 1'b0 ;
+  assign sh_active_14$EN = 1'd1 ;
+
+  // register sh_active_15
+  assign sh_active_15$D_IN = 1'b0 ;
+  assign sh_active_15$EN = 1'd1 ;
+
+  // register sh_active_2
+  assign sh_active_2$D_IN = sh_active_2_1$whas ;
+  assign sh_active_2$EN = 1'd1 ;
+
+  // register sh_active_3
+  assign sh_active_3$D_IN = sh_active_3_1$whas ;
+  assign sh_active_3$EN = 1'd1 ;
+
+  // register sh_active_4
+  assign sh_active_4$D_IN = sh_active_4_1$whas ;
+  assign sh_active_4$EN = 1'd1 ;
+
+  // register sh_active_5
+  assign sh_active_5$D_IN = sh_active_5_1$whas ;
+  assign sh_active_5$EN = 1'd1 ;
+
+  // register sh_active_6
+  assign sh_active_6$D_IN = sh_active_6_1$whas ;
+  assign sh_active_6$EN = 1'd1 ;
+
+  // register sh_active_7
+  assign sh_active_7$D_IN = sh_active_7_1$whas ;
+  assign sh_active_7$EN = 1'd1 ;
+
+  // register sh_active_8
+  assign sh_active_8$D_IN = 1'b0 ;
+  assign sh_active_8$EN = 1'd1 ;
+
+  // register sh_active_9
+  assign sh_active_9$D_IN = 1'b0 ;
+  assign sh_active_9$EN = 1'd1 ;
+
+  // register sh_wait_ack_0
+  assign sh_wait_ack_0$D_IN = sh_wait_ack_0$port2__read ;
+  assign sh_wait_ack_0$EN = 1'b1 ;
+
+  // register sh_wait_ack_1
+  assign sh_wait_ack_1$D_IN = sh_wait_ack_1$port2__read ;
+  assign sh_wait_ack_1$EN = 1'b1 ;
+
+  // register sh_wait_ack_10
+  assign sh_wait_ack_10$D_IN = sh_wait_ack_10$port1__read ;
+  assign sh_wait_ack_10$EN = 1'b1 ;
+
+  // register sh_wait_ack_11
+  assign sh_wait_ack_11$D_IN = sh_wait_ack_11$port1__read ;
+  assign sh_wait_ack_11$EN = 1'b1 ;
+
+  // register sh_wait_ack_12
+  assign sh_wait_ack_12$D_IN = sh_wait_ack_12$port1__read ;
+  assign sh_wait_ack_12$EN = 1'b1 ;
+
+  // register sh_wait_ack_13
+  assign sh_wait_ack_13$D_IN = sh_wait_ack_13$port1__read ;
+  assign sh_wait_ack_13$EN = 1'b1 ;
+
+  // register sh_wait_ack_14
+  assign sh_wait_ack_14$D_IN = sh_wait_ack_14$port1__read ;
+  assign sh_wait_ack_14$EN = 1'b1 ;
+
+  // register sh_wait_ack_15
+  assign sh_wait_ack_15$D_IN = sh_wait_ack_15$port1__read ;
+  assign sh_wait_ack_15$EN = 1'b1 ;
+
+  // register sh_wait_ack_2
+  assign sh_wait_ack_2$D_IN = sh_wait_ack_2$port2__read ;
+  assign sh_wait_ack_2$EN = 1'b1 ;
+
+  // register sh_wait_ack_3
+  assign sh_wait_ack_3$D_IN = sh_wait_ack_3$port2__read ;
+  assign sh_wait_ack_3$EN = 1'b1 ;
+
+  // register sh_wait_ack_4
+  assign sh_wait_ack_4$D_IN = sh_wait_ack_4$port2__read ;
+  assign sh_wait_ack_4$EN = 1'b1 ;
+
+  // register sh_wait_ack_5
+  assign sh_wait_ack_5$D_IN = sh_wait_ack_5$port2__read ;
+  assign sh_wait_ack_5$EN = 1'b1 ;
+
+  // register sh_wait_ack_6
+  assign sh_wait_ack_6$D_IN = sh_wait_ack_6$port2__read ;
+  assign sh_wait_ack_6$EN = 1'b1 ;
+
+  // register sh_wait_ack_7
+  assign sh_wait_ack_7$D_IN = sh_wait_ack_7$port2__read ;
+  assign sh_wait_ack_7$EN = 1'b1 ;
+
+  // register sh_wait_ack_8
+  assign sh_wait_ack_8$D_IN = sh_wait_ack_8$port1__read ;
+  assign sh_wait_ack_8$EN = 1'b1 ;
+
+  // register sh_wait_ack_9
+  assign sh_wait_ack_9$D_IN = sh_wait_ack_9$port1__read ;
+  assign sh_wait_ack_9$EN = 1'b1 ;
+
+  // submodule ackFIFO
+  assign ackFIFO$D_IN = s_config_writeSlave_in$D_OUT[14:7] ;
+  assign ackFIFO$ENQ = WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 ;
+  assign ackFIFO$DEQ =
+	     WILL_FIRE_RL_doAck_3 || WILL_FIRE_RL_doAck_2 ||
+	     WILL_FIRE_RL_doAck_1 ||
+	     WILL_FIRE_RL_doAck ||
+	     WILL_FIRE_RL_dropInvalidACK ;
+  assign ackFIFO$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_0
+  assign pending_interrupts_0$D_IN = 1'd1 ;
+  assign pending_interrupts_0$ENQ =
+	     pending_interrupts_0$FULL_N && !interrupt_last_0 &&
+	     interrupt_pcie[0] ;
+  assign pending_interrupts_0$DEQ = sh_active_0_1$whas ;
+  assign pending_interrupts_0$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_1
+  assign pending_interrupts_1$D_IN = 1'd1 ;
+  assign pending_interrupts_1$ENQ =
+	     pending_interrupts_1$FULL_N && !interrupt_last_1 &&
+	     interrupt_pcie[1] ;
+  assign pending_interrupts_1$DEQ = sh_active_1_1$whas ;
+  assign pending_interrupts_1$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_10
+  assign pending_interrupts_10$D_IN = 1'd1 ;
+  assign pending_interrupts_10$ENQ =
+	     pending_interrupts_10$FULL_N && sync_10$dPulse ;
+  assign pending_interrupts_10$DEQ =
+	     pending_interrupts_10$EMPTY_N &&
+	     !host_pending_design_6$port1__read ;
+  assign pending_interrupts_10$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_100
+  assign pending_interrupts_100$D_IN = 1'd1 ;
+  assign pending_interrupts_100$ENQ =
+	     pending_interrupts_100$FULL_N && sync_100$dPulse ;
+  assign pending_interrupts_100$DEQ =
+	     pending_interrupts_100$EMPTY_N &&
+	     !host_pending_design_96$port1__read ;
+  assign pending_interrupts_100$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_101
+  assign pending_interrupts_101$D_IN = 1'd1 ;
+  assign pending_interrupts_101$ENQ =
+	     pending_interrupts_101$FULL_N && sync_101$dPulse ;
+  assign pending_interrupts_101$DEQ =
+	     pending_interrupts_101$EMPTY_N &&
+	     !host_pending_design_97$port1__read ;
+  assign pending_interrupts_101$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_102
+  assign pending_interrupts_102$D_IN = 1'd1 ;
+  assign pending_interrupts_102$ENQ =
+	     pending_interrupts_102$FULL_N && sync_102$dPulse ;
+  assign pending_interrupts_102$DEQ =
+	     pending_interrupts_102$EMPTY_N &&
+	     !host_pending_design_98$port1__read ;
+  assign pending_interrupts_102$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_103
+  assign pending_interrupts_103$D_IN = 1'd1 ;
+  assign pending_interrupts_103$ENQ =
+	     pending_interrupts_103$FULL_N && sync_103$dPulse ;
+  assign pending_interrupts_103$DEQ =
+	     pending_interrupts_103$EMPTY_N &&
+	     !host_pending_design_99$port1__read ;
+  assign pending_interrupts_103$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_104
+  assign pending_interrupts_104$D_IN = 1'd1 ;
+  assign pending_interrupts_104$ENQ =
+	     pending_interrupts_104$FULL_N && sync_104$dPulse ;
+  assign pending_interrupts_104$DEQ =
+	     pending_interrupts_104$EMPTY_N &&
+	     !host_pending_design_100$port1__read ;
+  assign pending_interrupts_104$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_105
+  assign pending_interrupts_105$D_IN = 1'd1 ;
+  assign pending_interrupts_105$ENQ =
+	     pending_interrupts_105$FULL_N && sync_105$dPulse ;
+  assign pending_interrupts_105$DEQ =
+	     pending_interrupts_105$EMPTY_N &&
+	     !host_pending_design_101$port1__read ;
+  assign pending_interrupts_105$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_106
+  assign pending_interrupts_106$D_IN = 1'd1 ;
+  assign pending_interrupts_106$ENQ =
+	     pending_interrupts_106$FULL_N && sync_106$dPulse ;
+  assign pending_interrupts_106$DEQ =
+	     pending_interrupts_106$EMPTY_N &&
+	     !host_pending_design_102$port1__read ;
+  assign pending_interrupts_106$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_107
+  assign pending_interrupts_107$D_IN = 1'd1 ;
+  assign pending_interrupts_107$ENQ =
+	     pending_interrupts_107$FULL_N && sync_107$dPulse ;
+  assign pending_interrupts_107$DEQ =
+	     pending_interrupts_107$EMPTY_N &&
+	     !host_pending_design_103$port1__read ;
+  assign pending_interrupts_107$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_108
+  assign pending_interrupts_108$D_IN = 1'd1 ;
+  assign pending_interrupts_108$ENQ =
+	     pending_interrupts_108$FULL_N && sync_108$dPulse ;
+  assign pending_interrupts_108$DEQ =
+	     pending_interrupts_108$EMPTY_N &&
+	     !host_pending_design_104$port1__read ;
+  assign pending_interrupts_108$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_109
+  assign pending_interrupts_109$D_IN = 1'd1 ;
+  assign pending_interrupts_109$ENQ =
+	     pending_interrupts_109$FULL_N && sync_109$dPulse ;
+  assign pending_interrupts_109$DEQ =
+	     pending_interrupts_109$EMPTY_N &&
+	     !host_pending_design_105$port1__read ;
+  assign pending_interrupts_109$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_11
+  assign pending_interrupts_11$D_IN = 1'd1 ;
+  assign pending_interrupts_11$ENQ =
+	     pending_interrupts_11$FULL_N && sync_11$dPulse ;
+  assign pending_interrupts_11$DEQ =
+	     pending_interrupts_11$EMPTY_N &&
+	     !host_pending_design_7$port1__read ;
+  assign pending_interrupts_11$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_110
+  assign pending_interrupts_110$D_IN = 1'd1 ;
+  assign pending_interrupts_110$ENQ =
+	     pending_interrupts_110$FULL_N && sync_110$dPulse ;
+  assign pending_interrupts_110$DEQ =
+	     pending_interrupts_110$EMPTY_N &&
+	     !host_pending_design_106$port1__read ;
+  assign pending_interrupts_110$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_111
+  assign pending_interrupts_111$D_IN = 1'd1 ;
+  assign pending_interrupts_111$ENQ =
+	     pending_interrupts_111$FULL_N && sync_111$dPulse ;
+  assign pending_interrupts_111$DEQ =
+	     pending_interrupts_111$EMPTY_N &&
+	     !host_pending_design_107$port1__read ;
+  assign pending_interrupts_111$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_112
+  assign pending_interrupts_112$D_IN = 1'd1 ;
+  assign pending_interrupts_112$ENQ =
+	     pending_interrupts_112$FULL_N && sync_112$dPulse ;
+  assign pending_interrupts_112$DEQ =
+	     pending_interrupts_112$EMPTY_N &&
+	     !host_pending_design_108$port1__read ;
+  assign pending_interrupts_112$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_113
+  assign pending_interrupts_113$D_IN = 1'd1 ;
+  assign pending_interrupts_113$ENQ =
+	     pending_interrupts_113$FULL_N && sync_113$dPulse ;
+  assign pending_interrupts_113$DEQ =
+	     pending_interrupts_113$EMPTY_N &&
+	     !host_pending_design_109$port1__read ;
+  assign pending_interrupts_113$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_114
+  assign pending_interrupts_114$D_IN = 1'd1 ;
+  assign pending_interrupts_114$ENQ =
+	     pending_interrupts_114$FULL_N && sync_114$dPulse ;
+  assign pending_interrupts_114$DEQ =
+	     pending_interrupts_114$EMPTY_N &&
+	     !host_pending_design_110$port1__read ;
+  assign pending_interrupts_114$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_115
+  assign pending_interrupts_115$D_IN = 1'd1 ;
+  assign pending_interrupts_115$ENQ =
+	     pending_interrupts_115$FULL_N && sync_115$dPulse ;
+  assign pending_interrupts_115$DEQ =
+	     pending_interrupts_115$EMPTY_N &&
+	     !host_pending_design_111$port1__read ;
+  assign pending_interrupts_115$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_116
+  assign pending_interrupts_116$D_IN = 1'd1 ;
+  assign pending_interrupts_116$ENQ =
+	     pending_interrupts_116$FULL_N && sync_116$dPulse ;
+  assign pending_interrupts_116$DEQ =
+	     pending_interrupts_116$EMPTY_N &&
+	     !host_pending_design_112$port1__read ;
+  assign pending_interrupts_116$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_117
+  assign pending_interrupts_117$D_IN = 1'd1 ;
+  assign pending_interrupts_117$ENQ =
+	     pending_interrupts_117$FULL_N && sync_117$dPulse ;
+  assign pending_interrupts_117$DEQ =
+	     pending_interrupts_117$EMPTY_N &&
+	     !host_pending_design_113$port1__read ;
+  assign pending_interrupts_117$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_118
+  assign pending_interrupts_118$D_IN = 1'd1 ;
+  assign pending_interrupts_118$ENQ =
+	     pending_interrupts_118$FULL_N && sync_118$dPulse ;
+  assign pending_interrupts_118$DEQ =
+	     pending_interrupts_118$EMPTY_N &&
+	     !host_pending_design_114$port1__read ;
+  assign pending_interrupts_118$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_119
+  assign pending_interrupts_119$D_IN = 1'd1 ;
+  assign pending_interrupts_119$ENQ =
+	     pending_interrupts_119$FULL_N && sync_119$dPulse ;
+  assign pending_interrupts_119$DEQ =
+	     pending_interrupts_119$EMPTY_N &&
+	     !host_pending_design_115$port1__read ;
+  assign pending_interrupts_119$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_12
+  assign pending_interrupts_12$D_IN = 1'd1 ;
+  assign pending_interrupts_12$ENQ =
+	     pending_interrupts_12$FULL_N && sync_12$dPulse ;
+  assign pending_interrupts_12$DEQ =
+	     pending_interrupts_12$EMPTY_N &&
+	     !host_pending_design_8$port1__read ;
+  assign pending_interrupts_12$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_120
+  assign pending_interrupts_120$D_IN = 1'd1 ;
+  assign pending_interrupts_120$ENQ =
+	     pending_interrupts_120$FULL_N && sync_120$dPulse ;
+  assign pending_interrupts_120$DEQ =
+	     pending_interrupts_120$EMPTY_N &&
+	     !host_pending_design_116$port1__read ;
+  assign pending_interrupts_120$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_121
+  assign pending_interrupts_121$D_IN = 1'd1 ;
+  assign pending_interrupts_121$ENQ =
+	     pending_interrupts_121$FULL_N && sync_121$dPulse ;
+  assign pending_interrupts_121$DEQ =
+	     pending_interrupts_121$EMPTY_N &&
+	     !host_pending_design_117$port1__read ;
+  assign pending_interrupts_121$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_122
+  assign pending_interrupts_122$D_IN = 1'd1 ;
+  assign pending_interrupts_122$ENQ =
+	     pending_interrupts_122$FULL_N && sync_122$dPulse ;
+  assign pending_interrupts_122$DEQ =
+	     pending_interrupts_122$EMPTY_N &&
+	     !host_pending_design_118$port1__read ;
+  assign pending_interrupts_122$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_123
+  assign pending_interrupts_123$D_IN = 1'd1 ;
+  assign pending_interrupts_123$ENQ =
+	     pending_interrupts_123$FULL_N && sync_123$dPulse ;
+  assign pending_interrupts_123$DEQ =
+	     pending_interrupts_123$EMPTY_N &&
+	     !host_pending_design_119$port1__read ;
+  assign pending_interrupts_123$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_124
+  assign pending_interrupts_124$D_IN = 1'd1 ;
+  assign pending_interrupts_124$ENQ =
+	     pending_interrupts_124$FULL_N && sync_124$dPulse ;
+  assign pending_interrupts_124$DEQ =
+	     pending_interrupts_124$EMPTY_N &&
+	     !host_pending_design_120$port1__read ;
+  assign pending_interrupts_124$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_125
+  assign pending_interrupts_125$D_IN = 1'd1 ;
+  assign pending_interrupts_125$ENQ =
+	     pending_interrupts_125$FULL_N && sync_125$dPulse ;
+  assign pending_interrupts_125$DEQ =
+	     pending_interrupts_125$EMPTY_N &&
+	     !host_pending_design_121$port1__read ;
+  assign pending_interrupts_125$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_126
+  assign pending_interrupts_126$D_IN = 1'd1 ;
+  assign pending_interrupts_126$ENQ =
+	     pending_interrupts_126$FULL_N && sync_126$dPulse ;
+  assign pending_interrupts_126$DEQ =
+	     pending_interrupts_126$EMPTY_N &&
+	     !host_pending_design_122$port1__read ;
+  assign pending_interrupts_126$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_127
+  assign pending_interrupts_127$D_IN = 1'd1 ;
+  assign pending_interrupts_127$ENQ =
+	     pending_interrupts_127$FULL_N && sync_127$dPulse ;
+  assign pending_interrupts_127$DEQ =
+	     pending_interrupts_127$EMPTY_N &&
+	     !host_pending_design_123$port1__read ;
+  assign pending_interrupts_127$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_128
+  assign pending_interrupts_128$D_IN = 1'd1 ;
+  assign pending_interrupts_128$ENQ =
+	     pending_interrupts_128$FULL_N && sync_128$dPulse ;
+  assign pending_interrupts_128$DEQ =
+	     pending_interrupts_128$EMPTY_N &&
+	     !host_pending_design_124$port1__read ;
+  assign pending_interrupts_128$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_129
+  assign pending_interrupts_129$D_IN = 1'd1 ;
+  assign pending_interrupts_129$ENQ =
+	     pending_interrupts_129$FULL_N && sync_129$dPulse ;
+  assign pending_interrupts_129$DEQ =
+	     pending_interrupts_129$EMPTY_N &&
+	     !host_pending_design_125$port1__read ;
+  assign pending_interrupts_129$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_13
+  assign pending_interrupts_13$D_IN = 1'd1 ;
+  assign pending_interrupts_13$ENQ =
+	     pending_interrupts_13$FULL_N && sync_13$dPulse ;
+  assign pending_interrupts_13$DEQ =
+	     pending_interrupts_13$EMPTY_N &&
+	     !host_pending_design_9$port1__read ;
+  assign pending_interrupts_13$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_130
+  assign pending_interrupts_130$D_IN = 1'd1 ;
+  assign pending_interrupts_130$ENQ =
+	     pending_interrupts_130$FULL_N && sync_130$dPulse ;
+  assign pending_interrupts_130$DEQ =
+	     pending_interrupts_130$EMPTY_N &&
+	     !host_pending_design_126$port1__read ;
+  assign pending_interrupts_130$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_131
+  assign pending_interrupts_131$D_IN = 1'd1 ;
+  assign pending_interrupts_131$ENQ =
+	     pending_interrupts_131$FULL_N && sync_131$dPulse ;
+  assign pending_interrupts_131$DEQ =
+	     pending_interrupts_131$EMPTY_N &&
+	     !host_pending_design_127$port1__read ;
+  assign pending_interrupts_131$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_14
+  assign pending_interrupts_14$D_IN = 1'd1 ;
+  assign pending_interrupts_14$ENQ =
+	     pending_interrupts_14$FULL_N && sync_14$dPulse ;
+  assign pending_interrupts_14$DEQ =
+	     pending_interrupts_14$EMPTY_N &&
+	     !host_pending_design_10$port1__read ;
+  assign pending_interrupts_14$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_15
+  assign pending_interrupts_15$D_IN = 1'd1 ;
+  assign pending_interrupts_15$ENQ =
+	     pending_interrupts_15$FULL_N && sync_15$dPulse ;
+  assign pending_interrupts_15$DEQ =
+	     pending_interrupts_15$EMPTY_N &&
+	     !host_pending_design_11$port1__read ;
+  assign pending_interrupts_15$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_16
+  assign pending_interrupts_16$D_IN = 1'd1 ;
+  assign pending_interrupts_16$ENQ =
+	     pending_interrupts_16$FULL_N && sync_16$dPulse ;
+  assign pending_interrupts_16$DEQ =
+	     pending_interrupts_16$EMPTY_N &&
+	     !host_pending_design_12$port1__read ;
+  assign pending_interrupts_16$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_17
+  assign pending_interrupts_17$D_IN = 1'd1 ;
+  assign pending_interrupts_17$ENQ =
+	     pending_interrupts_17$FULL_N && sync_17$dPulse ;
+  assign pending_interrupts_17$DEQ =
+	     pending_interrupts_17$EMPTY_N &&
+	     !host_pending_design_13$port1__read ;
+  assign pending_interrupts_17$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_18
+  assign pending_interrupts_18$D_IN = 1'd1 ;
+  assign pending_interrupts_18$ENQ =
+	     pending_interrupts_18$FULL_N && sync_18$dPulse ;
+  assign pending_interrupts_18$DEQ =
+	     pending_interrupts_18$EMPTY_N &&
+	     !host_pending_design_14$port1__read ;
+  assign pending_interrupts_18$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_19
+  assign pending_interrupts_19$D_IN = 1'd1 ;
+  assign pending_interrupts_19$ENQ =
+	     pending_interrupts_19$FULL_N && sync_19$dPulse ;
+  assign pending_interrupts_19$DEQ =
+	     pending_interrupts_19$EMPTY_N &&
+	     !host_pending_design_15$port1__read ;
+  assign pending_interrupts_19$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_2
+  assign pending_interrupts_2$D_IN = 1'd1 ;
+  assign pending_interrupts_2$ENQ =
+	     pending_interrupts_2$FULL_N && !interrupt_last_2 &&
+	     interrupt_pcie[2] ;
+  assign pending_interrupts_2$DEQ = sh_active_2_1$whas ;
+  assign pending_interrupts_2$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_20
+  assign pending_interrupts_20$D_IN = 1'd1 ;
+  assign pending_interrupts_20$ENQ =
+	     pending_interrupts_20$FULL_N && sync_20$dPulse ;
+  assign pending_interrupts_20$DEQ =
+	     pending_interrupts_20$EMPTY_N &&
+	     !host_pending_design_16$port1__read ;
+  assign pending_interrupts_20$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_21
+  assign pending_interrupts_21$D_IN = 1'd1 ;
+  assign pending_interrupts_21$ENQ =
+	     pending_interrupts_21$FULL_N && sync_21$dPulse ;
+  assign pending_interrupts_21$DEQ =
+	     pending_interrupts_21$EMPTY_N &&
+	     !host_pending_design_17$port1__read ;
+  assign pending_interrupts_21$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_22
+  assign pending_interrupts_22$D_IN = 1'd1 ;
+  assign pending_interrupts_22$ENQ =
+	     pending_interrupts_22$FULL_N && sync_22$dPulse ;
+  assign pending_interrupts_22$DEQ =
+	     pending_interrupts_22$EMPTY_N &&
+	     !host_pending_design_18$port1__read ;
+  assign pending_interrupts_22$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_23
+  assign pending_interrupts_23$D_IN = 1'd1 ;
+  assign pending_interrupts_23$ENQ =
+	     pending_interrupts_23$FULL_N && sync_23$dPulse ;
+  assign pending_interrupts_23$DEQ =
+	     pending_interrupts_23$EMPTY_N &&
+	     !host_pending_design_19$port1__read ;
+  assign pending_interrupts_23$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_24
+  assign pending_interrupts_24$D_IN = 1'd1 ;
+  assign pending_interrupts_24$ENQ =
+	     pending_interrupts_24$FULL_N && sync_24$dPulse ;
+  assign pending_interrupts_24$DEQ =
+	     pending_interrupts_24$EMPTY_N &&
+	     !host_pending_design_20$port1__read ;
+  assign pending_interrupts_24$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_25
+  assign pending_interrupts_25$D_IN = 1'd1 ;
+  assign pending_interrupts_25$ENQ =
+	     pending_interrupts_25$FULL_N && sync_25$dPulse ;
+  assign pending_interrupts_25$DEQ =
+	     pending_interrupts_25$EMPTY_N &&
+	     !host_pending_design_21$port1__read ;
+  assign pending_interrupts_25$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_26
+  assign pending_interrupts_26$D_IN = 1'd1 ;
+  assign pending_interrupts_26$ENQ =
+	     pending_interrupts_26$FULL_N && sync_26$dPulse ;
+  assign pending_interrupts_26$DEQ =
+	     pending_interrupts_26$EMPTY_N &&
+	     !host_pending_design_22$port1__read ;
+  assign pending_interrupts_26$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_27
+  assign pending_interrupts_27$D_IN = 1'd1 ;
+  assign pending_interrupts_27$ENQ =
+	     pending_interrupts_27$FULL_N && sync_27$dPulse ;
+  assign pending_interrupts_27$DEQ =
+	     pending_interrupts_27$EMPTY_N &&
+	     !host_pending_design_23$port1__read ;
+  assign pending_interrupts_27$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_28
+  assign pending_interrupts_28$D_IN = 1'd1 ;
+  assign pending_interrupts_28$ENQ =
+	     pending_interrupts_28$FULL_N && sync_28$dPulse ;
+  assign pending_interrupts_28$DEQ =
+	     pending_interrupts_28$EMPTY_N &&
+	     !host_pending_design_24$port1__read ;
+  assign pending_interrupts_28$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_29
+  assign pending_interrupts_29$D_IN = 1'd1 ;
+  assign pending_interrupts_29$ENQ =
+	     pending_interrupts_29$FULL_N && sync_29$dPulse ;
+  assign pending_interrupts_29$DEQ =
+	     pending_interrupts_29$EMPTY_N &&
+	     !host_pending_design_25$port1__read ;
+  assign pending_interrupts_29$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_3
+  assign pending_interrupts_3$D_IN = 1'd1 ;
+  assign pending_interrupts_3$ENQ =
+	     pending_interrupts_3$FULL_N && !interrupt_last_3 &&
+	     interrupt_pcie[3] ;
+  assign pending_interrupts_3$DEQ = sh_active_3_1$whas ;
+  assign pending_interrupts_3$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_30
+  assign pending_interrupts_30$D_IN = 1'd1 ;
+  assign pending_interrupts_30$ENQ =
+	     pending_interrupts_30$FULL_N && sync_30$dPulse ;
+  assign pending_interrupts_30$DEQ =
+	     pending_interrupts_30$EMPTY_N &&
+	     !host_pending_design_26$port1__read ;
+  assign pending_interrupts_30$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_31
+  assign pending_interrupts_31$D_IN = 1'd1 ;
+  assign pending_interrupts_31$ENQ =
+	     pending_interrupts_31$FULL_N && sync_31$dPulse ;
+  assign pending_interrupts_31$DEQ =
+	     pending_interrupts_31$EMPTY_N &&
+	     !host_pending_design_27$port1__read ;
+  assign pending_interrupts_31$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_32
+  assign pending_interrupts_32$D_IN = 1'd1 ;
+  assign pending_interrupts_32$ENQ =
+	     pending_interrupts_32$FULL_N && sync_32$dPulse ;
+  assign pending_interrupts_32$DEQ =
+	     pending_interrupts_32$EMPTY_N &&
+	     !host_pending_design_28$port1__read ;
+  assign pending_interrupts_32$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_33
+  assign pending_interrupts_33$D_IN = 1'd1 ;
+  assign pending_interrupts_33$ENQ =
+	     pending_interrupts_33$FULL_N && sync_33$dPulse ;
+  assign pending_interrupts_33$DEQ =
+	     pending_interrupts_33$EMPTY_N &&
+	     !host_pending_design_29$port1__read ;
+  assign pending_interrupts_33$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_34
+  assign pending_interrupts_34$D_IN = 1'd1 ;
+  assign pending_interrupts_34$ENQ =
+	     pending_interrupts_34$FULL_N && sync_34$dPulse ;
+  assign pending_interrupts_34$DEQ =
+	     pending_interrupts_34$EMPTY_N &&
+	     !host_pending_design_30$port1__read ;
+  assign pending_interrupts_34$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_35
+  assign pending_interrupts_35$D_IN = 1'd1 ;
+  assign pending_interrupts_35$ENQ =
+	     pending_interrupts_35$FULL_N && sync_35$dPulse ;
+  assign pending_interrupts_35$DEQ =
+	     pending_interrupts_35$EMPTY_N &&
+	     !host_pending_design_31$port1__read ;
+  assign pending_interrupts_35$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_36
+  assign pending_interrupts_36$D_IN = 1'd1 ;
+  assign pending_interrupts_36$ENQ =
+	     pending_interrupts_36$FULL_N && sync_36$dPulse ;
+  assign pending_interrupts_36$DEQ =
+	     pending_interrupts_36$EMPTY_N &&
+	     !host_pending_design_32$port1__read ;
+  assign pending_interrupts_36$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_37
+  assign pending_interrupts_37$D_IN = 1'd1 ;
+  assign pending_interrupts_37$ENQ =
+	     pending_interrupts_37$FULL_N && sync_37$dPulse ;
+  assign pending_interrupts_37$DEQ =
+	     pending_interrupts_37$EMPTY_N &&
+	     !host_pending_design_33$port1__read ;
+  assign pending_interrupts_37$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_38
+  assign pending_interrupts_38$D_IN = 1'd1 ;
+  assign pending_interrupts_38$ENQ =
+	     pending_interrupts_38$FULL_N && sync_38$dPulse ;
+  assign pending_interrupts_38$DEQ =
+	     pending_interrupts_38$EMPTY_N &&
+	     !host_pending_design_34$port1__read ;
+  assign pending_interrupts_38$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_39
+  assign pending_interrupts_39$D_IN = 1'd1 ;
+  assign pending_interrupts_39$ENQ =
+	     pending_interrupts_39$FULL_N && sync_39$dPulse ;
+  assign pending_interrupts_39$DEQ =
+	     pending_interrupts_39$EMPTY_N &&
+	     !host_pending_design_35$port1__read ;
+  assign pending_interrupts_39$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_4
+  assign pending_interrupts_4$D_IN = 1'd1 ;
+  assign pending_interrupts_4$ENQ =
+	     pending_interrupts_4$FULL_N && sync_4$dPulse ;
+  assign pending_interrupts_4$DEQ =
+	     pending_interrupts_4$EMPTY_N &&
+	     !host_pending_design_0$port1__read ;
+  assign pending_interrupts_4$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_40
+  assign pending_interrupts_40$D_IN = 1'd1 ;
+  assign pending_interrupts_40$ENQ =
+	     pending_interrupts_40$FULL_N && sync_40$dPulse ;
+  assign pending_interrupts_40$DEQ =
+	     pending_interrupts_40$EMPTY_N &&
+	     !host_pending_design_36$port1__read ;
+  assign pending_interrupts_40$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_41
+  assign pending_interrupts_41$D_IN = 1'd1 ;
+  assign pending_interrupts_41$ENQ =
+	     pending_interrupts_41$FULL_N && sync_41$dPulse ;
+  assign pending_interrupts_41$DEQ =
+	     pending_interrupts_41$EMPTY_N &&
+	     !host_pending_design_37$port1__read ;
+  assign pending_interrupts_41$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_42
+  assign pending_interrupts_42$D_IN = 1'd1 ;
+  assign pending_interrupts_42$ENQ =
+	     pending_interrupts_42$FULL_N && sync_42$dPulse ;
+  assign pending_interrupts_42$DEQ =
+	     pending_interrupts_42$EMPTY_N &&
+	     !host_pending_design_38$port1__read ;
+  assign pending_interrupts_42$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_43
+  assign pending_interrupts_43$D_IN = 1'd1 ;
+  assign pending_interrupts_43$ENQ =
+	     pending_interrupts_43$FULL_N && sync_43$dPulse ;
+  assign pending_interrupts_43$DEQ =
+	     pending_interrupts_43$EMPTY_N &&
+	     !host_pending_design_39$port1__read ;
+  assign pending_interrupts_43$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_44
+  assign pending_interrupts_44$D_IN = 1'd1 ;
+  assign pending_interrupts_44$ENQ =
+	     pending_interrupts_44$FULL_N && sync_44$dPulse ;
+  assign pending_interrupts_44$DEQ =
+	     pending_interrupts_44$EMPTY_N &&
+	     !host_pending_design_40$port1__read ;
+  assign pending_interrupts_44$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_45
+  assign pending_interrupts_45$D_IN = 1'd1 ;
+  assign pending_interrupts_45$ENQ =
+	     pending_interrupts_45$FULL_N && sync_45$dPulse ;
+  assign pending_interrupts_45$DEQ =
+	     pending_interrupts_45$EMPTY_N &&
+	     !host_pending_design_41$port1__read ;
+  assign pending_interrupts_45$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_46
+  assign pending_interrupts_46$D_IN = 1'd1 ;
+  assign pending_interrupts_46$ENQ =
+	     pending_interrupts_46$FULL_N && sync_46$dPulse ;
+  assign pending_interrupts_46$DEQ =
+	     pending_interrupts_46$EMPTY_N &&
+	     !host_pending_design_42$port1__read ;
+  assign pending_interrupts_46$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_47
+  assign pending_interrupts_47$D_IN = 1'd1 ;
+  assign pending_interrupts_47$ENQ =
+	     pending_interrupts_47$FULL_N && sync_47$dPulse ;
+  assign pending_interrupts_47$DEQ =
+	     pending_interrupts_47$EMPTY_N &&
+	     !host_pending_design_43$port1__read ;
+  assign pending_interrupts_47$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_48
+  assign pending_interrupts_48$D_IN = 1'd1 ;
+  assign pending_interrupts_48$ENQ =
+	     pending_interrupts_48$FULL_N && sync_48$dPulse ;
+  assign pending_interrupts_48$DEQ =
+	     pending_interrupts_48$EMPTY_N &&
+	     !host_pending_design_44$port1__read ;
+  assign pending_interrupts_48$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_49
+  assign pending_interrupts_49$D_IN = 1'd1 ;
+  assign pending_interrupts_49$ENQ =
+	     pending_interrupts_49$FULL_N && sync_49$dPulse ;
+  assign pending_interrupts_49$DEQ =
+	     pending_interrupts_49$EMPTY_N &&
+	     !host_pending_design_45$port1__read ;
+  assign pending_interrupts_49$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_5
+  assign pending_interrupts_5$D_IN = 1'd1 ;
+  assign pending_interrupts_5$ENQ =
+	     pending_interrupts_5$FULL_N && sync_5$dPulse ;
+  assign pending_interrupts_5$DEQ =
+	     pending_interrupts_5$EMPTY_N &&
+	     !host_pending_design_1$port1__read ;
+  assign pending_interrupts_5$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_50
+  assign pending_interrupts_50$D_IN = 1'd1 ;
+  assign pending_interrupts_50$ENQ =
+	     pending_interrupts_50$FULL_N && sync_50$dPulse ;
+  assign pending_interrupts_50$DEQ =
+	     pending_interrupts_50$EMPTY_N &&
+	     !host_pending_design_46$port1__read ;
+  assign pending_interrupts_50$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_51
+  assign pending_interrupts_51$D_IN = 1'd1 ;
+  assign pending_interrupts_51$ENQ =
+	     pending_interrupts_51$FULL_N && sync_51$dPulse ;
+  assign pending_interrupts_51$DEQ =
+	     pending_interrupts_51$EMPTY_N &&
+	     !host_pending_design_47$port1__read ;
+  assign pending_interrupts_51$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_52
+  assign pending_interrupts_52$D_IN = 1'd1 ;
+  assign pending_interrupts_52$ENQ =
+	     pending_interrupts_52$FULL_N && sync_52$dPulse ;
+  assign pending_interrupts_52$DEQ =
+	     pending_interrupts_52$EMPTY_N &&
+	     !host_pending_design_48$port1__read ;
+  assign pending_interrupts_52$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_53
+  assign pending_interrupts_53$D_IN = 1'd1 ;
+  assign pending_interrupts_53$ENQ =
+	     pending_interrupts_53$FULL_N && sync_53$dPulse ;
+  assign pending_interrupts_53$DEQ =
+	     pending_interrupts_53$EMPTY_N &&
+	     !host_pending_design_49$port1__read ;
+  assign pending_interrupts_53$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_54
+  assign pending_interrupts_54$D_IN = 1'd1 ;
+  assign pending_interrupts_54$ENQ =
+	     pending_interrupts_54$FULL_N && sync_54$dPulse ;
+  assign pending_interrupts_54$DEQ =
+	     pending_interrupts_54$EMPTY_N &&
+	     !host_pending_design_50$port1__read ;
+  assign pending_interrupts_54$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_55
+  assign pending_interrupts_55$D_IN = 1'd1 ;
+  assign pending_interrupts_55$ENQ =
+	     pending_interrupts_55$FULL_N && sync_55$dPulse ;
+  assign pending_interrupts_55$DEQ =
+	     pending_interrupts_55$EMPTY_N &&
+	     !host_pending_design_51$port1__read ;
+  assign pending_interrupts_55$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_56
+  assign pending_interrupts_56$D_IN = 1'd1 ;
+  assign pending_interrupts_56$ENQ =
+	     pending_interrupts_56$FULL_N && sync_56$dPulse ;
+  assign pending_interrupts_56$DEQ =
+	     pending_interrupts_56$EMPTY_N &&
+	     !host_pending_design_52$port1__read ;
+  assign pending_interrupts_56$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_57
+  assign pending_interrupts_57$D_IN = 1'd1 ;
+  assign pending_interrupts_57$ENQ =
+	     pending_interrupts_57$FULL_N && sync_57$dPulse ;
+  assign pending_interrupts_57$DEQ =
+	     pending_interrupts_57$EMPTY_N &&
+	     !host_pending_design_53$port1__read ;
+  assign pending_interrupts_57$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_58
+  assign pending_interrupts_58$D_IN = 1'd1 ;
+  assign pending_interrupts_58$ENQ =
+	     pending_interrupts_58$FULL_N && sync_58$dPulse ;
+  assign pending_interrupts_58$DEQ =
+	     pending_interrupts_58$EMPTY_N &&
+	     !host_pending_design_54$port1__read ;
+  assign pending_interrupts_58$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_59
+  assign pending_interrupts_59$D_IN = 1'd1 ;
+  assign pending_interrupts_59$ENQ =
+	     pending_interrupts_59$FULL_N && sync_59$dPulse ;
+  assign pending_interrupts_59$DEQ =
+	     pending_interrupts_59$EMPTY_N &&
+	     !host_pending_design_55$port1__read ;
+  assign pending_interrupts_59$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_6
+  assign pending_interrupts_6$D_IN = 1'd1 ;
+  assign pending_interrupts_6$ENQ =
+	     pending_interrupts_6$FULL_N && sync_6$dPulse ;
+  assign pending_interrupts_6$DEQ =
+	     pending_interrupts_6$EMPTY_N &&
+	     !host_pending_design_2$port1__read ;
+  assign pending_interrupts_6$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_60
+  assign pending_interrupts_60$D_IN = 1'd1 ;
+  assign pending_interrupts_60$ENQ =
+	     pending_interrupts_60$FULL_N && sync_60$dPulse ;
+  assign pending_interrupts_60$DEQ =
+	     pending_interrupts_60$EMPTY_N &&
+	     !host_pending_design_56$port1__read ;
+  assign pending_interrupts_60$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_61
+  assign pending_interrupts_61$D_IN = 1'd1 ;
+  assign pending_interrupts_61$ENQ =
+	     pending_interrupts_61$FULL_N && sync_61$dPulse ;
+  assign pending_interrupts_61$DEQ =
+	     pending_interrupts_61$EMPTY_N &&
+	     !host_pending_design_57$port1__read ;
+  assign pending_interrupts_61$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_62
+  assign pending_interrupts_62$D_IN = 1'd1 ;
+  assign pending_interrupts_62$ENQ =
+	     pending_interrupts_62$FULL_N && sync_62$dPulse ;
+  assign pending_interrupts_62$DEQ =
+	     pending_interrupts_62$EMPTY_N &&
+	     !host_pending_design_58$port1__read ;
+  assign pending_interrupts_62$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_63
+  assign pending_interrupts_63$D_IN = 1'd1 ;
+  assign pending_interrupts_63$ENQ =
+	     pending_interrupts_63$FULL_N && sync_63$dPulse ;
+  assign pending_interrupts_63$DEQ =
+	     pending_interrupts_63$EMPTY_N &&
+	     !host_pending_design_59$port1__read ;
+  assign pending_interrupts_63$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_64
+  assign pending_interrupts_64$D_IN = 1'd1 ;
+  assign pending_interrupts_64$ENQ =
+	     pending_interrupts_64$FULL_N && sync_64$dPulse ;
+  assign pending_interrupts_64$DEQ =
+	     pending_interrupts_64$EMPTY_N &&
+	     !host_pending_design_60$port1__read ;
+  assign pending_interrupts_64$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_65
+  assign pending_interrupts_65$D_IN = 1'd1 ;
+  assign pending_interrupts_65$ENQ =
+	     pending_interrupts_65$FULL_N && sync_65$dPulse ;
+  assign pending_interrupts_65$DEQ =
+	     pending_interrupts_65$EMPTY_N &&
+	     !host_pending_design_61$port1__read ;
+  assign pending_interrupts_65$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_66
+  assign pending_interrupts_66$D_IN = 1'd1 ;
+  assign pending_interrupts_66$ENQ =
+	     pending_interrupts_66$FULL_N && sync_66$dPulse ;
+  assign pending_interrupts_66$DEQ =
+	     pending_interrupts_66$EMPTY_N &&
+	     !host_pending_design_62$port1__read ;
+  assign pending_interrupts_66$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_67
+  assign pending_interrupts_67$D_IN = 1'd1 ;
+  assign pending_interrupts_67$ENQ =
+	     pending_interrupts_67$FULL_N && sync_67$dPulse ;
+  assign pending_interrupts_67$DEQ =
+	     pending_interrupts_67$EMPTY_N &&
+	     !host_pending_design_63$port1__read ;
+  assign pending_interrupts_67$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_68
+  assign pending_interrupts_68$D_IN = 1'd1 ;
+  assign pending_interrupts_68$ENQ =
+	     pending_interrupts_68$FULL_N && sync_68$dPulse ;
+  assign pending_interrupts_68$DEQ =
+	     pending_interrupts_68$EMPTY_N &&
+	     !host_pending_design_64$port1__read ;
+  assign pending_interrupts_68$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_69
+  assign pending_interrupts_69$D_IN = 1'd1 ;
+  assign pending_interrupts_69$ENQ =
+	     pending_interrupts_69$FULL_N && sync_69$dPulse ;
+  assign pending_interrupts_69$DEQ =
+	     pending_interrupts_69$EMPTY_N &&
+	     !host_pending_design_65$port1__read ;
+  assign pending_interrupts_69$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_7
+  assign pending_interrupts_7$D_IN = 1'd1 ;
+  assign pending_interrupts_7$ENQ =
+	     pending_interrupts_7$FULL_N && sync_7$dPulse ;
+  assign pending_interrupts_7$DEQ =
+	     pending_interrupts_7$EMPTY_N &&
+	     !host_pending_design_3$port1__read ;
+  assign pending_interrupts_7$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_70
+  assign pending_interrupts_70$D_IN = 1'd1 ;
+  assign pending_interrupts_70$ENQ =
+	     pending_interrupts_70$FULL_N && sync_70$dPulse ;
+  assign pending_interrupts_70$DEQ =
+	     pending_interrupts_70$EMPTY_N &&
+	     !host_pending_design_66$port1__read ;
+  assign pending_interrupts_70$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_71
+  assign pending_interrupts_71$D_IN = 1'd1 ;
+  assign pending_interrupts_71$ENQ =
+	     pending_interrupts_71$FULL_N && sync_71$dPulse ;
+  assign pending_interrupts_71$DEQ =
+	     pending_interrupts_71$EMPTY_N &&
+	     !host_pending_design_67$port1__read ;
+  assign pending_interrupts_71$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_72
+  assign pending_interrupts_72$D_IN = 1'd1 ;
+  assign pending_interrupts_72$ENQ =
+	     pending_interrupts_72$FULL_N && sync_72$dPulse ;
+  assign pending_interrupts_72$DEQ =
+	     pending_interrupts_72$EMPTY_N &&
+	     !host_pending_design_68$port1__read ;
+  assign pending_interrupts_72$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_73
+  assign pending_interrupts_73$D_IN = 1'd1 ;
+  assign pending_interrupts_73$ENQ =
+	     pending_interrupts_73$FULL_N && sync_73$dPulse ;
+  assign pending_interrupts_73$DEQ =
+	     pending_interrupts_73$EMPTY_N &&
+	     !host_pending_design_69$port1__read ;
+  assign pending_interrupts_73$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_74
+  assign pending_interrupts_74$D_IN = 1'd1 ;
+  assign pending_interrupts_74$ENQ =
+	     pending_interrupts_74$FULL_N && sync_74$dPulse ;
+  assign pending_interrupts_74$DEQ =
+	     pending_interrupts_74$EMPTY_N &&
+	     !host_pending_design_70$port1__read ;
+  assign pending_interrupts_74$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_75
+  assign pending_interrupts_75$D_IN = 1'd1 ;
+  assign pending_interrupts_75$ENQ =
+	     pending_interrupts_75$FULL_N && sync_75$dPulse ;
+  assign pending_interrupts_75$DEQ =
+	     pending_interrupts_75$EMPTY_N &&
+	     !host_pending_design_71$port1__read ;
+  assign pending_interrupts_75$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_76
+  assign pending_interrupts_76$D_IN = 1'd1 ;
+  assign pending_interrupts_76$ENQ =
+	     pending_interrupts_76$FULL_N && sync_76$dPulse ;
+  assign pending_interrupts_76$DEQ =
+	     pending_interrupts_76$EMPTY_N &&
+	     !host_pending_design_72$port1__read ;
+  assign pending_interrupts_76$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_77
+  assign pending_interrupts_77$D_IN = 1'd1 ;
+  assign pending_interrupts_77$ENQ =
+	     pending_interrupts_77$FULL_N && sync_77$dPulse ;
+  assign pending_interrupts_77$DEQ =
+	     pending_interrupts_77$EMPTY_N &&
+	     !host_pending_design_73$port1__read ;
+  assign pending_interrupts_77$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_78
+  assign pending_interrupts_78$D_IN = 1'd1 ;
+  assign pending_interrupts_78$ENQ =
+	     pending_interrupts_78$FULL_N && sync_78$dPulse ;
+  assign pending_interrupts_78$DEQ =
+	     pending_interrupts_78$EMPTY_N &&
+	     !host_pending_design_74$port1__read ;
+  assign pending_interrupts_78$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_79
+  assign pending_interrupts_79$D_IN = 1'd1 ;
+  assign pending_interrupts_79$ENQ =
+	     pending_interrupts_79$FULL_N && sync_79$dPulse ;
+  assign pending_interrupts_79$DEQ =
+	     pending_interrupts_79$EMPTY_N &&
+	     !host_pending_design_75$port1__read ;
+  assign pending_interrupts_79$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_8
+  assign pending_interrupts_8$D_IN = 1'd1 ;
+  assign pending_interrupts_8$ENQ =
+	     pending_interrupts_8$FULL_N && sync_8$dPulse ;
+  assign pending_interrupts_8$DEQ =
+	     pending_interrupts_8$EMPTY_N &&
+	     !host_pending_design_4$port1__read ;
+  assign pending_interrupts_8$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_80
+  assign pending_interrupts_80$D_IN = 1'd1 ;
+  assign pending_interrupts_80$ENQ =
+	     pending_interrupts_80$FULL_N && sync_80$dPulse ;
+  assign pending_interrupts_80$DEQ =
+	     pending_interrupts_80$EMPTY_N &&
+	     !host_pending_design_76$port1__read ;
+  assign pending_interrupts_80$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_81
+  assign pending_interrupts_81$D_IN = 1'd1 ;
+  assign pending_interrupts_81$ENQ =
+	     pending_interrupts_81$FULL_N && sync_81$dPulse ;
+  assign pending_interrupts_81$DEQ =
+	     pending_interrupts_81$EMPTY_N &&
+	     !host_pending_design_77$port1__read ;
+  assign pending_interrupts_81$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_82
+  assign pending_interrupts_82$D_IN = 1'd1 ;
+  assign pending_interrupts_82$ENQ =
+	     pending_interrupts_82$FULL_N && sync_82$dPulse ;
+  assign pending_interrupts_82$DEQ =
+	     pending_interrupts_82$EMPTY_N &&
+	     !host_pending_design_78$port1__read ;
+  assign pending_interrupts_82$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_83
+  assign pending_interrupts_83$D_IN = 1'd1 ;
+  assign pending_interrupts_83$ENQ =
+	     pending_interrupts_83$FULL_N && sync_83$dPulse ;
+  assign pending_interrupts_83$DEQ =
+	     pending_interrupts_83$EMPTY_N &&
+	     !host_pending_design_79$port1__read ;
+  assign pending_interrupts_83$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_84
+  assign pending_interrupts_84$D_IN = 1'd1 ;
+  assign pending_interrupts_84$ENQ =
+	     pending_interrupts_84$FULL_N && sync_84$dPulse ;
+  assign pending_interrupts_84$DEQ =
+	     pending_interrupts_84$EMPTY_N &&
+	     !host_pending_design_80$port1__read ;
+  assign pending_interrupts_84$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_85
+  assign pending_interrupts_85$D_IN = 1'd1 ;
+  assign pending_interrupts_85$ENQ =
+	     pending_interrupts_85$FULL_N && sync_85$dPulse ;
+  assign pending_interrupts_85$DEQ =
+	     pending_interrupts_85$EMPTY_N &&
+	     !host_pending_design_81$port1__read ;
+  assign pending_interrupts_85$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_86
+  assign pending_interrupts_86$D_IN = 1'd1 ;
+  assign pending_interrupts_86$ENQ =
+	     pending_interrupts_86$FULL_N && sync_86$dPulse ;
+  assign pending_interrupts_86$DEQ =
+	     pending_interrupts_86$EMPTY_N &&
+	     !host_pending_design_82$port1__read ;
+  assign pending_interrupts_86$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_87
+  assign pending_interrupts_87$D_IN = 1'd1 ;
+  assign pending_interrupts_87$ENQ =
+	     pending_interrupts_87$FULL_N && sync_87$dPulse ;
+  assign pending_interrupts_87$DEQ =
+	     pending_interrupts_87$EMPTY_N &&
+	     !host_pending_design_83$port1__read ;
+  assign pending_interrupts_87$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_88
+  assign pending_interrupts_88$D_IN = 1'd1 ;
+  assign pending_interrupts_88$ENQ =
+	     pending_interrupts_88$FULL_N && sync_88$dPulse ;
+  assign pending_interrupts_88$DEQ =
+	     pending_interrupts_88$EMPTY_N &&
+	     !host_pending_design_84$port1__read ;
+  assign pending_interrupts_88$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_89
+  assign pending_interrupts_89$D_IN = 1'd1 ;
+  assign pending_interrupts_89$ENQ =
+	     pending_interrupts_89$FULL_N && sync_89$dPulse ;
+  assign pending_interrupts_89$DEQ =
+	     pending_interrupts_89$EMPTY_N &&
+	     !host_pending_design_85$port1__read ;
+  assign pending_interrupts_89$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_9
+  assign pending_interrupts_9$D_IN = 1'd1 ;
+  assign pending_interrupts_9$ENQ =
+	     pending_interrupts_9$FULL_N && sync_9$dPulse ;
+  assign pending_interrupts_9$DEQ =
+	     pending_interrupts_9$EMPTY_N &&
+	     !host_pending_design_5$port1__read ;
+  assign pending_interrupts_9$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_90
+  assign pending_interrupts_90$D_IN = 1'd1 ;
+  assign pending_interrupts_90$ENQ =
+	     pending_interrupts_90$FULL_N && sync_90$dPulse ;
+  assign pending_interrupts_90$DEQ =
+	     pending_interrupts_90$EMPTY_N &&
+	     !host_pending_design_86$port1__read ;
+  assign pending_interrupts_90$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_91
+  assign pending_interrupts_91$D_IN = 1'd1 ;
+  assign pending_interrupts_91$ENQ =
+	     pending_interrupts_91$FULL_N && sync_91$dPulse ;
+  assign pending_interrupts_91$DEQ =
+	     pending_interrupts_91$EMPTY_N &&
+	     !host_pending_design_87$port1__read ;
+  assign pending_interrupts_91$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_92
+  assign pending_interrupts_92$D_IN = 1'd1 ;
+  assign pending_interrupts_92$ENQ =
+	     pending_interrupts_92$FULL_N && sync_92$dPulse ;
+  assign pending_interrupts_92$DEQ =
+	     pending_interrupts_92$EMPTY_N &&
+	     !host_pending_design_88$port1__read ;
+  assign pending_interrupts_92$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_93
+  assign pending_interrupts_93$D_IN = 1'd1 ;
+  assign pending_interrupts_93$ENQ =
+	     pending_interrupts_93$FULL_N && sync_93$dPulse ;
+  assign pending_interrupts_93$DEQ =
+	     pending_interrupts_93$EMPTY_N &&
+	     !host_pending_design_89$port1__read ;
+  assign pending_interrupts_93$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_94
+  assign pending_interrupts_94$D_IN = 1'd1 ;
+  assign pending_interrupts_94$ENQ =
+	     pending_interrupts_94$FULL_N && sync_94$dPulse ;
+  assign pending_interrupts_94$DEQ =
+	     pending_interrupts_94$EMPTY_N &&
+	     !host_pending_design_90$port1__read ;
+  assign pending_interrupts_94$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_95
+  assign pending_interrupts_95$D_IN = 1'd1 ;
+  assign pending_interrupts_95$ENQ =
+	     pending_interrupts_95$FULL_N && sync_95$dPulse ;
+  assign pending_interrupts_95$DEQ =
+	     pending_interrupts_95$EMPTY_N &&
+	     !host_pending_design_91$port1__read ;
+  assign pending_interrupts_95$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_96
+  assign pending_interrupts_96$D_IN = 1'd1 ;
+  assign pending_interrupts_96$ENQ =
+	     pending_interrupts_96$FULL_N && sync_96$dPulse ;
+  assign pending_interrupts_96$DEQ =
+	     pending_interrupts_96$EMPTY_N &&
+	     !host_pending_design_92$port1__read ;
+  assign pending_interrupts_96$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_97
+  assign pending_interrupts_97$D_IN = 1'd1 ;
+  assign pending_interrupts_97$ENQ =
+	     pending_interrupts_97$FULL_N && sync_97$dPulse ;
+  assign pending_interrupts_97$DEQ =
+	     pending_interrupts_97$EMPTY_N &&
+	     !host_pending_design_93$port1__read ;
+  assign pending_interrupts_97$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_98
+  assign pending_interrupts_98$D_IN = 1'd1 ;
+  assign pending_interrupts_98$ENQ =
+	     pending_interrupts_98$FULL_N && sync_98$dPulse ;
+  assign pending_interrupts_98$DEQ =
+	     pending_interrupts_98$EMPTY_N &&
+	     !host_pending_design_94$port1__read ;
+  assign pending_interrupts_98$CLR = 1'b0 ;
+
+  // submodule pending_interrupts_99
+  assign pending_interrupts_99$D_IN = 1'd1 ;
+  assign pending_interrupts_99$ENQ =
+	     pending_interrupts_99$FULL_N && sync_99$dPulse ;
+  assign pending_interrupts_99$DEQ =
+	     pending_interrupts_99$EMPTY_N &&
+	     !host_pending_design_95$port1__read ;
+  assign pending_interrupts_99$CLR = 1'b0 ;
+
+  // submodule s_config_readSlave_in
+  assign s_config_readSlave_in$D_IN = { S_AXI_araddr, S_AXI_arprot } ;
+  assign s_config_readSlave_in$ENQ =
+	     s_config_readSlave_in$FULL_N && S_AXI_arvalid ;
+  assign s_config_readSlave_in$DEQ =
+	     WILL_FIRE_RL_s_config_axiReadFallback ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_2 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_1 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial ;
+  assign s_config_readSlave_in$CLR = 1'b0 ;
+
+  // submodule s_config_readSlave_out
+  always@(WILL_FIRE_RL_s_config_axiReadSpecial or
+	  MUX_s_config_readSlave_out$enq_1__VAL_1 or
+	  WILL_FIRE_RL_s_config_axiReadSpecial_1 or
+	  MUX_s_config_readSlave_out$enq_1__VAL_2 or
+	  WILL_FIRE_RL_s_config_axiReadSpecial_2 or
+	  MUX_s_config_readSlave_out$enq_1__VAL_3 or
+	  WILL_FIRE_RL_s_config_axiReadSpecial_3 or
+	  MUX_s_config_readSlave_out$enq_1__VAL_4 or
+	  WILL_FIRE_RL_s_config_axiReadSpecial_4 or
+	  MUX_s_config_readSlave_out$enq_1__VAL_5 or
+	  WILL_FIRE_RL_s_config_axiReadSpecial_5 or
+	  MUX_s_config_readSlave_out$enq_1__VAL_6 or
+	  WILL_FIRE_RL_s_config_axiReadFallback)
+  begin
+    case (1'b1) // synopsys parallel_case
+      WILL_FIRE_RL_s_config_axiReadSpecial:
+	  s_config_readSlave_out$D_IN =
+	      MUX_s_config_readSlave_out$enq_1__VAL_1;
+      WILL_FIRE_RL_s_config_axiReadSpecial_1:
+	  s_config_readSlave_out$D_IN =
+	      MUX_s_config_readSlave_out$enq_1__VAL_2;
+      WILL_FIRE_RL_s_config_axiReadSpecial_2:
+	  s_config_readSlave_out$D_IN =
+	      MUX_s_config_readSlave_out$enq_1__VAL_3;
+      WILL_FIRE_RL_s_config_axiReadSpecial_3:
+	  s_config_readSlave_out$D_IN =
+	      MUX_s_config_readSlave_out$enq_1__VAL_4;
+      WILL_FIRE_RL_s_config_axiReadSpecial_4:
+	  s_config_readSlave_out$D_IN =
+	      MUX_s_config_readSlave_out$enq_1__VAL_5;
+      WILL_FIRE_RL_s_config_axiReadSpecial_5:
+	  s_config_readSlave_out$D_IN =
+	      MUX_s_config_readSlave_out$enq_1__VAL_6;
+      WILL_FIRE_RL_s_config_axiReadFallback:
+	  s_config_readSlave_out$D_IN = 34'd0;
+      default: s_config_readSlave_out$D_IN =
+		   34'h2AAAAAAAA /* unspecified value */ ;
+    endcase
+  end
+  assign s_config_readSlave_out$ENQ =
+	     WILL_FIRE_RL_s_config_axiReadSpecial ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_1 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_2 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	     WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	     WILL_FIRE_RL_s_config_axiReadFallback ;
+  assign s_config_readSlave_out$DEQ =
+	     s_config_readSlave_out$EMPTY_N && S_AXI_rready ;
+  assign s_config_readSlave_out$CLR = 1'b0 ;
+
+  // submodule s_config_writeSlave_in
+  assign s_config_writeSlave_in$D_IN =
+	     { s_config_writeSlave_addrIn_rv$port1__read[18:3],
+	       s_config_writeSlave_dataIn_rv$port1__read[35:0],
+	       s_config_writeSlave_addrIn_rv$port1__read[2:0] } ;
+  assign s_config_writeSlave_in$ENQ =
+	     s_config_writeSlave_addrIn_rv$port1__read[19] &&
+	     s_config_writeSlave_dataIn_rv$port1__read[36] &&
+	     s_config_writeSlave_in$FULL_N ;
+  assign s_config_writeSlave_in$DEQ =
+	     WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 ||
+	     WILL_FIRE_RL_s_config_1_axiWriteFallback ||
+	     WILL_FIRE_RL_s_config_1_axiWriteSpecial ;
+  assign s_config_writeSlave_in$CLR = 1'b0 ;
+
+  // submodule s_config_writeSlave_out
+  assign s_config_writeSlave_out$D_IN = 2'd0 ;
+  assign s_config_writeSlave_out$ENQ =
+	     WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 ||
+	     WILL_FIRE_RL_s_config_1_axiWriteFallback ||
+	     WILL_FIRE_RL_s_config_1_axiWriteSpecial ;
+  assign s_config_writeSlave_out$DEQ =
+	     s_config_writeSlave_out$EMPTY_N && S_AXI_bready ;
+  assign s_config_writeSlave_out$CLR = 1'b0 ;
+
+  // submodule sync_10
+  assign sync_10$sEN = !interrupt_last_10 && interrupt_design[6] ;
+
+  // submodule sync_100
+  assign sync_100$sEN = !interrupt_last_100 && interrupt_design[96] ;
+
+  // submodule sync_101
+  assign sync_101$sEN = !interrupt_last_101 && interrupt_design[97] ;
+
+  // submodule sync_102
+  assign sync_102$sEN = !interrupt_last_102 && interrupt_design[98] ;
+
+  // submodule sync_103
+  assign sync_103$sEN = !interrupt_last_103 && interrupt_design[99] ;
+
+  // submodule sync_104
+  assign sync_104$sEN = !interrupt_last_104 && interrupt_design[100] ;
+
+  // submodule sync_105
+  assign sync_105$sEN = !interrupt_last_105 && interrupt_design[101] ;
+
+  // submodule sync_106
+  assign sync_106$sEN = !interrupt_last_106 && interrupt_design[102] ;
+
+  // submodule sync_107
+  assign sync_107$sEN = !interrupt_last_107 && interrupt_design[103] ;
+
+  // submodule sync_108
+  assign sync_108$sEN = !interrupt_last_108 && interrupt_design[104] ;
+
+  // submodule sync_109
+  assign sync_109$sEN = !interrupt_last_109 && interrupt_design[105] ;
+
+  // submodule sync_11
+  assign sync_11$sEN = !interrupt_last_11 && interrupt_design[7] ;
+
+  // submodule sync_110
+  assign sync_110$sEN = !interrupt_last_110 && interrupt_design[106] ;
+
+  // submodule sync_111
+  assign sync_111$sEN = !interrupt_last_111 && interrupt_design[107] ;
+
+  // submodule sync_112
+  assign sync_112$sEN = !interrupt_last_112 && interrupt_design[108] ;
+
+  // submodule sync_113
+  assign sync_113$sEN = !interrupt_last_113 && interrupt_design[109] ;
+
+  // submodule sync_114
+  assign sync_114$sEN = !interrupt_last_114 && interrupt_design[110] ;
+
+  // submodule sync_115
+  assign sync_115$sEN = !interrupt_last_115 && interrupt_design[111] ;
+
+  // submodule sync_116
+  assign sync_116$sEN = !interrupt_last_116 && interrupt_design[112] ;
+
+  // submodule sync_117
+  assign sync_117$sEN = !interrupt_last_117 && interrupt_design[113] ;
+
+  // submodule sync_118
+  assign sync_118$sEN = !interrupt_last_118 && interrupt_design[114] ;
+
+  // submodule sync_119
+  assign sync_119$sEN = !interrupt_last_119 && interrupt_design[115] ;
+
+  // submodule sync_12
+  assign sync_12$sEN = !interrupt_last_12 && interrupt_design[8] ;
+
+  // submodule sync_120
+  assign sync_120$sEN = !interrupt_last_120 && interrupt_design[116] ;
+
+  // submodule sync_121
+  assign sync_121$sEN = !interrupt_last_121 && interrupt_design[117] ;
+
+  // submodule sync_122
+  assign sync_122$sEN = !interrupt_last_122 && interrupt_design[118] ;
+
+  // submodule sync_123
+  assign sync_123$sEN = !interrupt_last_123 && interrupt_design[119] ;
+
+  // submodule sync_124
+  assign sync_124$sEN = !interrupt_last_124 && interrupt_design[120] ;
+
+  // submodule sync_125
+  assign sync_125$sEN = !interrupt_last_125 && interrupt_design[121] ;
+
+  // submodule sync_126
+  assign sync_126$sEN = !interrupt_last_126 && interrupt_design[122] ;
+
+  // submodule sync_127
+  assign sync_127$sEN = !interrupt_last_127 && interrupt_design[123] ;
+
+  // submodule sync_128
+  assign sync_128$sEN = !interrupt_last_128 && interrupt_design[124] ;
+
+  // submodule sync_129
+  assign sync_129$sEN = !interrupt_last_129 && interrupt_design[125] ;
+
+  // submodule sync_13
+  assign sync_13$sEN = !interrupt_last_13 && interrupt_design[9] ;
+
+  // submodule sync_130
+  assign sync_130$sEN = !interrupt_last_130 && interrupt_design[126] ;
+
+  // submodule sync_131
+  assign sync_131$sEN = !interrupt_last_131 && interrupt_design[127] ;
+
+  // submodule sync_14
+  assign sync_14$sEN = !interrupt_last_14 && interrupt_design[10] ;
+
+  // submodule sync_15
+  assign sync_15$sEN = !interrupt_last_15 && interrupt_design[11] ;
+
+  // submodule sync_16
+  assign sync_16$sEN = !interrupt_last_16 && interrupt_design[12] ;
+
+  // submodule sync_17
+  assign sync_17$sEN = !interrupt_last_17 && interrupt_design[13] ;
+
+  // submodule sync_18
+  assign sync_18$sEN = !interrupt_last_18 && interrupt_design[14] ;
+
+  // submodule sync_19
+  assign sync_19$sEN = !interrupt_last_19 && interrupt_design[15] ;
+
+  // submodule sync_20
+  assign sync_20$sEN = !interrupt_last_20 && interrupt_design[16] ;
+
+  // submodule sync_21
+  assign sync_21$sEN = !interrupt_last_21 && interrupt_design[17] ;
+
+  // submodule sync_22
+  assign sync_22$sEN = !interrupt_last_22 && interrupt_design[18] ;
+
+  // submodule sync_23
+  assign sync_23$sEN = !interrupt_last_23 && interrupt_design[19] ;
+
+  // submodule sync_24
+  assign sync_24$sEN = !interrupt_last_24 && interrupt_design[20] ;
+
+  // submodule sync_25
+  assign sync_25$sEN = !interrupt_last_25 && interrupt_design[21] ;
+
+  // submodule sync_26
+  assign sync_26$sEN = !interrupt_last_26 && interrupt_design[22] ;
+
+  // submodule sync_27
+  assign sync_27$sEN = !interrupt_last_27 && interrupt_design[23] ;
+
+  // submodule sync_28
+  assign sync_28$sEN = !interrupt_last_28 && interrupt_design[24] ;
+
+  // submodule sync_29
+  assign sync_29$sEN = !interrupt_last_29 && interrupt_design[25] ;
+
+  // submodule sync_30
+  assign sync_30$sEN = !interrupt_last_30 && interrupt_design[26] ;
+
+  // submodule sync_31
+  assign sync_31$sEN = !interrupt_last_31 && interrupt_design[27] ;
+
+  // submodule sync_32
+  assign sync_32$sEN = !interrupt_last_32 && interrupt_design[28] ;
+
+  // submodule sync_33
+  assign sync_33$sEN = !interrupt_last_33 && interrupt_design[29] ;
+
+  // submodule sync_34
+  assign sync_34$sEN = !interrupt_last_34 && interrupt_design[30] ;
+
+  // submodule sync_35
+  assign sync_35$sEN = !interrupt_last_35 && interrupt_design[31] ;
+
+  // submodule sync_36
+  assign sync_36$sEN = !interrupt_last_36 && interrupt_design[32] ;
+
+  // submodule sync_37
+  assign sync_37$sEN = !interrupt_last_37 && interrupt_design[33] ;
+
+  // submodule sync_38
+  assign sync_38$sEN = !interrupt_last_38 && interrupt_design[34] ;
+
+  // submodule sync_39
+  assign sync_39$sEN = !interrupt_last_39 && interrupt_design[35] ;
+
+  // submodule sync_4
+  assign sync_4$sEN = !interrupt_last_4 && interrupt_design[0] ;
+
+  // submodule sync_40
+  assign sync_40$sEN = !interrupt_last_40 && interrupt_design[36] ;
+
+  // submodule sync_41
+  assign sync_41$sEN = !interrupt_last_41 && interrupt_design[37] ;
+
+  // submodule sync_42
+  assign sync_42$sEN = !interrupt_last_42 && interrupt_design[38] ;
+
+  // submodule sync_43
+  assign sync_43$sEN = !interrupt_last_43 && interrupt_design[39] ;
+
+  // submodule sync_44
+  assign sync_44$sEN = !interrupt_last_44 && interrupt_design[40] ;
+
+  // submodule sync_45
+  assign sync_45$sEN = !interrupt_last_45 && interrupt_design[41] ;
+
+  // submodule sync_46
+  assign sync_46$sEN = !interrupt_last_46 && interrupt_design[42] ;
+
+  // submodule sync_47
+  assign sync_47$sEN = !interrupt_last_47 && interrupt_design[43] ;
+
+  // submodule sync_48
+  assign sync_48$sEN = !interrupt_last_48 && interrupt_design[44] ;
+
+  // submodule sync_49
+  assign sync_49$sEN = !interrupt_last_49 && interrupt_design[45] ;
+
+  // submodule sync_5
+  assign sync_5$sEN = !interrupt_last_5 && interrupt_design[1] ;
+
+  // submodule sync_50
+  assign sync_50$sEN = !interrupt_last_50 && interrupt_design[46] ;
+
+  // submodule sync_51
+  assign sync_51$sEN = !interrupt_last_51 && interrupt_design[47] ;
+
+  // submodule sync_52
+  assign sync_52$sEN = !interrupt_last_52 && interrupt_design[48] ;
+
+  // submodule sync_53
+  assign sync_53$sEN = !interrupt_last_53 && interrupt_design[49] ;
+
+  // submodule sync_54
+  assign sync_54$sEN = !interrupt_last_54 && interrupt_design[50] ;
+
+  // submodule sync_55
+  assign sync_55$sEN = !interrupt_last_55 && interrupt_design[51] ;
+
+  // submodule sync_56
+  assign sync_56$sEN = !interrupt_last_56 && interrupt_design[52] ;
+
+  // submodule sync_57
+  assign sync_57$sEN = !interrupt_last_57 && interrupt_design[53] ;
+
+  // submodule sync_58
+  assign sync_58$sEN = !interrupt_last_58 && interrupt_design[54] ;
+
+  // submodule sync_59
+  assign sync_59$sEN = !interrupt_last_59 && interrupt_design[55] ;
+
+  // submodule sync_6
+  assign sync_6$sEN = !interrupt_last_6 && interrupt_design[2] ;
+
+  // submodule sync_60
+  assign sync_60$sEN = !interrupt_last_60 && interrupt_design[56] ;
+
+  // submodule sync_61
+  assign sync_61$sEN = !interrupt_last_61 && interrupt_design[57] ;
+
+  // submodule sync_62
+  assign sync_62$sEN = !interrupt_last_62 && interrupt_design[58] ;
+
+  // submodule sync_63
+  assign sync_63$sEN = !interrupt_last_63 && interrupt_design[59] ;
+
+  // submodule sync_64
+  assign sync_64$sEN = !interrupt_last_64 && interrupt_design[60] ;
+
+  // submodule sync_65
+  assign sync_65$sEN = !interrupt_last_65 && interrupt_design[61] ;
+
+  // submodule sync_66
+  assign sync_66$sEN = !interrupt_last_66 && interrupt_design[62] ;
+
+  // submodule sync_67
+  assign sync_67$sEN = !interrupt_last_67 && interrupt_design[63] ;
+
+  // submodule sync_68
+  assign sync_68$sEN = !interrupt_last_68 && interrupt_design[64] ;
+
+  // submodule sync_69
+  assign sync_69$sEN = !interrupt_last_69 && interrupt_design[65] ;
+
+  // submodule sync_7
+  assign sync_7$sEN = !interrupt_last_7 && interrupt_design[3] ;
+
+  // submodule sync_70
+  assign sync_70$sEN = !interrupt_last_70 && interrupt_design[66] ;
+
+  // submodule sync_71
+  assign sync_71$sEN = !interrupt_last_71 && interrupt_design[67] ;
+
+  // submodule sync_72
+  assign sync_72$sEN = !interrupt_last_72 && interrupt_design[68] ;
+
+  // submodule sync_73
+  assign sync_73$sEN = !interrupt_last_73 && interrupt_design[69] ;
+
+  // submodule sync_74
+  assign sync_74$sEN = !interrupt_last_74 && interrupt_design[70] ;
+
+  // submodule sync_75
+  assign sync_75$sEN = !interrupt_last_75 && interrupt_design[71] ;
+
+  // submodule sync_76
+  assign sync_76$sEN = !interrupt_last_76 && interrupt_design[72] ;
+
+  // submodule sync_77
+  assign sync_77$sEN = !interrupt_last_77 && interrupt_design[73] ;
+
+  // submodule sync_78
+  assign sync_78$sEN = !interrupt_last_78 && interrupt_design[74] ;
+
+  // submodule sync_79
+  assign sync_79$sEN = !interrupt_last_79 && interrupt_design[75] ;
+
+  // submodule sync_8
+  assign sync_8$sEN = !interrupt_last_8 && interrupt_design[4] ;
+
+  // submodule sync_80
+  assign sync_80$sEN = !interrupt_last_80 && interrupt_design[76] ;
+
+  // submodule sync_81
+  assign sync_81$sEN = !interrupt_last_81 && interrupt_design[77] ;
+
+  // submodule sync_82
+  assign sync_82$sEN = !interrupt_last_82 && interrupt_design[78] ;
+
+  // submodule sync_83
+  assign sync_83$sEN = !interrupt_last_83 && interrupt_design[79] ;
+
+  // submodule sync_84
+  assign sync_84$sEN = !interrupt_last_84 && interrupt_design[80] ;
+
+  // submodule sync_85
+  assign sync_85$sEN = !interrupt_last_85 && interrupt_design[81] ;
+
+  // submodule sync_86
+  assign sync_86$sEN = !interrupt_last_86 && interrupt_design[82] ;
+
+  // submodule sync_87
+  assign sync_87$sEN = !interrupt_last_87 && interrupt_design[83] ;
+
+  // submodule sync_88
+  assign sync_88$sEN = !interrupt_last_88 && interrupt_design[84] ;
+
+  // submodule sync_89
+  assign sync_89$sEN = !interrupt_last_89 && interrupt_design[85] ;
+
+  // submodule sync_9
+  assign sync_9$sEN = !interrupt_last_9 && interrupt_design[5] ;
+
+  // submodule sync_90
+  assign sync_90$sEN = !interrupt_last_90 && interrupt_design[86] ;
+
+  // submodule sync_91
+  assign sync_91$sEN = !interrupt_last_91 && interrupt_design[87] ;
+
+  // submodule sync_92
+  assign sync_92$sEN = !interrupt_last_92 && interrupt_design[88] ;
+
+  // submodule sync_93
+  assign sync_93$sEN = !interrupt_last_93 && interrupt_design[89] ;
+
+  // submodule sync_94
+  assign sync_94$sEN = !interrupt_last_94 && interrupt_design[90] ;
+
+  // submodule sync_95
+  assign sync_95$sEN = !interrupt_last_95 && interrupt_design[91] ;
+
+  // submodule sync_96
+  assign sync_96$sEN = !interrupt_last_96 && interrupt_design[92] ;
+
+  // submodule sync_97
+  assign sync_97$sEN = !interrupt_last_97 && interrupt_design[93] ;
+
+  // submodule sync_98
+  assign sync_98$sEN = !interrupt_last_98 && interrupt_design[94] ;
+
+  // submodule sync_99
+  assign sync_99$sEN = !interrupt_last_99 && interrupt_design[95] ;
+
+  // remaining internal signals
+  assign IF_s_config_writeSlave_inD_OUT_BIT_3_THEN_s_c_ETC__q1 =
+	     s_config_writeSlave_in$D_OUT[3] ?
+	       s_config_writeSlave_in$D_OUT[14:7] :
+	       { 7'd0, designGIER } ;
+  assign host_pending_design_0_port1__read__693_OR_host_ETC___d2218 =
+	     host_pending_design_0$port1__read ||
+	     host_pending_design_1$port1__read ||
+	     host_pending_design_2$port1__read ||
+	     host_pending_design_3$port1__read ||
+	     host_pending_design_4$port1__read ||
+	     host_pending_design_5$port1__read ||
+	     host_pending_design_6$port1__read ||
+	     host_pending_design_7$port1__read ;
+  assign host_pending_design_104_port1__read__109_OR_ho_ETC___d2342 =
+	     host_pending_design_104$port1__read ||
+	     host_pending_design_105$port1__read ||
+	     host_pending_design_106$port1__read ||
+	     host_pending_design_107$port1__read ||
+	     host_pending_design_108$port1__read ||
+	     host_pending_design_109$port1__read ||
+	     host_pending_design_110$port1__read ||
+	     host_pending_design_111$port1__read ;
+  assign host_pending_design_112_port1__read__141_OR_ho_ETC___d2350 =
+	     host_pending_design_112$port1__read ||
+	     host_pending_design_113$port1__read ||
+	     host_pending_design_114$port1__read ||
+	     host_pending_design_115$port1__read ||
+	     host_pending_design_116$port1__read ||
+	     host_pending_design_117$port1__read ||
+	     host_pending_design_118$port1__read ||
+	     host_pending_design_119$port1__read ;
+  assign host_pending_design_120_port1__read__173_OR_ho_ETC___d2357 =
+	     host_pending_design_120$port1__read ||
+	     host_pending_design_121$port1__read ||
+	     host_pending_design_122$port1__read ||
+	     host_pending_design_123$port1__read ||
+	     host_pending_design_124$port1__read ||
+	     host_pending_design_125$port1__read ||
+	     host_pending_design_126$port1__read ||
+	     host_pending_design_127$port1__read ;
+  assign host_pending_design_16_port1__read__757_OR_hos_ETC___d2233 =
+	     host_pending_design_16$port1__read ||
+	     host_pending_design_17$port1__read ||
+	     host_pending_design_18$port1__read ||
+	     host_pending_design_19$port1__read ||
+	     host_pending_design_20$port1__read ||
+	     host_pending_design_21$port1__read ||
+	     host_pending_design_22$port1__read ||
+	     host_pending_design_23$port1__read ;
+  assign host_pending_design_24_port1__read__789_OR_hos_ETC___d2240 =
+	     host_pending_design_24$port1__read ||
+	     host_pending_design_25$port1__read ||
+	     host_pending_design_26$port1__read ||
+	     host_pending_design_27$port1__read ||
+	     host_pending_design_28$port1__read ||
+	     host_pending_design_29$port1__read ||
+	     host_pending_design_30$port1__read ||
+	     host_pending_design_31$port1__read ;
+  assign host_pending_design_32_port1__read__821_OR_hos_ETC___d2257 =
+	     host_pending_design_32$port1__read ||
+	     host_pending_design_33$port1__read ||
+	     host_pending_design_34$port1__read ||
+	     host_pending_design_35$port1__read ||
+	     host_pending_design_36$port1__read ||
+	     host_pending_design_37$port1__read ||
+	     host_pending_design_38$port1__read ||
+	     host_pending_design_39$port1__read ;
+  assign host_pending_design_40_port1__read__853_OR_hos_ETC___d2264 =
+	     host_pending_design_40$port1__read ||
+	     host_pending_design_41$port1__read ||
+	     host_pending_design_42$port1__read ||
+	     host_pending_design_43$port1__read ||
+	     host_pending_design_44$port1__read ||
+	     host_pending_design_45$port1__read ||
+	     host_pending_design_46$port1__read ||
+	     host_pending_design_47$port1__read ;
+  assign host_pending_design_48_port1__read__885_OR_hos_ETC___d2272 =
+	     host_pending_design_48$port1__read ||
+	     host_pending_design_49$port1__read ||
+	     host_pending_design_50$port1__read ||
+	     host_pending_design_51$port1__read ||
+	     host_pending_design_52$port1__read ||
+	     host_pending_design_53$port1__read ||
+	     host_pending_design_54$port1__read ||
+	     host_pending_design_55$port1__read ;
+  assign host_pending_design_56_port1__read__917_OR_hos_ETC___d2279 =
+	     host_pending_design_56$port1__read ||
+	     host_pending_design_57$port1__read ||
+	     host_pending_design_58$port1__read ||
+	     host_pending_design_59$port1__read ||
+	     host_pending_design_60$port1__read ||
+	     host_pending_design_61$port1__read ||
+	     host_pending_design_62$port1__read ||
+	     host_pending_design_63$port1__read ;
+  assign host_pending_design_64_port1__read__949_OR_hos_ETC___d2296 =
+	     host_pending_design_64$port1__read ||
+	     host_pending_design_65$port1__read ||
+	     host_pending_design_66$port1__read ||
+	     host_pending_design_67$port1__read ||
+	     host_pending_design_68$port1__read ||
+	     host_pending_design_69$port1__read ||
+	     host_pending_design_70$port1__read ||
+	     host_pending_design_71$port1__read ;
+  assign host_pending_design_72_port1__read__981_OR_hos_ETC___d2303 =
+	     host_pending_design_72$port1__read ||
+	     host_pending_design_73$port1__read ||
+	     host_pending_design_74$port1__read ||
+	     host_pending_design_75$port1__read ||
+	     host_pending_design_76$port1__read ||
+	     host_pending_design_77$port1__read ||
+	     host_pending_design_78$port1__read ||
+	     host_pending_design_79$port1__read ;
+  assign host_pending_design_80_port1__read__013_OR_hos_ETC___d2311 =
+	     host_pending_design_80$port1__read ||
+	     host_pending_design_81$port1__read ||
+	     host_pending_design_82$port1__read ||
+	     host_pending_design_83$port1__read ||
+	     host_pending_design_84$port1__read ||
+	     host_pending_design_85$port1__read ||
+	     host_pending_design_86$port1__read ||
+	     host_pending_design_87$port1__read ;
+  assign host_pending_design_88_port1__read__045_OR_hos_ETC___d2318 =
+	     host_pending_design_88$port1__read ||
+	     host_pending_design_89$port1__read ||
+	     host_pending_design_90$port1__read ||
+	     host_pending_design_91$port1__read ||
+	     host_pending_design_92$port1__read ||
+	     host_pending_design_93$port1__read ||
+	     host_pending_design_94$port1__read ||
+	     host_pending_design_95$port1__read ;
+  assign host_pending_design_8_port1__read__725_OR_host_ETC___d2225 =
+	     host_pending_design_8$port1__read ||
+	     host_pending_design_9$port1__read ||
+	     host_pending_design_10$port1__read ||
+	     host_pending_design_11$port1__read ||
+	     host_pending_design_12$port1__read ||
+	     host_pending_design_13$port1__read ||
+	     host_pending_design_14$port1__read ||
+	     host_pending_design_15$port1__read ;
+  assign host_pending_design_96_port1__read__077_OR_hos_ETC___d2335 =
+	     host_pending_design_96$port1__read ||
+	     host_pending_design_97$port1__read ||
+	     host_pending_design_98$port1__read ||
+	     host_pending_design_99$port1__read ||
+	     host_pending_design_100$port1__read ||
+	     host_pending_design_101$port1__read ||
+	     host_pending_design_102$port1__read ||
+	     host_pending_design_103$port1__read ;
+  assign v__h30120 =
+	     { host_pending_design_31,
+	       host_pending_design_30,
+	       host_pending_design_29,
+	       host_pending_design_28,
+	       host_pending_design_27,
+	       host_pending_design_26,
+	       host_pending_design_25,
+	       host_pending_design_24,
+	       host_pending_design_23,
+	       host_pending_design_22,
+	       host_pending_design_21,
+	       host_pending_design_20,
+	       host_pending_design_19,
+	       host_pending_design_18,
+	       host_pending_design_17,
+	       host_pending_design_16,
+	       host_pending_design_15,
+	       host_pending_design_14,
+	       host_pending_design_13,
+	       host_pending_design_12,
+	       host_pending_design_11,
+	       host_pending_design_10,
+	       host_pending_design_9,
+	       host_pending_design_8,
+	       host_pending_design_7,
+	       host_pending_design_6,
+	       host_pending_design_5,
+	       host_pending_design_4,
+	       host_pending_design_3,
+	       host_pending_design_2,
+	       host_pending_design_1,
+	       host_pending_design_0 } ;
+  assign v__h40181 =
+	     { host_pending_design_63,
+	       host_pending_design_62,
+	       host_pending_design_61,
+	       host_pending_design_60,
+	       host_pending_design_59,
+	       host_pending_design_58,
+	       host_pending_design_57,
+	       host_pending_design_56,
+	       host_pending_design_55,
+	       host_pending_design_54,
+	       host_pending_design_53,
+	       host_pending_design_52,
+	       host_pending_design_51,
+	       host_pending_design_50,
+	       host_pending_design_49,
+	       host_pending_design_48,
+	       host_pending_design_47,
+	       host_pending_design_46,
+	       host_pending_design_45,
+	       host_pending_design_44,
+	       host_pending_design_43,
+	       host_pending_design_42,
+	       host_pending_design_41,
+	       host_pending_design_40,
+	       host_pending_design_39,
+	       host_pending_design_38,
+	       host_pending_design_37,
+	       host_pending_design_36,
+	       host_pending_design_35,
+	       host_pending_design_34,
+	       host_pending_design_33,
+	       host_pending_design_32 } ;
+  assign v__h46646 =
+	     { host_pending_design_95,
+	       host_pending_design_94,
+	       host_pending_design_93,
+	       host_pending_design_92,
+	       host_pending_design_91,
+	       host_pending_design_90,
+	       host_pending_design_89,
+	       host_pending_design_88,
+	       host_pending_design_87,
+	       host_pending_design_86,
+	       host_pending_design_85,
+	       host_pending_design_84,
+	       host_pending_design_83,
+	       host_pending_design_82,
+	       host_pending_design_81,
+	       host_pending_design_80,
+	       host_pending_design_79,
+	       host_pending_design_78,
+	       host_pending_design_77,
+	       host_pending_design_76,
+	       host_pending_design_75,
+	       host_pending_design_74,
+	       host_pending_design_73,
+	       host_pending_design_72,
+	       host_pending_design_71,
+	       host_pending_design_70,
+	       host_pending_design_69,
+	       host_pending_design_68,
+	       host_pending_design_67,
+	       host_pending_design_66,
+	       host_pending_design_65,
+	       host_pending_design_64 } ;
+  assign v__h53111 =
+	     { host_pending_design_127,
+	       host_pending_design_126,
+	       host_pending_design_125,
+	       host_pending_design_124,
+	       host_pending_design_123,
+	       host_pending_design_122,
+	       host_pending_design_121,
+	       host_pending_design_120,
+	       host_pending_design_119,
+	       host_pending_design_118,
+	       host_pending_design_117,
+	       host_pending_design_116,
+	       host_pending_design_115,
+	       host_pending_design_114,
+	       host_pending_design_113,
+	       host_pending_design_112,
+	       host_pending_design_111,
+	       host_pending_design_110,
+	       host_pending_design_109,
+	       host_pending_design_108,
+	       host_pending_design_107,
+	       host_pending_design_106,
+	       host_pending_design_105,
+	       host_pending_design_104,
+	       host_pending_design_103,
+	       host_pending_design_102,
+	       host_pending_design_101,
+	       host_pending_design_100,
+	       host_pending_design_99,
+	       host_pending_design_98,
+	       host_pending_design_97,
+	       host_pending_design_96 } ;
+  assign value__h194024 =
+	     (irq_ack[0] ? 5'd1 : 5'd0) + (irq_ack[1] ? 5'd1 : 5'd0) +
+	     (irq_ack[2] ? 5'd1 : 5'd0) +
+	     (irq_ack[3] ? 5'd1 : 5'd0) +
+	     (irq_ack[4] ? 5'd1 : 5'd0) +
+	     (irq_ack[5] ? 5'd1 : 5'd0) +
+	     (irq_ack[6] ? 5'd1 : 5'd0) +
+	     (irq_ack[7] ? 5'd1 : 5'd0) +
+	     (irq_ack[8] ? 5'd1 : 5'd0) +
+	     (irq_ack[9] ? 5'd1 : 5'd0) +
+	     (irq_ack[10] ? 5'd1 : 5'd0) +
+	     (irq_ack[11] ? 5'd1 : 5'd0) +
+	     (irq_ack[12] ? 5'd1 : 5'd0) +
+	     (irq_ack[13] ? 5'd1 : 5'd0) +
+	     (irq_ack[14] ? 5'd1 : 5'd0) +
+	     (irq_ack[15] ? 5'd1 : 5'd0) ;
+  assign x__h194023 = { 27'd0, value__h194024 } ;
+
+  // handling of inlined registers
+
+  always@(posedge design_clk)
+  begin
+    if (design_rst == `BSV_RESET_VALUE)
+      begin
+        interrupt_last_10 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_100 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_101 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_102 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_103 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_104 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_105 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_106 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_107 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_108 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_109 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_11 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_110 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_111 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_112 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_113 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_114 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_115 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_116 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_117 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_118 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_119 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_12 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_120 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_121 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_122 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_123 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_124 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_125 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_126 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_127 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_128 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_129 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_13 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_130 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_131 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_14 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_15 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_16 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_17 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_18 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_19 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_20 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_21 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_22 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_23 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_24 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_25 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_26 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_27 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_28 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_29 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_30 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_31 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_32 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_33 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_34 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_35 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_36 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_37 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_38 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_39 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_40 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_41 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_42 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_43 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_44 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_45 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_46 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_47 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_48 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_49 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_5 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_50 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_51 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_52 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_53 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_54 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_55 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_56 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_57 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_58 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_59 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_6 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_60 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_61 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_62 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_63 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_64 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_65 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_66 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_67 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_68 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_69 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_7 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_70 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_71 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_72 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_73 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_74 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_75 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_76 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_77 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_78 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_79 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_8 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_80 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_81 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_82 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_83 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_84 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_85 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_86 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_87 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_88 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_89 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_9 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_90 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_91 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_92 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_93 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_94 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_95 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_96 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_97 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_98 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_99 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+      end
+    else
+      begin
+        if (interrupt_last_10$EN)
+	  interrupt_last_10 <= `BSV_ASSIGNMENT_DELAY interrupt_last_10$D_IN;
+	if (interrupt_last_100$EN)
+	  interrupt_last_100 <= `BSV_ASSIGNMENT_DELAY interrupt_last_100$D_IN;
+	if (interrupt_last_101$EN)
+	  interrupt_last_101 <= `BSV_ASSIGNMENT_DELAY interrupt_last_101$D_IN;
+	if (interrupt_last_102$EN)
+	  interrupt_last_102 <= `BSV_ASSIGNMENT_DELAY interrupt_last_102$D_IN;
+	if (interrupt_last_103$EN)
+	  interrupt_last_103 <= `BSV_ASSIGNMENT_DELAY interrupt_last_103$D_IN;
+	if (interrupt_last_104$EN)
+	  interrupt_last_104 <= `BSV_ASSIGNMENT_DELAY interrupt_last_104$D_IN;
+	if (interrupt_last_105$EN)
+	  interrupt_last_105 <= `BSV_ASSIGNMENT_DELAY interrupt_last_105$D_IN;
+	if (interrupt_last_106$EN)
+	  interrupt_last_106 <= `BSV_ASSIGNMENT_DELAY interrupt_last_106$D_IN;
+	if (interrupt_last_107$EN)
+	  interrupt_last_107 <= `BSV_ASSIGNMENT_DELAY interrupt_last_107$D_IN;
+	if (interrupt_last_108$EN)
+	  interrupt_last_108 <= `BSV_ASSIGNMENT_DELAY interrupt_last_108$D_IN;
+	if (interrupt_last_109$EN)
+	  interrupt_last_109 <= `BSV_ASSIGNMENT_DELAY interrupt_last_109$D_IN;
+	if (interrupt_last_11$EN)
+	  interrupt_last_11 <= `BSV_ASSIGNMENT_DELAY interrupt_last_11$D_IN;
+	if (interrupt_last_110$EN)
+	  interrupt_last_110 <= `BSV_ASSIGNMENT_DELAY interrupt_last_110$D_IN;
+	if (interrupt_last_111$EN)
+	  interrupt_last_111 <= `BSV_ASSIGNMENT_DELAY interrupt_last_111$D_IN;
+	if (interrupt_last_112$EN)
+	  interrupt_last_112 <= `BSV_ASSIGNMENT_DELAY interrupt_last_112$D_IN;
+	if (interrupt_last_113$EN)
+	  interrupt_last_113 <= `BSV_ASSIGNMENT_DELAY interrupt_last_113$D_IN;
+	if (interrupt_last_114$EN)
+	  interrupt_last_114 <= `BSV_ASSIGNMENT_DELAY interrupt_last_114$D_IN;
+	if (interrupt_last_115$EN)
+	  interrupt_last_115 <= `BSV_ASSIGNMENT_DELAY interrupt_last_115$D_IN;
+	if (interrupt_last_116$EN)
+	  interrupt_last_116 <= `BSV_ASSIGNMENT_DELAY interrupt_last_116$D_IN;
+	if (interrupt_last_117$EN)
+	  interrupt_last_117 <= `BSV_ASSIGNMENT_DELAY interrupt_last_117$D_IN;
+	if (interrupt_last_118$EN)
+	  interrupt_last_118 <= `BSV_ASSIGNMENT_DELAY interrupt_last_118$D_IN;
+	if (interrupt_last_119$EN)
+	  interrupt_last_119 <= `BSV_ASSIGNMENT_DELAY interrupt_last_119$D_IN;
+	if (interrupt_last_12$EN)
+	  interrupt_last_12 <= `BSV_ASSIGNMENT_DELAY interrupt_last_12$D_IN;
+	if (interrupt_last_120$EN)
+	  interrupt_last_120 <= `BSV_ASSIGNMENT_DELAY interrupt_last_120$D_IN;
+	if (interrupt_last_121$EN)
+	  interrupt_last_121 <= `BSV_ASSIGNMENT_DELAY interrupt_last_121$D_IN;
+	if (interrupt_last_122$EN)
+	  interrupt_last_122 <= `BSV_ASSIGNMENT_DELAY interrupt_last_122$D_IN;
+	if (interrupt_last_123$EN)
+	  interrupt_last_123 <= `BSV_ASSIGNMENT_DELAY interrupt_last_123$D_IN;
+	if (interrupt_last_124$EN)
+	  interrupt_last_124 <= `BSV_ASSIGNMENT_DELAY interrupt_last_124$D_IN;
+	if (interrupt_last_125$EN)
+	  interrupt_last_125 <= `BSV_ASSIGNMENT_DELAY interrupt_last_125$D_IN;
+	if (interrupt_last_126$EN)
+	  interrupt_last_126 <= `BSV_ASSIGNMENT_DELAY interrupt_last_126$D_IN;
+	if (interrupt_last_127$EN)
+	  interrupt_last_127 <= `BSV_ASSIGNMENT_DELAY interrupt_last_127$D_IN;
+	if (interrupt_last_128$EN)
+	  interrupt_last_128 <= `BSV_ASSIGNMENT_DELAY interrupt_last_128$D_IN;
+	if (interrupt_last_129$EN)
+	  interrupt_last_129 <= `BSV_ASSIGNMENT_DELAY interrupt_last_129$D_IN;
+	if (interrupt_last_13$EN)
+	  interrupt_last_13 <= `BSV_ASSIGNMENT_DELAY interrupt_last_13$D_IN;
+	if (interrupt_last_130$EN)
+	  interrupt_last_130 <= `BSV_ASSIGNMENT_DELAY interrupt_last_130$D_IN;
+	if (interrupt_last_131$EN)
+	  interrupt_last_131 <= `BSV_ASSIGNMENT_DELAY interrupt_last_131$D_IN;
+	if (interrupt_last_14$EN)
+	  interrupt_last_14 <= `BSV_ASSIGNMENT_DELAY interrupt_last_14$D_IN;
+	if (interrupt_last_15$EN)
+	  interrupt_last_15 <= `BSV_ASSIGNMENT_DELAY interrupt_last_15$D_IN;
+	if (interrupt_last_16$EN)
+	  interrupt_last_16 <= `BSV_ASSIGNMENT_DELAY interrupt_last_16$D_IN;
+	if (interrupt_last_17$EN)
+	  interrupt_last_17 <= `BSV_ASSIGNMENT_DELAY interrupt_last_17$D_IN;
+	if (interrupt_last_18$EN)
+	  interrupt_last_18 <= `BSV_ASSIGNMENT_DELAY interrupt_last_18$D_IN;
+	if (interrupt_last_19$EN)
+	  interrupt_last_19 <= `BSV_ASSIGNMENT_DELAY interrupt_last_19$D_IN;
+	if (interrupt_last_20$EN)
+	  interrupt_last_20 <= `BSV_ASSIGNMENT_DELAY interrupt_last_20$D_IN;
+	if (interrupt_last_21$EN)
+	  interrupt_last_21 <= `BSV_ASSIGNMENT_DELAY interrupt_last_21$D_IN;
+	if (interrupt_last_22$EN)
+	  interrupt_last_22 <= `BSV_ASSIGNMENT_DELAY interrupt_last_22$D_IN;
+	if (interrupt_last_23$EN)
+	  interrupt_last_23 <= `BSV_ASSIGNMENT_DELAY interrupt_last_23$D_IN;
+	if (interrupt_last_24$EN)
+	  interrupt_last_24 <= `BSV_ASSIGNMENT_DELAY interrupt_last_24$D_IN;
+	if (interrupt_last_25$EN)
+	  interrupt_last_25 <= `BSV_ASSIGNMENT_DELAY interrupt_last_25$D_IN;
+	if (interrupt_last_26$EN)
+	  interrupt_last_26 <= `BSV_ASSIGNMENT_DELAY interrupt_last_26$D_IN;
+	if (interrupt_last_27$EN)
+	  interrupt_last_27 <= `BSV_ASSIGNMENT_DELAY interrupt_last_27$D_IN;
+	if (interrupt_last_28$EN)
+	  interrupt_last_28 <= `BSV_ASSIGNMENT_DELAY interrupt_last_28$D_IN;
+	if (interrupt_last_29$EN)
+	  interrupt_last_29 <= `BSV_ASSIGNMENT_DELAY interrupt_last_29$D_IN;
+	if (interrupt_last_30$EN)
+	  interrupt_last_30 <= `BSV_ASSIGNMENT_DELAY interrupt_last_30$D_IN;
+	if (interrupt_last_31$EN)
+	  interrupt_last_31 <= `BSV_ASSIGNMENT_DELAY interrupt_last_31$D_IN;
+	if (interrupt_last_32$EN)
+	  interrupt_last_32 <= `BSV_ASSIGNMENT_DELAY interrupt_last_32$D_IN;
+	if (interrupt_last_33$EN)
+	  interrupt_last_33 <= `BSV_ASSIGNMENT_DELAY interrupt_last_33$D_IN;
+	if (interrupt_last_34$EN)
+	  interrupt_last_34 <= `BSV_ASSIGNMENT_DELAY interrupt_last_34$D_IN;
+	if (interrupt_last_35$EN)
+	  interrupt_last_35 <= `BSV_ASSIGNMENT_DELAY interrupt_last_35$D_IN;
+	if (interrupt_last_36$EN)
+	  interrupt_last_36 <= `BSV_ASSIGNMENT_DELAY interrupt_last_36$D_IN;
+	if (interrupt_last_37$EN)
+	  interrupt_last_37 <= `BSV_ASSIGNMENT_DELAY interrupt_last_37$D_IN;
+	if (interrupt_last_38$EN)
+	  interrupt_last_38 <= `BSV_ASSIGNMENT_DELAY interrupt_last_38$D_IN;
+	if (interrupt_last_39$EN)
+	  interrupt_last_39 <= `BSV_ASSIGNMENT_DELAY interrupt_last_39$D_IN;
+	if (interrupt_last_4$EN)
+	  interrupt_last_4 <= `BSV_ASSIGNMENT_DELAY interrupt_last_4$D_IN;
+	if (interrupt_last_40$EN)
+	  interrupt_last_40 <= `BSV_ASSIGNMENT_DELAY interrupt_last_40$D_IN;
+	if (interrupt_last_41$EN)
+	  interrupt_last_41 <= `BSV_ASSIGNMENT_DELAY interrupt_last_41$D_IN;
+	if (interrupt_last_42$EN)
+	  interrupt_last_42 <= `BSV_ASSIGNMENT_DELAY interrupt_last_42$D_IN;
+	if (interrupt_last_43$EN)
+	  interrupt_last_43 <= `BSV_ASSIGNMENT_DELAY interrupt_last_43$D_IN;
+	if (interrupt_last_44$EN)
+	  interrupt_last_44 <= `BSV_ASSIGNMENT_DELAY interrupt_last_44$D_IN;
+	if (interrupt_last_45$EN)
+	  interrupt_last_45 <= `BSV_ASSIGNMENT_DELAY interrupt_last_45$D_IN;
+	if (interrupt_last_46$EN)
+	  interrupt_last_46 <= `BSV_ASSIGNMENT_DELAY interrupt_last_46$D_IN;
+	if (interrupt_last_47$EN)
+	  interrupt_last_47 <= `BSV_ASSIGNMENT_DELAY interrupt_last_47$D_IN;
+	if (interrupt_last_48$EN)
+	  interrupt_last_48 <= `BSV_ASSIGNMENT_DELAY interrupt_last_48$D_IN;
+	if (interrupt_last_49$EN)
+	  interrupt_last_49 <= `BSV_ASSIGNMENT_DELAY interrupt_last_49$D_IN;
+	if (interrupt_last_5$EN)
+	  interrupt_last_5 <= `BSV_ASSIGNMENT_DELAY interrupt_last_5$D_IN;
+	if (interrupt_last_50$EN)
+	  interrupt_last_50 <= `BSV_ASSIGNMENT_DELAY interrupt_last_50$D_IN;
+	if (interrupt_last_51$EN)
+	  interrupt_last_51 <= `BSV_ASSIGNMENT_DELAY interrupt_last_51$D_IN;
+	if (interrupt_last_52$EN)
+	  interrupt_last_52 <= `BSV_ASSIGNMENT_DELAY interrupt_last_52$D_IN;
+	if (interrupt_last_53$EN)
+	  interrupt_last_53 <= `BSV_ASSIGNMENT_DELAY interrupt_last_53$D_IN;
+	if (interrupt_last_54$EN)
+	  interrupt_last_54 <= `BSV_ASSIGNMENT_DELAY interrupt_last_54$D_IN;
+	if (interrupt_last_55$EN)
+	  interrupt_last_55 <= `BSV_ASSIGNMENT_DELAY interrupt_last_55$D_IN;
+	if (interrupt_last_56$EN)
+	  interrupt_last_56 <= `BSV_ASSIGNMENT_DELAY interrupt_last_56$D_IN;
+	if (interrupt_last_57$EN)
+	  interrupt_last_57 <= `BSV_ASSIGNMENT_DELAY interrupt_last_57$D_IN;
+	if (interrupt_last_58$EN)
+	  interrupt_last_58 <= `BSV_ASSIGNMENT_DELAY interrupt_last_58$D_IN;
+	if (interrupt_last_59$EN)
+	  interrupt_last_59 <= `BSV_ASSIGNMENT_DELAY interrupt_last_59$D_IN;
+	if (interrupt_last_6$EN)
+	  interrupt_last_6 <= `BSV_ASSIGNMENT_DELAY interrupt_last_6$D_IN;
+	if (interrupt_last_60$EN)
+	  interrupt_last_60 <= `BSV_ASSIGNMENT_DELAY interrupt_last_60$D_IN;
+	if (interrupt_last_61$EN)
+	  interrupt_last_61 <= `BSV_ASSIGNMENT_DELAY interrupt_last_61$D_IN;
+	if (interrupt_last_62$EN)
+	  interrupt_last_62 <= `BSV_ASSIGNMENT_DELAY interrupt_last_62$D_IN;
+	if (interrupt_last_63$EN)
+	  interrupt_last_63 <= `BSV_ASSIGNMENT_DELAY interrupt_last_63$D_IN;
+	if (interrupt_last_64$EN)
+	  interrupt_last_64 <= `BSV_ASSIGNMENT_DELAY interrupt_last_64$D_IN;
+	if (interrupt_last_65$EN)
+	  interrupt_last_65 <= `BSV_ASSIGNMENT_DELAY interrupt_last_65$D_IN;
+	if (interrupt_last_66$EN)
+	  interrupt_last_66 <= `BSV_ASSIGNMENT_DELAY interrupt_last_66$D_IN;
+	if (interrupt_last_67$EN)
+	  interrupt_last_67 <= `BSV_ASSIGNMENT_DELAY interrupt_last_67$D_IN;
+	if (interrupt_last_68$EN)
+	  interrupt_last_68 <= `BSV_ASSIGNMENT_DELAY interrupt_last_68$D_IN;
+	if (interrupt_last_69$EN)
+	  interrupt_last_69 <= `BSV_ASSIGNMENT_DELAY interrupt_last_69$D_IN;
+	if (interrupt_last_7$EN)
+	  interrupt_last_7 <= `BSV_ASSIGNMENT_DELAY interrupt_last_7$D_IN;
+	if (interrupt_last_70$EN)
+	  interrupt_last_70 <= `BSV_ASSIGNMENT_DELAY interrupt_last_70$D_IN;
+	if (interrupt_last_71$EN)
+	  interrupt_last_71 <= `BSV_ASSIGNMENT_DELAY interrupt_last_71$D_IN;
+	if (interrupt_last_72$EN)
+	  interrupt_last_72 <= `BSV_ASSIGNMENT_DELAY interrupt_last_72$D_IN;
+	if (interrupt_last_73$EN)
+	  interrupt_last_73 <= `BSV_ASSIGNMENT_DELAY interrupt_last_73$D_IN;
+	if (interrupt_last_74$EN)
+	  interrupt_last_74 <= `BSV_ASSIGNMENT_DELAY interrupt_last_74$D_IN;
+	if (interrupt_last_75$EN)
+	  interrupt_last_75 <= `BSV_ASSIGNMENT_DELAY interrupt_last_75$D_IN;
+	if (interrupt_last_76$EN)
+	  interrupt_last_76 <= `BSV_ASSIGNMENT_DELAY interrupt_last_76$D_IN;
+	if (interrupt_last_77$EN)
+	  interrupt_last_77 <= `BSV_ASSIGNMENT_DELAY interrupt_last_77$D_IN;
+	if (interrupt_last_78$EN)
+	  interrupt_last_78 <= `BSV_ASSIGNMENT_DELAY interrupt_last_78$D_IN;
+	if (interrupt_last_79$EN)
+	  interrupt_last_79 <= `BSV_ASSIGNMENT_DELAY interrupt_last_79$D_IN;
+	if (interrupt_last_8$EN)
+	  interrupt_last_8 <= `BSV_ASSIGNMENT_DELAY interrupt_last_8$D_IN;
+	if (interrupt_last_80$EN)
+	  interrupt_last_80 <= `BSV_ASSIGNMENT_DELAY interrupt_last_80$D_IN;
+	if (interrupt_last_81$EN)
+	  interrupt_last_81 <= `BSV_ASSIGNMENT_DELAY interrupt_last_81$D_IN;
+	if (interrupt_last_82$EN)
+	  interrupt_last_82 <= `BSV_ASSIGNMENT_DELAY interrupt_last_82$D_IN;
+	if (interrupt_last_83$EN)
+	  interrupt_last_83 <= `BSV_ASSIGNMENT_DELAY interrupt_last_83$D_IN;
+	if (interrupt_last_84$EN)
+	  interrupt_last_84 <= `BSV_ASSIGNMENT_DELAY interrupt_last_84$D_IN;
+	if (interrupt_last_85$EN)
+	  interrupt_last_85 <= `BSV_ASSIGNMENT_DELAY interrupt_last_85$D_IN;
+	if (interrupt_last_86$EN)
+	  interrupt_last_86 <= `BSV_ASSIGNMENT_DELAY interrupt_last_86$D_IN;
+	if (interrupt_last_87$EN)
+	  interrupt_last_87 <= `BSV_ASSIGNMENT_DELAY interrupt_last_87$D_IN;
+	if (interrupt_last_88$EN)
+	  interrupt_last_88 <= `BSV_ASSIGNMENT_DELAY interrupt_last_88$D_IN;
+	if (interrupt_last_89$EN)
+	  interrupt_last_89 <= `BSV_ASSIGNMENT_DELAY interrupt_last_89$D_IN;
+	if (interrupt_last_9$EN)
+	  interrupt_last_9 <= `BSV_ASSIGNMENT_DELAY interrupt_last_9$D_IN;
+	if (interrupt_last_90$EN)
+	  interrupt_last_90 <= `BSV_ASSIGNMENT_DELAY interrupt_last_90$D_IN;
+	if (interrupt_last_91$EN)
+	  interrupt_last_91 <= `BSV_ASSIGNMENT_DELAY interrupt_last_91$D_IN;
+	if (interrupt_last_92$EN)
+	  interrupt_last_92 <= `BSV_ASSIGNMENT_DELAY interrupt_last_92$D_IN;
+	if (interrupt_last_93$EN)
+	  interrupt_last_93 <= `BSV_ASSIGNMENT_DELAY interrupt_last_93$D_IN;
+	if (interrupt_last_94$EN)
+	  interrupt_last_94 <= `BSV_ASSIGNMENT_DELAY interrupt_last_94$D_IN;
+	if (interrupt_last_95$EN)
+	  interrupt_last_95 <= `BSV_ASSIGNMENT_DELAY interrupt_last_95$D_IN;
+	if (interrupt_last_96$EN)
+	  interrupt_last_96 <= `BSV_ASSIGNMENT_DELAY interrupt_last_96$D_IN;
+	if (interrupt_last_97$EN)
+	  interrupt_last_97 <= `BSV_ASSIGNMENT_DELAY interrupt_last_97$D_IN;
+	if (interrupt_last_98$EN)
+	  interrupt_last_98 <= `BSV_ASSIGNMENT_DELAY interrupt_last_98$D_IN;
+	if (interrupt_last_99$EN)
+	  interrupt_last_99 <= `BSV_ASSIGNMENT_DELAY interrupt_last_99$D_IN;
+      end
+  end
+
+  always@(posedge S_AXI_ACLK)
+  begin
+    if (S_AXI_ARESETN == `BSV_RESET_VALUE)
+      begin
+        completionReg <= `BSV_ASSIGNMENT_DELAY 32'd0;
+	designGIER <= `BSV_ASSIGNMENT_DELAY 1'd1;
+	host_is_ready_0 <= `BSV_ASSIGNMENT_DELAY 1'd1;
+	host_is_ready_1 <= `BSV_ASSIGNMENT_DELAY 1'd1;
+	host_is_ready_2 <= `BSV_ASSIGNMENT_DELAY 1'd1;
+	host_is_ready_3 <= `BSV_ASSIGNMENT_DELAY 1'd1;
+	host_pending_design_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_10 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_100 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_101 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_102 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_103 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_104 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_105 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_106 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_107 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_108 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_109 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_11 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_110 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_111 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_112 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_113 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_114 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_115 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_116 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_117 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_118 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_119 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_12 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_120 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_121 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_122 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_123 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_124 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_125 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_126 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_127 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_13 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_14 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_15 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_16 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_17 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_18 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_19 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_20 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_21 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_22 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_23 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_24 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_25 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_26 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_27 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_28 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_29 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_30 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_31 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_32 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_33 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_34 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_35 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_36 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_37 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_38 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_39 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_40 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_41 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_42 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_43 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_44 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_45 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_46 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_47 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_48 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_49 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_5 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_50 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_51 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_52 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_53 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_54 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_55 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_56 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_57 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_58 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_59 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_6 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_60 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_61 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_62 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_63 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_64 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_65 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_66 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_67 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_68 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_69 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_7 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_70 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_71 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_72 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_73 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_74 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_75 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_76 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_77 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_78 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_79 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_8 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_80 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_81 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_82 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_83 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_84 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_85 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_86 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_87 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_88 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_89 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_9 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_90 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_91 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_92 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_93 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_94 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_95 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_96 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_97 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_98 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_design_99 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_pcie_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_pcie_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_pcie_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	host_pending_pcie_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	id <= `BSV_ASSIGNMENT_DELAY 32'hE5AFAABB;
+	interrupt_last_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	interrupt_last_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	s_config_readBusy <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	s_config_writeBusy <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	s_config_writeSlave_addrIn_rv <= `BSV_ASSIGNMENT_DELAY 20'd174762;
+	s_config_writeSlave_dataIn_rv <= `BSV_ASSIGNMENT_DELAY 37'h0AAAAAAAAA;
+	sh_active_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_10 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_11 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_12 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_13 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_14 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_15 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_5 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_6 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_7 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_8 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_active_9 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_0 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_1 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_10 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_11 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_12 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_13 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_14 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_15 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_2 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_3 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_4 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_5 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_6 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_7 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_8 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+	sh_wait_ack_9 <= `BSV_ASSIGNMENT_DELAY 1'd0;
+      end
+    else
+      begin
+        if (completionReg$EN)
+	  completionReg <= `BSV_ASSIGNMENT_DELAY completionReg$D_IN;
+	if (designGIER$EN)
+	  designGIER <= `BSV_ASSIGNMENT_DELAY designGIER$D_IN;
+	if (host_is_ready_0$EN)
+	  host_is_ready_0 <= `BSV_ASSIGNMENT_DELAY host_is_ready_0$D_IN;
+	if (host_is_ready_1$EN)
+	  host_is_ready_1 <= `BSV_ASSIGNMENT_DELAY host_is_ready_1$D_IN;
+	if (host_is_ready_2$EN)
+	  host_is_ready_2 <= `BSV_ASSIGNMENT_DELAY host_is_ready_2$D_IN;
+	if (host_is_ready_3$EN)
+	  host_is_ready_3 <= `BSV_ASSIGNMENT_DELAY host_is_ready_3$D_IN;
+	if (host_pending_design_0$EN)
+	  host_pending_design_0 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_0$D_IN;
+	if (host_pending_design_1$EN)
+	  host_pending_design_1 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_1$D_IN;
+	if (host_pending_design_10$EN)
+	  host_pending_design_10 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_10$D_IN;
+	if (host_pending_design_100$EN)
+	  host_pending_design_100 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_100$D_IN;
+	if (host_pending_design_101$EN)
+	  host_pending_design_101 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_101$D_IN;
+	if (host_pending_design_102$EN)
+	  host_pending_design_102 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_102$D_IN;
+	if (host_pending_design_103$EN)
+	  host_pending_design_103 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_103$D_IN;
+	if (host_pending_design_104$EN)
+	  host_pending_design_104 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_104$D_IN;
+	if (host_pending_design_105$EN)
+	  host_pending_design_105 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_105$D_IN;
+	if (host_pending_design_106$EN)
+	  host_pending_design_106 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_106$D_IN;
+	if (host_pending_design_107$EN)
+	  host_pending_design_107 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_107$D_IN;
+	if (host_pending_design_108$EN)
+	  host_pending_design_108 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_108$D_IN;
+	if (host_pending_design_109$EN)
+	  host_pending_design_109 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_109$D_IN;
+	if (host_pending_design_11$EN)
+	  host_pending_design_11 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_11$D_IN;
+	if (host_pending_design_110$EN)
+	  host_pending_design_110 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_110$D_IN;
+	if (host_pending_design_111$EN)
+	  host_pending_design_111 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_111$D_IN;
+	if (host_pending_design_112$EN)
+	  host_pending_design_112 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_112$D_IN;
+	if (host_pending_design_113$EN)
+	  host_pending_design_113 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_113$D_IN;
+	if (host_pending_design_114$EN)
+	  host_pending_design_114 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_114$D_IN;
+	if (host_pending_design_115$EN)
+	  host_pending_design_115 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_115$D_IN;
+	if (host_pending_design_116$EN)
+	  host_pending_design_116 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_116$D_IN;
+	if (host_pending_design_117$EN)
+	  host_pending_design_117 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_117$D_IN;
+	if (host_pending_design_118$EN)
+	  host_pending_design_118 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_118$D_IN;
+	if (host_pending_design_119$EN)
+	  host_pending_design_119 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_119$D_IN;
+	if (host_pending_design_12$EN)
+	  host_pending_design_12 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_12$D_IN;
+	if (host_pending_design_120$EN)
+	  host_pending_design_120 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_120$D_IN;
+	if (host_pending_design_121$EN)
+	  host_pending_design_121 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_121$D_IN;
+	if (host_pending_design_122$EN)
+	  host_pending_design_122 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_122$D_IN;
+	if (host_pending_design_123$EN)
+	  host_pending_design_123 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_123$D_IN;
+	if (host_pending_design_124$EN)
+	  host_pending_design_124 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_124$D_IN;
+	if (host_pending_design_125$EN)
+	  host_pending_design_125 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_125$D_IN;
+	if (host_pending_design_126$EN)
+	  host_pending_design_126 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_126$D_IN;
+	if (host_pending_design_127$EN)
+	  host_pending_design_127 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_127$D_IN;
+	if (host_pending_design_13$EN)
+	  host_pending_design_13 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_13$D_IN;
+	if (host_pending_design_14$EN)
+	  host_pending_design_14 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_14$D_IN;
+	if (host_pending_design_15$EN)
+	  host_pending_design_15 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_15$D_IN;
+	if (host_pending_design_16$EN)
+	  host_pending_design_16 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_16$D_IN;
+	if (host_pending_design_17$EN)
+	  host_pending_design_17 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_17$D_IN;
+	if (host_pending_design_18$EN)
+	  host_pending_design_18 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_18$D_IN;
+	if (host_pending_design_19$EN)
+	  host_pending_design_19 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_19$D_IN;
+	if (host_pending_design_2$EN)
+	  host_pending_design_2 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_2$D_IN;
+	if (host_pending_design_20$EN)
+	  host_pending_design_20 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_20$D_IN;
+	if (host_pending_design_21$EN)
+	  host_pending_design_21 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_21$D_IN;
+	if (host_pending_design_22$EN)
+	  host_pending_design_22 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_22$D_IN;
+	if (host_pending_design_23$EN)
+	  host_pending_design_23 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_23$D_IN;
+	if (host_pending_design_24$EN)
+	  host_pending_design_24 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_24$D_IN;
+	if (host_pending_design_25$EN)
+	  host_pending_design_25 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_25$D_IN;
+	if (host_pending_design_26$EN)
+	  host_pending_design_26 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_26$D_IN;
+	if (host_pending_design_27$EN)
+	  host_pending_design_27 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_27$D_IN;
+	if (host_pending_design_28$EN)
+	  host_pending_design_28 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_28$D_IN;
+	if (host_pending_design_29$EN)
+	  host_pending_design_29 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_29$D_IN;
+	if (host_pending_design_3$EN)
+	  host_pending_design_3 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_3$D_IN;
+	if (host_pending_design_30$EN)
+	  host_pending_design_30 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_30$D_IN;
+	if (host_pending_design_31$EN)
+	  host_pending_design_31 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_31$D_IN;
+	if (host_pending_design_32$EN)
+	  host_pending_design_32 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_32$D_IN;
+	if (host_pending_design_33$EN)
+	  host_pending_design_33 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_33$D_IN;
+	if (host_pending_design_34$EN)
+	  host_pending_design_34 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_34$D_IN;
+	if (host_pending_design_35$EN)
+	  host_pending_design_35 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_35$D_IN;
+	if (host_pending_design_36$EN)
+	  host_pending_design_36 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_36$D_IN;
+	if (host_pending_design_37$EN)
+	  host_pending_design_37 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_37$D_IN;
+	if (host_pending_design_38$EN)
+	  host_pending_design_38 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_38$D_IN;
+	if (host_pending_design_39$EN)
+	  host_pending_design_39 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_39$D_IN;
+	if (host_pending_design_4$EN)
+	  host_pending_design_4 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_4$D_IN;
+	if (host_pending_design_40$EN)
+	  host_pending_design_40 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_40$D_IN;
+	if (host_pending_design_41$EN)
+	  host_pending_design_41 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_41$D_IN;
+	if (host_pending_design_42$EN)
+	  host_pending_design_42 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_42$D_IN;
+	if (host_pending_design_43$EN)
+	  host_pending_design_43 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_43$D_IN;
+	if (host_pending_design_44$EN)
+	  host_pending_design_44 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_44$D_IN;
+	if (host_pending_design_45$EN)
+	  host_pending_design_45 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_45$D_IN;
+	if (host_pending_design_46$EN)
+	  host_pending_design_46 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_46$D_IN;
+	if (host_pending_design_47$EN)
+	  host_pending_design_47 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_47$D_IN;
+	if (host_pending_design_48$EN)
+	  host_pending_design_48 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_48$D_IN;
+	if (host_pending_design_49$EN)
+	  host_pending_design_49 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_49$D_IN;
+	if (host_pending_design_5$EN)
+	  host_pending_design_5 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_5$D_IN;
+	if (host_pending_design_50$EN)
+	  host_pending_design_50 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_50$D_IN;
+	if (host_pending_design_51$EN)
+	  host_pending_design_51 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_51$D_IN;
+	if (host_pending_design_52$EN)
+	  host_pending_design_52 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_52$D_IN;
+	if (host_pending_design_53$EN)
+	  host_pending_design_53 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_53$D_IN;
+	if (host_pending_design_54$EN)
+	  host_pending_design_54 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_54$D_IN;
+	if (host_pending_design_55$EN)
+	  host_pending_design_55 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_55$D_IN;
+	if (host_pending_design_56$EN)
+	  host_pending_design_56 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_56$D_IN;
+	if (host_pending_design_57$EN)
+	  host_pending_design_57 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_57$D_IN;
+	if (host_pending_design_58$EN)
+	  host_pending_design_58 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_58$D_IN;
+	if (host_pending_design_59$EN)
+	  host_pending_design_59 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_59$D_IN;
+	if (host_pending_design_6$EN)
+	  host_pending_design_6 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_6$D_IN;
+	if (host_pending_design_60$EN)
+	  host_pending_design_60 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_60$D_IN;
+	if (host_pending_design_61$EN)
+	  host_pending_design_61 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_61$D_IN;
+	if (host_pending_design_62$EN)
+	  host_pending_design_62 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_62$D_IN;
+	if (host_pending_design_63$EN)
+	  host_pending_design_63 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_63$D_IN;
+	if (host_pending_design_64$EN)
+	  host_pending_design_64 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_64$D_IN;
+	if (host_pending_design_65$EN)
+	  host_pending_design_65 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_65$D_IN;
+	if (host_pending_design_66$EN)
+	  host_pending_design_66 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_66$D_IN;
+	if (host_pending_design_67$EN)
+	  host_pending_design_67 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_67$D_IN;
+	if (host_pending_design_68$EN)
+	  host_pending_design_68 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_68$D_IN;
+	if (host_pending_design_69$EN)
+	  host_pending_design_69 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_69$D_IN;
+	if (host_pending_design_7$EN)
+	  host_pending_design_7 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_7$D_IN;
+	if (host_pending_design_70$EN)
+	  host_pending_design_70 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_70$D_IN;
+	if (host_pending_design_71$EN)
+	  host_pending_design_71 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_71$D_IN;
+	if (host_pending_design_72$EN)
+	  host_pending_design_72 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_72$D_IN;
+	if (host_pending_design_73$EN)
+	  host_pending_design_73 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_73$D_IN;
+	if (host_pending_design_74$EN)
+	  host_pending_design_74 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_74$D_IN;
+	if (host_pending_design_75$EN)
+	  host_pending_design_75 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_75$D_IN;
+	if (host_pending_design_76$EN)
+	  host_pending_design_76 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_76$D_IN;
+	if (host_pending_design_77$EN)
+	  host_pending_design_77 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_77$D_IN;
+	if (host_pending_design_78$EN)
+	  host_pending_design_78 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_78$D_IN;
+	if (host_pending_design_79$EN)
+	  host_pending_design_79 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_79$D_IN;
+	if (host_pending_design_8$EN)
+	  host_pending_design_8 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_8$D_IN;
+	if (host_pending_design_80$EN)
+	  host_pending_design_80 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_80$D_IN;
+	if (host_pending_design_81$EN)
+	  host_pending_design_81 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_81$D_IN;
+	if (host_pending_design_82$EN)
+	  host_pending_design_82 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_82$D_IN;
+	if (host_pending_design_83$EN)
+	  host_pending_design_83 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_83$D_IN;
+	if (host_pending_design_84$EN)
+	  host_pending_design_84 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_84$D_IN;
+	if (host_pending_design_85$EN)
+	  host_pending_design_85 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_85$D_IN;
+	if (host_pending_design_86$EN)
+	  host_pending_design_86 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_86$D_IN;
+	if (host_pending_design_87$EN)
+	  host_pending_design_87 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_87$D_IN;
+	if (host_pending_design_88$EN)
+	  host_pending_design_88 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_88$D_IN;
+	if (host_pending_design_89$EN)
+	  host_pending_design_89 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_89$D_IN;
+	if (host_pending_design_9$EN)
+	  host_pending_design_9 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_9$D_IN;
+	if (host_pending_design_90$EN)
+	  host_pending_design_90 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_90$D_IN;
+	if (host_pending_design_91$EN)
+	  host_pending_design_91 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_91$D_IN;
+	if (host_pending_design_92$EN)
+	  host_pending_design_92 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_92$D_IN;
+	if (host_pending_design_93$EN)
+	  host_pending_design_93 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_93$D_IN;
+	if (host_pending_design_94$EN)
+	  host_pending_design_94 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_94$D_IN;
+	if (host_pending_design_95$EN)
+	  host_pending_design_95 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_95$D_IN;
+	if (host_pending_design_96$EN)
+	  host_pending_design_96 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_96$D_IN;
+	if (host_pending_design_97$EN)
+	  host_pending_design_97 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_97$D_IN;
+	if (host_pending_design_98$EN)
+	  host_pending_design_98 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_98$D_IN;
+	if (host_pending_design_99$EN)
+	  host_pending_design_99 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_design_99$D_IN;
+	if (host_pending_pcie_0$EN)
+	  host_pending_pcie_0 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_pcie_0$D_IN;
+	if (host_pending_pcie_1$EN)
+	  host_pending_pcie_1 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_pcie_1$D_IN;
+	if (host_pending_pcie_2$EN)
+	  host_pending_pcie_2 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_pcie_2$D_IN;
+	if (host_pending_pcie_3$EN)
+	  host_pending_pcie_3 <= `BSV_ASSIGNMENT_DELAY
+	      host_pending_pcie_3$D_IN;
+	if (id$EN) id <= `BSV_ASSIGNMENT_DELAY id$D_IN;
+	if (interrupt_last_0$EN)
+	  interrupt_last_0 <= `BSV_ASSIGNMENT_DELAY interrupt_last_0$D_IN;
+	if (interrupt_last_1$EN)
+	  interrupt_last_1 <= `BSV_ASSIGNMENT_DELAY interrupt_last_1$D_IN;
+	if (interrupt_last_2$EN)
+	  interrupt_last_2 <= `BSV_ASSIGNMENT_DELAY interrupt_last_2$D_IN;
+	if (interrupt_last_3$EN)
+	  interrupt_last_3 <= `BSV_ASSIGNMENT_DELAY interrupt_last_3$D_IN;
+	if (s_config_readBusy$EN)
+	  s_config_readBusy <= `BSV_ASSIGNMENT_DELAY s_config_readBusy$D_IN;
+	if (s_config_writeBusy$EN)
+	  s_config_writeBusy <= `BSV_ASSIGNMENT_DELAY s_config_writeBusy$D_IN;
+	if (s_config_writeSlave_addrIn_rv$EN)
+	  s_config_writeSlave_addrIn_rv <= `BSV_ASSIGNMENT_DELAY
+	      s_config_writeSlave_addrIn_rv$D_IN;
+	if (s_config_writeSlave_dataIn_rv$EN)
+	  s_config_writeSlave_dataIn_rv <= `BSV_ASSIGNMENT_DELAY
+	      s_config_writeSlave_dataIn_rv$D_IN;
+	if (sh_active_0$EN)
+	  sh_active_0 <= `BSV_ASSIGNMENT_DELAY sh_active_0$D_IN;
+	if (sh_active_1$EN)
+	  sh_active_1 <= `BSV_ASSIGNMENT_DELAY sh_active_1$D_IN;
+	if (sh_active_10$EN)
+	  sh_active_10 <= `BSV_ASSIGNMENT_DELAY sh_active_10$D_IN;
+	if (sh_active_11$EN)
+	  sh_active_11 <= `BSV_ASSIGNMENT_DELAY sh_active_11$D_IN;
+	if (sh_active_12$EN)
+	  sh_active_12 <= `BSV_ASSIGNMENT_DELAY sh_active_12$D_IN;
+	if (sh_active_13$EN)
+	  sh_active_13 <= `BSV_ASSIGNMENT_DELAY sh_active_13$D_IN;
+	if (sh_active_14$EN)
+	  sh_active_14 <= `BSV_ASSIGNMENT_DELAY sh_active_14$D_IN;
+	if (sh_active_15$EN)
+	  sh_active_15 <= `BSV_ASSIGNMENT_DELAY sh_active_15$D_IN;
+	if (sh_active_2$EN)
+	  sh_active_2 <= `BSV_ASSIGNMENT_DELAY sh_active_2$D_IN;
+	if (sh_active_3$EN)
+	  sh_active_3 <= `BSV_ASSIGNMENT_DELAY sh_active_3$D_IN;
+	if (sh_active_4$EN)
+	  sh_active_4 <= `BSV_ASSIGNMENT_DELAY sh_active_4$D_IN;
+	if (sh_active_5$EN)
+	  sh_active_5 <= `BSV_ASSIGNMENT_DELAY sh_active_5$D_IN;
+	if (sh_active_6$EN)
+	  sh_active_6 <= `BSV_ASSIGNMENT_DELAY sh_active_6$D_IN;
+	if (sh_active_7$EN)
+	  sh_active_7 <= `BSV_ASSIGNMENT_DELAY sh_active_7$D_IN;
+	if (sh_active_8$EN)
+	  sh_active_8 <= `BSV_ASSIGNMENT_DELAY sh_active_8$D_IN;
+	if (sh_active_9$EN)
+	  sh_active_9 <= `BSV_ASSIGNMENT_DELAY sh_active_9$D_IN;
+	if (sh_wait_ack_0$EN)
+	  sh_wait_ack_0 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_0$D_IN;
+	if (sh_wait_ack_1$EN)
+	  sh_wait_ack_1 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_1$D_IN;
+	if (sh_wait_ack_10$EN)
+	  sh_wait_ack_10 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_10$D_IN;
+	if (sh_wait_ack_11$EN)
+	  sh_wait_ack_11 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_11$D_IN;
+	if (sh_wait_ack_12$EN)
+	  sh_wait_ack_12 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_12$D_IN;
+	if (sh_wait_ack_13$EN)
+	  sh_wait_ack_13 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_13$D_IN;
+	if (sh_wait_ack_14$EN)
+	  sh_wait_ack_14 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_14$D_IN;
+	if (sh_wait_ack_15$EN)
+	  sh_wait_ack_15 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_15$D_IN;
+	if (sh_wait_ack_2$EN)
+	  sh_wait_ack_2 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_2$D_IN;
+	if (sh_wait_ack_3$EN)
+	  sh_wait_ack_3 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_3$D_IN;
+	if (sh_wait_ack_4$EN)
+	  sh_wait_ack_4 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_4$D_IN;
+	if (sh_wait_ack_5$EN)
+	  sh_wait_ack_5 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_5$D_IN;
+	if (sh_wait_ack_6$EN)
+	  sh_wait_ack_6 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_6$D_IN;
+	if (sh_wait_ack_7$EN)
+	  sh_wait_ack_7 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_7$D_IN;
+	if (sh_wait_ack_8$EN)
+	  sh_wait_ack_8 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_8$D_IN;
+	if (sh_wait_ack_9$EN)
+	  sh_wait_ack_9 <= `BSV_ASSIGNMENT_DELAY sh_wait_ack_9$D_IN;
+      end
+  end
+
+  // synopsys translate_off
+  `ifdef BSV_NO_INITIAL_BLOCKS
+  `else // not BSV_NO_INITIAL_BLOCKS
+  initial
+  begin
+    completionReg = 32'hAAAAAAAA;
+    designGIER = 1'h0;
+    host_is_ready_0 = 1'h0;
+    host_is_ready_1 = 1'h0;
+    host_is_ready_2 = 1'h0;
+    host_is_ready_3 = 1'h0;
+    host_pending_design_0 = 1'h0;
+    host_pending_design_1 = 1'h0;
+    host_pending_design_10 = 1'h0;
+    host_pending_design_100 = 1'h0;
+    host_pending_design_101 = 1'h0;
+    host_pending_design_102 = 1'h0;
+    host_pending_design_103 = 1'h0;
+    host_pending_design_104 = 1'h0;
+    host_pending_design_105 = 1'h0;
+    host_pending_design_106 = 1'h0;
+    host_pending_design_107 = 1'h0;
+    host_pending_design_108 = 1'h0;
+    host_pending_design_109 = 1'h0;
+    host_pending_design_11 = 1'h0;
+    host_pending_design_110 = 1'h0;
+    host_pending_design_111 = 1'h0;
+    host_pending_design_112 = 1'h0;
+    host_pending_design_113 = 1'h0;
+    host_pending_design_114 = 1'h0;
+    host_pending_design_115 = 1'h0;
+    host_pending_design_116 = 1'h0;
+    host_pending_design_117 = 1'h0;
+    host_pending_design_118 = 1'h0;
+    host_pending_design_119 = 1'h0;
+    host_pending_design_12 = 1'h0;
+    host_pending_design_120 = 1'h0;
+    host_pending_design_121 = 1'h0;
+    host_pending_design_122 = 1'h0;
+    host_pending_design_123 = 1'h0;
+    host_pending_design_124 = 1'h0;
+    host_pending_design_125 = 1'h0;
+    host_pending_design_126 = 1'h0;
+    host_pending_design_127 = 1'h0;
+    host_pending_design_13 = 1'h0;
+    host_pending_design_14 = 1'h0;
+    host_pending_design_15 = 1'h0;
+    host_pending_design_16 = 1'h0;
+    host_pending_design_17 = 1'h0;
+    host_pending_design_18 = 1'h0;
+    host_pending_design_19 = 1'h0;
+    host_pending_design_2 = 1'h0;
+    host_pending_design_20 = 1'h0;
+    host_pending_design_21 = 1'h0;
+    host_pending_design_22 = 1'h0;
+    host_pending_design_23 = 1'h0;
+    host_pending_design_24 = 1'h0;
+    host_pending_design_25 = 1'h0;
+    host_pending_design_26 = 1'h0;
+    host_pending_design_27 = 1'h0;
+    host_pending_design_28 = 1'h0;
+    host_pending_design_29 = 1'h0;
+    host_pending_design_3 = 1'h0;
+    host_pending_design_30 = 1'h0;
+    host_pending_design_31 = 1'h0;
+    host_pending_design_32 = 1'h0;
+    host_pending_design_33 = 1'h0;
+    host_pending_design_34 = 1'h0;
+    host_pending_design_35 = 1'h0;
+    host_pending_design_36 = 1'h0;
+    host_pending_design_37 = 1'h0;
+    host_pending_design_38 = 1'h0;
+    host_pending_design_39 = 1'h0;
+    host_pending_design_4 = 1'h0;
+    host_pending_design_40 = 1'h0;
+    host_pending_design_41 = 1'h0;
+    host_pending_design_42 = 1'h0;
+    host_pending_design_43 = 1'h0;
+    host_pending_design_44 = 1'h0;
+    host_pending_design_45 = 1'h0;
+    host_pending_design_46 = 1'h0;
+    host_pending_design_47 = 1'h0;
+    host_pending_design_48 = 1'h0;
+    host_pending_design_49 = 1'h0;
+    host_pending_design_5 = 1'h0;
+    host_pending_design_50 = 1'h0;
+    host_pending_design_51 = 1'h0;
+    host_pending_design_52 = 1'h0;
+    host_pending_design_53 = 1'h0;
+    host_pending_design_54 = 1'h0;
+    host_pending_design_55 = 1'h0;
+    host_pending_design_56 = 1'h0;
+    host_pending_design_57 = 1'h0;
+    host_pending_design_58 = 1'h0;
+    host_pending_design_59 = 1'h0;
+    host_pending_design_6 = 1'h0;
+    host_pending_design_60 = 1'h0;
+    host_pending_design_61 = 1'h0;
+    host_pending_design_62 = 1'h0;
+    host_pending_design_63 = 1'h0;
+    host_pending_design_64 = 1'h0;
+    host_pending_design_65 = 1'h0;
+    host_pending_design_66 = 1'h0;
+    host_pending_design_67 = 1'h0;
+    host_pending_design_68 = 1'h0;
+    host_pending_design_69 = 1'h0;
+    host_pending_design_7 = 1'h0;
+    host_pending_design_70 = 1'h0;
+    host_pending_design_71 = 1'h0;
+    host_pending_design_72 = 1'h0;
+    host_pending_design_73 = 1'h0;
+    host_pending_design_74 = 1'h0;
+    host_pending_design_75 = 1'h0;
+    host_pending_design_76 = 1'h0;
+    host_pending_design_77 = 1'h0;
+    host_pending_design_78 = 1'h0;
+    host_pending_design_79 = 1'h0;
+    host_pending_design_8 = 1'h0;
+    host_pending_design_80 = 1'h0;
+    host_pending_design_81 = 1'h0;
+    host_pending_design_82 = 1'h0;
+    host_pending_design_83 = 1'h0;
+    host_pending_design_84 = 1'h0;
+    host_pending_design_85 = 1'h0;
+    host_pending_design_86 = 1'h0;
+    host_pending_design_87 = 1'h0;
+    host_pending_design_88 = 1'h0;
+    host_pending_design_89 = 1'h0;
+    host_pending_design_9 = 1'h0;
+    host_pending_design_90 = 1'h0;
+    host_pending_design_91 = 1'h0;
+    host_pending_design_92 = 1'h0;
+    host_pending_design_93 = 1'h0;
+    host_pending_design_94 = 1'h0;
+    host_pending_design_95 = 1'h0;
+    host_pending_design_96 = 1'h0;
+    host_pending_design_97 = 1'h0;
+    host_pending_design_98 = 1'h0;
+    host_pending_design_99 = 1'h0;
+    host_pending_pcie_0 = 1'h0;
+    host_pending_pcie_1 = 1'h0;
+    host_pending_pcie_2 = 1'h0;
+    host_pending_pcie_3 = 1'h0;
+    id = 32'hAAAAAAAA;
+    interrupt_last_0 = 1'h0;
+    interrupt_last_1 = 1'h0;
+    interrupt_last_10 = 1'h0;
+    interrupt_last_100 = 1'h0;
+    interrupt_last_101 = 1'h0;
+    interrupt_last_102 = 1'h0;
+    interrupt_last_103 = 1'h0;
+    interrupt_last_104 = 1'h0;
+    interrupt_last_105 = 1'h0;
+    interrupt_last_106 = 1'h0;
+    interrupt_last_107 = 1'h0;
+    interrupt_last_108 = 1'h0;
+    interrupt_last_109 = 1'h0;
+    interrupt_last_11 = 1'h0;
+    interrupt_last_110 = 1'h0;
+    interrupt_last_111 = 1'h0;
+    interrupt_last_112 = 1'h0;
+    interrupt_last_113 = 1'h0;
+    interrupt_last_114 = 1'h0;
+    interrupt_last_115 = 1'h0;
+    interrupt_last_116 = 1'h0;
+    interrupt_last_117 = 1'h0;
+    interrupt_last_118 = 1'h0;
+    interrupt_last_119 = 1'h0;
+    interrupt_last_12 = 1'h0;
+    interrupt_last_120 = 1'h0;
+    interrupt_last_121 = 1'h0;
+    interrupt_last_122 = 1'h0;
+    interrupt_last_123 = 1'h0;
+    interrupt_last_124 = 1'h0;
+    interrupt_last_125 = 1'h0;
+    interrupt_last_126 = 1'h0;
+    interrupt_last_127 = 1'h0;
+    interrupt_last_128 = 1'h0;
+    interrupt_last_129 = 1'h0;
+    interrupt_last_13 = 1'h0;
+    interrupt_last_130 = 1'h0;
+    interrupt_last_131 = 1'h0;
+    interrupt_last_14 = 1'h0;
+    interrupt_last_15 = 1'h0;
+    interrupt_last_16 = 1'h0;
+    interrupt_last_17 = 1'h0;
+    interrupt_last_18 = 1'h0;
+    interrupt_last_19 = 1'h0;
+    interrupt_last_2 = 1'h0;
+    interrupt_last_20 = 1'h0;
+    interrupt_last_21 = 1'h0;
+    interrupt_last_22 = 1'h0;
+    interrupt_last_23 = 1'h0;
+    interrupt_last_24 = 1'h0;
+    interrupt_last_25 = 1'h0;
+    interrupt_last_26 = 1'h0;
+    interrupt_last_27 = 1'h0;
+    interrupt_last_28 = 1'h0;
+    interrupt_last_29 = 1'h0;
+    interrupt_last_3 = 1'h0;
+    interrupt_last_30 = 1'h0;
+    interrupt_last_31 = 1'h0;
+    interrupt_last_32 = 1'h0;
+    interrupt_last_33 = 1'h0;
+    interrupt_last_34 = 1'h0;
+    interrupt_last_35 = 1'h0;
+    interrupt_last_36 = 1'h0;
+    interrupt_last_37 = 1'h0;
+    interrupt_last_38 = 1'h0;
+    interrupt_last_39 = 1'h0;
+    interrupt_last_4 = 1'h0;
+    interrupt_last_40 = 1'h0;
+    interrupt_last_41 = 1'h0;
+    interrupt_last_42 = 1'h0;
+    interrupt_last_43 = 1'h0;
+    interrupt_last_44 = 1'h0;
+    interrupt_last_45 = 1'h0;
+    interrupt_last_46 = 1'h0;
+    interrupt_last_47 = 1'h0;
+    interrupt_last_48 = 1'h0;
+    interrupt_last_49 = 1'h0;
+    interrupt_last_5 = 1'h0;
+    interrupt_last_50 = 1'h0;
+    interrupt_last_51 = 1'h0;
+    interrupt_last_52 = 1'h0;
+    interrupt_last_53 = 1'h0;
+    interrupt_last_54 = 1'h0;
+    interrupt_last_55 = 1'h0;
+    interrupt_last_56 = 1'h0;
+    interrupt_last_57 = 1'h0;
+    interrupt_last_58 = 1'h0;
+    interrupt_last_59 = 1'h0;
+    interrupt_last_6 = 1'h0;
+    interrupt_last_60 = 1'h0;
+    interrupt_last_61 = 1'h0;
+    interrupt_last_62 = 1'h0;
+    interrupt_last_63 = 1'h0;
+    interrupt_last_64 = 1'h0;
+    interrupt_last_65 = 1'h0;
+    interrupt_last_66 = 1'h0;
+    interrupt_last_67 = 1'h0;
+    interrupt_last_68 = 1'h0;
+    interrupt_last_69 = 1'h0;
+    interrupt_last_7 = 1'h0;
+    interrupt_last_70 = 1'h0;
+    interrupt_last_71 = 1'h0;
+    interrupt_last_72 = 1'h0;
+    interrupt_last_73 = 1'h0;
+    interrupt_last_74 = 1'h0;
+    interrupt_last_75 = 1'h0;
+    interrupt_last_76 = 1'h0;
+    interrupt_last_77 = 1'h0;
+    interrupt_last_78 = 1'h0;
+    interrupt_last_79 = 1'h0;
+    interrupt_last_8 = 1'h0;
+    interrupt_last_80 = 1'h0;
+    interrupt_last_81 = 1'h0;
+    interrupt_last_82 = 1'h0;
+    interrupt_last_83 = 1'h0;
+    interrupt_last_84 = 1'h0;
+    interrupt_last_85 = 1'h0;
+    interrupt_last_86 = 1'h0;
+    interrupt_last_87 = 1'h0;
+    interrupt_last_88 = 1'h0;
+    interrupt_last_89 = 1'h0;
+    interrupt_last_9 = 1'h0;
+    interrupt_last_90 = 1'h0;
+    interrupt_last_91 = 1'h0;
+    interrupt_last_92 = 1'h0;
+    interrupt_last_93 = 1'h0;
+    interrupt_last_94 = 1'h0;
+    interrupt_last_95 = 1'h0;
+    interrupt_last_96 = 1'h0;
+    interrupt_last_97 = 1'h0;
+    interrupt_last_98 = 1'h0;
+    interrupt_last_99 = 1'h0;
+    s_config_readBusy = 1'h0;
+    s_config_writeBusy = 1'h0;
+    s_config_writeSlave_addrIn_rv = 20'hAAAAA;
+    s_config_writeSlave_dataIn_rv = 37'h0AAAAAAAAA;
+    sh_active_0 = 1'h0;
+    sh_active_1 = 1'h0;
+    sh_active_10 = 1'h0;
+    sh_active_11 = 1'h0;
+    sh_active_12 = 1'h0;
+    sh_active_13 = 1'h0;
+    sh_active_14 = 1'h0;
+    sh_active_15 = 1'h0;
+    sh_active_2 = 1'h0;
+    sh_active_3 = 1'h0;
+    sh_active_4 = 1'h0;
+    sh_active_5 = 1'h0;
+    sh_active_6 = 1'h0;
+    sh_active_7 = 1'h0;
+    sh_active_8 = 1'h0;
+    sh_active_9 = 1'h0;
+    sh_wait_ack_0 = 1'h0;
+    sh_wait_ack_1 = 1'h0;
+    sh_wait_ack_10 = 1'h0;
+    sh_wait_ack_11 = 1'h0;
+    sh_wait_ack_12 = 1'h0;
+    sh_wait_ack_13 = 1'h0;
+    sh_wait_ack_14 = 1'h0;
+    sh_wait_ack_15 = 1'h0;
+    sh_wait_ack_2 = 1'h0;
+    sh_wait_ack_3 = 1'h0;
+    sh_wait_ack_4 = 1'h0;
+    sh_wait_ack_5 = 1'h0;
+    sh_wait_ack_6 = 1'h0;
+    sh_wait_ack_7 = 1'h0;
+    sh_wait_ack_8 = 1'h0;
+    sh_wait_ack_9 = 1'h0;
+  end
+  `endif // BSV_NO_INITIAL_BLOCKS
+  // synopsys translate_on
+
+  // handling of system tasks
+
+  // synopsys translate_off
+  always@(negedge S_AXI_ACLK)
+  begin
+    #0;
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_dropInvalidACK)
+	$display("Invalid interrupt %d ACKed", ackFIFO$D_OUT);
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_doAck)
+	$display("Interrupt acked for %d", $signed(32'd0));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_0$FULL_N && !interrupt_last_0 &&
+	  interrupt_pcie[0])
+	$display("New pcie interrupt %d", $signed(32'd0));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_doAck_1)
+	$display("Interrupt acked for %d", $signed(32'd1));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_1$FULL_N && !interrupt_last_1 &&
+	  interrupt_pcie[1])
+	$display("New pcie interrupt %d", $signed(32'd1));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_doAck_2)
+	$display("Interrupt acked for %d", $signed(32'd2));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_2$FULL_N && !interrupt_last_2 &&
+	  interrupt_pcie[2])
+	$display("New pcie interrupt %d", $signed(32'd2));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_doAck_3)
+	$display("Interrupt acked for %d", $signed(32'd3));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_3$FULL_N && !interrupt_last_3 &&
+	  interrupt_pcie[3])
+	$display("New pcie interrupt %d", $signed(32'd3));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_4$FULL_N && sync_4$dPulse)
+	$display("New design interrupt %d", $signed(32'd0));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_5$FULL_N && sync_5$dPulse)
+	$display("New design interrupt %d", $signed(32'd1));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_6$FULL_N && sync_6$dPulse)
+	$display("New design interrupt %d", $signed(32'd2));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_7$FULL_N && sync_7$dPulse)
+	$display("New design interrupt %d", $signed(32'd3));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_8$FULL_N && sync_8$dPulse)
+	$display("New design interrupt %d", $signed(32'd4));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_9$FULL_N && sync_9$dPulse)
+	$display("New design interrupt %d", $signed(32'd5));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_10$FULL_N && sync_10$dPulse)
+	$display("New design interrupt %d", $signed(32'd6));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_11$FULL_N && sync_11$dPulse)
+	$display("New design interrupt %d", $signed(32'd7));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_12$FULL_N && sync_12$dPulse)
+	$display("New design interrupt %d", $signed(32'd8));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_13$FULL_N && sync_13$dPulse)
+	$display("New design interrupt %d", $signed(32'd9));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_14$FULL_N && sync_14$dPulse)
+	$display("New design interrupt %d", $signed(32'd10));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_15$FULL_N && sync_15$dPulse)
+	$display("New design interrupt %d", $signed(32'd11));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_16$FULL_N && sync_16$dPulse)
+	$display("New design interrupt %d", $signed(32'd12));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_17$FULL_N && sync_17$dPulse)
+	$display("New design interrupt %d", $signed(32'd13));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_18$FULL_N && sync_18$dPulse)
+	$display("New design interrupt %d", $signed(32'd14));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_19$FULL_N && sync_19$dPulse)
+	$display("New design interrupt %d", $signed(32'd15));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_20$FULL_N && sync_20$dPulse)
+	$display("New design interrupt %d", $signed(32'd16));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_21$FULL_N && sync_21$dPulse)
+	$display("New design interrupt %d", $signed(32'd17));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_22$FULL_N && sync_22$dPulse)
+	$display("New design interrupt %d", $signed(32'd18));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_23$FULL_N && sync_23$dPulse)
+	$display("New design interrupt %d", $signed(32'd19));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_24$FULL_N && sync_24$dPulse)
+	$display("New design interrupt %d", $signed(32'd20));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_25$FULL_N && sync_25$dPulse)
+	$display("New design interrupt %d", $signed(32'd21));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_26$FULL_N && sync_26$dPulse)
+	$display("New design interrupt %d", $signed(32'd22));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_27$FULL_N && sync_27$dPulse)
+	$display("New design interrupt %d", $signed(32'd23));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_28$FULL_N && sync_28$dPulse)
+	$display("New design interrupt %d", $signed(32'd24));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_29$FULL_N && sync_29$dPulse)
+	$display("New design interrupt %d", $signed(32'd25));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_30$FULL_N && sync_30$dPulse)
+	$display("New design interrupt %d", $signed(32'd26));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_31$FULL_N && sync_31$dPulse)
+	$display("New design interrupt %d", $signed(32'd27));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_32$FULL_N && sync_32$dPulse)
+	$display("New design interrupt %d", $signed(32'd28));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_33$FULL_N && sync_33$dPulse)
+	$display("New design interrupt %d", $signed(32'd29));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_34$FULL_N && sync_34$dPulse)
+	$display("New design interrupt %d", $signed(32'd30));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_35$FULL_N && sync_35$dPulse)
+	$display("New design interrupt %d", $signed(32'd31));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_36$FULL_N && sync_36$dPulse)
+	$display("New design interrupt %d", $signed(32'd32));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_37$FULL_N && sync_37$dPulse)
+	$display("New design interrupt %d", $signed(32'd33));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_38$FULL_N && sync_38$dPulse)
+	$display("New design interrupt %d", $signed(32'd34));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_39$FULL_N && sync_39$dPulse)
+	$display("New design interrupt %d", $signed(32'd35));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_40$FULL_N && sync_40$dPulse)
+	$display("New design interrupt %d", $signed(32'd36));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_41$FULL_N && sync_41$dPulse)
+	$display("New design interrupt %d", $signed(32'd37));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_42$FULL_N && sync_42$dPulse)
+	$display("New design interrupt %d", $signed(32'd38));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_43$FULL_N && sync_43$dPulse)
+	$display("New design interrupt %d", $signed(32'd39));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_44$FULL_N && sync_44$dPulse)
+	$display("New design interrupt %d", $signed(32'd40));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_45$FULL_N && sync_45$dPulse)
+	$display("New design interrupt %d", $signed(32'd41));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_46$FULL_N && sync_46$dPulse)
+	$display("New design interrupt %d", $signed(32'd42));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_47$FULL_N && sync_47$dPulse)
+	$display("New design interrupt %d", $signed(32'd43));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_48$FULL_N && sync_48$dPulse)
+	$display("New design interrupt %d", $signed(32'd44));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_49$FULL_N && sync_49$dPulse)
+	$display("New design interrupt %d", $signed(32'd45));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_50$FULL_N && sync_50$dPulse)
+	$display("New design interrupt %d", $signed(32'd46));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_51$FULL_N && sync_51$dPulse)
+	$display("New design interrupt %d", $signed(32'd47));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_52$FULL_N && sync_52$dPulse)
+	$display("New design interrupt %d", $signed(32'd48));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_53$FULL_N && sync_53$dPulse)
+	$display("New design interrupt %d", $signed(32'd49));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_54$FULL_N && sync_54$dPulse)
+	$display("New design interrupt %d", $signed(32'd50));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_55$FULL_N && sync_55$dPulse)
+	$display("New design interrupt %d", $signed(32'd51));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_56$FULL_N && sync_56$dPulse)
+	$display("New design interrupt %d", $signed(32'd52));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_57$FULL_N && sync_57$dPulse)
+	$display("New design interrupt %d", $signed(32'd53));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_58$FULL_N && sync_58$dPulse)
+	$display("New design interrupt %d", $signed(32'd54));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_59$FULL_N && sync_59$dPulse)
+	$display("New design interrupt %d", $signed(32'd55));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_60$FULL_N && sync_60$dPulse)
+	$display("New design interrupt %d", $signed(32'd56));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_61$FULL_N && sync_61$dPulse)
+	$display("New design interrupt %d", $signed(32'd57));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_62$FULL_N && sync_62$dPulse)
+	$display("New design interrupt %d", $signed(32'd58));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_63$FULL_N && sync_63$dPulse)
+	$display("New design interrupt %d", $signed(32'd59));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_64$FULL_N && sync_64$dPulse)
+	$display("New design interrupt %d", $signed(32'd60));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_65$FULL_N && sync_65$dPulse)
+	$display("New design interrupt %d", $signed(32'd61));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_66$FULL_N && sync_66$dPulse)
+	$display("New design interrupt %d", $signed(32'd62));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_67$FULL_N && sync_67$dPulse)
+	$display("New design interrupt %d", $signed(32'd63));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_68$FULL_N && sync_68$dPulse)
+	$display("New design interrupt %d", $signed(32'd64));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_69$FULL_N && sync_69$dPulse)
+	$display("New design interrupt %d", $signed(32'd65));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_70$FULL_N && sync_70$dPulse)
+	$display("New design interrupt %d", $signed(32'd66));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_71$FULL_N && sync_71$dPulse)
+	$display("New design interrupt %d", $signed(32'd67));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_72$FULL_N && sync_72$dPulse)
+	$display("New design interrupt %d", $signed(32'd68));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_73$FULL_N && sync_73$dPulse)
+	$display("New design interrupt %d", $signed(32'd69));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_74$FULL_N && sync_74$dPulse)
+	$display("New design interrupt %d", $signed(32'd70));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_75$FULL_N && sync_75$dPulse)
+	$display("New design interrupt %d", $signed(32'd71));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_76$FULL_N && sync_76$dPulse)
+	$display("New design interrupt %d", $signed(32'd72));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_77$FULL_N && sync_77$dPulse)
+	$display("New design interrupt %d", $signed(32'd73));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_78$FULL_N && sync_78$dPulse)
+	$display("New design interrupt %d", $signed(32'd74));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_79$FULL_N && sync_79$dPulse)
+	$display("New design interrupt %d", $signed(32'd75));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_80$FULL_N && sync_80$dPulse)
+	$display("New design interrupt %d", $signed(32'd76));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_81$FULL_N && sync_81$dPulse)
+	$display("New design interrupt %d", $signed(32'd77));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_82$FULL_N && sync_82$dPulse)
+	$display("New design interrupt %d", $signed(32'd78));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_83$FULL_N && sync_83$dPulse)
+	$display("New design interrupt %d", $signed(32'd79));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_84$FULL_N && sync_84$dPulse)
+	$display("New design interrupt %d", $signed(32'd80));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_85$FULL_N && sync_85$dPulse)
+	$display("New design interrupt %d", $signed(32'd81));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_86$FULL_N && sync_86$dPulse)
+	$display("New design interrupt %d", $signed(32'd82));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_87$FULL_N && sync_87$dPulse)
+	$display("New design interrupt %d", $signed(32'd83));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_88$FULL_N && sync_88$dPulse)
+	$display("New design interrupt %d", $signed(32'd84));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_89$FULL_N && sync_89$dPulse)
+	$display("New design interrupt %d", $signed(32'd85));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_90$FULL_N && sync_90$dPulse)
+	$display("New design interrupt %d", $signed(32'd86));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_91$FULL_N && sync_91$dPulse)
+	$display("New design interrupt %d", $signed(32'd87));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_92$FULL_N && sync_92$dPulse)
+	$display("New design interrupt %d", $signed(32'd88));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_93$FULL_N && sync_93$dPulse)
+	$display("New design interrupt %d", $signed(32'd89));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_94$FULL_N && sync_94$dPulse)
+	$display("New design interrupt %d", $signed(32'd90));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_95$FULL_N && sync_95$dPulse)
+	$display("New design interrupt %d", $signed(32'd91));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_96$FULL_N && sync_96$dPulse)
+	$display("New design interrupt %d", $signed(32'd92));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_97$FULL_N && sync_97$dPulse)
+	$display("New design interrupt %d", $signed(32'd93));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_98$FULL_N && sync_98$dPulse)
+	$display("New design interrupt %d", $signed(32'd94));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_99$FULL_N && sync_99$dPulse)
+	$display("New design interrupt %d", $signed(32'd95));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_100$FULL_N && sync_100$dPulse)
+	$display("New design interrupt %d", $signed(32'd96));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_101$FULL_N && sync_101$dPulse)
+	$display("New design interrupt %d", $signed(32'd97));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_102$FULL_N && sync_102$dPulse)
+	$display("New design interrupt %d", $signed(32'd98));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_103$FULL_N && sync_103$dPulse)
+	$display("New design interrupt %d", $signed(32'd99));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_104$FULL_N && sync_104$dPulse)
+	$display("New design interrupt %d", $signed(32'd100));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_105$FULL_N && sync_105$dPulse)
+	$display("New design interrupt %d", $signed(32'd101));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_106$FULL_N && sync_106$dPulse)
+	$display("New design interrupt %d", $signed(32'd102));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_107$FULL_N && sync_107$dPulse)
+	$display("New design interrupt %d", $signed(32'd103));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_108$FULL_N && sync_108$dPulse)
+	$display("New design interrupt %d", $signed(32'd104));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_109$FULL_N && sync_109$dPulse)
+	$display("New design interrupt %d", $signed(32'd105));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_110$FULL_N && sync_110$dPulse)
+	$display("New design interrupt %d", $signed(32'd106));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_111$FULL_N && sync_111$dPulse)
+	$display("New design interrupt %d", $signed(32'd107));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_112$FULL_N && sync_112$dPulse)
+	$display("New design interrupt %d", $signed(32'd108));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_113$FULL_N && sync_113$dPulse)
+	$display("New design interrupt %d", $signed(32'd109));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_114$FULL_N && sync_114$dPulse)
+	$display("New design interrupt %d", $signed(32'd110));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_115$FULL_N && sync_115$dPulse)
+	$display("New design interrupt %d", $signed(32'd111));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_116$FULL_N && sync_116$dPulse)
+	$display("New design interrupt %d", $signed(32'd112));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_117$FULL_N && sync_117$dPulse)
+	$display("New design interrupt %d", $signed(32'd113));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_118$FULL_N && sync_118$dPulse)
+	$display("New design interrupt %d", $signed(32'd114));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_119$FULL_N && sync_119$dPulse)
+	$display("New design interrupt %d", $signed(32'd115));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_120$FULL_N && sync_120$dPulse)
+	$display("New design interrupt %d", $signed(32'd116));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_121$FULL_N && sync_121$dPulse)
+	$display("New design interrupt %d", $signed(32'd117));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_122$FULL_N && sync_122$dPulse)
+	$display("New design interrupt %d", $signed(32'd118));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_123$FULL_N && sync_123$dPulse)
+	$display("New design interrupt %d", $signed(32'd119));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_124$FULL_N && sync_124$dPulse)
+	$display("New design interrupt %d", $signed(32'd120));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_125$FULL_N && sync_125$dPulse)
+	$display("New design interrupt %d", $signed(32'd121));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_126$FULL_N && sync_126$dPulse)
+	$display("New design interrupt %d", $signed(32'd122));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_127$FULL_N && sync_127$dPulse)
+	$display("New design interrupt %d", $signed(32'd123));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_128$FULL_N && sync_128$dPulse)
+	$display("New design interrupt %d", $signed(32'd124));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_129$FULL_N && sync_129$dPulse)
+	$display("New design interrupt %d", $signed(32'd125));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_130$FULL_N && sync_130$dPulse)
+	$display("New design interrupt %d", $signed(32'd126));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (pending_interrupts_131$FULL_N && sync_131$dPulse)
+	$display("New design interrupt %d", $signed(32'd127));
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if ((WILL_FIRE_RL_s_config_axiReadSpecial_1 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_1) &&
+	  (WILL_FIRE_RL_s_config_axiReadSpecial_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5))
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets [RL_s_config_axiReadSpecial_1,\n  RL_s_config_axiReadSpecialIsHandled_1] and [RL_s_config_axiReadSpecial_2,\n  RL_s_config_axiReadSpecialIsHandled_2, RL_s_config_axiReadSpecial_3,\n  RL_s_config_axiReadSpecialIsHandled_3, RL_s_config_axiReadSpecial_4,\n  RL_s_config_axiReadSpecialIsHandled_4, RL_s_config_axiReadSpecial_5,\n  RL_s_config_axiReadSpecialIsHandled_5] ) fired in the same clock cycle.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if ((WILL_FIRE_RL_s_config_axiReadSpecial_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2) &&
+	  (WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5))
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets [RL_s_config_axiReadSpecial_2,\n  RL_s_config_axiReadSpecialIsHandled_2] and [RL_s_config_axiReadSpecial_3,\n  RL_s_config_axiReadSpecialIsHandled_3, RL_s_config_axiReadSpecial_4,\n  RL_s_config_axiReadSpecialIsHandled_4, RL_s_config_axiReadSpecial_5,\n  RL_s_config_axiReadSpecialIsHandled_5] ) fired in the same clock cycle.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if ((WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3) &&
+	  (WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5))
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets [RL_s_config_axiReadSpecial_3,\n  RL_s_config_axiReadSpecialIsHandled_3] and [RL_s_config_axiReadSpecial_4,\n  RL_s_config_axiReadSpecialIsHandled_4, RL_s_config_axiReadSpecial_5,\n  RL_s_config_axiReadSpecialIsHandled_5] ) fired in the same clock cycle.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if ((WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4) &&
+	  (WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5))
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets [RL_s_config_axiReadSpecial_4,\n  RL_s_config_axiReadSpecialIsHandled_4] and [RL_s_config_axiReadSpecial_5,\n  RL_s_config_axiReadSpecialIsHandled_5] ) fired in the same clock cycle.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if ((WILL_FIRE_RL_s_config_axiReadSpecial ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled) &&
+	  (WILL_FIRE_RL_s_config_axiReadSpecial_1 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_1 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5))
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets [RL_s_config_axiReadSpecial,\n  RL_s_config_axiReadSpecialIsHandled] and [RL_s_config_axiReadSpecial_1,\n  RL_s_config_axiReadSpecialIsHandled_1, RL_s_config_axiReadSpecial_2,\n  RL_s_config_axiReadSpecialIsHandled_2, RL_s_config_axiReadSpecial_3,\n  RL_s_config_axiReadSpecialIsHandled_3, RL_s_config_axiReadSpecial_4,\n  RL_s_config_axiReadSpecialIsHandled_4, RL_s_config_axiReadSpecial_5,\n  RL_s_config_axiReadSpecialIsHandled_5] ) fired in the same clock cycle.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if ((WILL_FIRE_RL_s_config_axiReadSpecial ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_1 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_1 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_2 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_3 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_4 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecial_5 ||
+	   WILL_FIRE_RL_s_config_axiReadSpecialIsHandled_5) &&
+	  WILL_FIRE_RL_s_config_axiReadFallback)
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets [RL_s_config_axiReadSpecial,\n  RL_s_config_axiReadSpecialIsHandled, RL_s_config_axiReadSpecial_1,\n  RL_s_config_axiReadSpecialIsHandled_1, RL_s_config_axiReadSpecial_2,\n  RL_s_config_axiReadSpecialIsHandled_2, RL_s_config_axiReadSpecial_3,\n  RL_s_config_axiReadSpecialIsHandled_3, RL_s_config_axiReadSpecial_4,\n  RL_s_config_axiReadSpecialIsHandled_4, RL_s_config_axiReadSpecial_5,\n  RL_s_config_axiReadSpecialIsHandled_5] and [RL_s_config_axiReadFallback] )\n  fired in the same clock cycle.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled_1 &&
+	  WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled)
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_s_config_1_axiWriteSpecialIsHandled called conflicting methods wset and\n  wset of module instance s_config_writeIsHandled.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_s_config_1_axiWriteSpecialIsHandled_1 &&
+	  WILL_FIRE_RL_s_config_1_axiWriteSpecial &&
+	  s_config_writeSlave_in$EMPTY_N)
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_s_config_1_axiWriteSpecial called conflicting methods first and deq of\n  module instance s_config_writeSlave_in.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 &&
+	  WILL_FIRE_RL_s_config_1_axiWriteSpecial)
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_s_config_1_axiWriteSpecial_1 and\n  RL_s_config_1_axiWriteSpecial called conflicting methods first and deq of\n  module instance s_config_writeSlave_in.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 &&
+	  WILL_FIRE_RL_s_config_1_axiWriteSpecial)
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_s_config_1_axiWriteSpecial_1 and\n  RL_s_config_1_axiWriteSpecial called conflicting methods deq and deq of\n  module instance s_config_writeSlave_in.\n");
+    if (S_AXI_ARESETN != `BSV_RESET_VALUE)
+      if (WILL_FIRE_RL_s_config_1_axiWriteSpecial_1 &&
+	  WILL_FIRE_RL_s_config_1_axiWriteSpecial)
+	$display("Error: \"/home/mober/projects/bluespec/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_s_config_1_axiWriteSpecial_1 and\n  RL_s_config_1_axiWriteSpecial called conflicting methods enq and enq of\n  module instance s_config_writeSlave_out.\n");
+  end
+  // synopsys translate_on
+endmodule  // mkAWSIntrCtrl
+
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/xgui/AWSIntrCtrl_v1_0.tcl b/toolflow/vivado/common/ip/AWSIntrCtrl/xgui/AWSIntrCtrl_v1_0.tcl
new file mode 100644
index 00000000..0db18e9a
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/xgui/AWSIntrCtrl_v1_0.tcl
@@ -0,0 +1,10 @@
+# Definitional proc to organize widgets for parameters.
+proc init_gui { IPINST } {
+  ipgui::add_param $IPINST -name "Component_Name"
+  #Adding Page
+  ipgui::add_page $IPINST -name "Page 0"
+
+
+}
+
+
diff --git a/toolflow/vivado/common/ip/AWSIntrCtrl/xgui/mkAWSIntrCtrl_v1_0.tcl b/toolflow/vivado/common/ip/AWSIntrCtrl/xgui/mkAWSIntrCtrl_v1_0.tcl
new file mode 100644
index 00000000..0db18e9a
--- /dev/null
+++ b/toolflow/vivado/common/ip/AWSIntrCtrl/xgui/mkAWSIntrCtrl_v1_0.tcl
@@ -0,0 +1,10 @@
+# Definitional proc to organize widgets for parameters.
+proc init_gui { IPINST } {
+  ipgui::add_param $IPINST -name "Component_Name"
+  #Adding Page
+  ipgui::add_page $IPINST -name "Page 0"
+
+
+}
+
+
diff --git a/toolflow/vivado/common/ip/AXIOffsetHBM/component.xml b/toolflow/vivado/common/ip/AXIOffsetHBM/component.xml
new file mode 100644
index 00000000..83d5fc75
--- /dev/null
+++ b/toolflow/vivado/common/ip/AXIOffsetHBM/component.xml
@@ -0,0 +1,2279 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<spirit:component xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+  <spirit:vendor>esa.informatik.tu-darmstadt.de</spirit:vendor>
+  <spirit:library>user</spirit:library>
+  <spirit:name>AXIOffsetHBM</spirit:name>
+  <spirit:version>1.0</spirit:version>
+  <spirit:busInterfaces>
+    <spirit:busInterface>
+      <spirit:name>M_AXI</spirit:name>
+      <spirit:busType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm" spirit:version="1.0"/>
+      <spirit:abstractionType spirit:vendor="xilinx.com" spirit:library="interface" spirit:name="aximm_rtl" spirit:version="1.0"/>
+      <spirit:master>
+        <spirit:addressSpaceRef spirit:addressSpaceRef="M_AXI"/>
+      </spirit:master>
+      <spirit:portMaps>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWADDR</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awaddr</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWLEN</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awlen</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWSIZE</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awsize</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWBURST</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awburst</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWLOCK</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awlock</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWCACHE</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awcache</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWPROT</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awprot</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWREGION</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awregion</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWQOS</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awqos</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awvalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>AWREADY</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_awready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WDATA</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_wdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WSTRB</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_wstrb</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WLAST</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_wlast</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_wvalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>WREADY</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_wready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>BID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_bid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>BRESP</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_bresp</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>BVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_bvalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>BREADY</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_bready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARADDR</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_araddr</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARLEN</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arlen</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARSIZE</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arsize</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARBURST</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arburst</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARLOCK</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arlock</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARCACHE</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arcache</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARPROT</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arprot</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARREGION</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arregion</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARQOS</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arqos</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arvalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>ARREADY</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_arready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_rid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RDATA</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_rdata</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RRESP</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_rresp</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RLAST</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_rlast</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RVALID</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_rvalid</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+        <spirit:portMap>
+          <spirit:logicalPort>
+            <spirit:name>RREADY</spirit:name>
+          </spirit:logicalPort>
+          <spirit:physicalPort>
+            <spirit:name>M_AXI_rready</spirit:name>
+          </spirit:physicalPort>
+        </spirit:portMap>
+      </spirit:portMaps>
+      <spirit:parameters>
+        <spirit:parameter>
+          <spirit:name>SUPPORTS_NARROW_BURST</spirit:name>
+          <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI.SUPPORTS_NARROW_BURST">0</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>MAX_BURST_LENGTH</spirit:name>
+          <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI.MAX_BURST_LENGTH">8</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>NUM_READ_OUTSTANDING</spirit:name>
+          <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI.NUM_READ_OUTSTANDING">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>NUM_WRITE_OUTSTANDING</spirit:name>
+          <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI.NUM_WRITE_OUTSTANDING">32</spirit:value>
+        </spirit:parameter>
+        <spirit:parameter>
+          <spirit:name>PROTOCOL</spirit:name>
+          <spirit:value spirit:id="BUSIFPARAM_VALUE.M_AXI.PROTOCOL">AXI3</spirit:value>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awid</spirit:name>
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+          <spirit:logicalPort>
+            <spirit:name>AWADDR</spirit:name>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awaddr</spirit:name>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awlen</spirit:name>
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+          <spirit:logicalPort>
+            <spirit:name>AWSIZE</spirit:name>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awsize</spirit:name>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awburst</spirit:name>
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+            <spirit:name>S_AXI_awlock</spirit:name>
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+            <spirit:name>S_AXI_awcache</spirit:name>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_awregion</spirit:name>
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+            <spirit:name>S_AXI_awqos</spirit:name>
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+            <spirit:name>AWVALID</spirit:name>
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+            <spirit:name>S_AXI_awvalid</spirit:name>
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+          <spirit:logicalPort>
+            <spirit:name>WREADY</spirit:name>
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+          <spirit:physicalPort>
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+          <spirit:physicalPort>
+            <spirit:name>S_AXI_arsize</spirit:name>
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+            <spirit:name>S_AXI_arregion</spirit:name>
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+            <spirit:name>S_AXI_arready</spirit:name>
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+          <spirit:physicalPort>
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+          <spirit:physicalPort>
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+            <spirit:name>S_AXI_rvalid</spirit:name>
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+            <spirit:name>RREADY</spirit:name>
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+          <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING">32</spirit:value>
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+          <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING">32</spirit:value>
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+          <spirit:name>PROTOCOL</spirit:name>
+          <spirit:value spirit:id="BUSIFPARAM_VALUE.S_AXI.PROTOCOL">AXI3</spirit:value>
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+            <spirit:name>CLK</spirit:name>
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+          <spirit:value spirit:id="BUSIFPARAM_VALUE.CLK.ASSOCIATED_BUSIF">M_AXI:S_AXI</spirit:value>
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+            <spirit:value>8cbcdd77</spirit:value>
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+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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+        <spirit:name>RST_N</spirit:name>
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+              <spirit:typeName>std_logic</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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+              <spirit:typeName>std_logic</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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+        <spirit:name>S_AXI_arready</spirit:name>
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+          <spirit:direction>out</spirit:direction>
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+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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+        <spirit:name>S_AXI_arid</spirit:name>
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+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
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+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
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+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>M_AXI_wlast</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>M_AXI_bvalid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>M_AXI_bready</spirit:name>
+        <spirit:wire>
+          <spirit:direction>out</spirit:direction>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>wire</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>M_AXI_bresp</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">1</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+      <spirit:port>
+        <spirit:name>M_AXI_bid</spirit:name>
+        <spirit:wire>
+          <spirit:direction>in</spirit:direction>
+          <spirit:vector>
+            <spirit:left spirit:format="long">5</spirit:left>
+            <spirit:right spirit:format="long">0</spirit:right>
+          </spirit:vector>
+          <spirit:wireTypeDefs>
+            <spirit:wireTypeDef>
+              <spirit:typeName>std_logic_vector</spirit:typeName>
+              <spirit:viewNameRef>xilinx_anylanguagesynthesis</spirit:viewNameRef>
+              <spirit:viewNameRef>xilinx_anylanguagebehavioralsimulation</spirit:viewNameRef>
+            </spirit:wireTypeDef>
+          </spirit:wireTypeDefs>
+          <spirit:driver>
+            <spirit:defaultValue spirit:format="long">0</spirit:defaultValue>
+          </spirit:driver>
+        </spirit:wire>
+      </spirit:port>
+    </spirit:ports>
+    <spirit:modelParameters>
+      <spirit:modelParameter xsi:type="spirit:nameValueTypeType" spirit:dataType="std_logic_vector">
+        <spirit:name>offset</spirit:name>
+        <spirit:displayName>Offset</spirit:displayName>
+        <spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.offset" spirit:bitStringLength="33">&quot;000000000000000000000000000000000&quot;</spirit:value>
+      </spirit:modelParameter>
+      <spirit:modelParameter spirit:dataType="std_logic_vector">
+        <spirit:name>offset_bits</spirit:name>
+        <spirit:displayName>Offset Bits</spirit:displayName>
+        <spirit:value spirit:format="bitString" spirit:resolve="generated" spirit:id="MODELPARAM_VALUE.offset_bits" spirit:bitStringLength="33">&quot;000000000000000000000000000000000&quot;</spirit:value>
+      </spirit:modelParameter>
+    </spirit:modelParameters>
+  </spirit:model>
+  <spirit:choices>
+    <spirit:choice>
+      <spirit:name>choice_list_9d8b0d81</spirit:name>
+      <spirit:enumeration>ACTIVE_HIGH</spirit:enumeration>
+      <spirit:enumeration>ACTIVE_LOW</spirit:enumeration>
+    </spirit:choice>
+  </spirit:choices>
+  <spirit:fileSets>
+    <spirit:fileSet>
+      <spirit:name>xilinx_anylanguagesynthesis_view_fileset</spirit:name>
+      <spirit:file>
+        <spirit:name>src/FIFO2.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/mkAXIOffset.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+        <spirit:userFileType>CHECKSUM_a486e3b2</spirit:userFileType>
+      </spirit:file>
+    </spirit:fileSet>
+    <spirit:fileSet>
+      <spirit:name>xilinx_anylanguagebehavioralsimulation_view_fileset</spirit:name>
+      <spirit:file>
+        <spirit:name>src/FIFO2.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+      <spirit:file>
+        <spirit:name>src/mkAXIOffset.v</spirit:name>
+        <spirit:fileType>verilogSource</spirit:fileType>
+      </spirit:file>
+    </spirit:fileSet>
+    <spirit:fileSet>
+      <spirit:name>xilinx_xpgui_view_fileset</spirit:name>
+      <spirit:file>
+        <spirit:name>xgui/AXIOffsetHBM_v1_0.tcl</spirit:name>
+        <spirit:fileType>tclSource</spirit:fileType>
+        <spirit:userFileType>CHECKSUM_8cbcdd77</spirit:userFileType>
+        <spirit:userFileType>XGUI_VERSION_2</spirit:userFileType>
+      </spirit:file>
+    </spirit:fileSet>
+  </spirit:fileSets>
+  <spirit:description>AXIOffsetHBM</spirit:description>
+  <spirit:parameters>
+    <spirit:parameter>
+      <spirit:name>offset</spirit:name>
+      <spirit:displayName>Offset</spirit:displayName>
+      <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.offset" spirit:bitStringLength="33">&quot;000000000000000000000000000000000&quot;</spirit:value>
+    </spirit:parameter>
+    <spirit:parameter>
+      <spirit:name>offset_bits</spirit:name>
+      <spirit:displayName>Offset Bits</spirit:displayName>
+      <spirit:value spirit:format="bitString" spirit:resolve="user" spirit:id="PARAM_VALUE.offset_bits" spirit:bitStringLength="33">&quot;000000000000000000000000000000000&quot;</spirit:value>
+    </spirit:parameter>
+    <spirit:parameter>
+      <spirit:name>Component_Name</spirit:name>
+      <spirit:value spirit:resolve="user" spirit:id="PARAM_VALUE.Component_Name" spirit:order="1">mkAXIOffset_v1_0</spirit:value>
+    </spirit:parameter>
+  </spirit:parameters>
+  <spirit:vendorExtensions>
+    <xilinx:coreExtensions>
+      <xilinx:supportedFamilies>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">zynq</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">artix7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">zynquplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qvirtex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintex7l</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qkintex7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qkintex7l</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">artix7l</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">aartix7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qartix7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">qzynq</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">azynq</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">spartan7</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexu</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplusHBM</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">kintexu</xilinx:family>
+      </xilinx:supportedFamilies>
+      <xilinx:taxonomies>
+        <xilinx:taxonomy>/UserIP</xilinx:taxonomy>
+      </xilinx:taxonomies>
+      <xilinx:displayName>AXIOffsetHBM</xilinx:displayName>
+      <xilinx:definitionSource>package_project</xilinx:definitionSource>
+      <xilinx:coreRevision>1</xilinx:coreRevision>
+      <xilinx:coreCreationDateTime>2020-04-29T09:16:20Z</xilinx:coreCreationDateTime>
+      <xilinx:tags>
+        <xilinx:tag xilinx:name="nopcore"/>
+      </xilinx:tags>
+    </xilinx:coreExtensions>
+    <xilinx:packagingInfo>
+      <xilinx:xilinxVersion>2019.2_AR73068</xilinx:xilinxVersion>
+      <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="5b1cfa00"/>
+      <xilinx:checksum xilinx:scope="addressSpaces" xilinx:value="033b10e1"/>
+      <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="5c45a74e"/>
+      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="847441b2"/>
+      <xilinx:checksum xilinx:scope="ports" xilinx:value="21f8c9ed"/>
+      <xilinx:checksum xilinx:scope="hdlParameters" xilinx:value="34999902"/>
+      <xilinx:checksum xilinx:scope="parameters" xilinx:value="2d0e05fc"/>
+    </xilinx:packagingInfo>
+  </spirit:vendorExtensions>
+</spirit:component>
diff --git a/toolflow/vivado/common/ip/AXIOffsetHBM/src/FIFO2.v b/toolflow/vivado/common/ip/AXIOffsetHBM/src/FIFO2.v
new file mode 100644
index 00000000..adacec5a
--- /dev/null
+++ b/toolflow/vivado/common/ip/AXIOffsetHBM/src/FIFO2.v
@@ -0,0 +1,153 @@
+
+`ifdef BSV_ASSIGNMENT_DELAY
+`else
+  `define BSV_ASSIGNMENT_DELAY
+`endif
+
+`ifdef BSV_POSITIVE_RESET
+  `define BSV_RESET_VALUE 1'b1
+  `define BSV_RESET_EDGE posedge
+`else
+  `define BSV_RESET_VALUE 1'b0
+  `define BSV_RESET_EDGE negedge
+`endif
+
+`ifdef BSV_ASYNC_RESET
+ `define BSV_ARESET_EDGE_META or `BSV_RESET_EDGE RST
+`else
+ `define BSV_ARESET_EDGE_META
+`endif
+
+`ifdef BSV_RESET_FIFO_HEAD
+ `define BSV_ARESET_EDGE_HEAD `BSV_ARESET_EDGE_META
+`else
+ `define BSV_ARESET_EDGE_HEAD
+`endif
+
+// Depth 2 FIFO
+module FIFO2(CLK,
+             RST,
+             D_IN,
+             ENQ,
+             FULL_N,
+             D_OUT,
+             DEQ,
+             EMPTY_N,
+             CLR);
+
+   parameter width = 1;
+   parameter guarded = 1;
+
+   input     CLK ;
+   input     RST ;
+   input [width - 1 : 0] D_IN;
+   input                 ENQ;
+   input                 DEQ;
+   input                 CLR ;
+
+   output                FULL_N;
+   output                EMPTY_N;
+   output [width - 1 : 0] D_OUT;
+
+   reg                    full_reg;
+   reg                    empty_reg;
+   reg [width - 1 : 0]    data0_reg;
+   reg [width - 1 : 0]    data1_reg;
+
+   assign                 FULL_N = full_reg ;
+   assign                 EMPTY_N = empty_reg ;
+   assign                 D_OUT = data0_reg ;
+
+
+   // Optimize the loading logic since state encoding is not power of 2!
+   wire                   d0di = (ENQ && ! empty_reg ) || ( ENQ && DEQ && full_reg ) ;
+   wire                   d0d1 = DEQ && ! full_reg ;
+   wire                   d0h = ((! DEQ) && (! ENQ )) || (!DEQ && empty_reg ) || ( ! ENQ &&full_reg) ;
+   wire                   d1di = ENQ & empty_reg ;
+
+`ifdef BSV_NO_INITIAL_BLOCKS
+`else // not BSV_NO_INITIAL_BLOCKS
+   // synopsys translate_off
+   initial
+     begin
+        data0_reg   = {((width + 1)/2) {2'b10}} ;
+        data1_reg  = {((width + 1)/2) {2'b10}} ;
+        empty_reg = 1'b0;
+        full_reg  = 1'b1;
+     end // initial begin
+   // synopsys translate_on
+`endif // BSV_NO_INITIAL_BLOCKS
+
+   always@(posedge CLK `BSV_ARESET_EDGE_META)
+     begin
+        if (RST == `BSV_RESET_VALUE)
+          begin
+             empty_reg <= `BSV_ASSIGNMENT_DELAY 1'b0;
+             full_reg  <= `BSV_ASSIGNMENT_DELAY 1'b1;
+          end // if (RST == `BSV_RESET_VALUE)
+        else
+          begin
+             if (CLR)
+               begin
+                  empty_reg <= `BSV_ASSIGNMENT_DELAY 1'b0;
+                  full_reg  <= `BSV_ASSIGNMENT_DELAY 1'b1;
+               end // if (CLR)
+             else if ( ENQ && ! DEQ ) // just enq
+               begin
+                  empty_reg <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  full_reg <= `BSV_ASSIGNMENT_DELAY ! empty_reg ;
+               end
+             else if ( DEQ && ! ENQ )
+               begin
+                  full_reg  <= `BSV_ASSIGNMENT_DELAY 1'b1;
+                  empty_reg <= `BSV_ASSIGNMENT_DELAY ! full_reg;
+               end // if ( DEQ && ! ENQ )
+          end // else: !if(RST == `BSV_RESET_VALUE)
+
+     end // always@ (posedge CLK or `BSV_RESET_EDGE RST)
+
+
+   always@(posedge CLK `BSV_ARESET_EDGE_HEAD)
+     begin
+`ifdef BSV_RESET_FIFO_HEAD
+        if (RST == `BSV_RESET_VALUE)
+          begin
+             data0_reg <= `BSV_ASSIGNMENT_DELAY {width {1'b0}} ;
+             data1_reg <= `BSV_ASSIGNMENT_DELAY {width {1'b0}} ;
+          end
+        else
+`endif
+          begin
+             data0_reg  <= `BSV_ASSIGNMENT_DELAY
+                           {width{d0di}} & D_IN | {width{d0d1}} & data1_reg | {width{d0h}} & data0_reg ;
+             data1_reg <= `BSV_ASSIGNMENT_DELAY
+                          d1di ? D_IN : data1_reg ;
+          end // else: !if(RST == `BSV_RESET_VALUE)
+     end // always@ (posedge CLK or `BSV_RESET_EDGE RST)
+
+
+
+   // synopsys translate_off
+   always@(posedge CLK)
+     begin: error_checks
+        reg deqerror, enqerror ;
+
+        deqerror =  0;
+        enqerror = 0;
+        if (RST == ! `BSV_RESET_VALUE)
+          begin
+             if ( ! empty_reg && DEQ )
+               begin
+                  deqerror =  1;
+                  $display( "Warning: FIFO2: %m -- Dequeuing from empty fifo" ) ;
+               end
+             if ( ! full_reg && ENQ && (!DEQ || guarded) )
+               begin
+                  enqerror = 1;
+                  $display( "Warning: FIFO2: %m -- Enqueuing to a full fifo" ) ;
+               end
+          end
+     end // always@ (posedge CLK)
+   // synopsys translate_on
+
+endmodule
diff --git a/toolflow/vivado/common/ip/AXIOffsetHBM/src/mkAXIOffset.v b/toolflow/vivado/common/ip/AXIOffsetHBM/src/mkAXIOffset.v
new file mode 100644
index 00000000..5ce9a1ca
--- /dev/null
+++ b/toolflow/vivado/common/ip/AXIOffsetHBM/src/mkAXIOffset.v
@@ -0,0 +1,1256 @@
+//
+// Generated by Bluespec Compiler (build 38534dc)
+//
+// On Wed Apr 29 11:16:06 CEST 2020
+//
+//
+// Ports:
+// Name                         I/O  size props
+// S_AXI_arready                  O     1
+// S_AXI_rvalid                   O     1
+// S_AXI_rid                      O     6
+// S_AXI_rdata                    O   256
+// S_AXI_rresp                    O     2
+// S_AXI_rlast                    O     1
+// S_AXI_awready                  O     1
+// S_AXI_wready                   O     1
+// S_AXI_bvalid                   O     1
+// S_AXI_bresp                    O     2
+// S_AXI_bid                      O     6
+// M_AXI_arvalid                  O     1
+// M_AXI_arid                     O     6
+// M_AXI_araddr                   O    33
+// M_AXI_arlen                    O     8
+// M_AXI_arsize                   O     3
+// M_AXI_arburst                  O     2
+// M_AXI_arlock                   O     1
+// M_AXI_arcache                  O     4
+// M_AXI_arprot                   O     3
+// M_AXI_arqos                    O     4
+// M_AXI_arregion                 O     4
+// M_AXI_rready                   O     1
+// M_AXI_awvalid                  O     1
+// M_AXI_awid                     O     6
+// M_AXI_awaddr                   O    33
+// M_AXI_awlen                    O     8
+// M_AXI_awsize                   O     3
+// M_AXI_awburst                  O     2
+// M_AXI_awlock                   O     1
+// M_AXI_awcache                  O     4
+// M_AXI_awprot                   O     3
+// M_AXI_awqos                    O     4
+// M_AXI_awregion                 O     4
+// M_AXI_wvalid                   O     1
+// M_AXI_wdata                    O   256
+// M_AXI_wstrb                    O    32
+// M_AXI_wlast                    O     1
+// M_AXI_bready                   O     1
+// CLK                            I     1 clock
+// RST_N                          I     1 reset
+// S_AXI_arvalid                  I     1
+// S_AXI_arid                     I     6
+// S_AXI_araddr                   I    33
+// S_AXI_arlen                    I     8
+// S_AXI_arsize                   I     3
+// S_AXI_arburst                  I     2
+// S_AXI_arlock                   I     1
+// S_AXI_arcache                  I     4
+// S_AXI_arprot                   I     3
+// S_AXI_arqos                    I     4
+// S_AXI_arregion                 I     4
+// S_AXI_rready                   I     1
+// S_AXI_awvalid                  I     1
+// S_AXI_awid                     I     6
+// S_AXI_awaddr                   I    33
+// S_AXI_awlen                    I     8
+// S_AXI_awsize                   I     3
+// S_AXI_awburst                  I     2
+// S_AXI_awlock                   I     1
+// S_AXI_awcache                  I     4
+// S_AXI_awprot                   I     3
+// S_AXI_awqos                    I     4
+// S_AXI_awregion                 I     4
+// S_AXI_wvalid                   I     1
+// S_AXI_wdata                    I   256 reg
+// S_AXI_wstrb                    I    32 reg
+// S_AXI_wlast                    I     1 reg
+// S_AXI_bready                   I     1
+// M_AXI_arready                  I     1
+// M_AXI_rvalid                   I     1
+// M_AXI_rid                      I     6 reg
+// M_AXI_rdata                    I   256 reg
+// M_AXI_rresp                    I     2 reg
+// M_AXI_rlast                    I     1 reg
+// M_AXI_awready                  I     1
+// M_AXI_wready                   I     1
+// M_AXI_bvalid                   I     1
+// M_AXI_bresp                    I     2 reg
+// M_AXI_bid                      I     6 reg
+//
+// No combinational paths from inputs to outputs
+//
+//
+
+`ifdef BSV_ASSIGNMENT_DELAY
+`else
+  `define BSV_ASSIGNMENT_DELAY
+`endif
+
+`ifdef BSV_POSITIVE_RESET
+  `define BSV_RESET_VALUE 1'b1
+  `define BSV_RESET_EDGE posedge
+`else
+  `define BSV_RESET_VALUE 1'b0
+  `define BSV_RESET_EDGE negedge
+`endif
+
+module mkAXIOffset(CLK,
+		   RST_N,
+
+		   S_AXI_arvalid,
+
+		   S_AXI_arready,
+
+		   S_AXI_arid,
+		   S_AXI_araddr,
+		   S_AXI_arlen,
+		   S_AXI_arsize,
+		   S_AXI_arburst,
+		   S_AXI_arlock,
+		   S_AXI_arcache,
+		   S_AXI_arprot,
+		   S_AXI_arqos,
+		   S_AXI_arregion,
+
+		   S_AXI_rready,
+
+		   S_AXI_rvalid,
+
+		   S_AXI_rid,
+
+		   S_AXI_rdata,
+
+		   S_AXI_rresp,
+
+		   S_AXI_rlast,
+
+		   S_AXI_awready,
+
+		   S_AXI_awvalid,
+
+		   S_AXI_awid,
+		   S_AXI_awaddr,
+		   S_AXI_awlen,
+		   S_AXI_awsize,
+		   S_AXI_awburst,
+		   S_AXI_awlock,
+		   S_AXI_awcache,
+		   S_AXI_awprot,
+		   S_AXI_awqos,
+		   S_AXI_awregion,
+
+		   S_AXI_wready,
+
+		   S_AXI_wvalid,
+
+		   S_AXI_wdata,
+		   S_AXI_wstrb,
+		   S_AXI_wlast,
+
+		   S_AXI_bready,
+
+		   S_AXI_bvalid,
+
+		   S_AXI_bresp,
+
+		   S_AXI_bid,
+
+		   M_AXI_arvalid,
+
+		   M_AXI_arready,
+
+		   M_AXI_arid,
+
+		   M_AXI_araddr,
+
+		   M_AXI_arlen,
+
+		   M_AXI_arsize,
+
+		   M_AXI_arburst,
+
+		   M_AXI_arlock,
+
+		   M_AXI_arcache,
+
+		   M_AXI_arprot,
+
+		   M_AXI_arqos,
+
+		   M_AXI_arregion,
+
+		   M_AXI_rready,
+
+		   M_AXI_rvalid,
+
+		   M_AXI_rid,
+		   M_AXI_rdata,
+		   M_AXI_rresp,
+		   M_AXI_rlast,
+
+		   M_AXI_awready,
+
+		   M_AXI_awvalid,
+
+		   M_AXI_awid,
+
+		   M_AXI_awaddr,
+
+		   M_AXI_awlen,
+
+		   M_AXI_awsize,
+
+		   M_AXI_awburst,
+
+		   M_AXI_awlock,
+
+		   M_AXI_awcache,
+
+		   M_AXI_awprot,
+
+		   M_AXI_awqos,
+
+		   M_AXI_awregion,
+
+		   M_AXI_wready,
+
+		   M_AXI_wvalid,
+
+		   M_AXI_wdata,
+
+		   M_AXI_wstrb,
+
+		   M_AXI_wlast,
+
+		   M_AXI_bvalid,
+
+		   M_AXI_bready,
+
+		   M_AXI_bresp,
+		   M_AXI_bid);
+  parameter [32 : 0] offset = 33'b0;
+  parameter [32 : 0] offset_bits = 33'b0;
+  input  CLK;
+  input  RST_N;
+
+  // action method in_rd_parvalid
+  input  S_AXI_arvalid;
+
+  // value method in_rd_arready
+  output S_AXI_arready;
+
+  // action method in_rd_parchannel
+  input  [5 : 0] S_AXI_arid;
+  input  [32 : 0] S_AXI_araddr;
+  input  [7 : 0] S_AXI_arlen;
+  input  [2 : 0] S_AXI_arsize;
+  input  [1 : 0] S_AXI_arburst;
+  input  S_AXI_arlock;
+  input  [3 : 0] S_AXI_arcache;
+  input  [2 : 0] S_AXI_arprot;
+  input  [3 : 0] S_AXI_arqos;
+  input  [3 : 0] S_AXI_arregion;
+
+  // action method in_rd_prready
+  input  S_AXI_rready;
+
+  // value method in_rd_rvalid
+  output S_AXI_rvalid;
+
+  // value method in_rd_rid
+  output [5 : 0] S_AXI_rid;
+
+  // value method in_rd_rdata
+  output [255 : 0] S_AXI_rdata;
+
+  // value method in_rd_rresp
+  output [1 : 0] S_AXI_rresp;
+
+  // value method in_rd_rlast
+  output S_AXI_rlast;
+
+  // value method in_rd_ruser
+
+  // value method in_wr_awready
+  output S_AXI_awready;
+
+  // action method in_wr_pawvalid
+  input  S_AXI_awvalid;
+
+  // action method in_wr_pawchannel
+  input  [5 : 0] S_AXI_awid;
+  input  [32 : 0] S_AXI_awaddr;
+  input  [7 : 0] S_AXI_awlen;
+  input  [2 : 0] S_AXI_awsize;
+  input  [1 : 0] S_AXI_awburst;
+  input  S_AXI_awlock;
+  input  [3 : 0] S_AXI_awcache;
+  input  [2 : 0] S_AXI_awprot;
+  input  [3 : 0] S_AXI_awqos;
+  input  [3 : 0] S_AXI_awregion;
+
+  // value method in_wr_wready
+  output S_AXI_wready;
+
+  // action method in_wr_pwvalid
+  input  S_AXI_wvalid;
+
+  // action method in_wr_pwchannel
+  input  [255 : 0] S_AXI_wdata;
+  input  [31 : 0] S_AXI_wstrb;
+  input  S_AXI_wlast;
+
+  // action method in_wr_pbready
+  input  S_AXI_bready;
+
+  // value method in_wr_bvalid
+  output S_AXI_bvalid;
+
+  // value method in_wr_bresp
+  output [1 : 0] S_AXI_bresp;
+
+  // value method in_wr_bid
+  output [5 : 0] S_AXI_bid;
+
+  // value method in_wr_buser
+
+  // value method out_rd_arvalid
+  output M_AXI_arvalid;
+
+  // action method out_rd_parready
+  input  M_AXI_arready;
+
+  // value method out_rd_arid
+  output [5 : 0] M_AXI_arid;
+
+  // value method out_rd_araddr
+  output [32 : 0] M_AXI_araddr;
+
+  // value method out_rd_arlen
+  output [7 : 0] M_AXI_arlen;
+
+  // value method out_rd_arsize
+  output [2 : 0] M_AXI_arsize;
+
+  // value method out_rd_arburst
+  output [1 : 0] M_AXI_arburst;
+
+  // value method out_rd_arlock
+  output M_AXI_arlock;
+
+  // value method out_rd_arcache
+  output [3 : 0] M_AXI_arcache;
+
+  // value method out_rd_arprot
+  output [2 : 0] M_AXI_arprot;
+
+  // value method out_rd_arqos
+  output [3 : 0] M_AXI_arqos;
+
+  // value method out_rd_arregion
+  output [3 : 0] M_AXI_arregion;
+
+  // value method out_rd_aruser
+
+  // value method out_rd_rready
+  output M_AXI_rready;
+
+  // action method out_rd_prvalid
+  input  M_AXI_rvalid;
+
+  // action method out_rd_prchannel
+  input  [5 : 0] M_AXI_rid;
+  input  [255 : 0] M_AXI_rdata;
+  input  [1 : 0] M_AXI_rresp;
+  input  M_AXI_rlast;
+
+  // action method out_wr_pawready
+  input  M_AXI_awready;
+
+  // value method out_wr_awvalid
+  output M_AXI_awvalid;
+
+  // value method out_wr_awid
+  output [5 : 0] M_AXI_awid;
+
+  // value method out_wr_awaddr
+  output [32 : 0] M_AXI_awaddr;
+
+  // value method out_wr_awlen
+  output [7 : 0] M_AXI_awlen;
+
+  // value method out_wr_awsize
+  output [2 : 0] M_AXI_awsize;
+
+  // value method out_wr_awburst
+  output [1 : 0] M_AXI_awburst;
+
+  // value method out_wr_awlock
+  output M_AXI_awlock;
+
+  // value method out_wr_awcache
+  output [3 : 0] M_AXI_awcache;
+
+  // value method out_wr_awprot
+  output [2 : 0] M_AXI_awprot;
+
+  // value method out_wr_awqos
+  output [3 : 0] M_AXI_awqos;
+
+  // value method out_wr_awregion
+  output [3 : 0] M_AXI_awregion;
+
+  // value method out_wr_awuser
+
+  // action method out_wr_pwready
+  input  M_AXI_wready;
+
+  // value method out_wr_wvalid
+  output M_AXI_wvalid;
+
+  // value method out_wr_wdata
+  output [255 : 0] M_AXI_wdata;
+
+  // value method out_wr_wstrb
+  output [31 : 0] M_AXI_wstrb;
+
+  // value method out_wr_wlast
+  output M_AXI_wlast;
+
+  // value method out_wr_wuser
+
+  // action method out_wr_pbvalid
+  input  M_AXI_bvalid;
+
+  // value method out_wr_bready
+  output M_AXI_bready;
+
+  // action method out_wr_bin
+  input  [1 : 0] M_AXI_bresp;
+  input  [5 : 0] M_AXI_bid;
+
+  // signals for module outputs
+  wire [255 : 0] M_AXI_wdata, S_AXI_rdata;
+  wire [32 : 0] M_AXI_araddr, M_AXI_awaddr;
+  wire [31 : 0] M_AXI_wstrb;
+  wire [7 : 0] M_AXI_arlen, M_AXI_awlen;
+  wire [5 : 0] M_AXI_arid, M_AXI_awid, S_AXI_bid, S_AXI_rid;
+  wire [3 : 0] M_AXI_arcache,
+	       M_AXI_arqos,
+	       M_AXI_arregion,
+	       M_AXI_awcache,
+	       M_AXI_awqos,
+	       M_AXI_awregion;
+  wire [2 : 0] M_AXI_arprot, M_AXI_arsize, M_AXI_awprot, M_AXI_awsize;
+  wire [1 : 0] M_AXI_arburst, M_AXI_awburst, S_AXI_bresp, S_AXI_rresp;
+  wire M_AXI_arlock,
+       M_AXI_arvalid,
+       M_AXI_awlock,
+       M_AXI_awvalid,
+       M_AXI_bready,
+       M_AXI_rready,
+       M_AXI_wlast,
+       M_AXI_wvalid,
+       S_AXI_arready,
+       S_AXI_awready,
+       S_AXI_bvalid,
+       S_AXI_rlast,
+       S_AXI_rvalid,
+       S_AXI_wready;
+
+  // inlined wires
+  reg [3 : 0] masterRead_warcache$wget, masterWrite_wawcache$wget;
+  wire [288 : 0] slaveWrite_arinpkg_data$wget;
+  wire [264 : 0] masterRead_rinpkg$wget;
+  wire [67 : 0] slaveRead_arinpkg$wget, slaveWrite_arinpkg_addr$wget;
+  wire [7 : 0] masterWrite_rinpkg$wget;
+
+  // register masterRead_isRst_isInReset
+  reg masterRead_isRst_isInReset;
+  wire masterRead_isRst_isInReset$D_IN, masterRead_isRst_isInReset$EN;
+
+  // register masterWrite_isRst_isInReset
+  reg masterWrite_isRst_isInReset;
+  wire masterWrite_isRst_isInReset$D_IN, masterWrite_isRst_isInReset$EN;
+
+  // register slaveRead_isRst_isInReset
+  reg slaveRead_isRst_isInReset;
+  wire slaveRead_isRst_isInReset$D_IN, slaveRead_isRst_isInReset$EN;
+
+  // register slaveWrite_isRst_isInReset
+  reg slaveWrite_isRst_isInReset;
+  wire slaveWrite_isRst_isInReset$D_IN, slaveWrite_isRst_isInReset$EN;
+
+  // ports of submodule masterRead_in
+  wire [67 : 0] masterRead_in$D_IN, masterRead_in$D_OUT;
+  wire masterRead_in$CLR,
+       masterRead_in$DEQ,
+       masterRead_in$EMPTY_N,
+       masterRead_in$ENQ,
+       masterRead_in$FULL_N;
+
+  // ports of submodule masterRead_out
+  wire [264 : 0] masterRead_out$D_IN;
+  wire masterRead_out$CLR, masterRead_out$DEQ, masterRead_out$ENQ;
+
+  // ports of submodule masterRead_out_1
+  wire [264 : 0] masterRead_out_1$D_IN, masterRead_out_1$D_OUT;
+  wire masterRead_out_1$CLR,
+       masterRead_out_1$DEQ,
+       masterRead_out_1$EMPTY_N,
+       masterRead_out_1$ENQ,
+       masterRead_out_1$FULL_N;
+
+  // ports of submodule masterWrite_in_addr
+  wire [67 : 0] masterWrite_in_addr$D_IN, masterWrite_in_addr$D_OUT;
+  wire masterWrite_in_addr$CLR,
+       masterWrite_in_addr$DEQ,
+       masterWrite_in_addr$EMPTY_N,
+       masterWrite_in_addr$ENQ,
+       masterWrite_in_addr$FULL_N;
+
+  // ports of submodule masterWrite_in_data
+  wire [288 : 0] masterWrite_in_data$D_IN, masterWrite_in_data$D_OUT;
+  wire masterWrite_in_data$CLR,
+       masterWrite_in_data$DEQ,
+       masterWrite_in_data$EMPTY_N,
+       masterWrite_in_data$ENQ,
+       masterWrite_in_data$FULL_N;
+
+  // ports of submodule masterWrite_out
+  wire [7 : 0] masterWrite_out$D_IN, masterWrite_out$D_OUT;
+  wire masterWrite_out$CLR,
+       masterWrite_out$DEQ,
+       masterWrite_out$EMPTY_N,
+       masterWrite_out$ENQ,
+       masterWrite_out$FULL_N;
+
+  // ports of submodule slaveRead_in
+  wire [67 : 0] slaveRead_in$D_IN, slaveRead_in$D_OUT;
+  wire slaveRead_in$CLR,
+       slaveRead_in$DEQ,
+       slaveRead_in$EMPTY_N,
+       slaveRead_in$ENQ,
+       slaveRead_in$FULL_N;
+
+  // ports of submodule slaveRead_out
+  wire [264 : 0] slaveRead_out$D_IN, slaveRead_out$D_OUT;
+  wire slaveRead_out$CLR,
+       slaveRead_out$DEQ,
+       slaveRead_out$EMPTY_N,
+       slaveRead_out$ENQ,
+       slaveRead_out$FULL_N;
+
+  // ports of submodule slaveWrite_in_addr
+  wire [67 : 0] slaveWrite_in_addr$D_IN, slaveWrite_in_addr$D_OUT;
+  wire slaveWrite_in_addr$CLR,
+       slaveWrite_in_addr$DEQ,
+       slaveWrite_in_addr$EMPTY_N,
+       slaveWrite_in_addr$ENQ,
+       slaveWrite_in_addr$FULL_N;
+
+  // ports of submodule slaveWrite_in_data
+  wire [288 : 0] slaveWrite_in_data$D_IN, slaveWrite_in_data$D_OUT;
+  wire slaveWrite_in_data$CLR,
+       slaveWrite_in_data$DEQ,
+       slaveWrite_in_data$EMPTY_N,
+       slaveWrite_in_data$ENQ,
+       slaveWrite_in_data$FULL_N;
+
+  // ports of submodule slaveWrite_out
+  wire [7 : 0] slaveWrite_out$D_IN, slaveWrite_out$D_OUT;
+  wire slaveWrite_out$CLR,
+       slaveWrite_out$DEQ,
+       slaveWrite_out$EMPTY_N,
+       slaveWrite_out$ENQ,
+       slaveWrite_out$FULL_N;
+
+  // remaining internal signals
+  reg [3 : 0] CASE_S_AXI_arcache_0_S_AXI_arcache_1_S_AXI_arc_ETC__q1,
+	      CASE_S_AXI_awcache_0_S_AXI_awcache_1_S_AXI_awc_ETC__q2,
+	      CASE_masterRead_warcachewget_1_masterRead_war_ETC__q3,
+	      CASE_masterWrite_wawcachewget_1_masterWrite_w_ETC__q4,
+	      CASE_slaveRead_arinpkgwget_BITS_14_TO_11_0_sl_ETC__q7,
+	      CASE_slaveRead_inD_OUT_BITS_14_TO_11_0_slaveR_ETC__q5,
+	      CASE_slaveWrite_arinpkg_addrwget_BITS_14_TO_1_ETC__q8,
+	      CASE_slaveWrite_in_addrD_OUT_BITS_14_TO_11_0__ETC__q6;
+  wire [32 : 0] _1_SL_offset_bits_5_MINUS_1___d86,
+		mask__h9528,
+		offset_tmp__h9529,
+		x_addr__h3127,
+		x_addr__h9515,
+		y__h9541;
+  wire [14 : 0] IF_S_AXI_arcache_EQ_0_39_OR_S_AXI_arcache_EQ_1_ETC___d354,
+		IF_S_AXI_awcache_EQ_0_67_OR_S_AXI_awcache_EQ_1_ETC___d382;
+
+  // value method in_rd_arready
+  assign S_AXI_arready = !slaveRead_isRst_isInReset && slaveRead_in$FULL_N ;
+
+  // value method in_rd_rvalid
+  assign S_AXI_rvalid = !slaveRead_isRst_isInReset && slaveRead_out$EMPTY_N ;
+
+  // value method in_rd_rid
+  assign S_AXI_rid =
+	     slaveRead_out$EMPTY_N ? slaveRead_out$D_OUT[264:259] : 6'd0 ;
+
+  // value method in_rd_rdata
+  assign S_AXI_rdata =
+	     slaveRead_out$EMPTY_N ? slaveRead_out$D_OUT[258:3] : 256'd0 ;
+
+  // value method in_rd_rresp
+  assign S_AXI_rresp =
+	     slaveRead_out$EMPTY_N ? slaveRead_out$D_OUT[2:1] : 2'd0 ;
+
+  // value method in_rd_rlast
+  assign S_AXI_rlast = slaveRead_out$EMPTY_N && slaveRead_out$D_OUT[0] ;
+
+  // value method in_wr_awready
+  assign S_AXI_awready =
+	     !slaveWrite_isRst_isInReset && slaveWrite_in_addr$FULL_N ;
+
+  // value method in_wr_wready
+  assign S_AXI_wready =
+	     !slaveWrite_isRst_isInReset && slaveWrite_in_data$FULL_N ;
+
+  // value method in_wr_bvalid
+  assign S_AXI_bvalid =
+	     !slaveWrite_isRst_isInReset && slaveWrite_out$EMPTY_N ;
+
+  // value method in_wr_bresp
+  assign S_AXI_bresp =
+	     slaveWrite_out$EMPTY_N ? slaveWrite_out$D_OUT[1:0] : 2'd0 ;
+
+  // value method in_wr_bid
+  assign S_AXI_bid =
+	     slaveWrite_out$EMPTY_N ? slaveWrite_out$D_OUT[7:2] : 6'd0 ;
+
+  // value method out_rd_arvalid
+  assign M_AXI_arvalid =
+	     !masterRead_isRst_isInReset && masterRead_in$EMPTY_N ;
+
+  // value method out_rd_arid
+  assign M_AXI_arid =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[67:62] : 6'd0 ;
+
+  // value method out_rd_araddr
+  assign M_AXI_araddr =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[61:29] : 33'd0 ;
+
+  // value method out_rd_arlen
+  assign M_AXI_arlen =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[28:21] : 8'd0 ;
+
+  // value method out_rd_arsize
+  assign M_AXI_arsize =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[20:18] : 3'd0 ;
+
+  // value method out_rd_arburst
+  assign M_AXI_arburst =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[17:16] : 2'd0 ;
+
+  // value method out_rd_arlock
+  assign M_AXI_arlock = masterRead_in$EMPTY_N && masterRead_in$D_OUT[15] ;
+
+  // value method out_rd_arcache
+  assign M_AXI_arcache =
+	     (!masterRead_in$EMPTY_N || masterRead_warcache$wget == 4'd0) ?
+	       4'd0 :
+	       CASE_masterRead_warcachewget_1_masterRead_war_ETC__q3 ;
+
+  // value method out_rd_arprot
+  assign M_AXI_arprot =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[10:8] : 3'd0 ;
+
+  // value method out_rd_arqos
+  assign M_AXI_arqos =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[7:4] : 4'd0 ;
+
+  // value method out_rd_arregion
+  assign M_AXI_arregion =
+	     masterRead_in$EMPTY_N ? masterRead_in$D_OUT[3:0] : 4'd0 ;
+
+  // value method out_rd_rready
+  assign M_AXI_rready =
+	     !masterRead_isRst_isInReset && masterRead_out_1$FULL_N ;
+
+  // value method out_wr_awvalid
+  assign M_AXI_awvalid =
+	     !masterWrite_isRst_isInReset && masterWrite_in_addr$EMPTY_N ;
+
+  // value method out_wr_awid
+  assign M_AXI_awid =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[67:62] :
+	       6'd0 ;
+
+  // value method out_wr_awaddr
+  assign M_AXI_awaddr =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[61:29] :
+	       33'd0 ;
+
+  // value method out_wr_awlen
+  assign M_AXI_awlen =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[28:21] :
+	       8'd0 ;
+
+  // value method out_wr_awsize
+  assign M_AXI_awsize =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[20:18] :
+	       3'd0 ;
+
+  // value method out_wr_awburst
+  assign M_AXI_awburst =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[17:16] :
+	       2'd0 ;
+
+  // value method out_wr_awlock
+  assign M_AXI_awlock =
+	     masterWrite_in_addr$EMPTY_N && masterWrite_in_addr$D_OUT[15] ;
+
+  // value method out_wr_awcache
+  assign M_AXI_awcache =
+	     (!masterWrite_in_addr$EMPTY_N ||
+	      masterWrite_wawcache$wget == 4'd0) ?
+	       4'd0 :
+	       CASE_masterWrite_wawcachewget_1_masterWrite_w_ETC__q4 ;
+
+  // value method out_wr_awprot
+  assign M_AXI_awprot =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[10:8] :
+	       3'd0 ;
+
+  // value method out_wr_awqos
+  assign M_AXI_awqos =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[7:4] :
+	       4'd0 ;
+
+  // value method out_wr_awregion
+  assign M_AXI_awregion =
+	     masterWrite_in_addr$EMPTY_N ?
+	       masterWrite_in_addr$D_OUT[3:0] :
+	       4'd0 ;
+
+  // value method out_wr_wvalid
+  assign M_AXI_wvalid =
+	     !masterWrite_isRst_isInReset && masterWrite_in_data$EMPTY_N ;
+
+  // value method out_wr_wdata
+  assign M_AXI_wdata =
+	     masterWrite_in_data$EMPTY_N ?
+	       masterWrite_in_data$D_OUT[288:33] :
+	       256'd0 ;
+
+  // value method out_wr_wstrb
+  assign M_AXI_wstrb =
+	     masterWrite_in_data$EMPTY_N ?
+	       masterWrite_in_data$D_OUT[32:1] :
+	       32'd0 ;
+
+  // value method out_wr_wlast
+  assign M_AXI_wlast =
+	     masterWrite_in_data$EMPTY_N && masterWrite_in_data$D_OUT[0] ;
+
+  // value method out_wr_bready
+  assign M_AXI_bready =
+	     !masterWrite_isRst_isInReset && masterWrite_out$FULL_N ;
+
+  // submodule masterRead_in
+  FIFO2 #(.width(32'd68), .guarded(32'd1)) masterRead_in(.RST(RST_N),
+							 .CLK(CLK),
+							 .D_IN(masterRead_in$D_IN),
+							 .ENQ(masterRead_in$ENQ),
+							 .DEQ(masterRead_in$DEQ),
+							 .CLR(masterRead_in$CLR),
+							 .D_OUT(masterRead_in$D_OUT),
+							 .FULL_N(masterRead_in$FULL_N),
+							 .EMPTY_N(masterRead_in$EMPTY_N));
+
+  // submodule masterRead_out
+  FIFO2 #(.width(32'd265), .guarded(32'd1)) masterRead_out(.RST(RST_N),
+							   .CLK(CLK),
+							   .D_IN(masterRead_out$D_IN),
+							   .ENQ(masterRead_out$ENQ),
+							   .DEQ(masterRead_out$DEQ),
+							   .CLR(masterRead_out$CLR),
+							   .D_OUT(),
+							   .FULL_N(),
+							   .EMPTY_N());
+
+  // submodule masterRead_out_1
+  FIFO2 #(.width(32'd265), .guarded(32'd1)) masterRead_out_1(.RST(RST_N),
+							     .CLK(CLK),
+							     .D_IN(masterRead_out_1$D_IN),
+							     .ENQ(masterRead_out_1$ENQ),
+							     .DEQ(masterRead_out_1$DEQ),
+							     .CLR(masterRead_out_1$CLR),
+							     .D_OUT(masterRead_out_1$D_OUT),
+							     .FULL_N(masterRead_out_1$FULL_N),
+							     .EMPTY_N(masterRead_out_1$EMPTY_N));
+
+  // submodule masterWrite_in_addr
+  FIFO2 #(.width(32'd68), .guarded(32'd1)) masterWrite_in_addr(.RST(RST_N),
+							       .CLK(CLK),
+							       .D_IN(masterWrite_in_addr$D_IN),
+							       .ENQ(masterWrite_in_addr$ENQ),
+							       .DEQ(masterWrite_in_addr$DEQ),
+							       .CLR(masterWrite_in_addr$CLR),
+							       .D_OUT(masterWrite_in_addr$D_OUT),
+							       .FULL_N(masterWrite_in_addr$FULL_N),
+							       .EMPTY_N(masterWrite_in_addr$EMPTY_N));
+
+  // submodule masterWrite_in_data
+  FIFO2 #(.width(32'd289), .guarded(32'd1)) masterWrite_in_data(.RST(RST_N),
+								.CLK(CLK),
+								.D_IN(masterWrite_in_data$D_IN),
+								.ENQ(masterWrite_in_data$ENQ),
+								.DEQ(masterWrite_in_data$DEQ),
+								.CLR(masterWrite_in_data$CLR),
+								.D_OUT(masterWrite_in_data$D_OUT),
+								.FULL_N(masterWrite_in_data$FULL_N),
+								.EMPTY_N(masterWrite_in_data$EMPTY_N));
+
+  // submodule masterWrite_out
+  FIFO2 #(.width(32'd8), .guarded(32'd1)) masterWrite_out(.RST(RST_N),
+							  .CLK(CLK),
+							  .D_IN(masterWrite_out$D_IN),
+							  .ENQ(masterWrite_out$ENQ),
+							  .DEQ(masterWrite_out$DEQ),
+							  .CLR(masterWrite_out$CLR),
+							  .D_OUT(masterWrite_out$D_OUT),
+							  .FULL_N(masterWrite_out$FULL_N),
+							  .EMPTY_N(masterWrite_out$EMPTY_N));
+
+  // submodule slaveRead_in
+  FIFO2 #(.width(32'd68), .guarded(32'd1)) slaveRead_in(.RST(RST_N),
+							.CLK(CLK),
+							.D_IN(slaveRead_in$D_IN),
+							.ENQ(slaveRead_in$ENQ),
+							.DEQ(slaveRead_in$DEQ),
+							.CLR(slaveRead_in$CLR),
+							.D_OUT(slaveRead_in$D_OUT),
+							.FULL_N(slaveRead_in$FULL_N),
+							.EMPTY_N(slaveRead_in$EMPTY_N));
+
+  // submodule slaveRead_out
+  FIFO2 #(.width(32'd265), .guarded(32'd1)) slaveRead_out(.RST(RST_N),
+							  .CLK(CLK),
+							  .D_IN(slaveRead_out$D_IN),
+							  .ENQ(slaveRead_out$ENQ),
+							  .DEQ(slaveRead_out$DEQ),
+							  .CLR(slaveRead_out$CLR),
+							  .D_OUT(slaveRead_out$D_OUT),
+							  .FULL_N(slaveRead_out$FULL_N),
+							  .EMPTY_N(slaveRead_out$EMPTY_N));
+
+  // submodule slaveWrite_in_addr
+  FIFO2 #(.width(32'd68), .guarded(32'd1)) slaveWrite_in_addr(.RST(RST_N),
+							      .CLK(CLK),
+							      .D_IN(slaveWrite_in_addr$D_IN),
+							      .ENQ(slaveWrite_in_addr$ENQ),
+							      .DEQ(slaveWrite_in_addr$DEQ),
+							      .CLR(slaveWrite_in_addr$CLR),
+							      .D_OUT(slaveWrite_in_addr$D_OUT),
+							      .FULL_N(slaveWrite_in_addr$FULL_N),
+							      .EMPTY_N(slaveWrite_in_addr$EMPTY_N));
+
+  // submodule slaveWrite_in_data
+  FIFO2 #(.width(32'd289), .guarded(32'd1)) slaveWrite_in_data(.RST(RST_N),
+							       .CLK(CLK),
+							       .D_IN(slaveWrite_in_data$D_IN),
+							       .ENQ(slaveWrite_in_data$ENQ),
+							       .DEQ(slaveWrite_in_data$DEQ),
+							       .CLR(slaveWrite_in_data$CLR),
+							       .D_OUT(slaveWrite_in_data$D_OUT),
+							       .FULL_N(slaveWrite_in_data$FULL_N),
+							       .EMPTY_N(slaveWrite_in_data$EMPTY_N));
+
+  // submodule slaveWrite_out
+  FIFO2 #(.width(32'd8), .guarded(32'd1)) slaveWrite_out(.RST(RST_N),
+							 .CLK(CLK),
+							 .D_IN(slaveWrite_out$D_IN),
+							 .ENQ(slaveWrite_out$ENQ),
+							 .DEQ(slaveWrite_out$DEQ),
+							 .CLR(slaveWrite_out$CLR),
+							 .D_OUT(slaveWrite_out$D_OUT),
+							 .FULL_N(slaveWrite_out$FULL_N),
+							 .EMPTY_N(slaveWrite_out$EMPTY_N));
+
+  // inlined wires
+  always@(masterRead_in$D_OUT)
+  begin
+    case (masterRead_in$D_OUT[14:11])
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
+	  masterRead_warcache$wget = masterRead_in$D_OUT[14:11];
+      default: masterRead_warcache$wget = 4'd11;
+    endcase
+  end
+  always@(masterWrite_in_addr$D_OUT)
+  begin
+    case (masterWrite_in_addr$D_OUT[14:11])
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd6, 4'd7, 4'd14:
+	  masterWrite_wawcache$wget = masterWrite_in_addr$D_OUT[14:11];
+      default: masterWrite_wawcache$wget = 4'd15;
+    endcase
+  end
+  assign masterRead_rinpkg$wget =
+	     { M_AXI_rid, M_AXI_rdata, M_AXI_rresp, M_AXI_rlast } ;
+  assign slaveRead_arinpkg$wget =
+	     { S_AXI_arid,
+	       S_AXI_araddr,
+	       S_AXI_arlen,
+	       S_AXI_arsize,
+	       S_AXI_arburst,
+	       S_AXI_arlock,
+	       IF_S_AXI_arcache_EQ_0_39_OR_S_AXI_arcache_EQ_1_ETC___d354 } ;
+  assign masterWrite_rinpkg$wget = { M_AXI_bid, M_AXI_bresp } ;
+  assign slaveWrite_arinpkg_addr$wget =
+	     { S_AXI_awid,
+	       S_AXI_awaddr,
+	       S_AXI_awlen,
+	       S_AXI_awsize,
+	       S_AXI_awburst,
+	       S_AXI_awlock,
+	       IF_S_AXI_awcache_EQ_0_67_OR_S_AXI_awcache_EQ_1_ETC___d382 } ;
+  assign slaveWrite_arinpkg_data$wget =
+	     { S_AXI_wdata, S_AXI_wstrb, S_AXI_wlast } ;
+
+  // register masterRead_isRst_isInReset
+  assign masterRead_isRst_isInReset$D_IN = 1'd0 ;
+  assign masterRead_isRst_isInReset$EN = masterRead_isRst_isInReset ;
+
+  // register masterWrite_isRst_isInReset
+  assign masterWrite_isRst_isInReset$D_IN = 1'd0 ;
+  assign masterWrite_isRst_isInReset$EN = masterWrite_isRst_isInReset ;
+
+  // register slaveRead_isRst_isInReset
+  assign slaveRead_isRst_isInReset$D_IN = 1'd0 ;
+  assign slaveRead_isRst_isInReset$EN = slaveRead_isRst_isInReset ;
+
+  // register slaveWrite_isRst_isInReset
+  assign slaveWrite_isRst_isInReset$D_IN = 1'd0 ;
+  assign slaveWrite_isRst_isInReset$EN = slaveWrite_isRst_isInReset ;
+
+  // submodule masterRead_in
+  assign masterRead_in$D_IN =
+	     { slaveRead_in$D_OUT[67:62],
+	       x_addr__h3127,
+	       slaveRead_in$D_OUT[28:15],
+	       CASE_slaveRead_inD_OUT_BITS_14_TO_11_0_slaveR_ETC__q5,
+	       slaveRead_in$D_OUT[10:0] } ;
+  assign masterRead_in$ENQ = slaveRead_in$EMPTY_N && masterRead_in$FULL_N ;
+  assign masterRead_in$DEQ =
+	     masterRead_in$EMPTY_N && !masterRead_isRst_isInReset &&
+	     M_AXI_arready ;
+  assign masterRead_in$CLR = 1'b0 ;
+
+  // submodule masterRead_out
+  assign masterRead_out$D_IN = 265'h0 ;
+  assign masterRead_out$ENQ = 1'b0 ;
+  assign masterRead_out$DEQ = 1'b0 ;
+  assign masterRead_out$CLR = 1'b0 ;
+
+  // submodule masterRead_out_1
+  assign masterRead_out_1$D_IN = masterRead_rinpkg$wget ;
+  assign masterRead_out_1$ENQ =
+	     masterRead_out_1$FULL_N && !masterRead_isRst_isInReset &&
+	     M_AXI_rvalid ;
+  assign masterRead_out_1$DEQ =
+	     masterRead_out_1$EMPTY_N && slaveRead_out$FULL_N ;
+  assign masterRead_out_1$CLR = 1'b0 ;
+
+  // submodule masterWrite_in_addr
+  assign masterWrite_in_addr$D_IN =
+	     { slaveWrite_in_addr$D_OUT[67:62],
+	       x_addr__h9515,
+	       slaveWrite_in_addr$D_OUT[28:15],
+	       CASE_slaveWrite_in_addrD_OUT_BITS_14_TO_11_0__ETC__q6,
+	       slaveWrite_in_addr$D_OUT[10:0] } ;
+  assign masterWrite_in_addr$ENQ =
+	     slaveWrite_in_addr$EMPTY_N && masterWrite_in_addr$FULL_N ;
+  assign masterWrite_in_addr$DEQ =
+	     masterWrite_in_addr$EMPTY_N && !masterWrite_isRst_isInReset &&
+	     M_AXI_awready ;
+  assign masterWrite_in_addr$CLR = 1'b0 ;
+
+  // submodule masterWrite_in_data
+  assign masterWrite_in_data$D_IN = slaveWrite_in_data$D_OUT ;
+  assign masterWrite_in_data$ENQ =
+	     slaveWrite_in_data$EMPTY_N && masterWrite_in_data$FULL_N ;
+  assign masterWrite_in_data$DEQ =
+	     masterWrite_in_data$EMPTY_N && !masterWrite_isRst_isInReset &&
+	     M_AXI_wready ;
+  assign masterWrite_in_data$CLR = 1'b0 ;
+
+  // submodule masterWrite_out
+  assign masterWrite_out$D_IN = masterWrite_rinpkg$wget ;
+  assign masterWrite_out$ENQ =
+	     masterWrite_out$FULL_N && !masterWrite_isRst_isInReset &&
+	     M_AXI_bvalid ;
+  assign masterWrite_out$DEQ =
+	     masterWrite_out$EMPTY_N && slaveWrite_out$FULL_N ;
+  assign masterWrite_out$CLR = 1'b0 ;
+
+  // submodule slaveRead_in
+  assign slaveRead_in$D_IN =
+	     { slaveRead_arinpkg$wget[67:15],
+	       CASE_slaveRead_arinpkgwget_BITS_14_TO_11_0_sl_ETC__q7,
+	       slaveRead_arinpkg$wget[10:0] } ;
+  assign slaveRead_in$ENQ =
+	     slaveRead_in$FULL_N && !slaveRead_isRst_isInReset &&
+	     S_AXI_arvalid ;
+  assign slaveRead_in$DEQ = slaveRead_in$EMPTY_N && masterRead_in$FULL_N ;
+  assign slaveRead_in$CLR = 1'b0 ;
+
+  // submodule slaveRead_out
+  assign slaveRead_out$D_IN = masterRead_out_1$D_OUT ;
+  assign slaveRead_out$ENQ =
+	     masterRead_out_1$EMPTY_N && slaveRead_out$FULL_N ;
+  assign slaveRead_out$DEQ =
+	     slaveRead_out$EMPTY_N && !slaveRead_isRst_isInReset &&
+	     S_AXI_rready ;
+  assign slaveRead_out$CLR = 1'b0 ;
+
+  // submodule slaveWrite_in_addr
+  assign slaveWrite_in_addr$D_IN =
+	     { slaveWrite_arinpkg_addr$wget[67:15],
+	       CASE_slaveWrite_arinpkg_addrwget_BITS_14_TO_1_ETC__q8,
+	       slaveWrite_arinpkg_addr$wget[10:0] } ;
+  assign slaveWrite_in_addr$ENQ =
+	     slaveWrite_in_addr$FULL_N && !slaveWrite_isRst_isInReset &&
+	     S_AXI_awvalid ;
+  assign slaveWrite_in_addr$DEQ =
+	     slaveWrite_in_addr$EMPTY_N && masterWrite_in_addr$FULL_N ;
+  assign slaveWrite_in_addr$CLR = 1'b0 ;
+
+  // submodule slaveWrite_in_data
+  assign slaveWrite_in_data$D_IN = slaveWrite_arinpkg_data$wget ;
+  assign slaveWrite_in_data$ENQ =
+	     slaveWrite_in_data$FULL_N && !slaveWrite_isRst_isInReset &&
+	     S_AXI_wvalid ;
+  assign slaveWrite_in_data$DEQ =
+	     slaveWrite_in_data$EMPTY_N && masterWrite_in_data$FULL_N ;
+  assign slaveWrite_in_data$CLR = 1'b0 ;
+
+  // submodule slaveWrite_out
+  assign slaveWrite_out$D_IN = masterWrite_out$D_OUT ;
+  assign slaveWrite_out$ENQ =
+	     masterWrite_out$EMPTY_N && slaveWrite_out$FULL_N ;
+  assign slaveWrite_out$DEQ =
+	     slaveWrite_out$EMPTY_N && !slaveWrite_isRst_isInReset &&
+	     S_AXI_bready ;
+  assign slaveWrite_out$CLR = 1'b0 ;
+
+  // remaining internal signals
+  assign IF_S_AXI_arcache_EQ_0_39_OR_S_AXI_arcache_EQ_1_ETC___d354 =
+	     { CASE_S_AXI_arcache_0_S_AXI_arcache_1_S_AXI_arc_ETC__q1,
+	       S_AXI_arprot,
+	       S_AXI_arqos,
+	       S_AXI_arregion } ;
+  assign IF_S_AXI_awcache_EQ_0_67_OR_S_AXI_awcache_EQ_1_ETC___d382 =
+	     { CASE_S_AXI_awcache_0_S_AXI_awcache_1_S_AXI_awc_ETC__q2,
+	       S_AXI_awprot,
+	       S_AXI_awqos,
+	       S_AXI_awregion } ;
+  assign _1_SL_offset_bits_5_MINUS_1___d86 = (33'd1 << offset_bits) - 33'd1 ;
+  assign mask__h9528 =
+	     { _1_SL_offset_bits_5_MINUS_1___d86[0],
+	       _1_SL_offset_bits_5_MINUS_1___d86[1],
+	       _1_SL_offset_bits_5_MINUS_1___d86[2],
+	       _1_SL_offset_bits_5_MINUS_1___d86[3],
+	       _1_SL_offset_bits_5_MINUS_1___d86[4],
+	       _1_SL_offset_bits_5_MINUS_1___d86[5],
+	       _1_SL_offset_bits_5_MINUS_1___d86[6],
+	       _1_SL_offset_bits_5_MINUS_1___d86[7],
+	       _1_SL_offset_bits_5_MINUS_1___d86[8],
+	       _1_SL_offset_bits_5_MINUS_1___d86[9],
+	       _1_SL_offset_bits_5_MINUS_1___d86[10],
+	       _1_SL_offset_bits_5_MINUS_1___d86[11],
+	       _1_SL_offset_bits_5_MINUS_1___d86[12],
+	       _1_SL_offset_bits_5_MINUS_1___d86[13],
+	       _1_SL_offset_bits_5_MINUS_1___d86[14],
+	       _1_SL_offset_bits_5_MINUS_1___d86[15],
+	       _1_SL_offset_bits_5_MINUS_1___d86[16],
+	       _1_SL_offset_bits_5_MINUS_1___d86[17],
+	       _1_SL_offset_bits_5_MINUS_1___d86[18],
+	       _1_SL_offset_bits_5_MINUS_1___d86[19],
+	       _1_SL_offset_bits_5_MINUS_1___d86[20],
+	       _1_SL_offset_bits_5_MINUS_1___d86[21],
+	       _1_SL_offset_bits_5_MINUS_1___d86[22],
+	       _1_SL_offset_bits_5_MINUS_1___d86[23],
+	       _1_SL_offset_bits_5_MINUS_1___d86[24],
+	       _1_SL_offset_bits_5_MINUS_1___d86[25],
+	       _1_SL_offset_bits_5_MINUS_1___d86[26],
+	       _1_SL_offset_bits_5_MINUS_1___d86[27],
+	       _1_SL_offset_bits_5_MINUS_1___d86[28],
+	       _1_SL_offset_bits_5_MINUS_1___d86[29],
+	       _1_SL_offset_bits_5_MINUS_1___d86[30],
+	       _1_SL_offset_bits_5_MINUS_1___d86[31],
+	       _1_SL_offset_bits_5_MINUS_1___d86[32] } ;
+  assign offset_tmp__h9529 = offset & mask__h9528 ;
+  assign x_addr__h3127 =
+	     slaveRead_in$D_OUT[61:29] & y__h9541 | offset_tmp__h9529 ;
+  assign x_addr__h9515 =
+	     slaveWrite_in_addr$D_OUT[61:29] & y__h9541 | offset_tmp__h9529 ;
+  assign y__h9541 =
+	     { ~_1_SL_offset_bits_5_MINUS_1___d86[0],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[1],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[2],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[3],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[4],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[5],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[6],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[7],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[8],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[9],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[10],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[11],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[12],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[13],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[14],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[15],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[16],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[17],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[18],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[19],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[20],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[21],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[22],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[23],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[24],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[25],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[26],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[27],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[28],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[29],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[30],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[31],
+	       ~_1_SL_offset_bits_5_MINUS_1___d86[32] } ;
+  always@(S_AXI_arcache)
+  begin
+    case (S_AXI_arcache)
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
+	  CASE_S_AXI_arcache_0_S_AXI_arcache_1_S_AXI_arc_ETC__q1 =
+	      S_AXI_arcache;
+      default: CASE_S_AXI_arcache_0_S_AXI_arcache_1_S_AXI_arc_ETC__q1 = 4'd11;
+    endcase
+  end
+  always@(S_AXI_awcache)
+  begin
+    case (S_AXI_awcache)
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd6, 4'd7, 4'd14:
+	  CASE_S_AXI_awcache_0_S_AXI_awcache_1_S_AXI_awc_ETC__q2 =
+	      S_AXI_awcache;
+      default: CASE_S_AXI_awcache_0_S_AXI_awcache_1_S_AXI_awc_ETC__q2 = 4'd15;
+    endcase
+  end
+  always@(masterRead_warcache$wget)
+  begin
+    case (masterRead_warcache$wget)
+      4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
+	  CASE_masterRead_warcachewget_1_masterRead_war_ETC__q3 =
+	      masterRead_warcache$wget;
+      default: CASE_masterRead_warcachewget_1_masterRead_war_ETC__q3 = 4'd11;
+    endcase
+  end
+  always@(masterWrite_wawcache$wget)
+  begin
+    case (masterWrite_wawcache$wget)
+      4'd1, 4'd2, 4'd3, 4'd6, 4'd7, 4'd14:
+	  CASE_masterWrite_wawcachewget_1_masterWrite_w_ETC__q4 =
+	      masterWrite_wawcache$wget;
+      default: CASE_masterWrite_wawcachewget_1_masterWrite_w_ETC__q4 = 4'd15;
+    endcase
+  end
+  always@(slaveRead_in$D_OUT)
+  begin
+    case (slaveRead_in$D_OUT[14:11])
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
+	  CASE_slaveRead_inD_OUT_BITS_14_TO_11_0_slaveR_ETC__q5 =
+	      slaveRead_in$D_OUT[14:11];
+      default: CASE_slaveRead_inD_OUT_BITS_14_TO_11_0_slaveR_ETC__q5 = 4'd11;
+    endcase
+  end
+  always@(slaveWrite_in_addr$D_OUT)
+  begin
+    case (slaveWrite_in_addr$D_OUT[14:11])
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd6, 4'd7, 4'd14:
+	  CASE_slaveWrite_in_addrD_OUT_BITS_14_TO_11_0__ETC__q6 =
+	      slaveWrite_in_addr$D_OUT[14:11];
+      default: CASE_slaveWrite_in_addrD_OUT_BITS_14_TO_11_0__ETC__q6 = 4'd15;
+    endcase
+  end
+  always@(slaveRead_arinpkg$wget)
+  begin
+    case (slaveRead_arinpkg$wget[14:11])
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd10, 4'd14, 4'd15:
+	  CASE_slaveRead_arinpkgwget_BITS_14_TO_11_0_sl_ETC__q7 =
+	      slaveRead_arinpkg$wget[14:11];
+      default: CASE_slaveRead_arinpkgwget_BITS_14_TO_11_0_sl_ETC__q7 = 4'd11;
+    endcase
+  end
+  always@(slaveWrite_arinpkg_addr$wget)
+  begin
+    case (slaveWrite_arinpkg_addr$wget[14:11])
+      4'd0, 4'd1, 4'd2, 4'd3, 4'd6, 4'd7, 4'd14:
+	  CASE_slaveWrite_arinpkg_addrwget_BITS_14_TO_1_ETC__q8 =
+	      slaveWrite_arinpkg_addr$wget[14:11];
+      default: CASE_slaveWrite_arinpkg_addrwget_BITS_14_TO_1_ETC__q8 = 4'd15;
+    endcase
+  end
+
+  // handling of inlined registers
+
+  always@(posedge CLK or `BSV_RESET_EDGE RST_N)
+  if (RST_N == `BSV_RESET_VALUE)
+    begin
+      masterRead_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY 1'd1;
+      masterWrite_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY 1'd1;
+      slaveRead_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY 1'd1;
+      slaveWrite_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY 1'd1;
+    end
+  else
+    begin
+      if (masterRead_isRst_isInReset$EN)
+	masterRead_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY
+	    masterRead_isRst_isInReset$D_IN;
+      if (masterWrite_isRst_isInReset$EN)
+	masterWrite_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY
+	    masterWrite_isRst_isInReset$D_IN;
+      if (slaveRead_isRst_isInReset$EN)
+	slaveRead_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY
+	    slaveRead_isRst_isInReset$D_IN;
+      if (slaveWrite_isRst_isInReset$EN)
+	slaveWrite_isRst_isInReset <= `BSV_ASSIGNMENT_DELAY
+	    slaveWrite_isRst_isInReset$D_IN;
+    end
+
+  // synopsys translate_off
+  `ifdef BSV_NO_INITIAL_BLOCKS
+  `else // not BSV_NO_INITIAL_BLOCKS
+  initial
+  begin
+    masterRead_isRst_isInReset = 1'h0;
+    masterWrite_isRst_isInReset = 1'h0;
+    slaveRead_isRst_isInReset = 1'h0;
+    slaveWrite_isRst_isInReset = 1'h0;
+  end
+  `endif // BSV_NO_INITIAL_BLOCKS
+  // synopsys translate_on
+endmodule  // mkAXIOffset
+
diff --git a/toolflow/vivado/common/ip/AXIOffsetHBM/xgui/AXIOffsetHBM_v1_0.tcl b/toolflow/vivado/common/ip/AXIOffsetHBM/xgui/AXIOffsetHBM_v1_0.tcl
new file mode 100644
index 00000000..f584de70
--- /dev/null
+++ b/toolflow/vivado/common/ip/AXIOffsetHBM/xgui/AXIOffsetHBM_v1_0.tcl
@@ -0,0 +1,40 @@
+# Definitional proc to organize widgets for parameters.
+proc init_gui { IPINST } {
+  ipgui::add_param $IPINST -name "Component_Name"
+  #Adding Page
+  set Page_0 [ipgui::add_page $IPINST -name "Page 0"]
+  ipgui::add_param $IPINST -name "offset" -parent ${Page_0}
+  ipgui::add_param $IPINST -name "offset_bits" -parent ${Page_0}
+
+
+}
+
+proc update_PARAM_VALUE.offset { PARAM_VALUE.offset } {
+	# Procedure called to update offset when any of the dependent parameters in the arguments change
+}
+
+proc validate_PARAM_VALUE.offset { PARAM_VALUE.offset } {
+	# Procedure called to validate offset
+	return true
+}
+
+proc update_PARAM_VALUE.offset_bits { PARAM_VALUE.offset_bits } {
+	# Procedure called to update offset_bits when any of the dependent parameters in the arguments change
+}
+
+proc validate_PARAM_VALUE.offset_bits { PARAM_VALUE.offset_bits } {
+	# Procedure called to validate offset_bits
+	return true
+}
+
+
+proc update_MODELPARAM_VALUE.offset { MODELPARAM_VALUE.offset PARAM_VALUE.offset } {
+	# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
+	set_property value [get_property value ${PARAM_VALUE.offset}] ${MODELPARAM_VALUE.offset}
+}
+
+proc update_MODELPARAM_VALUE.offset_bits { MODELPARAM_VALUE.offset_bits PARAM_VALUE.offset_bits } {
+	# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
+	set_property value [get_property value ${PARAM_VALUE.offset_bits}] ${MODELPARAM_VALUE.offset_bits}
+}
+
diff --git a/toolflow/vivado/common/ip/AXIOffsetHBM/xgui/mkAXIOffset_v1_0.tcl b/toolflow/vivado/common/ip/AXIOffsetHBM/xgui/mkAXIOffset_v1_0.tcl
new file mode 100644
index 00000000..f584de70
--- /dev/null
+++ b/toolflow/vivado/common/ip/AXIOffsetHBM/xgui/mkAXIOffset_v1_0.tcl
@@ -0,0 +1,40 @@
+# Definitional proc to organize widgets for parameters.
+proc init_gui { IPINST } {
+  ipgui::add_param $IPINST -name "Component_Name"
+  #Adding Page
+  set Page_0 [ipgui::add_page $IPINST -name "Page 0"]
+  ipgui::add_param $IPINST -name "offset" -parent ${Page_0}
+  ipgui::add_param $IPINST -name "offset_bits" -parent ${Page_0}
+
+
+}
+
+proc update_PARAM_VALUE.offset { PARAM_VALUE.offset } {
+	# Procedure called to update offset when any of the dependent parameters in the arguments change
+}
+
+proc validate_PARAM_VALUE.offset { PARAM_VALUE.offset } {
+	# Procedure called to validate offset
+	return true
+}
+
+proc update_PARAM_VALUE.offset_bits { PARAM_VALUE.offset_bits } {
+	# Procedure called to update offset_bits when any of the dependent parameters in the arguments change
+}
+
+proc validate_PARAM_VALUE.offset_bits { PARAM_VALUE.offset_bits } {
+	# Procedure called to validate offset_bits
+	return true
+}
+
+
+proc update_MODELPARAM_VALUE.offset { MODELPARAM_VALUE.offset PARAM_VALUE.offset } {
+	# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
+	set_property value [get_property value ${PARAM_VALUE.offset}] ${MODELPARAM_VALUE.offset}
+}
+
+proc update_MODELPARAM_VALUE.offset_bits { MODELPARAM_VALUE.offset_bits PARAM_VALUE.offset_bits } {
+	# Procedure called to set VHDL generic/Verilog parameter value(s) based on TCL parameter value
+	set_property value [get_property value ${PARAM_VALUE.offset_bits}] ${MODELPARAM_VALUE.offset_bits}
+}
+
diff --git a/toolflow/vivado/common/ip/BlueDMA_256_512_32/component.xml b/toolflow/vivado/common/ip/BlueDMA_256_512_32/component.xml
index 674365e6..b831512a 100644
--- a/toolflow/vivado/common/ip/BlueDMA_256_512_32/component.xml
+++ b/toolflow/vivado/common/ip/BlueDMA_256_512_32/component.xml
@@ -1022,7 +1022,7 @@
         <spirit:parameters>
           <spirit:parameter>
             <spirit:name>viewChecksum</spirit:name>
-            <spirit:value>8a8fc658</spirit:value>
+            <spirit:value>c86195ad</spirit:value>
           </spirit:parameter>
         </spirit:parameters>
       </spirit:view>
@@ -1038,7 +1038,7 @@
         <spirit:parameters>
           <spirit:parameter>
             <spirit:name>viewChecksum</spirit:name>
-            <spirit:value>c9ca9952</spirit:value>
+            <spirit:value>df9fdfcc</spirit:value>
           </spirit:parameter>
         </spirit:parameters>
       </spirit:view>
@@ -2777,7 +2777,7 @@
       <spirit:file>
         <spirit:name>src/mkBlueDMAVivado.v</spirit:name>
         <spirit:fileType>verilogSource</spirit:fileType>
-        <spirit:userFileType>CHECKSUM_805c6faf</spirit:userFileType>
+        <spirit:userFileType>CHECKSUM_0f01ee17</spirit:userFileType>
       </spirit:file>
     </spirit:fileSet>
     <spirit:fileSet>
@@ -2861,7 +2861,7 @@
       <xilinx:displayName>BlueDMA_256_512_32</xilinx:displayName>
       <xilinx:definitionSource>package_project</xilinx:definitionSource>
       <xilinx:coreRevision>1</xilinx:coreRevision>
-      <xilinx:coreCreationDateTime>2019-02-05T14:31:51Z</xilinx:coreCreationDateTime>
+      <xilinx:coreCreationDateTime>2019-05-30T13:24:11Z</xilinx:coreCreationDateTime>
       <xilinx:tags>
         <xilinx:tag xilinx:name="nopcore"/>
       </xilinx:tags>
@@ -2871,7 +2871,7 @@
       <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="4a980b8b"/>
       <xilinx:checksum xilinx:scope="addressSpaces" xilinx:value="6a695f97"/>
       <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="6362e295"/>
-      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="d4550312"/>
+      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="6fb45a00"/>
       <xilinx:checksum xilinx:scope="ports" xilinx:value="02492e86"/>
       <xilinx:checksum xilinx:scope="parameters" xilinx:value="ce7bf2c3"/>
     </xilinx:packagingInfo>
diff --git a/toolflow/vivado/common/ip/BlueDMA_256_512_32/src/mkBlueDMAVivado.v b/toolflow/vivado/common/ip/BlueDMA_256_512_32/src/mkBlueDMAVivado.v
index 3e9ad687..a20a8595 100644
--- a/toolflow/vivado/common/ip/BlueDMA_256_512_32/src/mkBlueDMAVivado.v
+++ b/toolflow/vivado/common/ip/BlueDMA_256_512_32/src/mkBlueDMAVivado.v
@@ -1,7 +1,7 @@
 //
-// Generated by Bluespec Compiler, version 2017.07.A (build 1da80f1, 2017-07-21)
+// Generated by Bluespec Compiler, version 2018.10.beta1 (build e1df8052c, 2018-10-17)
 //
-// On Tue Feb  5 15:31:17 CET 2019
+// On Thu May 30 15:23:37 CEST 2019
 //
 //
 // Ports:
@@ -2025,8 +2025,13 @@ module mkBlueDMAVivado(m32_axi_aclk,
   wire MUX_blueDMA_readChannel_toMaster_outstanding_writes$write_1__SEL_2,
        MUX_blueDMA_writeChannel_toMaster_outstanding_writes$write_1__SEL_2;
 
+  // declarations used by system tasks
+  // synopsys translate_off
+  reg [63 : 0] v__h252397;
+  reg [63 : 0] v__h4021;
+  // synopsys translate_on
+
   // remaining internal signals
-  reg [63 : 0] v__h252397, v__h4021;
   reg [7 : 0] CASE_x80860_0_blueDMA_readChannel_mimo_impl_in_ETC__q10,
 	      CASE_x80860_0_blueDMA_readChannel_mimo_impl_in_ETC__q11,
 	      CASE_x80860_0_blueDMA_readChannel_mimo_impl_in_ETC__q12,
@@ -2683,23 +2688,23 @@ module mkBlueDMAVivado(m32_axi_aclk,
 		bytes_first__h249536,
 		bytes_first__h253584,
 		bytes_first__h5208,
-		v__h1078556,
-		v__h1078699,
-		v__h1078842,
-		v__h1078986,
-		v__h1079130,
-		v__h1079273,
-		v__h1079417,
-		v__h1079561,
+		v__h1078688,
+		v__h1078831,
+		v__h1078974,
+		v__h1079118,
+		v__h1079262,
+		v__h1079405,
+		v__h1079549,
+		v__h1079693,
 		x__h1141,
 		x__h249542,
 		x__h253590,
 		x__h5214,
 		x_strb__h9132;
-  wire [31 : 0] _theResult____h1313,
-		_theResult____h249714,
-		_theResult____h253762,
-		_theResult____h5386,
+  wire [31 : 0] _theResult____h1314,
+		_theResult____h249715,
+		_theResult____h253763,
+		_theResult____h5387,
 		b__h1038262,
 		b__h122383,
 		b__h177348,
@@ -2719,40 +2724,40 @@ module mkBlueDMAVivado(m32_axi_aclk,
 		blueDMA_writeChannel_mimo_impl_cmdsInD_OUT_BI_ETC__q82,
 		blueDMA_writeChannel_mimo_impl_cmdsInD_OUT_BI_ETC__q83,
 		blueDMA_writeChannel_toMaster_reqGen_incomingB_ETC__q81,
-		transfers_total___1__h1321,
-		transfers_total___1__h249722,
-		transfers_total___1__h253770,
-		transfers_total___1__h5394,
-		transfers_total__h1312,
-		transfers_total__h1318,
-		transfers_total__h249713,
-		transfers_total__h249719,
-		transfers_total__h253761,
-		transfers_total__h253767,
-		transfers_total__h5385,
-		transfers_total__h5391,
+		transfers_total___1__h1322,
+		transfers_total___1__h249723,
+		transfers_total___1__h253771,
+		transfers_total___1__h5395,
+		transfers_total__h1313,
+		transfers_total__h1319,
+		transfers_total__h249714,
+		transfers_total__h249720,
+		transfers_total__h253762,
+		transfers_total__h253768,
+		transfers_total__h5386,
+		transfers_total__h5392,
 		value__h879002,
-		x__h1315,
-		x__h1341,
-		x__h249716,
-		x__h249742,
-		x__h253764,
-		x__h253790,
-		x__h5388,
-		x__h5414,
+		x__h1316,
+		x__h1342,
+		x__h249717,
+		x__h249743,
+		x__h253765,
+		x__h253791,
+		x__h5389,
+		x__h5415,
 		x_strb__h257505,
 		y__h1208,
-		y__h1342,
-		y__h1344,
+		y__h1343,
+		y__h1345,
 		y__h249609,
-		y__h249743,
-		y__h249745,
+		y__h249744,
+		y__h249746,
 		y__h253657,
-		y__h253791,
-		y__h253793,
+		y__h253792,
+		y__h253794,
 		y__h5281,
-		y__h5415,
-		y__h5417;
+		y__h5416,
+		y__h5418;
   wire [26 : 0] _theResult____h1664,
 		_theResult____h254113,
 		blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d9364,
@@ -2973,9 +2978,9 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       x__h280860;
   wire [5 : 0] IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d9508,
 	       b__h1022259,
-	       b__h1051513,
+	       b__h1051515,
 	       b__h106380,
-	       b__h135648,
+	       b__h135650,
 	       blueDMA_readChannel_byteAlignerFrom_addr_ffdD_ETC__q76,
 	       blueDMA_writeChannel_byteAlignerTo_addr_ffdD__ETC__q79,
 	       endByte___1__h259006,
@@ -4928,7 +4933,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign MUX_blueDMA_readChannel_byteAlignerTo_bytes_out$write_1__VAL_2 =
 	     blueDMA_readChannel_byteAlignerTo_bytes_out + 32'd256 ;
   assign MUX_blueDMA_readChannel_byteAlignerTo_bytes_out_needed$write_1__VAL_1 =
-	     6'd32 - b__h1051513 ;
+	     6'd32 - b__h1051515 ;
   assign MUX_blueDMA_readChannel_fromMaster_task_data_output_reg$write_1__VAL_1 =
 	     { blueDMA_readChannel_fromMaster_task_data_output_reg[44:33],
 	       x_transfers_total__h252686,
@@ -4987,21 +4992,21 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_4 =
 	     { blueDMA_transfer_length, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_5 =
-	     { v__h1078556, 2'd0 } ;
+	     { v__h1078688, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_6 =
-	     { v__h1078699, 2'd0 } ;
+	     { v__h1078831, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_7 =
-	     { v__h1078842, 2'd0 } ;
+	     { v__h1078974, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_8 =
-	     { v__h1078986, 2'd0 } ;
+	     { v__h1079118, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_9 =
-	     { v__h1079130, 2'd0 } ;
+	     { v__h1079262, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_10 =
-	     { v__h1079273, 2'd0 } ;
+	     { v__h1079405, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_11 =
-	     { v__h1079417, 2'd0 } ;
+	     { v__h1079549, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_12 =
-	     { v__h1079561, 2'd0 } ;
+	     { v__h1079693, 2'd0 } ;
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_buffer$port0__write_1__VAL_1 =
 	     { 256'd0,
 	       blueDMA_writeChannel_byteAlignerFrom_buffer[511:256] } ;
@@ -5015,7 +5020,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_bytes_out$write_1__VAL_2 =
 	     blueDMA_writeChannel_byteAlignerFrom_bytes_out + 32'd256 ;
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_bytes_out_needed$write_1__VAL_1 =
-	     6'd32 - b__h135648 ;
+	     6'd32 - b__h135650 ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_buffer$port0__write_1__VAL_1 =
 	     { 512'd0, blueDMA_writeChannel_byteAlignerTo_buffer[1023:512] } ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_bytes_in$write_1__VAL_1 =
@@ -6660,15 +6665,12 @@ module mkBlueDMAVivado(m32_axi_aclk,
 
   // submodule blueDMA_cmdsIn
   assign blueDMA_cmdsIn$D_IN =
-	     blueDMA_s_config_writeSlave_in$D_OUT[74:11] !=
-	     64'h0000000010001000 ;
+	     blueDMA_s_config_writeSlave_in$D_OUT[42:11] != 32'h10001000 ;
   assign blueDMA_cmdsIn$ENQ =
 	     WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
-	     blueDMA_s_config_writeSlave_in$D_OUT[10:3] == 8'd255 &&
-	     (blueDMA_s_config_writeSlave_in$D_OUT[74:11] ==
-	      64'h0000000010001000 ||
-	      blueDMA_s_config_writeSlave_in$D_OUT[74:11] ==
-	      64'h0000000010000001) ;
+	     blueDMA_s_config_writeSlave_in$D_OUT[6:3] == 4'd15 &&
+	     (blueDMA_s_config_writeSlave_in$D_OUT[42:11] == 32'h10001000 ||
+	      blueDMA_s_config_writeSlave_in$D_OUT[42:11] == 32'h10000001) ;
   assign blueDMA_cmdsIn$DEQ =
 	     blueDMA_cmdsIn$EMPTY_N && blueDMA_writeChannel_cmdIn$FULL_N &&
 	     blueDMA_cmdsIn$D_OUT ||
@@ -6835,7 +6837,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:100],
-	       x__h249716[25:0],
+	       x__h249717[25:0],
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -7020,7 +7022,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[109:100],
-	       x__h253764[26:0],
+	       x__h253765[26:0],
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -7359,7 +7361,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2
   assign blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[109:100],
-	       x__h1315[26:0],
+	       x__h1316[26:0],
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -7544,7 +7546,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2
   assign blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:100],
-	       x__h5388[25:0],
+	       x__h5389[25:0],
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -7901,11 +7903,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      5'd0) ?
 	       bytes_first__h1135 :
 	       bytes_first___1__h1167 ;
-  assign _theResult____h1313 =
+  assign _theResult____h1314 =
 	     (blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[109:105] ==
 	      5'd0) ?
-	       transfers_total__h1312 :
-	       transfers_total___1__h1321 ;
+	       transfers_total__h1313 :
+	       transfers_total___1__h1322 ;
   assign _theResult____h1664 =
 	     (blueDMA_writeChannel_fromMaster_reqGen_interme_ETC___d75[6:0] ==
 	      7'd0) ?
@@ -7916,11 +7918,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      6'd0) ?
 	       bytes_first__h249536 :
 	       bytes_first___1__h249568 ;
-  assign _theResult____h249714 =
+  assign _theResult____h249715 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:106] ==
 	      6'd0) ?
-	       transfers_total__h249713 :
-	       transfers_total___1__h249722 ;
+	       transfers_total__h249714 :
+	       transfers_total___1__h249723 ;
   assign _theResult____h250065 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermed_ETC___d9171[5:0] ==
 	      6'd0) ?
@@ -7931,11 +7933,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      5'd0) ?
 	       bytes_first__h253584 :
 	       bytes_first___1__h253616 ;
-  assign _theResult____h253762 =
+  assign _theResult____h253763 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[109:105] ==
 	      5'd0) ?
-	       transfers_total__h253761 :
-	       transfers_total___1__h253770 ;
+	       transfers_total__h253762 :
+	       transfers_total___1__h253771 ;
   assign _theResult____h254113 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d9364[6:0] ==
 	      7'd0) ?
@@ -7946,11 +7948,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      6'd0) ?
 	       bytes_first__h5208 :
 	       bytes_first___1__h5240 ;
-  assign _theResult____h5386 =
+  assign _theResult____h5387 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:106] ==
 	      6'd0) ?
-	       transfers_total__h5385 :
-	       transfers_total___1__h5394 ;
+	       transfers_total__h5386 :
+	       transfers_total___1__h5395 ;
   assign _theResult____h5737 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermedi_ETC___d268[5:0] ==
 	      6'd0) ?
@@ -7981,7 +7983,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer ;
   assign b__h1038262 =
 	     { 26'd0, blueDMA_readChannel_byteAlignerTo_bytes_out_needed } ;
-  assign b__h1051513 =
+  assign b__h1051515 =
 	     { 1'd0,
 	       blueDMA_readChannel_byteAlignerTo_addr_ff$dD_OUT[36:32] } ;
   assign b__h106380 =
@@ -7991,7 +7993,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign b__h122383 =
 	     { 26'd0,
 	       blueDMA_writeChannel_byteAlignerFrom_bytes_out_needed } ;
-  assign b__h135648 =
+  assign b__h135650 =
 	     { 1'd0,
 	       blueDMA_writeChannel_byteAlignerFrom_addr_ff$dD_OUT[36:32] } ;
   assign b__h177348 =
@@ -8527,28 +8529,28 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign startByte___1__h259005 =
 	     { 1'd0,
 	       blueDMA_readChannel_toMaster_task_data_output_reg[5:1] } ;
-  assign transfers_total___1__h1321 = transfers_total__h1312 + 32'd1 ;
-  assign transfers_total___1__h249722 = transfers_total__h249713 + 32'd1 ;
-  assign transfers_total___1__h253770 = transfers_total__h253761 + 32'd1 ;
-  assign transfers_total___1__h5394 = transfers_total__h5385 + 32'd1 ;
-  assign transfers_total__h1312 = (x__h1341 - y__h1342) >> 5 ;
-  assign transfers_total__h1318 = _theResult____h1313 + 32'd1 ;
-  assign transfers_total__h249713 = (x__h249742 - y__h249743) >> 6 ;
-  assign transfers_total__h249719 = _theResult____h249714 + 32'd1 ;
-  assign transfers_total__h253761 = (x__h253790 - y__h253791) >> 5 ;
-  assign transfers_total__h253767 = _theResult____h253762 + 32'd1 ;
-  assign transfers_total__h5385 = (x__h5414 - y__h5415) >> 6 ;
-  assign transfers_total__h5391 = _theResult____h5386 + 32'd1 ;
-  assign v__h1078556 = { 32'd0, blueDMA_readChannel_total_requests_reg } ;
-  assign v__h1078699 = { 32'd0, blueDMA_writeChannel_total_requests_reg } ;
-  assign v__h1078842 = { 32'd0, blueDMA_readChannel_perf_cycleCounterCur } ;
-  assign v__h1078986 =
+  assign transfers_total___1__h1322 = transfers_total__h1313 + 32'd1 ;
+  assign transfers_total___1__h249723 = transfers_total__h249714 + 32'd1 ;
+  assign transfers_total___1__h253771 = transfers_total__h253762 + 32'd1 ;
+  assign transfers_total___1__h5395 = transfers_total__h5386 + 32'd1 ;
+  assign transfers_total__h1313 = (x__h1342 - y__h1343) >> 5 ;
+  assign transfers_total__h1319 = _theResult____h1314 + 32'd1 ;
+  assign transfers_total__h249714 = (x__h249743 - y__h249744) >> 6 ;
+  assign transfers_total__h249720 = _theResult____h249715 + 32'd1 ;
+  assign transfers_total__h253762 = (x__h253791 - y__h253792) >> 5 ;
+  assign transfers_total__h253768 = _theResult____h253763 + 32'd1 ;
+  assign transfers_total__h5386 = (x__h5415 - y__h5416) >> 6 ;
+  assign transfers_total__h5392 = _theResult____h5387 + 32'd1 ;
+  assign v__h1078688 = { 32'd0, blueDMA_readChannel_total_requests_reg } ;
+  assign v__h1078831 = { 32'd0, blueDMA_writeChannel_total_requests_reg } ;
+  assign v__h1078974 = { 32'd0, blueDMA_readChannel_perf_cycleCounterCur } ;
+  assign v__h1079118 =
 	     { 32'd0, blueDMA_readChannel_perf_cycleCounterInterval } ;
-  assign v__h1079130 = { 52'd0, blueDMA_readChannel_perf_intervalSet } ;
-  assign v__h1079273 = { 32'd0, blueDMA_writeChannel_perf_cycleCounterCur } ;
-  assign v__h1079417 =
+  assign v__h1079262 = { 52'd0, blueDMA_readChannel_perf_intervalSet } ;
+  assign v__h1079405 = { 32'd0, blueDMA_writeChannel_perf_cycleCounterCur } ;
+  assign v__h1079549 =
 	     { 32'd0, blueDMA_writeChannel_perf_cycleCounterInterval } ;
-  assign v__h1079561 = { 52'd0, blueDMA_writeChannel_perf_intervalSet } ;
+  assign v__h1079693 = { 52'd0, blueDMA_writeChannel_perf_intervalSet } ;
   assign value__h879002 =
 	     { blueDMA_readChannel_mimo_impl_cmdsInD_OUT_BIT_ETC__q1[26:0],
 	       5'd0 } >>
@@ -8569,14 +8571,14 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      6'd0) ?
 	       startByte___1__h12040 :
 	       7'd0 ;
-  assign x__h1315 =
+  assign x__h1316 =
 	     (blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[104:100] ==
 	      5'd0) ?
-	       _theResult____h1313 :
-	       transfers_total__h1318 ;
-  assign x__h1341 =
+	       _theResult____h1314 :
+	       transfers_total__h1319 ;
+  assign x__h1342 =
 	     blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h1344 ;
+	     y__h1345 ;
   assign x__h148537 =
 	     { blueDMA_writeChannel_byteAlignerTo_addr_1_alignment, 5'd1 } ;
   assign x__h148737 =
@@ -8752,14 +8754,14 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       { 32'd0,
 		 blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[35:4] } :
 	       _theResult____h249537 ;
-  assign x__h249716 =
+  assign x__h249717 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[105:100] ==
 	      6'd0) ?
-	       _theResult____h249714 :
-	       transfers_total__h249719 ;
-  assign x__h249742 =
+	       _theResult____h249715 :
+	       transfers_total__h249720 ;
+  assign x__h249743 =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h249745 ;
+	     y__h249746 ;
   assign x__h249943 =
 	     13'd4096 -
 	     { 1'd0,
@@ -8783,14 +8785,14 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       { 32'd0,
 		 blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] } :
 	       _theResult____h253585 ;
-  assign x__h253764 =
+  assign x__h253765 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[104:100] ==
 	      5'd0) ?
-	       _theResult____h253762 :
-	       transfers_total__h253767 ;
-  assign x__h253790 =
+	       _theResult____h253763 :
+	       transfers_total__h253768 ;
+  assign x__h253791 =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h253793 ;
+	     y__h253794 ;
   assign x__h253991 =
 	     13'd4096 -
 	     { 1'd0,
@@ -8838,14 +8840,14 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       { 32'd0,
 		 blueDMA_writeChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] } :
 	       _theResult____h5209 ;
-  assign x__h5388 =
+  assign x__h5389 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[105:100] ==
 	      6'd0) ?
-	       _theResult____h5386 :
-	       transfers_total__h5391 ;
-  assign x__h5414 =
+	       _theResult____h5387 :
+	       transfers_total__h5392 ;
+  assign x__h5415 =
 	     blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h5417 ;
+	     y__h5418 ;
   assign x__h5615 =
 	     13'd4096 -
 	     { 1'd0,
@@ -9343,34 +9345,34 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_writeChannel_fromMaster_task_data_output_reg[32:6] -
 	     27'd1 ;
   assign y__h1208 = { 27'd0, x__h1141[4:0] } ;
-  assign y__h1342 =
+  assign y__h1343 =
 	     { 27'd0,
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[104:100] } ;
-  assign y__h1344 =
+  assign y__h1345 =
 	     { 27'd0,
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[109:105] } ;
   assign y__h1509 = { burst_length__h1486[6:0], 5'd0 } ;
   assign y__h249609 = { 26'd0, x__h249542[5:0] } ;
-  assign y__h249743 =
+  assign y__h249744 =
 	     { 26'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[105:100] } ;
-  assign y__h249745 =
+  assign y__h249746 =
 	     { 26'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:106] } ;
   assign y__h249910 = { burst_length__h249887[5:0], 6'd0 } ;
   assign y__h253657 = { 27'd0, x__h253590[4:0] } ;
-  assign y__h253791 =
+  assign y__h253792 =
 	     { 27'd0,
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[104:100] } ;
-  assign y__h253793 =
+  assign y__h253794 =
 	     { 27'd0,
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[109:105] } ;
   assign y__h253958 = { burst_length__h253935[6:0], 5'd0 } ;
   assign y__h5281 = { 26'd0, x__h5214[5:0] } ;
-  assign y__h5415 =
+  assign y__h5416 =
 	     { 26'd0,
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[105:100] } ;
-  assign y__h5417 =
+  assign y__h5418 =
 	     { 26'd0,
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:106] } ;
   assign y__h5582 = { burst_length__h5559[5:0], 6'd0 } ;
@@ -114533,7 +114535,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1] and\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1] and\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_2 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_2) &&
@@ -114555,7 +114557,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2] and\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2] and\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_3 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_3) &&
@@ -114575,7 +114577,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3] and\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3] and\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_4 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_4) &&
@@ -114593,7 +114595,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4] and\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4] and\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_5 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_5) &&
@@ -114609,7 +114611,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5] and\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5] and\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_8 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_8) &&
@@ -114619,7 +114621,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8] and\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8] and\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_6 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_6) &&
@@ -114633,7 +114635,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6] and\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6] and\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_9 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_9) &&
@@ -114641,7 +114643,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9] and\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9] and\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_7 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_7) &&
@@ -114653,13 +114655,13 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7] and\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7] and\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10) &&
 	  (WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10] and\n  [RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10] and\n  [RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled) &&
@@ -114685,7 +114687,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled] and\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled] and\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled ||
@@ -114712,322 +114714,322 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11) &&
 	  WILL_FIRE_RL_blueDMA_s_config_axiReadFallback)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled,\n  RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] and\n  [RL_blueDMA_s_config_axiReadFallback] ) fired in the same clock cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled,\n  RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] and\n  [RL_blueDMA_s_config_axiReadFallback] ) fired in the same clock cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
   end
   // synopsys translate_on
 
diff --git a/toolflow/vivado/common/ip/BlueDMA_512_512_64/component.xml b/toolflow/vivado/common/ip/BlueDMA_512_512_64/component.xml
index 7a192d99..38f475cd 100644
--- a/toolflow/vivado/common/ip/BlueDMA_512_512_64/component.xml
+++ b/toolflow/vivado/common/ip/BlueDMA_512_512_64/component.xml
@@ -1022,7 +1022,7 @@
         <spirit:parameters>
           <spirit:parameter>
             <spirit:name>viewChecksum</spirit:name>
-            <spirit:value>ace03ee8</spirit:value>
+            <spirit:value>c67810b3</spirit:value>
           </spirit:parameter>
         </spirit:parameters>
       </spirit:view>
@@ -1038,7 +1038,7 @@
         <spirit:parameters>
           <spirit:parameter>
             <spirit:name>viewChecksum</spirit:name>
-            <spirit:value>d4f0b7fd</spirit:value>
+            <spirit:value>ec52ca9d</spirit:value>
           </spirit:parameter>
         </spirit:parameters>
       </spirit:view>
@@ -2777,7 +2777,7 @@
       <spirit:file>
         <spirit:name>src/mkBlueDMAVivado.v</spirit:name>
         <spirit:fileType>verilogSource</spirit:fileType>
-        <spirit:userFileType>CHECKSUM_5a445cb8</spirit:userFileType>
+        <spirit:userFileType>CHECKSUM_4bfd30db</spirit:userFileType>
       </spirit:file>
     </spirit:fileSet>
     <spirit:fileSet>
@@ -2852,6 +2852,7 @@
         <xilinx:family xilinx:lifeCycle="Pre-Production">spartan7</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexu</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplushbm</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexuplus</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexu</xilinx:family>
       </xilinx:supportedFamilies>
@@ -2861,7 +2862,7 @@
       <xilinx:displayName>BlueDMA_512_512_64</xilinx:displayName>
       <xilinx:definitionSource>package_project</xilinx:definitionSource>
       <xilinx:coreRevision>1</xilinx:coreRevision>
-      <xilinx:coreCreationDateTime>2019-02-05T14:30:01Z</xilinx:coreCreationDateTime>
+      <xilinx:coreCreationDateTime>2019-05-30T13:25:43Z</xilinx:coreCreationDateTime>
       <xilinx:tags>
         <xilinx:tag xilinx:name="nopcore"/>
       </xilinx:tags>
@@ -2871,7 +2872,7 @@
       <xilinx:checksum xilinx:scope="busInterfaces" xilinx:value="4a980b8b"/>
       <xilinx:checksum xilinx:scope="addressSpaces" xilinx:value="2ab1796e"/>
       <xilinx:checksum xilinx:scope="memoryMaps" xilinx:value="6362e295"/>
-      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="2bbfe8f6"/>
+      <xilinx:checksum xilinx:scope="fileGroups" xilinx:value="1030287d"/>
       <xilinx:checksum xilinx:scope="ports" xilinx:value="5b266965"/>
       <xilinx:checksum xilinx:scope="parameters" xilinx:value="ce7bf2c3"/>
     </xilinx:packagingInfo>
diff --git a/toolflow/vivado/common/ip/BlueDMA_512_512_64/src/mkBlueDMAVivado.v b/toolflow/vivado/common/ip/BlueDMA_512_512_64/src/mkBlueDMAVivado.v
index 9e96af7a..58cf6b4f 100644
--- a/toolflow/vivado/common/ip/BlueDMA_512_512_64/src/mkBlueDMAVivado.v
+++ b/toolflow/vivado/common/ip/BlueDMA_512_512_64/src/mkBlueDMAVivado.v
@@ -1,7 +1,7 @@
 //
-// Generated by Bluespec Compiler, version 2017.07.A (build 1da80f1, 2017-07-21)
+// Generated by Bluespec Compiler, version 2018.10.beta1 (build e1df8052c, 2018-10-17)
 //
-// On Tue Feb  5 15:29:39 CET 2019
+// On Thu May 30 15:25:21 CEST 2019
 //
 //
 // Ports:
@@ -1860,181 +1860,186 @@ module mkBlueDMAVivado(m32_axi_aclk,
        MUX_blueDMA_writeChannel_mimo_words_left$write_1__SEL_2,
        MUX_blueDMA_writeChannel_toMaster_outstanding_writes$write_1__SEL_2;
 
+  // declarations used by system tasks
+  // synopsys translate_off
+  reg [63 : 0] v__h198068;
+  reg [63 : 0] v__h4016;
+  // synopsys translate_on
+
   // remaining internal signals
-  reg [63 : 0] v__h198067, v__h4016;
   reg [3 : 0] CASE_blueDMA_readChannel_fromMaster_master_rd__ETC__q3,
 	      CASE_blueDMA_readChannel_toMaster_master_wr_wa_ETC__q4,
 	      CASE_blueDMA_writeChannel_fromMaster_master_rd_ETC__q1,
 	      CASE_blueDMA_writeChannel_toMaster_master_wr_w_ETC__q2;
   wire [63 : 0] _theResult____h1131,
-		_theResult____h195207,
-		_theResult____h199255,
+		_theResult____h195208,
+		_theResult____h199256,
 		_theResult____h5204,
 		bytes_first___1__h1162,
-		bytes_first___1__h195238,
-		bytes_first___1__h199286,
+		bytes_first___1__h195239,
+		bytes_first___1__h199287,
 		bytes_first___1__h5235,
 		bytes_first__h1130,
-		bytes_first__h195206,
-		bytes_first__h199254,
+		bytes_first__h195207,
+		bytes_first__h199255,
 		bytes_first__h5203,
-		v__h401740,
-		v__h401883,
-		v__h402026,
-		v__h402170,
-		v__h402314,
-		v__h402457,
-		v__h402601,
-		v__h402745,
+		v__h401874,
+		v__h402017,
+		v__h402160,
+		v__h402304,
+		v__h402448,
+		v__h402591,
+		v__h402735,
+		v__h402879,
 		x__h1136,
-		x__h195212,
-		x__h199260,
+		x__h195213,
+		x__h199261,
 		x__h5209,
-		x_strb__h203175,
+		x_strb__h203176,
 		x_strb__h9127;
   wire [31 : 0] IF_blueDMA_readChannel_mimoConv_ff_first__644__ETC___d1650,
 		IF_blueDMA_writeChannel_mimoConv_ff_first__31__ETC___d737,
-		_theResult____h1308,
-		_theResult____h195384,
-		_theResult____h199432,
-		_theResult____h5381,
-		b__h166757,
-		b__h275046,
-		b__h360805,
-		b__h80998,
+		_theResult____h1309,
+		_theResult____h195386,
+		_theResult____h199434,
+		_theResult____h5382,
+		b__h166758,
+		b__h275048,
+		b__h360807,
+		b__h80999,
 		blueDMA_readChannel_fromMaster_reqGen_incoming_ETC__q5,
 		blueDMA_readChannel_toMaster_reqGen_incomingBu_ETC__q6,
 		blueDMA_writeChannel_fromMaster_reqGen_incomin_ETC__q7,
 		blueDMA_writeChannel_toMaster_reqGen_incomingB_ETC__q8,
-		transfers_total___1__h1316,
-		transfers_total___1__h195392,
-		transfers_total___1__h199440,
-		transfers_total___1__h5389,
-		transfers_total__h1307,
-		transfers_total__h1313,
-		transfers_total__h195383,
-		transfers_total__h195389,
-		transfers_total__h199431,
-		transfers_total__h199437,
-		transfers_total__h5380,
-		transfers_total__h5386,
-		x__h1310,
-		x__h1336,
-		x__h195386,
-		x__h195412,
-		x__h199434,
-		x__h199460,
-		x__h5383,
-		x__h5409,
+		transfers_total___1__h1317,
+		transfers_total___1__h195394,
+		transfers_total___1__h199442,
+		transfers_total___1__h5390,
+		transfers_total__h1308,
+		transfers_total__h1314,
+		transfers_total__h195385,
+		transfers_total__h195391,
+		transfers_total__h199433,
+		transfers_total__h199439,
+		transfers_total__h5381,
+		transfers_total__h5387,
+		x__h1311,
+		x__h1337,
+		x__h195388,
+		x__h195414,
+		x__h199436,
+		x__h199462,
+		x__h5384,
+		x__h5410,
 		y__h1203,
-		y__h1337,
-		y__h1339,
-		y__h195279,
-		y__h195413,
+		y__h1338,
+		y__h1340,
+		y__h195280,
 		y__h195415,
-		y__h199327,
-		y__h199461,
+		y__h195417,
+		y__h199328,
 		y__h199463,
+		y__h199465,
 		y__h5276,
-		y__h5410,
-		y__h5412;
+		y__h5411,
+		y__h5413;
   wire [25 : 0] _theResult____h1659,
-		_theResult____h195735,
-		_theResult____h199783,
+		_theResult____h195736,
+		_theResult____h199784,
 		_theResult____h5732,
 		blueDMA_readChannel_fromMaster_reqGen_intermed_ETC___d988,
 		blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d1181,
 		blueDMA_writeChannel_fromMaster_reqGen_interme_ETC___d75,
 		blueDMA_writeChannel_toMaster_reqGen_intermedi_ETC___d268,
 		request_data_requests_total__h1626,
-		request_data_requests_total__h195702,
-		request_data_requests_total__h199750,
+		request_data_requests_total__h195703,
+		request_data_requests_total__h199751,
 		request_data_requests_total__h5699,
 		requests_total___1__h1666,
-		requests_total___1__h195742,
-		requests_total___1__h199790,
+		requests_total___1__h195743,
+		requests_total___1__h199791,
 		requests_total___1__h5739,
 		requests_total__h1579,
 		requests_total__h1663,
-		requests_total__h195655,
-		requests_total__h195739,
-		requests_total__h199703,
-		requests_total__h199787,
+		requests_total__h195656,
+		requests_total__h195740,
+		requests_total__h199704,
+		requests_total__h199788,
 		requests_total__h5652,
 		requests_total__h5736,
-		x_requests_total__h198021,
-		x_requests_total__h202793,
+		x_requests_total__h198022,
+		x_requests_total__h202794,
 		x_requests_total__h3970,
 		x_requests_total__h8745,
-		x_transfers_total__h198356,
+		x_transfers_total__h198357,
 		x_transfers_total__h20045,
-		x_transfers_total__h214093,
+		x_transfers_total__h214094,
 		x_transfers_total__h4305;
-  wire [20 : 0] x_address_dynamic__h198023,
-		x_address_dynamic__h202795,
+  wire [20 : 0] x_address_dynamic__h198024,
+		x_address_dynamic__h202796,
 		x_address_dynamic__h3972,
 		x_address_dynamic__h8747;
-  wire [12 : 0] x__h1537, x__h195613, x__h199661, x__h5610;
+  wire [12 : 0] x__h1537, x__h195614, x__h199662, x__h5610;
   wire [11 : 0] addr_last__h1483,
 		addr_last__h1484,
-		addr_last__h195559,
 		addr_last__h195560,
-		addr_last__h199607,
+		addr_last__h195561,
 		addr_last__h199608,
+		addr_last__h199609,
 		addr_last__h5556,
 		addr_last__h5557,
 		barrier_transfers__h1527,
-		barrier_transfers__h195603,
-		barrier_transfers__h199651,
+		barrier_transfers__h195604,
+		barrier_transfers__h199652,
 		barrier_transfers__h5600,
 		y__h1504,
-		y__h195580,
-		y__h199628,
+		y__h195581,
+		y__h199629,
 		y__h5577;
   wire [8 : 0] burst_length__h1481,
-	       burst_length__h195557,
-	       burst_length__h199605,
+	       burst_length__h195558,
+	       burst_length__h199606,
 	       burst_length__h5554,
 	       requests_first__h1412,
-	       requests_first__h195488,
-	       requests_first__h199536,
+	       requests_first__h195489,
+	       requests_first__h199537,
 	       requests_first__h5485,
 	       x__h1652,
-	       x__h195728,
-	       x__h197937,
-	       x__h197947,
-	       x__h199776,
-	       x__h202680,
-	       x__h202690,
+	       x__h195729,
+	       x__h197938,
+	       x__h197948,
+	       x__h199777,
+	       x__h202681,
+	       x__h202691,
 	       x__h3886,
 	       x__h3896,
 	       x__h5725,
 	       x__h8632,
 	       x__h8642;
-  wire [7 : 0] _theResult_____2__h197885,
+  wire [7 : 0] _theResult_____2__h197886,
 	       _theResult_____2__h3834,
-	       _theResult_____3__h202628,
+	       _theResult_____3__h202629,
 	       _theResult_____3__h8580,
-	       beatsThisRequestCntrT__h203061,
+	       beatsThisRequestCntrT__h203062,
 	       beatsThisRequestCntrT__h9013;
   wire [6 : 0] IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325,
 	       IF_blueDMA_writeChannel_toMaster_task_data_out_ETC___d412,
-	       b__h106807,
-	       b__h135394,
-	       b__h192552,
-	       b__h243683,
-	       b__h300855,
-	       b__h329442,
-	       b__h386600,
-	       b__h49635,
+	       b__h106810,
+	       b__h135395,
+	       b__h192555,
+	       b__h243685,
+	       b__h300859,
+	       b__h329444,
+	       b__h386604,
+	       b__h49636,
 	       endByte___1__h12036,
 	       endByte___1__h12062,
-	       endByte___1__h206084,
-	       endByte___1__h206110,
+	       endByte___1__h206085,
+	       endByte___1__h206111,
 	       startByte___1__h12035,
-	       startByte___1__h206083,
+	       startByte___1__h206084,
 	       x__h12022,
-	       x__h206070;
+	       x__h206071;
   wire blueDMA_readChannel_byteAlignerFrom_bytes_in_6_ETC___d1663,
        blueDMA_readChannel_byteAlignerFrom_bytes_left_ETC___d1678,
        blueDMA_readChannel_byteAlignerTo_bytes_in_718_ETC___d1720,
@@ -3769,11 +3774,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer -
 	     blueDMA_readChannel_byteAlignerFrom_bytes_out_needed ;
   assign MUX_blueDMA_readChannel_byteAlignerFrom_bytes_out$write_1__VAL_1 =
-	     blueDMA_readChannel_byteAlignerFrom_bytes_out + b__h275046 ;
+	     blueDMA_readChannel_byteAlignerFrom_bytes_out + b__h275048 ;
   assign MUX_blueDMA_readChannel_byteAlignerFrom_bytes_out$write_1__VAL_2 =
 	     blueDMA_readChannel_byteAlignerFrom_bytes_out + 32'd512 ;
   assign MUX_blueDMA_readChannel_byteAlignerFrom_bytes_out_needed$write_1__VAL_1 =
-	     7'd64 - b__h300855 ;
+	     7'd64 - b__h300859 ;
   assign MUX_blueDMA_readChannel_byteAlignerTo_buffer$port0__write_1__VAL_1 =
 	     { 512'd0, blueDMA_readChannel_byteAlignerTo_buffer[1023:512] } ;
   assign MUX_blueDMA_readChannel_byteAlignerTo_bytes_in$write_1__VAL_1 =
@@ -3782,20 +3787,20 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer -
 	     blueDMA_readChannel_byteAlignerTo_bytes_out_needed ;
   assign MUX_blueDMA_readChannel_byteAlignerTo_bytes_out$write_1__VAL_1 =
-	     blueDMA_readChannel_byteAlignerTo_bytes_out + b__h360805 ;
+	     blueDMA_readChannel_byteAlignerTo_bytes_out + b__h360807 ;
   assign MUX_blueDMA_readChannel_byteAlignerTo_bytes_out$write_1__VAL_2 =
 	     blueDMA_readChannel_byteAlignerTo_bytes_out + 32'd512 ;
   assign MUX_blueDMA_readChannel_byteAlignerTo_bytes_out_needed$write_1__VAL_1 =
-	     7'd64 - b__h386600 ;
+	     7'd64 - b__h386604 ;
   assign MUX_blueDMA_readChannel_fromMaster_task_data_output_reg$write_1__VAL_1 =
 	     { blueDMA_readChannel_fromMaster_task_data_output_reg[44:33],
-	       x_transfers_total__h198356,
+	       x_transfers_total__h198357,
 	       blueDMA_readChannel_fromMaster_task_data_output_reg[6:0] } ;
   assign MUX_blueDMA_readChannel_fromMaster_task_data_requests_reg$write_1__VAL_1 =
 	     { blueDMA_readChannel_fromMaster_task_data_requests_reg[112:95],
-	       x_requests_total__h198021,
+	       x_requests_total__h198022,
 	       blueDMA_readChannel_fromMaster_task_data_requests_reg[68:38],
-	       x_address_dynamic__h198023,
+	       x_address_dynamic__h198024,
 	       12'd0,
 	       blueDMA_readChannel_fromMaster_task_data_requests_reg[4:1],
 	       1'd0 } ;
@@ -3804,21 +3809,21 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign MUX_blueDMA_readChannel_toMaster_beatsThisRequestCntr$write_1__VAL_1 =
 	     blueDMA_readChannel_toMaster_beatsThisRequestC_ETC___d1304 ?
 	       8'd0 :
-	       beatsThisRequestCntrT__h203061 ;
+	       beatsThisRequestCntrT__h203062 ;
   assign MUX_blueDMA_readChannel_toMaster_outstanding_writes$write_1__VAL_1 =
 	     blueDMA_readChannel_toMaster_outstanding_writes + 8'd1 ;
   assign MUX_blueDMA_readChannel_toMaster_outstanding_writes$write_1__VAL_2 =
 	     blueDMA_readChannel_toMaster_outstanding_writes - 8'd1 ;
   assign MUX_blueDMA_readChannel_toMaster_task_data_output_reg$write_1__VAL_1 =
 	     { blueDMA_readChannel_toMaster_task_data_output_reg[44:33],
-	       x_transfers_total__h214093,
+	       x_transfers_total__h214094,
 	       blueDMA_readChannel_toMaster_task_data_output_reg[6:1],
 	       1'd0 } ;
   assign MUX_blueDMA_readChannel_toMaster_task_data_requests_reg$write_1__VAL_1 =
 	     { blueDMA_readChannel_toMaster_task_data_requests_reg[112:95],
-	       x_requests_total__h202793,
+	       x_requests_total__h202794,
 	       blueDMA_readChannel_toMaster_task_data_requests_reg[68:38],
-	       x_address_dynamic__h202795,
+	       x_address_dynamic__h202796,
 	       12'd0,
 	       blueDMA_readChannel_toMaster_task_data_requests_reg[4:1],
 	       1'd0 } ;
@@ -3831,21 +3836,21 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_4 =
 	     { blueDMA_transfer_length, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_5 =
-	     { v__h401740, 2'd0 } ;
+	     { v__h401874, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_6 =
-	     { v__h401883, 2'd0 } ;
+	     { v__h402017, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_7 =
-	     { v__h402026, 2'd0 } ;
+	     { v__h402160, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_8 =
-	     { v__h402170, 2'd0 } ;
+	     { v__h402304, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_9 =
-	     { v__h402314, 2'd0 } ;
+	     { v__h402448, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_10 =
-	     { v__h402457, 2'd0 } ;
+	     { v__h402591, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_11 =
-	     { v__h402601, 2'd0 } ;
+	     { v__h402735, 2'd0 } ;
   assign MUX_blueDMA_s_config_readSlave_out$enq_1__VAL_12 =
-	     { v__h402745, 2'd0 } ;
+	     { v__h402879, 2'd0 } ;
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_buffer$port0__write_1__VAL_1 =
 	     { 512'd0,
 	       blueDMA_writeChannel_byteAlignerFrom_buffer[1023:512] } ;
@@ -3855,11 +3860,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer -
 	     blueDMA_writeChannel_byteAlignerFrom_bytes_out_needed ;
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_bytes_out$write_1__VAL_1 =
-	     blueDMA_writeChannel_byteAlignerFrom_bytes_out + b__h80998 ;
+	     blueDMA_writeChannel_byteAlignerFrom_bytes_out + b__h80999 ;
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_bytes_out$write_1__VAL_2 =
 	     blueDMA_writeChannel_byteAlignerFrom_bytes_out + 32'd512 ;
   assign MUX_blueDMA_writeChannel_byteAlignerFrom_bytes_out_needed$write_1__VAL_1 =
-	     7'd64 - b__h106807 ;
+	     7'd64 - b__h106810 ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_buffer$port0__write_1__VAL_1 =
 	     { 512'd0, blueDMA_writeChannel_byteAlignerTo_buffer[1023:512] } ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_bytes_in$write_1__VAL_1 =
@@ -3868,11 +3873,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer -
 	     blueDMA_writeChannel_byteAlignerTo_bytes_out_needed ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_bytes_out$write_1__VAL_1 =
-	     blueDMA_writeChannel_byteAlignerTo_bytes_out + b__h166757 ;
+	     blueDMA_writeChannel_byteAlignerTo_bytes_out + b__h166758 ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_bytes_out$write_1__VAL_2 =
 	     blueDMA_writeChannel_byteAlignerTo_bytes_out + 32'd512 ;
   assign MUX_blueDMA_writeChannel_byteAlignerTo_bytes_out_needed$write_1__VAL_1 =
-	     7'd64 - b__h192552 ;
+	     7'd64 - b__h192555 ;
   assign MUX_blueDMA_writeChannel_fromMaster_task_data_output_reg$write_1__VAL_1 =
 	     { blueDMA_writeChannel_fromMaster_task_data_output_reg[44:33],
 	       x_transfers_total__h4305,
@@ -4001,11 +4006,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       MUX_blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer$port0__write_1__VAL_1 :
 	       7'd0 ;
   assign blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer$port1__write_1 =
-	     b__h49635 + 7'd64 ;
+	     b__h49636 + 7'd64 ;
   assign blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer$port2__read =
 	     WILL_FIRE_RL_blueDMA_writeChannel_byteAlignerFrom_fetchNewData ?
 	       blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer$port1__write_1 :
-	       b__h49635 ;
+	       b__h49636 ;
   assign blueDMA_writeChannel_byteAlignerFrom_fetchedDatum$EN_port0__write =
 	     blueDMA_writeChannel_byteAlignerFrom_addr_ff$dEMPTY_N ||
 	     !blueDMA_writeChannel_byteAlignerFrom_addr_ff$dEMPTY_N &&
@@ -4044,11 +4049,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       MUX_blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer$port0__write_1__VAL_1 :
 	       7'd0 ;
   assign blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer$port1__write_1 =
-	     b__h135394 + 7'd64 ;
+	     b__h135395 + 7'd64 ;
   assign blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer$port2__read =
 	     WILL_FIRE_RL_blueDMA_writeChannel_byteAlignerTo_fetchNewData ?
 	       blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer$port1__write_1 :
-	       b__h135394 ;
+	       b__h135395 ;
   assign blueDMA_writeChannel_byteAlignerTo_fetchedDatum$EN_port0__write =
 	     blueDMA_writeChannel_byteAlignerTo_addr_ff$dEMPTY_N ||
 	     !blueDMA_writeChannel_byteAlignerTo_addr_ff$dEMPTY_N &&
@@ -4087,11 +4092,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       MUX_blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer$port0__write_1__VAL_1 :
 	       7'd0 ;
   assign blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer$port1__write_1 =
-	     b__h243683 + 7'd64 ;
+	     b__h243685 + 7'd64 ;
   assign blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer$port2__read =
 	     WILL_FIRE_RL_blueDMA_readChannel_byteAlignerFrom_fetchNewData ?
 	       blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer$port1__write_1 :
-	       b__h243683 ;
+	       b__h243685 ;
   assign blueDMA_readChannel_byteAlignerFrom_fetchedDatum$EN_port0__write =
 	     blueDMA_readChannel_byteAlignerFrom_addr_ff$dEMPTY_N ||
 	     !blueDMA_readChannel_byteAlignerFrom_addr_ff$dEMPTY_N &&
@@ -4130,11 +4135,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       MUX_blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer$port0__write_1__VAL_1 :
 	       7'd0 ;
   assign blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer$port1__write_1 =
-	     b__h329442 + 7'd64 ;
+	     b__h329444 + 7'd64 ;
   assign blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer$port2__read =
 	     WILL_FIRE_RL_blueDMA_readChannel_byteAlignerTo_fetchNewData ?
 	       blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer$port1__write_1 :
-	       b__h329442 ;
+	       b__h329444 ;
   assign blueDMA_readChannel_byteAlignerTo_fetchedDatum$EN_port0__write =
 	     blueDMA_readChannel_byteAlignerTo_addr_ff$dEMPTY_N ||
 	     !blueDMA_readChannel_byteAlignerTo_addr_ff$dEMPTY_N &&
@@ -4845,15 +4850,12 @@ module mkBlueDMAVivado(m32_axi_aclk,
 
   // submodule blueDMA_cmdsIn
   assign blueDMA_cmdsIn$D_IN =
-	     blueDMA_s_config_writeSlave_in$D_OUT[74:11] !=
-	     64'h0000000010001000 ;
+	     blueDMA_s_config_writeSlave_in$D_OUT[42:11] != 32'h10001000 ;
   assign blueDMA_cmdsIn$ENQ =
 	     WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
-	     blueDMA_s_config_writeSlave_in$D_OUT[10:3] == 8'd255 &&
-	     (blueDMA_s_config_writeSlave_in$D_OUT[74:11] ==
-	      64'h0000000010001000 ||
-	      blueDMA_s_config_writeSlave_in$D_OUT[74:11] ==
-	      64'h0000000010000001) ;
+	     blueDMA_s_config_writeSlave_in$D_OUT[6:3] == 4'd15 &&
+	     (blueDMA_s_config_writeSlave_in$D_OUT[42:11] == 32'h10001000 ||
+	      blueDMA_s_config_writeSlave_in$D_OUT[42:11] == 32'h10000001) ;
   assign blueDMA_cmdsIn$DEQ =
 	     blueDMA_cmdsIn$EMPTY_N && blueDMA_writeChannel_cmdIn$FULL_N &&
 	     blueDMA_cmdsIn$D_OUT ||
@@ -4954,7 +4956,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign blueDMA_readChannel_fromMaster_master_rd_in$D_IN =
 	     { 1'd0,
 	       blueDMA_readChannel_fromMaster_task_data_requests_reg[68:5],
-	       _theResult_____2__h197885,
+	       _theResult_____2__h197886,
 	       17'd102784,
 	       blueDMA_readChannel_fromMaster_task_data_requests_reg[4:1] } ;
   assign blueDMA_readChannel_fromMaster_master_rd_in$ENQ =
@@ -5006,7 +5008,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 
   // submodule blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_IN =
-	     { x__h195212[5:0],
+	     { x__h195213[5:0],
 	       blueDMA_readChannel_fromMaster_reqGen_incoming_ETC__q5[5:0],
 	       blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT } ;
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$ENQ =
@@ -5020,7 +5022,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:100],
-	       x__h195386[25:0],
+	       x__h195388[25:0],
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -5034,7 +5036,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_IN =
 	     { blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT,
-	       requests_first__h195488 } ;
+	       requests_first__h195489 } ;
   assign blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$ENQ =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$EMPTY_N &&
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$FULL_N ;
@@ -5046,8 +5048,8 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_fromMaster_reqGen_outgoingBuffer
   assign blueDMA_readChannel_fromMaster_reqGen_outgoingBuffer$D_IN =
 	     { blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_OUT[8:0],
-	       x__h195728,
-	       request_data_requests_total__h195702,
+	       x__h195729,
+	       request_data_requests_total__h195703,
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_OUT[108:45],
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_OUT[12:9],
 	       1'd1,
@@ -5103,7 +5105,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 
   // submodule blueDMA_readChannel_toMaster_beatsPerRequestFIFO
   assign blueDMA_readChannel_toMaster_beatsPerRequestFIFO$D_IN =
-	     _theResult_____3__h202628 ;
+	     _theResult_____3__h202629 ;
   assign blueDMA_readChannel_toMaster_beatsPerRequestFIFO$ENQ =
 	     WILL_FIRE_RL_blueDMA_readChannel_toMaster_placeRequest ;
   assign blueDMA_readChannel_toMaster_beatsPerRequestFIFO$DEQ =
@@ -5124,7 +5126,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign blueDMA_readChannel_toMaster_master_wr_in_addr$D_IN =
 	     { 1'd0,
 	       blueDMA_readChannel_toMaster_task_data_requests_reg[68:5],
-	       _theResult_____3__h202628,
+	       _theResult_____3__h202629,
 	       17'd102784,
 	       blueDMA_readChannel_toMaster_task_data_requests_reg[4:1] } ;
   assign blueDMA_readChannel_toMaster_master_wr_in_addr$ENQ =
@@ -5137,7 +5139,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_toMaster_master_wr_in_data
   assign blueDMA_readChannel_toMaster_master_wr_in_data$D_IN =
 	     { blueDMA_readChannel_toMaster_incomingBuffer$D_OUT,
-	       x_strb__h203175,
+	       x_strb__h203176,
 	       blueDMA_readChannel_toMaster_beatsThisRequestC_ETC___d1304 } ;
   assign blueDMA_readChannel_toMaster_master_wr_in_data$ENQ =
 	     WILL_FIRE_RL_blueDMA_readChannel_toMaster_forwardData ;
@@ -5169,7 +5171,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 
   // submodule blueDMA_readChannel_toMaster_reqGen_intermediateBuffer
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_IN =
-	     { x__h199260[5:0],
+	     { x__h199261[5:0],
 	       blueDMA_readChannel_toMaster_reqGen_incomingBu_ETC__q6[5:0],
 	       blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT } ;
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$ENQ =
@@ -5183,7 +5185,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:100],
-	       x__h199434[25:0],
+	       x__h199436[25:0],
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -5196,7 +5198,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_IN =
 	     { blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_OUT,
-	       requests_first__h199536 } ;
+	       requests_first__h199537 } ;
   assign blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$ENQ =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$EMPTY_N &&
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$FULL_N ;
@@ -5207,8 +5209,8 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_readChannel_toMaster_reqGen_outgoingBuffer
   assign blueDMA_readChannel_toMaster_reqGen_outgoingBuffer$D_IN =
 	     { blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[8:0],
-	       x__h199776,
-	       request_data_requests_total__h199750,
+	       x__h199777,
+	       request_data_requests_total__h199751,
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[108:45],
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[12:9],
 	       1'd1,
@@ -5522,7 +5524,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2
   assign blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:100],
-	       x__h1310[25:0],
+	       x__h1311[25:0],
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -5685,7 +5687,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
   // submodule blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2
   assign blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2$D_IN =
 	     { blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:100],
-	       x__h5383[25:0],
+	       x__h5384[25:0],
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[99:0] } ;
   assign blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2$ENQ =
 	     blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$EMPTY_N &&
@@ -5733,13 +5735,13 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     (blueDMA_readChannel_toMaster_task_data_output_reg[0] &&
 	      blueDMA_readChannel_toMaster_task_data_output_reg[44:39] !=
 	      6'd0) ?
-	       endByte___1__h206084 :
+	       endByte___1__h206085 :
 	       ((blueDMA_readChannel_toMaster_task_data_output_reg[32:7] ==
 		 26'd1) ?
 		  ((blueDMA_readChannel_toMaster_task_data_output_reg[38:33] ==
 		    6'd0) ?
 		     7'd64 :
-		     endByte___1__h206110) :
+		     endByte___1__h206111) :
 		  7'd64) ;
   assign IF_blueDMA_writeChannel_mimoConv_ff_first__31__ETC___d737 =
 	     (blueDMA_writeChannel_mimoConv_ff$dD_OUT[37:32] == 6'd0) ?
@@ -5758,16 +5760,16 @@ module mkBlueDMAVivado(m32_axi_aclk,
 		     7'd64 :
 		     endByte___1__h12062) :
 		  7'd64) ;
-  assign _theResult_____2__h197885 =
+  assign _theResult_____2__h197886 =
 	     (blueDMA_readChannel_fromMaster_task_data_requests_reg[94:69] ==
 	      26'd1 &&
 	      blueDMA_readChannel_fromMaster_task_data_requests_reg[103:95] !=
 	      9'd0) ?
-	       x__h197937[7:0] :
+	       x__h197938[7:0] :
 	       ((blueDMA_readChannel_fromMaster_task_data_requests_reg[0] &&
 		 blueDMA_readChannel_fromMaster_task_data_requests_reg[112:104] !=
 		 9'd0) ?
-		  x__h197947[7:0] :
+		  x__h197948[7:0] :
 		  8'd63) ;
   assign _theResult_____2__h3834 =
 	     (blueDMA_writeChannel_fromMaster_task_data_requests_reg[94:69] ==
@@ -5780,16 +5782,16 @@ module mkBlueDMAVivado(m32_axi_aclk,
 		 9'd0) ?
 		  x__h3896[7:0] :
 		  8'd63) ;
-  assign _theResult_____3__h202628 =
+  assign _theResult_____3__h202629 =
 	     (blueDMA_readChannel_toMaster_task_data_requests_reg[94:69] ==
 	      26'd1 &&
 	      blueDMA_readChannel_toMaster_task_data_requests_reg[103:95] !=
 	      9'd0) ?
-	       x__h202680[7:0] :
+	       x__h202681[7:0] :
 	       ((blueDMA_readChannel_toMaster_task_data_requests_reg[0] &&
 		 blueDMA_readChannel_toMaster_task_data_requests_reg[112:104] !=
 		 9'd0) ?
-		  x__h202690[7:0] :
+		  x__h202691[7:0] :
 		  8'd63) ;
   assign _theResult_____3__h8580 =
 	     (blueDMA_writeChannel_toMaster_task_data_requests_reg[94:69] ==
@@ -5807,56 +5809,56 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      6'd0) ?
 	       bytes_first__h1130 :
 	       bytes_first___1__h1162 ;
-  assign _theResult____h1308 =
+  assign _theResult____h1309 =
 	     (blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:106] ==
 	      6'd0) ?
-	       transfers_total__h1307 :
-	       transfers_total___1__h1316 ;
+	       transfers_total__h1308 :
+	       transfers_total___1__h1317 ;
   assign _theResult____h1659 =
 	     (blueDMA_writeChannel_fromMaster_reqGen_interme_ETC___d75[5:0] ==
 	      6'd0) ?
 	       requests_total__h1579 :
 	       requests_total___1__h1666 ;
-  assign _theResult____h195207 =
+  assign _theResult____h195208 =
 	     (blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[41:36] ==
 	      6'd0) ?
-	       bytes_first__h195206 :
-	       bytes_first___1__h195238 ;
-  assign _theResult____h195384 =
+	       bytes_first__h195207 :
+	       bytes_first___1__h195239 ;
+  assign _theResult____h195386 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:106] ==
 	      6'd0) ?
-	       transfers_total__h195383 :
-	       transfers_total___1__h195392 ;
-  assign _theResult____h195735 =
+	       transfers_total__h195385 :
+	       transfers_total___1__h195394 ;
+  assign _theResult____h195736 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermed_ETC___d988[5:0] ==
 	      6'd0) ?
-	       requests_total__h195655 :
-	       requests_total___1__h195742 ;
-  assign _theResult____h199255 =
+	       requests_total__h195656 :
+	       requests_total___1__h195743 ;
+  assign _theResult____h199256 =
 	     (blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[41:36] ==
 	      6'd0) ?
-	       bytes_first__h199254 :
-	       bytes_first___1__h199286 ;
-  assign _theResult____h199432 =
+	       bytes_first__h199255 :
+	       bytes_first___1__h199287 ;
+  assign _theResult____h199434 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:106] ==
 	      6'd0) ?
-	       transfers_total__h199431 :
-	       transfers_total___1__h199440 ;
-  assign _theResult____h199783 =
+	       transfers_total__h199433 :
+	       transfers_total___1__h199442 ;
+  assign _theResult____h199784 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d1181[5:0] ==
 	      6'd0) ?
-	       requests_total__h199703 :
-	       requests_total___1__h199790 ;
+	       requests_total__h199704 :
+	       requests_total___1__h199791 ;
   assign _theResult____h5204 =
 	     (blueDMA_writeChannel_toMaster_reqGen_incomingBuffer$D_OUT[41:36] ==
 	      6'd0) ?
 	       bytes_first__h5203 :
 	       bytes_first___1__h5235 ;
-  assign _theResult____h5381 =
+  assign _theResult____h5382 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:106] ==
 	      6'd0) ?
-	       transfers_total__h5380 :
-	       transfers_total___1__h5389 ;
+	       transfers_total__h5381 :
+	       transfers_total___1__h5390 ;
   assign _theResult____h5732 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermedi_ETC___d268[5:0] ==
 	      6'd0) ?
@@ -5866,60 +5868,60 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[47:36] +
 	     y__h1504 ;
   assign addr_last__h1484 = addr_last__h1483 - 12'd1 ;
-  assign addr_last__h195559 =
+  assign addr_last__h195560 =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[47:36] +
-	     y__h195580 ;
-  assign addr_last__h195560 = addr_last__h195559 - 12'd1 ;
-  assign addr_last__h199607 =
+	     y__h195581 ;
+  assign addr_last__h195561 = addr_last__h195560 - 12'd1 ;
+  assign addr_last__h199608 =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[47:36] +
-	     y__h199628 ;
-  assign addr_last__h199608 = addr_last__h199607 - 12'd1 ;
+	     y__h199629 ;
+  assign addr_last__h199609 = addr_last__h199608 - 12'd1 ;
   assign addr_last__h5556 =
 	     blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[47:36] +
 	     y__h5577 ;
   assign addr_last__h5557 = addr_last__h5556 - 12'd1 ;
-  assign b__h106807 =
+  assign b__h106810 =
 	     { 1'd0,
 	       blueDMA_writeChannel_byteAlignerFrom_addr_ff$dD_OUT[37:32] } ;
-  assign b__h135394 =
+  assign b__h135395 =
 	     blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer$EN_port0__write ?
 	       blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer$port0__write_1 :
 	       blueDMA_writeChannel_byteAlignerTo_bytes_left_in_buffer ;
-  assign b__h166757 =
+  assign b__h166758 =
 	     { 25'd0, blueDMA_writeChannel_byteAlignerTo_bytes_out_needed } ;
-  assign b__h192552 =
+  assign b__h192555 =
 	     { 1'd0,
 	       blueDMA_writeChannel_byteAlignerTo_addr_ff$dD_OUT[37:32] } ;
-  assign b__h243683 =
+  assign b__h243685 =
 	     blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer$EN_port0__write ?
 	       blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer$port0__write_1 :
 	       blueDMA_readChannel_byteAlignerFrom_bytes_left_in_buffer ;
-  assign b__h275046 =
+  assign b__h275048 =
 	     { 25'd0, blueDMA_readChannel_byteAlignerFrom_bytes_out_needed } ;
-  assign b__h300855 =
+  assign b__h300859 =
 	     { 1'd0,
 	       blueDMA_readChannel_byteAlignerFrom_addr_ff$dD_OUT[37:32] } ;
-  assign b__h329442 =
+  assign b__h329444 =
 	     blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer$EN_port0__write ?
 	       blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer$port0__write_1 :
 	       blueDMA_readChannel_byteAlignerTo_bytes_left_in_buffer ;
-  assign b__h360805 =
+  assign b__h360807 =
 	     { 25'd0, blueDMA_readChannel_byteAlignerTo_bytes_out_needed } ;
-  assign b__h386600 =
+  assign b__h386604 =
 	     { 1'd0,
 	       blueDMA_readChannel_byteAlignerTo_addr_ff$dD_OUT[37:32] } ;
-  assign b__h49635 =
+  assign b__h49636 =
 	     blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer$EN_port0__write ?
 	       blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer$port0__write_1 :
 	       blueDMA_writeChannel_byteAlignerFrom_bytes_left_in_buffer ;
-  assign b__h80998 =
+  assign b__h80999 =
 	     { 25'd0,
 	       blueDMA_writeChannel_byteAlignerFrom_bytes_out_needed } ;
   assign barrier_transfers__h1527 = x__h1537[11:0] >> 6 ;
-  assign barrier_transfers__h195603 = x__h195613[11:0] >> 6 ;
-  assign barrier_transfers__h199651 = x__h199661[11:0] >> 6 ;
+  assign barrier_transfers__h195604 = x__h195614[11:0] >> 6 ;
+  assign barrier_transfers__h199652 = x__h199662[11:0] >> 6 ;
   assign barrier_transfers__h5600 = x__h5610[11:0] >> 6 ;
-  assign beatsThisRequestCntrT__h203061 =
+  assign beatsThisRequestCntrT__h203062 =
 	     blueDMA_readChannel_toMaster_beatsThisRequestCntr + 8'd1 ;
   assign beatsThisRequestCntrT__h9013 =
 	     blueDMA_writeChannel_toMaster_beatsThisRequestCntr + 8'd1 ;
@@ -5937,7 +5939,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_readChannel_byteAlignerTo_bytes_out_needed ;
   assign blueDMA_readChannel_fromMaster_reqGen_incoming_ETC__q5 =
 	     blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[35:4] -
-	     y__h195279 ;
+	     y__h195280 ;
   assign blueDMA_readChannel_fromMaster_reqGen_intermed_ETC___d988 =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_OUT[134:109] -
 	     { 17'd0,
@@ -5950,7 +5952,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	     blueDMA_readChannel_toMaster_beatsPerRequestFIFO$D_OUT ;
   assign blueDMA_readChannel_toMaster_reqGen_incomingBu_ETC__q6 =
 	     blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] -
-	     y__h199327 ;
+	     y__h199328 ;
   assign blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d1181 =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[134:109] -
 	     { 17'd0,
@@ -5992,12 +5994,12 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      26'd64) ?
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[108:100] :
 	       9'd64 ;
-  assign burst_length__h195557 =
+  assign burst_length__h195558 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[125:100] <
 	      26'd64) ?
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[108:100] :
 	       9'd64 ;
-  assign burst_length__h199605 =
+  assign burst_length__h199606 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[125:100] <
 	      26'd64) ?
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[108:100] :
@@ -6008,16 +6010,16 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[108:100] :
 	       9'd64 ;
   assign bytes_first___1__h1162 = 64'd64 - bytes_first__h1130 ;
-  assign bytes_first___1__h195238 = 64'd64 - bytes_first__h195206 ;
-  assign bytes_first___1__h199286 = 64'd64 - bytes_first__h199254 ;
+  assign bytes_first___1__h195239 = 64'd64 - bytes_first__h195207 ;
+  assign bytes_first___1__h199287 = 64'd64 - bytes_first__h199255 ;
   assign bytes_first___1__h5235 = 64'd64 - bytes_first__h5203 ;
   assign bytes_first__h1130 =
 	     { 58'd0,
 	       blueDMA_writeChannel_fromMaster_reqGen_incomingBuffer$D_OUT[41:36] } ;
-  assign bytes_first__h195206 =
+  assign bytes_first__h195207 =
 	     { 58'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[41:36] } ;
-  assign bytes_first__h199254 =
+  assign bytes_first__h199255 =
 	     { 58'd0,
 	       blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[41:36] } ;
   assign bytes_first__h5203 =
@@ -6030,11 +6032,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign endByte___1__h12062 =
 	     { 1'd0,
 	       blueDMA_writeChannel_toMaster_task_data_output_reg[38:33] } ;
-  assign endByte___1__h206084 =
-	     startByte___1__h206083 +
+  assign endByte___1__h206085 =
+	     startByte___1__h206084 +
 	     { 1'd0,
 	       blueDMA_readChannel_toMaster_task_data_output_reg[44:39] } ;
-  assign endByte___1__h206110 =
+  assign endByte___1__h206111 =
 	     { 1'd0,
 	       blueDMA_readChannel_toMaster_task_data_output_reg[38:33] } ;
   assign request_data_requests_total__h1626 =
@@ -6042,16 +6044,16 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      9'd0) ?
 	       _theResult____h1659 :
 	       requests_total__h1663 ;
-  assign request_data_requests_total__h195702 =
+  assign request_data_requests_total__h195703 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_OUT[8:0] ==
 	      9'd0) ?
-	       _theResult____h195735 :
-	       requests_total__h195739 ;
-  assign request_data_requests_total__h199750 =
+	       _theResult____h195736 :
+	       requests_total__h195740 ;
+  assign request_data_requests_total__h199751 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[8:0] ==
 	      9'd0) ?
-	       _theResult____h199783 :
-	       requests_total__h199787 ;
+	       _theResult____h199784 :
+	       requests_total__h199788 ;
   assign request_data_requests_total__h5699 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[8:0] ==
 	      9'd0) ?
@@ -6062,15 +6064,15 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[47:36]) ?
 	       barrier_transfers__h1527[8:0] :
 	       9'd0 ;
-  assign requests_first__h195488 =
-	     (addr_last__h195560 <=
+  assign requests_first__h195489 =
+	     (addr_last__h195561 <=
 	      blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[47:36]) ?
-	       barrier_transfers__h195603[8:0] :
+	       barrier_transfers__h195604[8:0] :
 	       9'd0 ;
-  assign requests_first__h199536 =
-	     (addr_last__h199608 <=
+  assign requests_first__h199537 =
+	     (addr_last__h199609 <=
 	      blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[47:36]) ?
-	       barrier_transfers__h199651[8:0] :
+	       barrier_transfers__h199652[8:0] :
 	       9'd0 ;
   assign requests_first__h5485 =
 	     (addr_last__h5557 <=
@@ -6078,49 +6080,49 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       barrier_transfers__h5600[8:0] :
 	       9'd0 ;
   assign requests_total___1__h1666 = requests_total__h1579 + 26'd1 ;
-  assign requests_total___1__h195742 = requests_total__h195655 + 26'd1 ;
-  assign requests_total___1__h199790 = requests_total__h199703 + 26'd1 ;
+  assign requests_total___1__h195743 = requests_total__h195656 + 26'd1 ;
+  assign requests_total___1__h199791 = requests_total__h199704 + 26'd1 ;
   assign requests_total___1__h5739 = requests_total__h5652 + 26'd1 ;
   assign requests_total__h1579 =
 	     blueDMA_writeChannel_fromMaster_reqGen_interme_ETC___d75 >> 6 ;
   assign requests_total__h1663 = _theResult____h1659 + 26'd1 ;
-  assign requests_total__h195655 =
+  assign requests_total__h195656 =
 	     blueDMA_readChannel_fromMaster_reqGen_intermed_ETC___d988 >> 6 ;
-  assign requests_total__h195739 = _theResult____h195735 + 26'd1 ;
-  assign requests_total__h199703 =
+  assign requests_total__h195740 = _theResult____h195736 + 26'd1 ;
+  assign requests_total__h199704 =
 	     blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d1181 >> 6 ;
-  assign requests_total__h199787 = _theResult____h199783 + 26'd1 ;
+  assign requests_total__h199788 = _theResult____h199784 + 26'd1 ;
   assign requests_total__h5652 =
 	     blueDMA_writeChannel_toMaster_reqGen_intermedi_ETC___d268 >> 6 ;
   assign requests_total__h5736 = _theResult____h5732 + 26'd1 ;
   assign startByte___1__h12035 =
 	     { 1'd0,
 	       blueDMA_writeChannel_toMaster_task_data_output_reg[6:1] } ;
-  assign startByte___1__h206083 =
+  assign startByte___1__h206084 =
 	     { 1'd0,
 	       blueDMA_readChannel_toMaster_task_data_output_reg[6:1] } ;
-  assign transfers_total___1__h1316 = transfers_total__h1307 + 32'd1 ;
-  assign transfers_total___1__h195392 = transfers_total__h195383 + 32'd1 ;
-  assign transfers_total___1__h199440 = transfers_total__h199431 + 32'd1 ;
-  assign transfers_total___1__h5389 = transfers_total__h5380 + 32'd1 ;
-  assign transfers_total__h1307 = (x__h1336 - y__h1337) >> 6 ;
-  assign transfers_total__h1313 = _theResult____h1308 + 32'd1 ;
-  assign transfers_total__h195383 = (x__h195412 - y__h195413) >> 6 ;
-  assign transfers_total__h195389 = _theResult____h195384 + 32'd1 ;
-  assign transfers_total__h199431 = (x__h199460 - y__h199461) >> 6 ;
-  assign transfers_total__h199437 = _theResult____h199432 + 32'd1 ;
-  assign transfers_total__h5380 = (x__h5409 - y__h5410) >> 6 ;
-  assign transfers_total__h5386 = _theResult____h5381 + 32'd1 ;
-  assign v__h401740 = { 32'd0, blueDMA_readChannel_total_requests_reg } ;
-  assign v__h401883 = { 32'd0, blueDMA_writeChannel_total_requests_reg } ;
-  assign v__h402026 = { 32'd0, blueDMA_readChannel_perf_cycleCounterCur } ;
-  assign v__h402170 =
+  assign transfers_total___1__h1317 = transfers_total__h1308 + 32'd1 ;
+  assign transfers_total___1__h195394 = transfers_total__h195385 + 32'd1 ;
+  assign transfers_total___1__h199442 = transfers_total__h199433 + 32'd1 ;
+  assign transfers_total___1__h5390 = transfers_total__h5381 + 32'd1 ;
+  assign transfers_total__h1308 = (x__h1337 - y__h1338) >> 6 ;
+  assign transfers_total__h1314 = _theResult____h1309 + 32'd1 ;
+  assign transfers_total__h195385 = (x__h195414 - y__h195415) >> 6 ;
+  assign transfers_total__h195391 = _theResult____h195386 + 32'd1 ;
+  assign transfers_total__h199433 = (x__h199462 - y__h199463) >> 6 ;
+  assign transfers_total__h199439 = _theResult____h199434 + 32'd1 ;
+  assign transfers_total__h5381 = (x__h5410 - y__h5411) >> 6 ;
+  assign transfers_total__h5387 = _theResult____h5382 + 32'd1 ;
+  assign v__h401874 = { 32'd0, blueDMA_readChannel_total_requests_reg } ;
+  assign v__h402017 = { 32'd0, blueDMA_writeChannel_total_requests_reg } ;
+  assign v__h402160 = { 32'd0, blueDMA_readChannel_perf_cycleCounterCur } ;
+  assign v__h402304 =
 	     { 32'd0, blueDMA_readChannel_perf_cycleCounterInterval } ;
-  assign v__h402314 = { 52'd0, blueDMA_readChannel_perf_intervalSet } ;
-  assign v__h402457 = { 32'd0, blueDMA_writeChannel_perf_cycleCounterCur } ;
-  assign v__h402601 =
+  assign v__h402448 = { 52'd0, blueDMA_readChannel_perf_intervalSet } ;
+  assign v__h402591 = { 32'd0, blueDMA_writeChannel_perf_cycleCounterCur } ;
+  assign v__h402735 =
 	     { 32'd0, blueDMA_writeChannel_perf_cycleCounterInterval } ;
-  assign v__h402745 = { 52'd0, blueDMA_writeChannel_perf_intervalSet } ;
+  assign v__h402879 = { 52'd0, blueDMA_writeChannel_perf_intervalSet } ;
   assign x__h1136 =
 	     ({ 32'd0,
 		blueDMA_writeChannel_fromMaster_reqGen_incomingBuffer$D_OUT[35:4] } <
@@ -6137,14 +6139,14 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	      6'd0) ?
 	       startByte___1__h12035 :
 	       7'd0 ;
-  assign x__h1310 =
+  assign x__h1311 =
 	     (blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[105:100] ==
 	      6'd0) ?
-	       _theResult____h1308 :
-	       transfers_total__h1313 ;
-  assign x__h1336 =
+	       _theResult____h1309 :
+	       transfers_total__h1314 ;
+  assign x__h1337 =
 	     blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h1339 ;
+	     y__h1340 ;
   assign x__h1537 =
 	     13'd4096 -
 	     { 1'd0,
@@ -6152,73 +6154,73 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign x__h1652 =
 	     { 3'd0,
 	       blueDMA_writeChannel_fromMaster_reqGen_interme_ETC___d75[5:0] } ;
-  assign x__h195212 =
+  assign x__h195213 =
 	     ({ 32'd0,
 		blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[35:4] } <
-	      _theResult____h195207 ||
-	      _theResult____h195207 == 64'd0 &&
+	      _theResult____h195208 ||
+	      _theResult____h195208 == 64'd0 &&
 	      blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[35:4] <
 	      32'd64) ?
 	       { 32'd0,
 		 blueDMA_readChannel_fromMaster_reqGen_incomingBuffer$D_OUT[35:4] } :
-	       _theResult____h195207 ;
-  assign x__h195386 =
+	       _theResult____h195208 ;
+  assign x__h195388 =
 	     (blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[105:100] ==
 	      6'd0) ?
-	       _theResult____h195384 :
-	       transfers_total__h195389 ;
-  assign x__h195412 =
+	       _theResult____h195386 :
+	       transfers_total__h195391 ;
+  assign x__h195414 =
 	     blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h195415 ;
-  assign x__h195613 =
+	     y__h195417 ;
+  assign x__h195614 =
 	     13'd4096 -
 	     { 1'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer2$D_OUT[47:36] } ;
-  assign x__h195728 =
+  assign x__h195729 =
 	     { 3'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_intermed_ETC___d988[5:0] } ;
-  assign x__h197937 =
+  assign x__h197938 =
 	     blueDMA_readChannel_fromMaster_task_data_requests_reg[103:95] -
 	     9'd1 ;
-  assign x__h197947 =
+  assign x__h197948 =
 	     blueDMA_readChannel_fromMaster_task_data_requests_reg[112:104] -
 	     9'd1 ;
-  assign x__h199260 =
+  assign x__h199261 =
 	     ({ 32'd0,
 		blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] } <
-	      _theResult____h199255 ||
-	      _theResult____h199255 == 64'd0 &&
+	      _theResult____h199256 ||
+	      _theResult____h199256 == 64'd0 &&
 	      blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] <
 	      32'd64) ?
 	       { 32'd0,
 		 blueDMA_readChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] } :
-	       _theResult____h199255 ;
-  assign x__h199434 =
+	       _theResult____h199256 ;
+  assign x__h199436 =
 	     (blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[105:100] ==
 	      6'd0) ?
-	       _theResult____h199432 :
-	       transfers_total__h199437 ;
-  assign x__h199460 =
+	       _theResult____h199434 :
+	       transfers_total__h199439 ;
+  assign x__h199462 =
 	     blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h199463 ;
-  assign x__h199661 =
+	     y__h199465 ;
+  assign x__h199662 =
 	     13'd4096 -
 	     { 1'd0,
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer2$D_OUT[47:36] } ;
-  assign x__h199776 =
+  assign x__h199777 =
 	     { 3'd0,
 	       blueDMA_readChannel_toMaster_reqGen_intermedia_ETC___d1181[5:0] } ;
-  assign x__h202680 =
+  assign x__h202681 =
 	     blueDMA_readChannel_toMaster_task_data_requests_reg[103:95] -
 	     9'd1 ;
-  assign x__h202690 =
+  assign x__h202691 =
 	     blueDMA_readChannel_toMaster_task_data_requests_reg[112:104] -
 	     9'd1 ;
-  assign x__h206070 =
+  assign x__h206071 =
 	     (blueDMA_readChannel_toMaster_task_data_output_reg[0] &&
 	      blueDMA_readChannel_toMaster_task_data_output_reg[44:39] !=
 	      6'd0) ?
-	       startByte___1__h206083 :
+	       startByte___1__h206084 :
 	       7'd0 ;
   assign x__h3886 =
 	     blueDMA_writeChannel_fromMaster_task_data_requests_reg[103:95] -
@@ -6236,14 +6238,14 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       { 32'd0,
 		 blueDMA_writeChannel_toMaster_reqGen_incomingBuffer$D_OUT[35:4] } :
 	       _theResult____h5204 ;
-  assign x__h5383 =
+  assign x__h5384 =
 	     (blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[105:100] ==
 	      6'd0) ?
-	       _theResult____h5381 :
-	       transfers_total__h5386 ;
-  assign x__h5409 =
+	       _theResult____h5382 :
+	       transfers_total__h5387 ;
+  assign x__h5410 =
 	     blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[35:4] -
-	     y__h5412 ;
+	     y__h5413 ;
   assign x__h5610 =
 	     13'd4096 -
 	     { 1'd0,
@@ -6257,10 +6259,10 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign x__h8642 =
 	     blueDMA_writeChannel_toMaster_task_data_requests_reg[112:104] -
 	     9'd1 ;
-  assign x_address_dynamic__h198023 =
+  assign x_address_dynamic__h198024 =
 	     blueDMA_readChannel_fromMaster_task_data_requests_reg[37:17] +
 	     21'd1 ;
-  assign x_address_dynamic__h202795 =
+  assign x_address_dynamic__h202796 =
 	     blueDMA_readChannel_toMaster_task_data_requests_reg[37:17] +
 	     21'd1 ;
   assign x_address_dynamic__h3972 =
@@ -6269,10 +6271,10 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign x_address_dynamic__h8747 =
 	     blueDMA_writeChannel_toMaster_task_data_requests_reg[37:17] +
 	     21'd1 ;
-  assign x_requests_total__h198021 =
+  assign x_requests_total__h198022 =
 	     blueDMA_readChannel_fromMaster_task_data_requests_reg[94:69] -
 	     26'd1 ;
-  assign x_requests_total__h202793 =
+  assign x_requests_total__h202794 =
 	     blueDMA_readChannel_toMaster_task_data_requests_reg[94:69] -
 	     26'd1 ;
   assign x_requests_total__h3970 =
@@ -6281,197 +6283,197 @@ module mkBlueDMAVivado(m32_axi_aclk,
   assign x_requests_total__h8745 =
 	     blueDMA_writeChannel_toMaster_task_data_requests_reg[94:69] -
 	     26'd1 ;
-  assign x_strb__h203175 =
-	     { x__h206070 <= 7'd63 &&
+  assign x_strb__h203176 =
+	     { x__h206071 <= 7'd63 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd63,
-	       x__h206070 <= 7'd62 &&
+	       x__h206071 <= 7'd62 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd62,
-	       x__h206070 <= 7'd61 &&
+	       x__h206071 <= 7'd61 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd61,
-	       x__h206070 <= 7'd60 &&
+	       x__h206071 <= 7'd60 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd60,
-	       x__h206070 <= 7'd59 &&
+	       x__h206071 <= 7'd59 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd59,
-	       x__h206070 <= 7'd58 &&
+	       x__h206071 <= 7'd58 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd58,
-	       x__h206070 <= 7'd57 &&
+	       x__h206071 <= 7'd57 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd57,
-	       x__h206070 <= 7'd56 &&
+	       x__h206071 <= 7'd56 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd56,
-	       x__h206070 <= 7'd55 &&
+	       x__h206071 <= 7'd55 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd55,
-	       x__h206070 <= 7'd54 &&
+	       x__h206071 <= 7'd54 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd54,
-	       x__h206070 <= 7'd53 &&
+	       x__h206071 <= 7'd53 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd53,
-	       x__h206070 <= 7'd52 &&
+	       x__h206071 <= 7'd52 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd52,
-	       x__h206070 <= 7'd51 &&
+	       x__h206071 <= 7'd51 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd51,
-	       x__h206070 <= 7'd50 &&
+	       x__h206071 <= 7'd50 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd50,
-	       x__h206070 <= 7'd49 &&
+	       x__h206071 <= 7'd49 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd49,
-	       x__h206070 <= 7'd48 &&
+	       x__h206071 <= 7'd48 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd48,
-	       x__h206070 <= 7'd47 &&
+	       x__h206071 <= 7'd47 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd47,
-	       x__h206070 <= 7'd46 &&
+	       x__h206071 <= 7'd46 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd46,
-	       x__h206070 <= 7'd45 &&
+	       x__h206071 <= 7'd45 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd45,
-	       x__h206070 <= 7'd44 &&
+	       x__h206071 <= 7'd44 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd44,
-	       x__h206070 <= 7'd43 &&
+	       x__h206071 <= 7'd43 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd43,
-	       x__h206070 <= 7'd42 &&
+	       x__h206071 <= 7'd42 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd42,
-	       x__h206070 <= 7'd41 &&
+	       x__h206071 <= 7'd41 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd41,
-	       x__h206070 <= 7'd40 &&
+	       x__h206071 <= 7'd40 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd40,
-	       x__h206070 <= 7'd39 &&
+	       x__h206071 <= 7'd39 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd39,
-	       x__h206070 <= 7'd38 &&
+	       x__h206071 <= 7'd38 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd38,
-	       x__h206070 <= 7'd37 &&
+	       x__h206071 <= 7'd37 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd37,
-	       x__h206070 <= 7'd36 &&
+	       x__h206071 <= 7'd36 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd36,
-	       x__h206070 <= 7'd35 &&
+	       x__h206071 <= 7'd35 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd35,
-	       x__h206070 <= 7'd34 &&
+	       x__h206071 <= 7'd34 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd34,
-	       x__h206070 <= 7'd33 &&
+	       x__h206071 <= 7'd33 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd33,
-	       x__h206070 <= 7'd32 &&
+	       x__h206071 <= 7'd32 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd32,
-	       x__h206070 <= 7'd31 &&
+	       x__h206071 <= 7'd31 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd31,
-	       x__h206070 <= 7'd30 &&
+	       x__h206071 <= 7'd30 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd30,
-	       x__h206070 <= 7'd29 &&
+	       x__h206071 <= 7'd29 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd29,
-	       x__h206070 <= 7'd28 &&
+	       x__h206071 <= 7'd28 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd28,
-	       x__h206070 <= 7'd27 &&
+	       x__h206071 <= 7'd27 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd27,
-	       x__h206070 <= 7'd26 &&
+	       x__h206071 <= 7'd26 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd26,
-	       x__h206070 <= 7'd25 &&
+	       x__h206071 <= 7'd25 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd25,
-	       x__h206070 <= 7'd24 &&
+	       x__h206071 <= 7'd24 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd24,
-	       x__h206070 <= 7'd23 &&
+	       x__h206071 <= 7'd23 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd23,
-	       x__h206070 <= 7'd22 &&
+	       x__h206071 <= 7'd22 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd22,
-	       x__h206070 <= 7'd21 &&
+	       x__h206071 <= 7'd21 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd21,
-	       x__h206070 <= 7'd20 &&
+	       x__h206071 <= 7'd20 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd20,
-	       x__h206070 <= 7'd19 &&
+	       x__h206071 <= 7'd19 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd19,
-	       x__h206070 <= 7'd18 &&
+	       x__h206071 <= 7'd18 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd18,
-	       x__h206070 <= 7'd17 &&
+	       x__h206071 <= 7'd17 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd17,
-	       x__h206070 <= 7'd16 &&
+	       x__h206071 <= 7'd16 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd16,
-	       x__h206070 <= 7'd15 &&
+	       x__h206071 <= 7'd15 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd15,
-	       x__h206070 <= 7'd14 &&
+	       x__h206071 <= 7'd14 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd14,
-	       x__h206070 <= 7'd13 &&
+	       x__h206071 <= 7'd13 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd13,
-	       x__h206070 <= 7'd12 &&
+	       x__h206071 <= 7'd12 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd12,
-	       x__h206070 <= 7'd11 &&
+	       x__h206071 <= 7'd11 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd11,
-	       x__h206070 <= 7'd10 &&
+	       x__h206071 <= 7'd10 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd10,
-	       x__h206070 <= 7'd9 &&
+	       x__h206071 <= 7'd9 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd9,
-	       x__h206070 <= 7'd8 &&
+	       x__h206071 <= 7'd8 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd8,
-	       x__h206070 <= 7'd7 &&
+	       x__h206071 <= 7'd7 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd7,
-	       x__h206070 <= 7'd6 &&
+	       x__h206071 <= 7'd6 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd6,
-	       x__h206070 <= 7'd5 &&
+	       x__h206071 <= 7'd5 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd5,
-	       x__h206070 <= 7'd4 &&
+	       x__h206071 <= 7'd4 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd4,
-	       x__h206070 <= 7'd3 &&
+	       x__h206071 <= 7'd3 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd3,
-	       x__h206070 <= 7'd2 &&
+	       x__h206071 <= 7'd2 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd2,
-	       x__h206070 <= 7'd1 &&
+	       x__h206071 <= 7'd1 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 >
 	       7'd1,
-	       x__h206070 == 7'd0 &&
+	       x__h206071 == 7'd0 &&
 	       IF_blueDMA_readChannel_toMaster_task_data_outp_ETC___d1325 !=
 	       7'd0 } ;
   assign x_strb__h9127 =
@@ -6667,46 +6669,46 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	       x__h12022 == 7'd0 &&
 	       IF_blueDMA_writeChannel_toMaster_task_data_out_ETC___d412 !=
 	       7'd0 } ;
-  assign x_transfers_total__h198356 =
+  assign x_transfers_total__h198357 =
 	     blueDMA_readChannel_fromMaster_task_data_output_reg[32:7] -
 	     26'd1 ;
   assign x_transfers_total__h20045 =
 	     blueDMA_writeChannel_toMaster_task_data_output_reg[32:7] -
 	     26'd1 ;
-  assign x_transfers_total__h214093 =
+  assign x_transfers_total__h214094 =
 	     blueDMA_readChannel_toMaster_task_data_output_reg[32:7] - 26'd1 ;
   assign x_transfers_total__h4305 =
 	     blueDMA_writeChannel_fromMaster_task_data_output_reg[32:7] -
 	     26'd1 ;
   assign y__h1203 = { 26'd0, x__h1136[5:0] } ;
-  assign y__h1337 =
+  assign y__h1338 =
 	     { 26'd0,
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[105:100] } ;
-  assign y__h1339 =
+  assign y__h1340 =
 	     { 26'd0,
 	       blueDMA_writeChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:106] } ;
   assign y__h1504 = { burst_length__h1481[5:0], 6'd0 } ;
-  assign y__h195279 = { 26'd0, x__h195212[5:0] } ;
-  assign y__h195413 =
+  assign y__h195280 = { 26'd0, x__h195213[5:0] } ;
+  assign y__h195415 =
 	     { 26'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[105:100] } ;
-  assign y__h195415 =
+  assign y__h195417 =
 	     { 26'd0,
 	       blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer$D_OUT[111:106] } ;
-  assign y__h195580 = { burst_length__h195557[5:0], 6'd0 } ;
-  assign y__h199327 = { 26'd0, x__h199260[5:0] } ;
-  assign y__h199461 =
+  assign y__h195581 = { burst_length__h195558[5:0], 6'd0 } ;
+  assign y__h199328 = { 26'd0, x__h199261[5:0] } ;
+  assign y__h199463 =
 	     { 26'd0,
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[105:100] } ;
-  assign y__h199463 =
+  assign y__h199465 =
 	     { 26'd0,
 	       blueDMA_readChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:106] } ;
-  assign y__h199628 = { burst_length__h199605[5:0], 6'd0 } ;
+  assign y__h199629 = { burst_length__h199606[5:0], 6'd0 } ;
   assign y__h5276 = { 26'd0, x__h5209[5:0] } ;
-  assign y__h5410 =
+  assign y__h5411 =
 	     { 26'd0,
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[105:100] } ;
-  assign y__h5412 =
+  assign y__h5413 =
 	     { 26'd0,
 	       blueDMA_writeChannel_toMaster_reqGen_intermediateBuffer$D_OUT[111:106] } ;
   assign y__h5577 = { burst_length__h5554[5:0], 6'd0 } ;
@@ -7197,7 +7199,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1] and\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1] and\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_2 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_2) &&
@@ -7219,7 +7221,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2] and\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2] and\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_3 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_3) &&
@@ -7239,7 +7241,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3] and\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3] and\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_4 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_4) &&
@@ -7257,7 +7259,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4] and\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4] and\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_5 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_5) &&
@@ -7273,7 +7275,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5] and\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5] and\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_6 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_6) &&
@@ -7287,7 +7289,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6] and\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6] and\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_7 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_7) &&
@@ -7299,7 +7301,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7] and\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7] and\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_8 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_8) &&
@@ -7309,7 +7311,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8] and\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8] and\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_9 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_9) &&
@@ -7317,13 +7319,13 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9] and\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9] and\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10) &&
 	  (WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10] and\n  [RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10] and\n  [RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled) &&
@@ -7349,7 +7351,7 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_10 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11))
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled] and\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled] and\n  [RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] ) fired in the same clock\n  cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if ((WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled ||
@@ -7376,322 +7378,322 @@ module mkBlueDMAVivado(m32_axi_aclk,
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecial_11 ||
 	   WILL_FIRE_RL_blueDMA_s_config_axiReadSpecialIsHandled_11) &&
 	  WILL_FIRE_RL_blueDMA_s_config_axiReadFallback)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 161, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled,\n  RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] and\n  [RL_blueDMA_s_config_axiReadFallback] ) fired in the same clock cycle.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 238, column 18: (R0001)\n  Mutually exclusive rules (from the ME sets\n  [RL_blueDMA_s_config_axiReadSpecial,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled,\n  RL_blueDMA_s_config_axiReadSpecial_1,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_1,\n  RL_blueDMA_s_config_axiReadSpecial_2,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_2,\n  RL_blueDMA_s_config_axiReadSpecial_3,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_3,\n  RL_blueDMA_s_config_axiReadSpecial_4,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_4,\n  RL_blueDMA_s_config_axiReadSpecial_5,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_5,\n  RL_blueDMA_s_config_axiReadSpecial_6,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_6,\n  RL_blueDMA_s_config_axiReadSpecial_7,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_7,\n  RL_blueDMA_s_config_axiReadSpecial_8,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_8,\n  RL_blueDMA_s_config_axiReadSpecial_9,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_9,\n  RL_blueDMA_s_config_axiReadSpecial_10,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_10,\n  RL_blueDMA_s_config_axiReadSpecial_11,\n  RL_blueDMA_s_config_axiReadSpecialIsHandled_11] and\n  [RL_blueDMA_s_config_axiReadFallback] ) fired in the same clock cycle.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_1 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_2 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_3 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_4 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_4 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_3 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_2 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_1 called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1 &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecialIsHandled called conflicting methods\n  wset and wset of module instance blueDMA_s_config_writeIsHandled.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial &&
 	  blueDMA_s_config_writeSlave_in$EMPTY_N)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 261, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 338, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecialIsHandled_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_4)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_4 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_3)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_3 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_2)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_2 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods deq and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_1)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial_1 called conflicting methods enq and\n  enq of module instance blueDMA_s_config_writeSlave_out.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods first and\n  deq of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods deq and deq\n  of module instance blueDMA_s_config_writeSlave_in.\n");
     if (s_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial_5 &&
 	  WILL_FIRE_RL_blueDMA_s_config_1_axiWriteSpecial)
-	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 250, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
+	$display("Error: \"/home/wimi/jah/projects/Bluespec/done/BlueAXI/src/GenericAxi4LiteSlave.bsv\", line 327, column 18: (R0002)\n  Conflict-free rules RL_blueDMA_s_config_1_axiWriteSpecial_5 and\n  RL_blueDMA_s_config_1_axiWriteSpecial called conflicting methods enq and enq\n  of module instance blueDMA_s_config_writeSlave_out.\n");
   end
   // synopsys translate_on
 
@@ -7781,11 +7783,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 		 blueDMA_readChannel_fromMaster_reqGen_intermediateBuffer3$D_OUT[8:0]);
     if (m32_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_fromMaster_reqGen_finishRequest)
-	$display("[READ] requests_last: %d", x__h195728);
+	$display("[READ] requests_last: %d", x__h195729);
     if (m32_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_fromMaster_reqGen_finishRequest)
 	$display("[READ] requests_total: %d",
-		 request_data_requests_total__h195702);
+		 request_data_requests_total__h195703);
     if (m32_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_fromMaster_reqGen_finishRequest)
 	$display("[READ] address_static: %x",
@@ -7797,15 +7799,15 @@ module mkBlueDMAVivado(m32_axi_aclk,
     if (m32_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_fromMaster_placeRequest)
 	begin
-	  v__h198067 = $time;
+	  v__h198068 = $time;
 	  #0;
 	end
     if (m32_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_fromMaster_placeRequest)
 	$display("(%0d) Processing READ request: Address: %x, beats this request %d, requests_total %d",
-		 v__h198067,
+		 v__h198068,
 		 blueDMA_readChannel_fromMaster_task_data_requests_reg[68:5],
-		 _theResult_____2__h197885 + 8'd1,
+		 _theResult_____2__h197886 + 8'd1,
 		 blueDMA_readChannel_fromMaster_task_data_requests_reg[94:69]);
     if (m32_axi_aresetn != `BSV_RESET_VALUE)
       if (blueDMA_readChannel_byteAlignerFrom_addr_ff$dEMPTY_N)
@@ -7920,11 +7922,11 @@ module mkBlueDMAVivado(m32_axi_aclk,
 		 blueDMA_readChannel_toMaster_reqGen_intermediateBuffer3$D_OUT[8:0]);
     if (m64_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_toMaster_reqGen_finishRequest)
-	$display("[WRITE] requests_last: %d", x__h199776);
+	$display("[WRITE] requests_last: %d", x__h199777);
     if (m64_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_toMaster_reqGen_finishRequest)
 	$display("[WRITE] requests_total: %d",
-		 request_data_requests_total__h199750);
+		 request_data_requests_total__h199751);
     if (m64_axi_aresetn != `BSV_RESET_VALUE)
       if (WILL_FIRE_RL_blueDMA_readChannel_toMaster_reqGen_finishRequest)
 	$display("[WRITE] address_static: %x",
diff --git a/toolflow/vivado/common/ip/MSIXIntrCtrl/component.xml b/toolflow/vivado/common/ip/MSIXIntrCtrl/component.xml
index d474867a..155c9d98 100644
--- a/toolflow/vivado/common/ip/MSIXIntrCtrl/component.xml
+++ b/toolflow/vivado/common/ip/MSIXIntrCtrl/component.xml
@@ -966,6 +966,7 @@
         <xilinx:family xilinx:lifeCycle="Pre-Production">spartan7</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexu</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplushbm</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexuplus</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexu</xilinx:family>
       </xilinx:supportedFamilies>
diff --git a/toolflow/vivado/common/ip/MSIxUSPTranslator/component.xml b/toolflow/vivado/common/ip/MSIxUSPTranslator/component.xml
index 6f37a2ef..6f7c3d8b 100644
--- a/toolflow/vivado/common/ip/MSIxUSPTranslator/component.xml
+++ b/toolflow/vivado/common/ip/MSIxUSPTranslator/component.xml
@@ -347,6 +347,7 @@
         <xilinx:family xilinx:lifeCycle="Pre-Production">spartan7</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexu</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplushbm</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexuplus</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexu</xilinx:family>
       </xilinx:supportedFamilies>
diff --git a/toolflow/vivado/common/ip/PCIeBridgeToLite_x16/component.xml b/toolflow/vivado/common/ip/PCIeBridgeToLite_x16/component.xml
index fb2452e7..bc0ea43a 100644
--- a/toolflow/vivado/common/ip/PCIeBridgeToLite_x16/component.xml
+++ b/toolflow/vivado/common/ip/PCIeBridgeToLite_x16/component.xml
@@ -1703,6 +1703,7 @@
         <xilinx:family xilinx:lifeCycle="Pre-Production">spartan7</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexu</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplus</xilinx:family>
+        <xilinx:family xilinx:lifeCycle="Pre-Production">virtexuplushbm</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexuplus</xilinx:family>
         <xilinx:family xilinx:lifeCycle="Pre-Production">kintexu</xilinx:family>
       </xilinx:supportedFamilies>
diff --git a/toolflow/vivado/common/scripts/Vivado_init.tcl b/toolflow/vivado/common/scripts/Vivado_init.tcl
index 5df64438..5411c205 100644
--- a/toolflow/vivado/common/scripts/Vivado_init.tcl
+++ b/toolflow/vivado/common/scripts/Vivado_init.tcl
@@ -1 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 enable_beta_device "*xczu9eg*"
diff --git a/toolflow/vivado/common/slurm.job.template b/toolflow/vivado/common/slurm.job.template
index 4f9ffeb4..8fd31317 100644
--- a/toolflow/vivado/common/slurm.job.template
+++ b/toolflow/vivado/common/slurm.job.template
@@ -1,4 +1,22 @@
 #!/bin/bash
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
 
 #SBATCH -J "@@JOB_NAME@@"
 #SBATCH -o "@@SLURM_LOG@@"
diff --git a/toolflow/vivado/common/subsystem.tcl b/toolflow/vivado/common/subsystem.tcl
index aff5b770..acb1cbcb 100644
--- a/toolflow/vivado/common/subsystem.tcl
+++ b/toolflow/vivado/common/subsystem.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		subsystem.tcl
-# @brief	Subsystem block creation helpers.
-# @author	J. Korinth, TU Darmstadt (jk@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval subsystem {
   namespace export create
   namespace export get_port
diff --git a/toolflow/vivado/platform/AU250/AU250.tcl b/toolflow/vivado/platform/AU250/AU250.tcl
index 39323880..e3ba7da4 100644
--- a/toolflow/vivado/platform/AU250/AU250.tcl
+++ b/toolflow/vivado/platform/AU250/AU250.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2019 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		AU250.tcl
-# @brief	AU250 platform implementation.
-# @author	J. A. Hofmann, TU Darmstadt (hofmann@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
   set platform_dirname "AU250"
   variable pcie_width "x16"
@@ -114,7 +111,9 @@ namespace eval platform {
       CONFIG.bar0_indicator {0}
       ]
 
-    set_property -dict $pcie_properties $axi_pcie3_0
+    if {[catch {set_property -dict $pcie_properties $axi_pcie3_0}]} {
+        error "ERROR: Failed to configure PCIe bridge. For Vivado 2019.2, please install patch from Xilinx AR# 73001."
+    }
 
     tapasco::ip::create_msixusptrans "MSIxTranslator" $axi_pcie3_0
 
diff --git a/toolflow/vivado/platform/aws/aws.benchmark b/toolflow/vivado/platform/aws/aws.benchmark
new file mode 100644
index 00000000..d9511ddf
--- /dev/null
+++ b/toolflow/vivado/platform/aws/aws.benchmark
@@ -0,0 +1,376 @@
+{
+   "Host":{
+      "Machine":"x86_64",
+      "Node":"ip-172-31-86-127",
+      "Operating System":"Linux",
+      "Release":"4.15.0-1065-aws",
+      "Version":"#69-Ubuntu SMP Thu Mar 26 02:17:29 UTC 2020"
+   },
+   "Interrupt Latency":[
+      {
+         "Avg Latency":52.480290400645409,
+         "Cycle Count":1,
+         "Max Latency":186,
+         "Min Latency":43
+      },
+      {
+         "Avg Latency":48.178469135802359,
+         "Cycle Count":2,
+         "Max Latency":275,
+         "Min Latency":42
+      },
+      {
+         "Avg Latency":47.980798507096203,
+         "Cycle Count":4,
+         "Max Latency":220,
+         "Min Latency":45
+      },
+      {
+         "Avg Latency":50.704111295681059,
+         "Cycle Count":8,
+         "Max Latency":75,
+         "Min Latency":44
+      },
+      {
+         "Avg Latency":51.362237909598598,
+         "Cycle Count":16,
+         "Max Latency":173,
+         "Min Latency":45
+      },
+      {
+         "Avg Latency":48.342020512312295,
+         "Cycle Count":32,
+         "Max Latency":170,
+         "Min Latency":45
+      },
+      {
+         "Avg Latency":48.411414096259975,
+         "Cycle Count":64,
+         "Max Latency":275,
+         "Min Latency":45
+      },
+      {
+         "Avg Latency":50.781437284539955,
+         "Cycle Count":128,
+         "Max Latency":174,
+         "Min Latency":47
+      },
+      {
+         "Avg Latency":49.865749349200414,
+         "Cycle Count":256,
+         "Max Latency":281,
+         "Min Latency":43
+      },
+      {
+         "Avg Latency":48.105954513380105,
+         "Cycle Count":512,
+         "Max Latency":285,
+         "Min Latency":44
+      },
+      {
+         "Avg Latency":50.501110288675072,
+         "Cycle Count":1024,
+         "Max Latency":278,
+         "Min Latency":42
+      },
+      {
+         "Avg Latency":49.986974161862015,
+         "Cycle Count":2048,
+         "Max Latency":307,
+         "Min Latency":45
+      },
+      {
+         "Avg Latency":50.610692632739216,
+         "Cycle Count":4096,
+         "Max Latency":201,
+         "Min Latency":45
+      },
+      {
+         "Avg Latency":50.509887760555813,
+         "Cycle Count":8192,
+         "Max Latency":86,
+         "Min Latency":43
+      },
+      {
+         "Avg Latency":64.201600000000042,
+         "Cycle Count":16384,
+         "Max Latency":121,
+         "Min Latency":44
+      },
+      {
+         "Avg Latency":66.34214680347273,
+         "Cycle Count":32768,
+         "Max Latency":173,
+         "Min Latency":47
+      },
+      {
+         "Avg Latency":59.185979971387738,
+         "Cycle Count":65536,
+         "Max Latency":207,
+         "Min Latency":46
+      },
+      {
+         "Avg Latency":60.246058944482591,
+         "Cycle Count":131072,
+         "Max Latency":119,
+         "Min Latency":48
+      },
+      {
+         "Avg Latency":57.165997322623831,
+         "Cycle Count":262144,
+         "Max Latency":110,
+         "Min Latency":48
+      },
+      {
+         "Avg Latency":65.413793103448256,
+         "Cycle Count":524288,
+         "Max Latency":348,
+         "Min Latency":50
+      },
+      {
+         "Avg Latency":75.366223038090837,
+         "Cycle Count":1048576,
+         "Max Latency":172,
+         "Min Latency":51
+      },
+      {
+         "Avg Latency":81.63636363636364,
+         "Cycle Count":2097152,
+         "Max Latency":164,
+         "Min Latency":52
+      },
+      {
+         "Avg Latency":86.805555555555557,
+         "Cycle Count":4194304,
+         "Max Latency":171,
+         "Min Latency":51
+      },
+      {
+         "Avg Latency":89.375886524822718,
+         "Cycle Count":8388608,
+         "Max Latency":191,
+         "Min Latency":52
+      },
+      {
+         "Avg Latency":110.25174825174823,
+         "Cycle Count":16777216,
+         "Max Latency":192,
+         "Min Latency":56
+      },
+      {
+         "Avg Latency":132.76190476190476,
+         "Cycle Count":33554432,
+         "Max Latency":201,
+         "Min Latency":63
+      },
+      {
+         "Avg Latency":143.41176470588238,
+         "Cycle Count":67108864,
+         "Max Latency":209,
+         "Min Latency":91
+      },
+      {
+         "Avg Latency":159.56153846153845,
+         "Cycle Count":134217728,
+         "Max Latency":241,
+         "Min Latency":109
+      },
+      {
+         "Avg Latency":193.49019607843138,
+         "Cycle Count":268435456,
+         "Max Latency":245,
+         "Min Latency":147
+      }
+   ],
+   "Job Throughput":[
+      {
+         "Jobs per second":27505.558419243978,
+         "Number of threads":1
+      },
+      {
+         "Jobs per second":51895.130293159622,
+         "Number of threads":2
+      },
+      {
+         "Jobs per second":73986.523734177244,
+         "Number of threads":3
+      },
+      {
+         "Jobs per second":97230.570532915357,
+         "Number of threads":4
+      },
+      {
+         "Jobs per second":114176.05981595092,
+         "Number of threads":5
+      },
+      {
+         "Jobs per second":132714.87888198756,
+         "Number of threads":6
+      },
+      {
+         "Jobs per second":165807.45619335337,
+         "Number of threads":7
+      },
+      {
+         "Jobs per second":196399.41666666669,
+         "Number of threads":8
+      },
+      {
+         "Jobs per second":205448.85626911314,
+         "Number of threads":9
+      },
+      {
+         "Jobs per second":211904.04103343459,
+         "Number of threads":10
+      },
+      {
+         "Jobs per second":215314.36474164133,
+         "Number of threads":11
+      },
+      {
+         "Jobs per second":133663.87697727964,
+         "Number of threads":12
+      },
+      {
+         "Jobs per second":217308.33383685796,
+         "Number of threads":13
+      },
+      {
+         "Jobs per second":153948.19117647063,
+         "Number of threads":14
+      },
+      {
+         "Jobs per second":218670.17173252284,
+         "Number of threads":15
+      },
+      {
+         "Jobs per second":221724.7757575757,
+         "Number of threads":16
+      },
+      {
+         "Jobs per second":217416.51060606071,
+         "Number of threads":17
+      }
+   ],
+   "Library Versions":{
+      "Platform API":"1.6",
+      "Tapasco API":"1.6"
+   },
+   "Timestamp":"2020-04-08 21:02:36",
+   "Transfer Speed":[
+      {
+         "Chunk Size":1024,
+         "Read":60.928448654122249,
+         "ReadWrite":81.115244765243858,
+         "Write":55.753109021581913
+      },
+      {
+         "Chunk Size":2048,
+         "Read":120.18811714537861,
+         "ReadWrite":132.6789269517781,
+         "Write":112.11576441272628
+      },
+      {
+         "Chunk Size":4096,
+         "Read":251.84791929911148,
+         "ReadWrite":307.30893599418289,
+         "Write":237.2498682440195
+      },
+      {
+         "Chunk Size":8192,
+         "Read":462.36087063770537,
+         "ReadWrite":596.68556055741715,
+         "Write":418.81301370860535
+      },
+      {
+         "Chunk Size":16384,
+         "Read":889.75293341274448,
+         "ReadWrite":1125.1684571569367,
+         "Write":713.9512595436737
+      },
+      {
+         "Chunk Size":32768,
+         "Read":1271.359702384128,
+         "ReadWrite":1876.7219700325566,
+         "Write":1095.2800676117681
+      },
+      {
+         "Chunk Size":65536,
+         "Read":2018.0192657732377,
+         "ReadWrite":3016.7993669719581,
+         "Write":1932.0313493498945
+      },
+      {
+         "Chunk Size":131072,
+         "Read":2973.5210268756941,
+         "ReadWrite":4581.1589498148423,
+         "Write":2799.435911536465
+      },
+      {
+         "Chunk Size":262144,
+         "Read":3911.3246326753474,
+         "ReadWrite":6266.0876214827867,
+         "Write":3650.1186724020581
+      },
+      {
+         "Chunk Size":524288,
+         "Read":5615.3331795654603,
+         "ReadWrite":8674.2980583717199,
+         "Write":5337.7713208460736
+      },
+      {
+         "Chunk Size":1048576,
+         "Read":7137.8159366302452,
+         "ReadWrite":11076.873817109181,
+         "Write":6721.4377422717125
+      },
+      {
+         "Chunk Size":2097152,
+         "Read":8227.7223038218945,
+         "ReadWrite":12619.489754258359,
+         "Write":7721.9954846583905
+      },
+      {
+         "Chunk Size":4194304,
+         "Read":8939.1879099110429,
+         "ReadWrite":13500.287860733028,
+         "Write":8402.5280029208061
+      },
+      {
+         "Chunk Size":8388608,
+         "Read":9244.9485108717035,
+         "ReadWrite":13924.373609023716,
+         "Write":8750.6784333764299
+      },
+      {
+         "Chunk Size":16777216,
+         "Read":9320.2896603888457,
+         "ReadWrite":11974.369300150776,
+         "Write":8979.1523984946489
+      },
+      {
+         "Chunk Size":33554432,
+         "Read":6397.6427154041594,
+         "ReadWrite":8622.7344390411636,
+         "Write":7557.6116530724703
+      },
+      {
+         "Chunk Size":67108864,
+         "Read":3245.2328635534859,
+         "ReadWrite":8220.5221879601904,
+         "Write":4992.956834509856
+      },
+      {
+         "Chunk Size":134217728,
+         "Read":3201.6280625244235,
+         "ReadWrite":8025.3750060006905,
+         "Write":4745.3751110118837
+      },
+      {
+         "Chunk Size":268435456,
+         "Read":3181.163132813585,
+         "ReadWrite":8029.6010299663612,
+         "Write":4742.76614989878
+      }
+   ]
+}
diff --git a/toolflow/vivado/platform/aws/aws.tcl b/toolflow/vivado/platform/aws/aws.tcl
new file mode 100644
index 00000000..553835f7
--- /dev/null
+++ b/toolflow/vivado/platform/aws/aws.tcl
@@ -0,0 +1,783 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+namespace eval platform {
+
+  set platform_dirname "aws"
+
+  variable bd_design_name
+  set bd_design_name "cl"
+
+  # Instead of a bitstream, a tarfile is generated which is then
+  # processed by AWS in order to generate a loadable AFI.
+  variable disable_write_bitstream
+  set disable_write_bitstream true
+
+  # Using OOC synthesis is mandatory for this platform.
+  variable ooc_synth_mode
+  set ooc_synth_mode true
+
+  namespace export create
+  namespace export max_masters
+  namespace export create_subsystem_clocks_and_resets
+  namespace export create_subsystem_host
+  namespace export create_subsystem_memory
+  namespace export create_subsystem_intc
+  namespace export create_subsystem_tapasco
+  namespace export generate_wrapper
+
+  proc max_masters {} {
+    return [list [::tapasco::get_platform_num_slots]]
+  }
+
+  proc number_of_interrupt_controllers {} {
+    return 1
+  }
+
+  proc get_platform_base_address {} {
+    return 0
+  }
+
+  proc get_pe_base_address {} {
+    return 0x20000
+  }
+
+  proc get_address_map {{pe_base ""}} {
+    set max32 [expr "1 << 32"]
+    set max64 [expr "1 << 64"]
+    if {$pe_base == ""} { set pe_base [get_pe_base_address] }
+    set peam [::arch::get_address_map $pe_base]
+    set extra_masters_t [tapasco::call_plugins "post-address-map"]
+    set extra_masters [dict create ]
+    foreach {key value} $extra_masters_t {
+        dict set extra_masters $key $value
+    }
+    puts "Computing addresses for masters ..."
+    foreach m [::tapasco::get_aximm_interfaces [get_bd_cells -filter "PATH !~ [::tapasco::subsystem::get arch]/*"]] {
+      switch -glob [get_property NAME $m] {
+        "M_DMA"      { foreach {base stride range comp} [list 0x00004000 0x2000  0      "PLATFORM_COMPONENT_DMA0"] {} }
+        "M_INTC"     { foreach {base stride range comp} [list 0x00010000 0x2000  0      "PLATFORM_COMPONENT_INTC0"] {} }
+        "M_MSIX"     { foreach {base stride range comp} [list 0          0       $max64 "PLATFORM_COMPONENT_MSIX0"] {} }
+        "M_TAPASCO"  { foreach {base stride range comp} [list 0x00000000 0       0      "PLATFORM_COMPONENT_STATUS"] {} }
+        "M_MEM_GPIO" { foreach {base stride range comp} [list 0x00002000 0       0      "PLATFORM_COMPONENT_MEM_GPIO"] {} }
+        "M_HOST"     { foreach {base stride range comp} [list 0          0       $max64 ""] {} }
+        "M_MEM_0"    { foreach {base stride range comp} [list 0          0       $max64 ""] {} }
+        "M_ARCH"     { set base "skip" }
+        "M_DDR"      { foreach {base stride range comp} [list 0 0 0 ""] {} }
+        default      { if { [dict exists $extra_masters [get_property NAME $m]] } {
+                           set l [dict get $extra_masters [get_property NAME $m]]
+                           set base [lindex $l 0]
+                           set stride [lindex $l 1]
+                           set range [lindex $l 2]
+                           set comp [lindex $l 3]
+                           puts "Special address for [get_property NAME $m] base: $base stride: $stride range: $range comp: $comp"
+                       } else {
+                           error "No address defined for [get_property NAME $m], please make sure to define one in post-address-map plugin"
+                       }
+                     }
+
+      }
+      if {$base != "skip"} { set peam [addressmap::assign_address $peam $m $base $stride $range $comp] }
+    }
+    return $peam
+  }
+
+  proc create_subsystem_intc {} {
+
+    set irqs [arch::get_irqs]
+    set num_design_irqs 0
+    foreach irq_port $irqs {
+      set i [expr [get_property LEFT $irq_port] + 1]
+      puts "Interrupt line $irq_port width is $i"
+      incr num_design_irqs $i
+    }
+
+    puts "Connecting $num_design_irqs design interrupt(s)..."
+
+    set s_axi [create_bd_intf_pin -mode Slave -vlnv [tapasco::ip::get_vlnv "aximm_intf"] "S_INTC"]
+    set aclk [tapasco::subsystem::get_port "host" "clk"]
+    set p_aresetn [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"]
+    set design_aclk [tapasco::subsystem::get_port "design" "clk"]
+    set design_aresetn [tapasco::subsystem::get_port "design" "rst" "peripheral" "resetn"]
+    set ic_aresetn [::tapasco::subsystem::get_port "host" "rst" "interconnect"]
+
+    set dma_irq_read [create_bd_pin -type "intr" -dir I "dma_irq_read"]
+    set dma_irq_write [create_bd_pin -type "intr" -dir I "dma_irq_write"]
+
+    # using type "undef" instead of "intr" to be compatible with F1 shell
+    set irq_output [create_bd_pin -from 15 -to 0 -type "undef" -dir O "interrupts"]
+    set ack_input [create_bd_pin -from 15 -to 0 -type "undef" -dir I "interrupts_ack"]
+
+    # Concat for design interrupts
+    set irq_concat_design [tapasco::ip::create_xlconcat "interrupt_concat_design" 4]
+    set_property -dict [list CONFIG.IN0_WIDTH.VALUE_SRC USER \
+                        CONFIG.IN1_WIDTH.VALUE_SRC USER \
+                        CONFIG.IN2_WIDTH.VALUE_SRC USER \
+                        CONFIG.IN3_WIDTH.VALUE_SRC USER\
+                        CONFIG.IN0_WIDTH {32} \
+                        CONFIG.IN1_WIDTH {32} \
+                        CONFIG.IN2_WIDTH {32} \
+                        CONFIG.IN3_WIDTH {32} ] $irq_concat_design
+    # Concat for DMA interrupts
+    set irq_concat_dma [tapasco::ip::create_xlconcat "interrupt_concat_dma" 4]
+    # Interrupt Controller
+    set intr_ctrl [tapasco::ip::create_aws_intr_ctrl "aws_intr_ctrl"]
+
+    connect_bd_net [get_bd_pins -of_objects $irq_concat_design -filter {NAME == "dout"}] \
+      [get_bd_pins -of_objects $intr_ctrl -filter {NAME == "interrupt_design"}]
+
+    connect_bd_net [get_bd_pin -of_objects $irq_concat_dma -filter {NAME == "dout"}] \
+      [get_bd_pin -of_objects $intr_ctrl -filter {NAME == "interrupt_pcie"}]
+
+    # Connect DMA interrupts
+    connect_bd_net $dma_irq_read [get_bd_pin -of_objects $irq_concat_dma -filter {NAME == "In0"}]
+    connect_bd_net $dma_irq_write [get_bd_pin -of_objects $irq_concat_dma -filter {NAME == "In1"}]
+    puts "Unused Interrupts: 2, 3 are tied to 0"
+    set irq_unused [tapasco::ip::create_constant "irq_unused_dma" 1 0]
+    connect_bd_net [get_bd_pin -of_object $irq_unused -filter {NAME == "dout"}] \
+      [get_bd_pin -of_objects $irq_concat_dma -filter {NAME == "In2"}]
+    connect_bd_net [get_bd_pin -of_object $irq_unused -filter {NAME == "dout"}] \
+      [get_bd_pin -of_objects $irq_concat_dma -filter {NAME == "In3"}]
+
+    for {set i 0} {$i < [llength $irqs]} {incr i} {
+      set port [create_bd_pin -from 31 -to 0 -dir I -type intr "intr_$i"]
+      connect_bd_net $port [get_bd_pin -of_objects $irq_concat_design -filter "NAME == In$i"]
+    }
+    if {$i < 4} {
+      set unused [tapasco::ip::create_constant "irq_unused_design" 32 0]
+      for {set j $i} {$j < 4} {incr j} {
+        connect_bd_net [get_bd_pins $unused/dout] [get_bd_pin -of_objects $irq_concat_design -filter "NAME == In$j"]
+      }
+    }
+
+    # connect internal clocks
+    connect_bd_net $aclk [get_bd_pins -of_objects $intr_ctrl -filter {NAME == "S_AXI_ACLK"}]
+    connect_bd_net $design_aclk [get_bd_pins -of_objects $intr_ctrl -filter {NAME == "design_clk"}]
+    connect_bd_net $p_aresetn [get_bd_pins -of_objects $intr_ctrl -filter {NAME == "S_AXI_ARESETN"}]
+    connect_bd_net $design_aresetn [get_bd_pins -of_objects $intr_ctrl -filter {NAME == "design_rst"}]
+
+    # connect S_AXI
+    connect_bd_intf_net $s_axi [get_bd_intf_pins -of_objects $intr_ctrl -filter {NAME == "S_AXI"}]
+
+    connect_bd_net [get_bd_pins -of_object $intr_ctrl -filter {NAME == "irq_req"}] $irq_output
+    connect_bd_net $ack_input [get_bd_pins -of_object $intr_ctrl -filter {NAME == "irq_ack"}]
+  }
+
+  # Creates the memory subsystem
+  proc create_subsystem_memory {} {
+    set m_axi_mem [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_HOST"]
+    set s_axi_ddma [create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 "S_DMA"]
+    set s_axi_gpio [create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 "S_MEM_GPIO"]
+
+    set pcie_aclk [tapasco::subsystem::get_port "host" "clk"]
+
+    set pcie_p_aresetn [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"]
+
+    set irq_read [create_bd_pin -type "intr" -dir "O" "dma_irq_read"]
+    set irq_write [create_bd_pin -type "intr" -dir "O" "dma_irq_write"]
+
+    set ddr_ready [create_bd_pin -type "undef" -dir "I" "ddr_ready"]
+
+    set gpio [tapasco::ip::create_axi_gpio "axi_gpio"]
+    set_property -dict [list CONFIG.C_GPIO_WIDTH {4} CONFIG.C_ALL_INPUTS {1}] $gpio
+    connect_bd_net $ddr_ready [get_bd_pins "$gpio/gpio_io_i"]
+    connect_bd_intf_net $s_axi_gpio [get_bd_intf_pins "$gpio/S_AXI"]
+    connect_bd_net [get_bd_pins $gpio/s_axi_aclk] [tapasco::subsystem::get_port "host" "clk"]
+    connect_bd_net [get_bd_pins $gpio/s_axi_aresetn] [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"]
+
+    set dma [tapasco::ip::create_bluedma_x16 "dma"]
+    connect_bd_net [get_bd_pins $dma/IRQ_read] $irq_read
+    connect_bd_net [get_bd_pins $dma/IRQ_write] $irq_write
+
+    # connect DMA 64bit to external port
+    connect_bd_intf_net [get_bd_intf_pins $dma/M64_AXI] $m_axi_mem
+
+    # connect DMA S_AXI to external port
+    connect_bd_intf_net $s_axi_ddma [get_bd_intf_pins $dma/S_AXI]
+
+    # create port for access to DDR memory
+    set m_ddr [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_DDR"]
+
+    connect_bd_intf_net $m_ddr [get_bd_intf_pins "$dma/m32_axi"]
+
+    # connect PCIe clock and reset
+    connect_bd_net $pcie_aclk \
+      [get_bd_pins $dma/m32_axi_aclk] [get_bd_pins $dma/m64_axi_aclk] [get_bd_pins $dma/s_axi_aclk]
+
+    connect_bd_net $pcie_p_aresetn \
+      [get_bd_pins $dma/m32_axi_aresetn] [get_bd_pins $dma/m64_axi_aresetn] [get_bd_pins $dma/s_axi_aresetn]
+  }
+
+  proc create_subsystem_host {} {
+    variable pcie_width
+
+    set device_type [get_property ARCHITECTURE [get_parts -of_objects [current_project]]]
+    puts "Device type is $device_type"
+
+    # create hierarchical ports
+    set s_axi [create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 "S_HOST"]
+    set m_arch [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_ARCH"]
+    set m_intc [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_INTC"]
+    set m_tapasco [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_TAPASCO"]
+    set m_dma [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_DMA"]
+    set m_mem_gpio [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 "M_MEM_GPIO"]
+    set pcie_aclk [create_bd_pin -type "clk" -dir "O" "pcie_aclk"]
+    set pcie_aresetn [create_bd_pin -type "rst" -dir "O" "pcie_aresetn"]
+
+    # using type "undef" instead of "intr" to be compatible with F1 shell
+    set irq_input [create_bd_pin -type "undef" -dir I "interrupts"]
+    set ack_output [create_bd_pin -type "undef" -dir O "interrupts_ack"]
+
+    # create instances of shell
+    set f1_inst [create_f1_shell]
+
+    set oldCurInst [current_bd_instance .]
+    current_bd_instance "/arch"
+    set arch_axi_m [get_bd_intf_pins -filter {VLNV == "xilinx.com:interface:aximm_rtl:1.0" && MODE == "Master"}]
+    current_bd_instance $oldCurInst
+
+    connect_bd_net $irq_input [get_bd_pins "$f1_inst/irq_req"]
+    connect_bd_net $ack_output [get_bd_pins "$f1_inst/irq_ack"]
+
+    # create clocking wizard instance and ports
+    #     0   1   2   3
+    # A: 250 125 375 500
+    # B: 450 225
+    # C: 150 200
+
+    switch [tapasco::get_design_frequency] {
+      "250" {
+          set clk_group "a"
+          set clk_port "0"
+      }
+      "125" {
+          set clk_group "a"
+          set clk_port "1"
+      }
+      "375" {
+          set clk_group "a"
+          set clk_port "2"
+      }
+      "500" {
+          set clk_group "a"
+          set clk_port "3"
+      }
+      "450" {
+          set clk_group "b"
+          set clk_port "0"
+      }
+      "225" {
+          set clk_group "b"
+          set clk_port "1"
+      }
+      "150" {
+          set clk_group "c"
+          set clk_port "0"
+      }
+      "200" {
+          set clk_group "c"
+          set clk_port "1"
+      }
+    }
+
+    set clkwiz_design_aclk [create_bd_pin -type "clk" -dir "O" "design_aclk"]
+    set clkwiz_design_aresetn [create_bd_pin -type "rst" -dir "O" "design_aresetn"]
+
+    if {[info exist clk_group] eq 0} {
+      set design_clk_wiz [tapasco::ip::create_clk_wiz design_clk_wiz]
+      set_property -dict [list CONFIG.CLK_OUT1_PORT {design_clk} \
+                          CONFIG.USE_SAFE_CLOCK_STARTUP {false} \
+                          CONFIG.CLKOUT1_REQUESTED_OUT_FREQ [tapasco::get_design_frequency] \
+                          CONFIG.USE_LOCKED {true} \
+                          CONFIG.USE_RESET {true} \
+                          CONFIG.RESET_TYPE {ACTIVE_LOW} \
+                          CONFIG.RESET_PORT {resetn} \
+                          ] $design_clk_wiz
+
+      connect_bd_net [get_bd_pins $design_clk_wiz/resetn] [get_bd_pins "$f1_inst/rst_main_n_out"]
+      connect_bd_net [get_bd_pins $design_clk_wiz/clk_in1] [get_bd_pins "$f1_inst/clk_extra_a1_out"]
+
+      # connect external design clk
+      connect_bd_net [get_bd_pins $design_clk_wiz/design_clk] $clkwiz_design_aclk
+      connect_bd_net [get_bd_pins $design_clk_wiz/locked] $clkwiz_design_aresetn
+    } else {
+      set_property -dict [list \
+          "CONFIG.NUM_[string toupper $clk_group]_CLOCKS" [expr "$clk_port + 1"] \
+          CONFIG.CLOCK_B_RECIPE {2} \
+          CONFIG.CLOCK_C_RECIPE {1} \
+      ] $f1_inst
+
+      if {$clk_group == "a" && $clk_port == "0"} {
+        connect_bd_net [get_bd_pins "$f1_inst/clk_main_a0_out"] $clkwiz_design_aclk
+      } else {
+        connect_bd_net [get_bd_pins "$f1_inst/clk_extra_${clk_group}${clk_port}_out"] $clkwiz_design_aclk
+      }
+      connect_bd_net [get_bd_pins "$f1_inst/rst_main_n_out"] $clkwiz_design_aresetn
+    }
+
+    # DDR training status
+    set ddr_ready [create_bd_pin -type "undef" -dir O "ddr_ready"]
+    set ddr_concat [tapasco::ip::create_xlconcat "ddr_ready_concat" 4]
+    connect_bd_net [get_bd_pins $ddr_concat/dout] $ddr_ready
+
+    # Connect DDR ports (DDR C is inside the Shell and should always be available)
+    set ddr_available {}
+    set i 0
+    foreach x {A B C D} {
+      if {[get_property "CONFIG.DDR_${x}_PRESENT" $f1_inst] eq 1} {
+        set ddr_available [lappend ddr_available $x]
+        connect_bd_net [get_bd_pins "$f1_inst/ddr[string tolower $x]_is_ready"] [get_bd_pins "$ddr_concat/In${i}"]
+      }
+      incr i
+    }
+
+    # Connect DMA engine and architecture to local memory
+
+    # set ddr_ic [tapasco::ip::create_axi_sc "ddr_ic" [expr "1 + [llength $arch_axi_m]"] [llength $ddr_available]]
+    # set_property -dict [list CONFIG.NUM_CLKS {2}] $ddr_ic
+    # connect_bd_net [tapasco::subsystem::get_port "design" "clk"] [get_bd_pins $ddr_ic/aclk1]
+    # connect_bd_net [tapasco::subsystem::get_port "host" "clk"] [get_bd_pins $ddr_ic/aclk]
+
+    set ddr_ic [tapasco::ip::create_axi_ic "ddr_ic" 2 [llength $ddr_available]]
+
+    connect_bd_net [tapasco::subsystem::get_port "host" "clk"] \
+      [get_bd_pins $ddr_ic/ACLK] \
+      [get_bd_pins -of_objects $ddr_ic -filter {NAME =~ S00_* && TYPE == clk}] \
+      [get_bd_pins -of_objects $ddr_ic -filter {NAME =~ M* && TYPE == clk}]
+
+    connect_bd_net [tapasco::subsystem::get_port "design" "clk"] \
+      [get_bd_pins -of_objects $ddr_ic -filter {NAME =~ S01_* && TYPE == clk}]
+
+    connect_bd_net [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"] \
+      [get_bd_pins $ddr_ic/ARESETN] \
+      [get_bd_pins -of_objects $ddr_ic -filter {NAME =~ S00* && TYPE == rst}] \
+      [get_bd_pins -of_objects $ddr_ic -filter {NAME =~ M* && TYPE == rst}]
+
+    connect_bd_net [tapasco::subsystem::get_port "design" "rst" "peripheral" "resetn"] \
+      [get_bd_pins -of_objects $ddr_ic -filter {NAME =~ S01_* && TYPE == rst}]
+
+    set num_ddr 0
+    foreach x $ddr_available {
+      puts "Connect AXI master $num_ddr to DDR port $x"
+      connect_bd_intf_net [get_bd_intf_pins "$ddr_ic/M0${num_ddr}_AXI"] [get_bd_intf_pins "$f1_inst/S_AXI_DDR${x}"]
+      incr num_ddr
+    }
+
+    set s_ddr [create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 "S_DDR"]
+    connect_bd_intf_net [get_bd_intf_pins "$ddr_ic/S00_AXI"] $s_ddr
+
+    for {set i 0} {$i < [llength $arch_axi_m]} {incr i} {
+      set s_axi_mem [create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 [format "S_MEM_%d" $i]]
+      connect_bd_intf_net [get_bd_intf_pins [format "$ddr_ic/S%02d_AXI" [expr "$i + 1"]]] $s_axi_mem
+    }
+
+    # Connect configuration AXI ports (connected to 32 MB BAR provided by the Shell)
+
+    # set out_ic [tapasco::ip::create_axi_sc "out_ic" 1 4]
+    # tapasco::ip::connect_sc_default_clocks $out_ic "design"
+
+    # connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M00_AXI}] $m_arch
+    # connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M01_AXI}] $m_tapasco
+    # connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M02_AXI}] $m_dma
+    # connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M03_AXI}] $m_intc
+
+    # connect_bd_intf_net [get_bd_intf_pins "$out_ic/S00_AXI"] [get_bd_intf_pins "$f1_inst/M_AXI_OCL"]
+
+    set out_ic [tapasco::ip::create_axi_ic "out_ic" 1 5]
+
+    set_property -dict [list \
+      CONFIG.ENABLE_ADVANCED_OPTIONS {1} \
+      CONFIG.XBAR_DATA_WIDTH {32} \
+    ] $out_ic
+
+    connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M00_AXI}] $m_arch
+    connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M01_AXI}] $m_tapasco
+    connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M02_AXI}] $m_dma
+    connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M03_AXI}] $m_intc
+    connect_bd_intf_net [get_bd_intf_pins -of_objects $out_ic -filter {NAME == M04_AXI}] $m_mem_gpio
+
+    connect_bd_net [tapasco::subsystem::get_port "host" "clk"] \
+      [get_bd_pins $out_ic/ACLK] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ S0* && TYPE == clk}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M01_* && TYPE == clk}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M02_* && TYPE == clk}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M03_* && TYPE == clk}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M04_* && TYPE == clk}]
+
+    connect_bd_net [tapasco::subsystem::get_port "design" "clk"] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M00_* && TYPE == clk}]
+
+    connect_bd_net [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"] \
+      [get_bd_pins $out_ic/ARESETN] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ S0* && TYPE == rst}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M01_* && TYPE == rst}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M02_* && TYPE == rst}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M03_* && TYPE == rst}] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M04_* && TYPE == rst}]
+
+    connect_bd_net [tapasco::subsystem::get_port "design" "rst" "peripheral" "resetn"] \
+      [get_bd_pins -of_objects $out_ic -filter {NAME =~ M00_* && TYPE == rst}]
+
+    connect_bd_intf_net [get_bd_intf_pins "$f1_inst/M_AXI_OCL"] [get_bd_intf_pins "$out_ic/S00_AXI"]
+
+    # Connect "in" AXI ports
+    set in_ic [tapasco::ip::create_axi_ic "in_ic" 1 1]
+
+    connect_bd_net [tapasco::subsystem::get_port "host" "clk"] \
+      [get_bd_pins -of_objects $in_ic -filter {TYPE == clk}]
+
+    connect_bd_net [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"] \
+      [get_bd_pins -of_objects $in_ic -filter {TYPE == rst}]
+
+    connect_bd_intf_net [get_bd_intf_pins S_HOST] \
+      [get_bd_intf_pins -of_objects $in_ic -filter {NAME == S00_AXI}]
+    connect_bd_intf_net [get_bd_intf_pins -of_object $in_ic -filter { MODE == Master }] \
+      [get_bd_intf_pins "$f1_inst/S_AXI_PCIM"]
+  }
+
+  proc create_subsystem_clocks_and_resets {} {
+    # create ports
+    set pcie_clk [create_bd_pin -type "clk" -dir "I" "pcie_aclk"]
+    set pcie_aresetn [create_bd_pin -type "rst" -dir "I" "pcie_aresetn"]
+    set ddr_clk [create_bd_pin -type "clk" -dir "I" "ddr_aclk"]
+    set ddr_clk_aresetn [create_bd_pin -type "rst" -dir "I" "ddr_aresetn"]
+    set design_clk [create_bd_pin -type "clk" -dir "I" "design_aclk"]
+    set design_clk_aresetn [create_bd_pin -type "rst" -dir "I" "design_aresetn"]
+
+    # create reset generator
+    set host_rst_gen [tapasco::ip::create_rst_gen "host_rst_gen"]
+    set design_rst_gen [tapasco::ip::create_rst_gen "design_rst_gen"]
+    set mem_rst_gen [tapasco::ip::create_rst_gen "mem_rst_gen"]
+
+    # connect external ports
+    connect_bd_net $pcie_clk [get_bd_pins $host_rst_gen/slowest_sync_clk] [tapasco::subsystem::get_port "host" "clk"]
+    connect_bd_net $pcie_aresetn [get_bd_pins $host_rst_gen/ext_reset_in]
+
+    connect_bd_net $ddr_clk [get_bd_pins $mem_rst_gen/slowest_sync_clk] [tapasco::subsystem::get_port "mem" "clk"]
+    connect_bd_net $ddr_clk_aresetn [get_bd_pins $mem_rst_gen/ext_reset_in]
+
+    connect_bd_net $design_clk [get_bd_pins $design_rst_gen/slowest_sync_clk] [tapasco::subsystem::get_port "design" "clk"]
+    connect_bd_net $design_clk_aresetn [get_bd_pins $design_rst_gen/ext_reset_in]
+
+    # connect to clock reset master
+    connect_bd_net [get_bd_pins $host_rst_gen/peripheral_aresetn] [tapasco::subsystem::get_port "host" "rst" "peripheral" "resetn"]
+    connect_bd_net [get_bd_pins $host_rst_gen/peripheral_reset] [tapasco::subsystem::get_port "host" "rst" "peripheral" "reset"]
+    connect_bd_net [get_bd_pins $host_rst_gen/interconnect_aresetn] [tapasco::subsystem::get_port "host" "rst" "interconnect"]
+
+    connect_bd_net [get_bd_pins $design_rst_gen/peripheral_aresetn] [tapasco::subsystem::get_port "design" "rst" "peripheral" "resetn"]
+    connect_bd_net [get_bd_pins $design_rst_gen/peripheral_reset] [tapasco::subsystem::get_port "design" "rst" "peripheral" "reset"]
+    connect_bd_net [get_bd_pins $design_rst_gen/interconnect_aresetn] [tapasco::subsystem::get_port "design" "rst" "interconnect"]
+
+    connect_bd_net [get_bd_pins $mem_rst_gen/peripheral_aresetn] [tapasco::subsystem::get_port "mem" "rst" "peripheral" "resetn"]
+    connect_bd_net [get_bd_pins $mem_rst_gen/peripheral_reset] [tapasco::subsystem::get_port "mem" "rst" "peripheral" "reset"]
+    connect_bd_net [get_bd_pins $mem_rst_gen/interconnect_aresetn] [tapasco::subsystem::get_port "mem" "rst" "interconnect"]
+  }
+
+  proc readfile {filename} {
+    set f [open $filename]
+    set data [read $f]
+    close $f
+    return $data
+  }
+
+  proc create_f1_shell {} {
+    puts "Creating AWS F1 Shell ..."
+
+    set_property ip_repo_paths  "[get_property ip_repo_paths [current_project]] \
+        [file join $::env(HDK_SHELL_DIR) hlx design ip aws_v1_0]" [current_project]
+
+    update_ip_catalog
+
+    # Create interface ports
+    set S_SH [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:aws_f1_sh1_rtl:1.0 S_SH ]
+
+    # Create instance: f1_inst, and set properties
+    set f1_inst [ create_bd_cell -type ip -vlnv xilinx.com:ip:aws:1.0 f1_inst ]
+    set_property -dict [ list \
+        CONFIG.AUX_PRESENT {1} \
+        CONFIG.BAR1_PRESENT {0} \
+        CONFIG.NUM_A_CLOCKS {2} \
+        CONFIG.CLOCK_A_RECIPE {1} \
+        CONFIG.DEVICE_ID {0xF000} \
+        CONFIG.PCIS_PRESENT {0} \
+        CONFIG.PCIM_PRESENT {1} \
+        CONFIG.DDR_A_PRESENT {1} \
+        CONFIG.DDR_B_PRESENT {1} \
+        CONFIG.DDR_C_PRESENT {1} \
+        CONFIG.DDR_D_PRESENT {1} \
+        CONFIG.OCL_PRESENT {1} \
+        CONFIG.SDA_PRESENT {0} \
+    ] $f1_inst
+
+    set ddr_aclk [create_bd_pin -type "clk" -dir "O" "ddr_aclk"]
+    set ddr_aresetn [create_bd_pin -type "rst" -dir "O" "ddr_aresetn"]
+
+    # Connect S_SH pin
+    set oldCurInst [current_bd_instance .]
+    current_bd_instance
+    connect_bd_intf_net $S_SH [get_bd_intf_pins $f1_inst/S_SH]
+    current_bd_instance $oldCurInst
+
+    connect_bd_net [get_bd_pins "pcie_aclk"] [get_bd_pins "$f1_inst/clk_main_a0_out"]
+    connect_bd_net [get_bd_pins "pcie_aresetn"] [get_bd_pins "$f1_inst/rst_main_n_out"]
+
+    connect_bd_net $ddr_aclk [get_bd_pins "$f1_inst/clk_main_a0_out"]
+    connect_bd_net $ddr_aresetn [get_bd_pins "$f1_inst/rst_main_n_out"]
+
+    set ::timestamp [exec date +%y_%m_%d-%H%M%S]
+
+    if {[regexp {HDK_VERSION=([0-9.]+)} [readfile ${::env(HDK_DIR)}/hdk_version.txt] match ::hdk_version] eq 0} {
+      puts "WARNING: Could not read HDK_VERSION, using default value"
+      set ::hdk_version 1.0.0
+    }
+
+    set ::clock_recipe_a "1"
+    set ::clock_recipe_b "2"
+    set ::clock_recipe_c "1"
+
+    set ::device_id [get_property CONFIG.DEVICE_ID [get_bd_cells $f1_inst]]
+    set ::vendor_id [get_property CONFIG.VENDOR_ID [get_bd_cells $f1_inst]]
+    set ::subsystem_id [get_property CONFIG.SUBSYSTEM_ID [get_bd_cells $f1_inst]]
+    set ::subsystem_vendor_id [get_property CONFIG.SUBSYSTEM_VENDOR_ID [get_bd_cells $f1_inst]]
+
+    set ::faas_shell_version [get_property CONFIG.SHELL_VERSION [get_bd_cells $f1_inst]]
+    set ::shell_version $::faas_shell_version
+
+    puts "timestamp           = ${::timestamp}"
+    puts "hdk_version         = ${::hdk_version}"
+    puts "clock_recipe_a      = ${::clock_recipe_a}"
+    puts "clock_recipe_b      = ${::clock_recipe_b}"
+    puts "clock_recipe_c      = ${::clock_recipe_c}"
+    puts "device_id           = ${::device_id}"
+    puts "vendor_id           = ${::vendor_id}"
+    puts "subsystem_id        = ${::subsystem_id}"
+    puts "subsystem_vendor_id = ${::subsystem_vendor_id}"
+    puts "shell_version       = ${::shell_version}"
+
+    set ::env(timestamp) $::timestamp
+    set ::env(hdk_version) $::hdk_version
+
+    set ::env(CLOCK_A_RECIPE) $::clock_recipe_a
+    set ::env(CLOCK_B_RECIPE) $::clock_recipe_b
+    set ::env(CLOCK_C_RECIPE) $::clock_recipe_c
+
+    set ::env(device_id) $::device_id
+    set ::env(vendor_id) $::vendor_id
+    set ::env(subsystem_id) $::subsystem_id
+    set ::env(subsystem_vendor_id) $::subsystem_vendor_id
+
+    set ::env(FAAS_SHELL_VERSION) $::faas_shell_version
+
+    create_constraints
+
+    return $f1_inst
+  }
+
+  proc create_constraints {} {
+    variable platform_dirname
+
+    set constraints_fn [file join $::env(TAPASCO_HOME_TCL) platform $platform_dirname constraints 250 cl_clocks_aws.xdc]
+
+    add_files -fileset constrs_1 -norecurse $constraints_fn -force
+
+    set_property PROCESSING_ORDER EARLY [get_files */cl_clocks_aws.xdc]
+    set_property USED_IN {synthesis out_of_context implementation} [get_files */cl_clocks_aws.xdc]
+
+    # Additional constraints for custom logic (CL) synthesis
+    set constraints_fn [file join $::env(HDK_SHELL_DIR) new_cl_template build constraints cl_synth_user.xdc]
+    import_files -fileset constrs_1 -force $constraints_fn
+
+    # Additional constraints for top level implementation
+    set constraints_fn [file join $::env(HDK_SHELL_DIR) new_cl_template build constraints cl_pnr_user.xdc]
+    import_files -fileset constrs_1 -force $constraints_fn
+    set_property PROCESSING_ORDER LATE [get_files */cl_pnr_user.xdc]
+    set_property USED_IN {implementation} [get_files */cl_pnr_user.xdc]
+
+    set_property is_enabled false [get_files */cl_pnr_user.xdc]
+    set ::env(PNR_USER) [get_files */cl_pnr_user.xdc]
+
+    add_files -norecurse [file join $::env(HDK_SHELL_DIR) hlx design lib cl_top.sv]
+  }
+
+  proc generate_wrapper {} {
+    puts "Using provided wrapper."
+  }
+
+  # Begin plugins
+
+  namespace eval aws_plugins {
+
+    proc set_params {args} {
+      set_msg_config -id {Opt 31-430}       -suppress
+      set_msg_config -string {AXI_QUAD_SPI} -suppress
+
+      set_param hd.supportClockNetCrossDiffReconfigurablePartitions 1
+      set_param physynth.ultraRAMOptOutput false
+      set_param synth.elaboration.rodinMoreOptions {rt::set_parameter disableOregPackingUram true}
+
+      # Create directories for output files
+      set ::FAAS_CL_DIR [get_property DIRECTORY [current_project]]
+      set ::env(FAAS_CL_DIR) $::FAAS_CL_DIR
+
+      file mkdir [file join ${::FAAS_CL_DIR} build checkpoints to_aws]
+      file mkdir [file join ${::FAAS_CL_DIR} build reports]
+
+      set platform_dirname $::platform::platform_dirname
+      set current_run [get_runs [current_run -implementation]]
+
+      # Set TCL pre/post hooks
+      set_property -name "STEPS.OPT_DESIGN.TCL.PRE" \
+        -value [file normalize [file join $::env(TAPASCO_HOME_TCL) platform $platform_dirname hooks opt_design_pre.tcl]] \
+        -objects $current_run
+
+      set_property -name "STEPS.OPT_DESIGN.TCL.POST" \
+        -value [file normalize [file join $::env(TAPASCO_HOME_TCL) platform $platform_dirname hooks opt_design_post.tcl]] \
+        -objects $current_run
+
+      set_property -name "STEPS.ROUTE_DESIGN.TCL.POST" \
+        -value [file normalize [file join $::env(TAPASCO_HOME_TCL) platform $platform_dirname hooks route_design_post.tcl]] \
+        -objects $current_run
+
+      return $args
+    }
+
+    # Before synthesis
+    proc pre_synth {args} {
+      set synth_run [get_runs synth_1]
+      set_property -dict [list \
+        {STEPS.SYNTH_DESIGN.ARGS.MORE OPTIONS} {-mode out_of_context -max_uram_cascade_height 1} \
+        STEPS.SYNTH_DESIGN.ARGS.RETIMING true \
+      ] $synth_run
+
+      # Work around an obscure bug that sometimes crashes Vivado
+      validate_bd_design -force
+
+      return $args
+    }
+
+    proc post_synth {args} {
+      set script_dir [file join $::env(HDK_SHELL_DIR) hlx build scripts subscripts]
+
+      set const_dir [file normalize [file join ${::FAAS_CL_DIR} build constraints]]
+      file mkdir $const_dir
+
+      file copy -force [file normalize [file join $script_dir cl_debug_bridge_hlx.xdc]] \
+        [file normalize [file join $const_dir cl_debug_bridge_hlx.xdc]]
+
+      set vivado_cmd "vivado -mode batch -source [file normalize [file join $script_dir make_post_synth_dcp.tcl]] -tclargs\
+        -TOP [get_property top [current_fileset]]\
+        -IP_REPO [get_property IP_OUTPUT_REPO [get_project [get_projects]]]\
+        -SYNTH_DIR [get_property DIRECTORY [current_run -synthesis]]\
+        -BD_PATH [get_files */cl.bd]\
+        -XDC [get_files */cl_clocks_aws.xdc]\
+        -USR_XDC [get_files */cl_synth_user.xdc]\
+        -AWS_XDC NONE\
+        -LINK_DCP_PATH [file join ${::FAAS_CL_DIR} build checkpoints CL.post_synth.dcp]"
+
+      puts "Create post synth DCP:\n\t${vivado_cmd}"
+      exec {*}${vivado_cmd}
+      puts "Finished!\n\n"
+    }
+
+    proc create_tarfile {} {
+      puts "\nwrite_bitstream disabled, creating tarfile instead..."
+
+      puts "Locking design..."
+      lock_design -level routing
+
+      set to_aws_dir [file join ${::FAAS_CL_DIR} build checkpoints to_aws]
+
+      puts "Writing final encrypted DCP..."
+      set final_dcp [file join ${to_aws_dir} "${::timestamp}.SH_CL_routed.dcp"]
+      write_checkpoint -force $final_dcp -encrypt
+
+      puts "Writing manifest file..."
+
+      set dcp_hash [lindex [split [exec sha256sum $final_dcp]] 0]
+      set tool_version [string range [version -short] 0 5]
+
+      set manifest [open [file join ${to_aws_dir} "${::timestamp}.manifest.txt"] w]
+      puts $manifest [join [list\
+        "manifest_format_version=2"\
+        "pci_vendor_id=${::vendor_id}"\
+        "pci_device_id=${::device_id}"\
+        "pci_subsystem_id=${::subsystem_id}"\
+        "pci_subsystem_vendor_id=${::subsystem_vendor_id}"\
+        "dcp_hash=${dcp_hash}"\
+        "shell_version=${::shell_version}"\
+        "tool_version=v${tool_version}"\
+        "dcp_file_name=${::timestamp}.SH_CL_routed.dcp"\
+        "hdk_version=${::hdk_version}"\
+        "date=${::timestamp}"\
+        "clock_recipe_a=A${::clock_recipe_a}"\
+        "clock_recipe_b=B${::clock_recipe_b}"\
+        "clock_recipe_c=C${::clock_recipe_c}"\
+      ] "\n"]
+      close $manifest
+
+      package require tar
+
+      set tarfilepath [file normalize [file join $::FAAS_CL_DIR .. "${::bitstreamname}.tar"]]
+
+      # Add checkpoint and manifest to tar file from which the AFI can be generated
+      # (tar file must contains "to_aws" folder, so change directory accordingly)
+      set old_pwd [pwd]
+      cd [file normalize [file join $to_aws_dir ..]]
+      tar::create $tarfilepath [glob to_aws/${::timestamp}*]
+      cd $old_pwd
+
+      puts "\n\nFinished creating tarfile:"
+      puts "$tarfilepath\n\n"
+    }
+
+    proc check_hdk {} {
+      if {[info exist ::env(HDK_SHELL_DIR)] eq 0} {
+        puts "****************************************************************"
+        puts "* Environment variable HDK_SHELL_DIR is not set.               *"
+        puts "* This likely means the F1 HDK has not been (properly) set up. *"
+        puts "* Please download/clone the current version from:              *"
+        puts "* https://github.com/aws/aws-fpga                              *"
+        puts "* Before using TaPaSCo, run 'source hdk_setup.sh'.             *"
+        puts "****************************************************************"
+        exit 1
+      }
+    }
+
+    proc post_addr_map {} {
+      # Debug failed address mapping
+      save_bd_design
+
+      # Dummy component which can be used to identify the F1 platform
+      ::platform::addressmap::add_platform_component "PLATFORM_COMPONENT_AWS_EC2" 0 0
+    }
+  }
+
+  # End plugins
+
+  # Register plugins
+  tapasco::register_plugin "platform::aws_plugins::check_hdk" "post-init"
+  tapasco::register_plugin "platform::aws_plugins::set_params" "pre-arch"
+  tapasco::register_plugin "platform::aws_plugins::pre_synth" "pre-synth"
+  tapasco::register_plugin "platform::aws_plugins::post_synth" "post-synth"
+  tapasco::register_plugin "platform::aws_plugins::create_tarfile" "post-impl"
+  tapasco::register_plugin "platform::aws_plugins::post_addr_map" "post-address-map"
+
+}
+
+# vim: set expandtab ts=2 sw=2:
diff --git a/toolflow/vivado/platform/aws/constraints/250/aws_gen_clk_constraints.tcl b/toolflow/vivado/platform/aws/constraints/250/aws_gen_clk_constraints.tcl
new file mode 100644
index 00000000..c97f5469
--- /dev/null
+++ b/toolflow/vivado/platform/aws/constraints/250/aws_gen_clk_constraints.tcl
@@ -0,0 +1,18 @@
+set_property CLKFBOUT_MULT_F   6 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property DIVCLK_DIVIDE     1 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+
+set_property CLKOUT0_DIVIDE_F   6 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT1_DIVIDE    12 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT2_DIVIDE     4 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT3_DIVIDE     3 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+
+set_property CLKFBOUT_MULT_F  18 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk0/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property DIVCLK_DIVIDE     5 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk0/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT0_DIVIDE_F  2 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk0/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT1_DIVIDE    4 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk0/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+
+set_property CLKFBOUT_MULT_F  24 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk1/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property DIVCLK_DIVIDE     5 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk1/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT0_DIVIDE_F  8 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk1/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+set_property CLKOUT1_DIVIDE    6 [get_cells WRAPPER_INST/SH/kernel_clks_i/clkwiz_kernel_clk1/inst/CLK_CORE_DRP_I/clk_inst/mmcme3_adv_inst]
+
diff --git a/toolflow/vivado/platform/aws/constraints/250/cl_clocks_aws.xdc b/toolflow/vivado/platform/aws/constraints/250/cl_clocks_aws.xdc
new file mode 100644
index 00000000..18451330
--- /dev/null
+++ b/toolflow/vivado/platform/aws/constraints/250/cl_clocks_aws.xdc
@@ -0,0 +1,32 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# Group A Clocks
+create_clock -period 4  -name clk_main_a0 -waveform {0.000 2}  [get_ports clk_main_a0]
+create_clock -period 8 -name clk_extra_a1 -waveform {0.000 4} [get_ports clk_extra_a1]
+create_clock -period 2.667 -name clk_extra_a2 -waveform {0.000 1.333} [get_ports clk_extra_a2]
+create_clock -period 2 -name clk_extra_a3 -waveform {0.000 1} [get_ports clk_extra_a3]
+
+# Group B Clocks
+create_clock -period 2.222 -name clk_extra_b0 -waveform {0.000 1.111} [get_ports clk_extra_b0]
+create_clock -period 4.444 -name clk_extra_b1 -waveform {0.000 2.222} [get_ports clk_extra_b1]
+
+# Group C Clocks
+create_clock -period 6.667 -name clk_extra_c0 -waveform {0.000 3.333} [get_ports clk_extra_c0]
+create_clock -period 5 -name clk_extra_c1 -waveform {0.000 2.5} [get_ports clk_extra_c1]
diff --git a/toolflow/vivado/platform/aws/hooks/opt_design_post.tcl b/toolflow/vivado/platform/aws/hooks/opt_design_post.tcl
new file mode 100644
index 00000000..b15c2ecd
--- /dev/null
+++ b/toolflow/vivado/platform/aws/hooks/opt_design_post.tcl
@@ -0,0 +1,28 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+puts "Running opt_design post hook..."
+
+source [file join $::env(HDK_SHELL_DIR) hlx build scripts subscripts apply_debug_constraints_hlx.tcl]
+
+# "This ensures that there are no contentions on clock nets for designs that have large number of clock nets."
+# from `hdk/docs/AWS_Shell_V1.4_Migration_Guidelines.md`
+set_param hd.clockRoutingWireReduction false
+
+# vim: set expandtab ts=2 sw=2:
diff --git a/toolflow/vivado/platform/aws/hooks/opt_design_pre.tcl b/toolflow/vivado/platform/aws/hooks/opt_design_pre.tcl
new file mode 100644
index 00000000..b3122e6f
--- /dev/null
+++ b/toolflow/vivado/platform/aws/hooks/opt_design_pre.tcl
@@ -0,0 +1,44 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+puts "Running opt_design pre hook..."
+
+add_files [file join $::env(HDK_SHELL_DIR) build checkpoints from_aws SH_CL_BB_routed.dcp]
+
+add_files [file join $::env(FAAS_CL_DIR) build checkpoints CL.post_synth.dcp]
+
+set_property SCOPED_TO_CELLS {WRAPPER_INST/CL} [get_files [file join $::env(FAAS_CL_DIR) build checkpoints CL.post_synth.dcp]]
+
+read_xdc [file join $::env(HDK_SHELL_DIR) build constraints cl_ddr.xdc]
+
+read_xdc $::env(PNR_USER)
+set_property PROCESSING_ORDER LATE [get_files $::env(PNR_USER)]
+set_property USED_IN {implementation} [get_files $::env(PNR_USER)]
+
+link_design -top top_sp -part [get_parts -of_objects [current_project]] \
+  -reconfig_partitions {WRAPPER_INST/SH WRAPPER_INST/CL}
+
+set_property CLOCK_DEDICATED_ROUTE ANY_CMT_COLUMN [get_nets WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/clk_out2]
+set_property CLOCK_DEDICATED_ROUTE ANY_CMT_COLUMN [get_nets WRAPPER_INST/SH/kernel_clks_i/clkwiz_sys_clk/inst/CLK_CORE_DRP_I/clk_inst/clk_out3]
+
+source [file join $::env(TAPASCO_HOME_TCL) platform aws constraints 250 aws_gen_clk_constraints.tcl]
+
+source [file join $::env(HDK_SHELL_DIR) build scripts check_uram.tcl]
+
+# vim: set expandtab ts=2 sw=2:
diff --git a/toolflow/vivado/platform/aws/hooks/route_design_post.tcl b/toolflow/vivado/platform/aws/hooks/route_design_post.tcl
new file mode 100644
index 00000000..ec620a3e
--- /dev/null
+++ b/toolflow/vivado/platform/aws/hooks/route_design_post.tcl
@@ -0,0 +1,24 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+puts "Running route_design post hook..."
+
+write_debug_probes -force -no_partial_ltxfile -file [file join $::env(FAAS_CL_DIR) build checkpoints to_aws "${::env(timestamp)}.debug_probes.ltx"]
+
+# vim: set expandtab ts=2 sw=2:
diff --git a/toolflow/vivado/platform/aws/include/platform_aws.h b/toolflow/vivado/platform/aws/include/platform_aws.h
new file mode 100644
index 00000000..6db8cb4c
--- /dev/null
+++ b/toolflow/vivado/platform/aws/include/platform_aws.h
@@ -0,0 +1,30 @@
+// Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+//
+// This file is part of TaPaSCo
+// (see https://github.com/esa-tu-darmstadt/tapasco).
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU Lesser General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
+
+#ifndef PLATFORM_AWS_H__
+#define PLATFORM_AWS_H__
+
+#include "platform_types.h"
+#include "platform_devctx.h"
+
+platform_res_t pcie_init(platform_devctx_t *devctx);
+void pcie_deinit(platform_devctx_t *devctx);
+
+#endif /* PLATFORM_AWS_H__ */
diff --git a/toolflow/vivado/platform/aws/platform.json b/toolflow/vivado/platform/aws/platform.json
new file mode 100644
index 00000000..cd3ca269
--- /dev/null
+++ b/toolflow/vivado/platform/aws/platform.json
@@ -0,0 +1,16 @@
+{
+	"Name" : "aws",
+	"Description" : "AWS EC2 F1 Platform",
+	"TclLibrary" : "aws.tcl",
+	"Part" : "xcvu9p-flgb2104-2-i",
+	"BoardPartRepository" : "\\$::env(HDK_SHELL_DIR)/hlx/design/boards",
+	"BoardPart" : "xilinx.com:f1_cl:part0:1.0",
+	"BoardPreset" : "f1_cl",
+	"TargetUtilization" : 90,
+	"Benchmark" : "aws.benchmark",
+	"HostFrequency": 250.0,
+	"MemFrequency": 250.0,
+	"MaximumFrequency": 500,
+	"ImplementationTimeout": 48,
+	"FileExtension": "tar"
+}
diff --git a/toolflow/vivado/platform/common/addressmap.tcl b/toolflow/vivado/platform/common/addressmap.tcl
index ff15263c..8bc93c69 100644
--- a/toolflow/vivado/platform/common/addressmap.tcl
+++ b/toolflow/vivado/platform/common/addressmap.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2018 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		addressmap.tcl
-#apasco @brief	Helper procs to maintain an address map of components.
-# @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval addressmap {
   namespace export add_platform_component
   namespace export add_processing_element
diff --git a/toolflow/vivado/platform/common/platform.tcl b/toolflow/vivado/platform/common/platform.tcl
index ee8bd4d8..af058bed 100644
--- a/toolflow/vivado/platform/common/platform.tcl
+++ b/toolflow/vivado/platform/common/platform.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		platform.tcl
-# @brief	Platform skeleton implementations.
-# @author	J. Korinth, TU Darmstadt (jk@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
   namespace export create
   namespace export generate
@@ -223,9 +220,16 @@ namespace eval platform {
         puts "Normal mode selected."
     }
 
+    # Workaround for Vivado unpredictably crashing on `generate_target`.
+    close_bd_design -quiet [current_bd_design]
+    open_bd_design -quiet [get_files "[get_bd_name].bd"]
+
     generate_target all [get_files "[get_bd_name].bd"]
     set synth_run [get_runs synth_1]
     set_property -dict $synth_settings $synth_run
+
+    tapasco::call_plugins "pre-synth"
+
     current_run $synth_run
     launch_runs -jobs $jobs $synth_run
     wait_on_run $synth_run
@@ -235,8 +239,9 @@ namespace eval platform {
     # call plugins
     tapasco::call_plugins "post-synth"
 
-    set impl_run [get_runs impl_1]
+    set impl_run [get_runs [current_run -implementation]]
     set_property -dict $impl_settings $impl_run
+
     current_run $impl_run
     launch_runs -jobs $jobs -to_step route_design $impl_run
     wait_on_run $impl_run
@@ -254,7 +259,12 @@ namespace eval platform {
     report_utilization -file utilization_userlogic.txt -cells [get_cells -hierarchical -filter {NAME =~ *target_ip_*}]
     set wns [tapasco::get_wns_from_timing_report "timing.txt"]
     if {$wns >= -0.3} {
-      write_bitstream -force "${bitstreamname}.bit"
+      variable disable_write_bitstream
+      if {[info exists disable_write_bitstream] == 0 || [string is false $disable_write_bitstream]} {
+        write_bitstream -force "${bitstreamname}.bit"
+
+        tapasco::call_plugins "post-bitstream"
+      }
     } else {
       error "timing failure, WNS: $wns"
     }
diff --git a/toolflow/vivado/platform/common/plugins/leds.tcl b/toolflow/vivado/platform/common/plugins/leds.tcl
index f031130a..2eb55cae 100644
--- a/toolflow/vivado/platform/common/plugins/leds.tcl
+++ b/toolflow/vivado/platform/common/plugins/leds.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   leds.tcl
-# @brief  Plugin to map general purpose LEDs on-board to signals.
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval leds {
   proc get_width {input} {
     set l [get_property LEFT $input]
diff --git a/toolflow/vivado/platform/common/plugins/system_cache.tcl b/toolflow/vivado/platform/common/plugins/system_cache.tcl
index b09c9364..6f121f23 100644
--- a/toolflow/vivado/platform/common/plugins/system_cache.tcl
+++ b/toolflow/vivado/platform/common/plugins/system_cache.tcl
@@ -1,20 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2019 Carsten Heinz, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
 namespace eval system_cache {
diff --git a/toolflow/vivado/platform/netfpga_sume/board.xdc b/toolflow/vivado/platform/netfpga_sume/board.xdc
index 049af495..b67eb117 100644
--- a/toolflow/vivado/platform/netfpga_sume/board.xdc
+++ b/toolflow/vivado/platform/netfpga_sume/board.xdc
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 #The following two properties should be set for every design
 set_property CFGBVS GND [current_design]
 set_property CONFIG_VOLTAGE 1.8 [current_design]
diff --git a/toolflow/vivado/platform/netfpga_sume/netfpga_sume.tcl b/toolflow/vivado/platform/netfpga_sume/netfpga_sume.tcl
index 42f294d2..13f4bbd4 100644
--- a/toolflow/vivado/platform/netfpga_sume/netfpga_sume.tcl
+++ b/toolflow/vivado/platform/netfpga_sume/netfpga_sume.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		netfpga_sume.tcl
-# @brief	Netfpga SUME platform implementation.
-# @author	J. A. Hofmann, TU Darmstadt (hofmann@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
   set platform_dirname "netfpga_sume"
 
diff --git a/toolflow/vivado/platform/netfpga_sume/plugins/sfpplus.tcl b/toolflow/vivado/platform/netfpga_sume/plugins/sfpplus.tcl
index 416247ef..25acb0f5 100644
--- a/toolflow/vivado/platform/netfpga_sume/plugins/sfpplus.tcl
+++ b/toolflow/vivado/platform/netfpga_sume/plugins/sfpplus.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
   set vlnv_clock_program "esa.informatik.tu-darmstadt.de:user:SumeClockProgrammer:1.0"
 
   if {[tapasco::is_feature_enabled "SFPPLUS"]} {
diff --git a/toolflow/vivado/platform/pcie/pcie_base.tcl b/toolflow/vivado/platform/pcie/pcie_base.tcl
index 7ade275a..d74eb44e 100644
--- a/toolflow/vivado/platform/pcie/pcie_base.tcl
+++ b/toolflow/vivado/platform/pcie/pcie_base.tcl
@@ -1,24 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file     pcie_base.tcl
-# @brief    Functions common to all TCL platforms
-# @author   J. A. Hofmann, TU Darmstadt (hofmann@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
   namespace export create
@@ -228,12 +224,13 @@
 
     set design_clk_wiz [tapasco::ip::create_clk_wiz design_clk_wiz]
     set_property -dict [list CONFIG.CLK_OUT1_PORT {design_clk} \
-                        CONFIG.USE_SAFE_CLOCK_STARTUP {true} \
+                        CONFIG.USE_SAFE_CLOCK_STARTUP {false} \
                         CONFIG.CLKOUT1_REQUESTED_OUT_FREQ [tapasco::get_design_frequency] \
                         CONFIG.USE_LOCKED {true} \
                         CONFIG.USE_RESET {true} \
                         CONFIG.RESET_TYPE {ACTIVE_LOW} \
                         CONFIG.RESET_PORT {resetn} \
+                        CONFIG.PRIM_SOURCE {No_buffer} \
                         ] $design_clk_wiz
 
     connect_bd_net [get_bd_pins $design_clk_wiz/resetn] [get_bd_pins -regexp $mig/((mmcm_locked)|(c0_init_calib_complete))]
@@ -286,7 +283,7 @@
     set out_ic [tapasco::ip::create_axi_sc "out_ic" 1 4]
     tapasco::ip::connect_sc_default_clocks $out_ic "design"
 
-    if {$device_type != "virtexuplus"} {
+    if {$device_type != "virtexuplus" && $device_type != "virtexuplusHBM"} {
       if { $pcie_width == "x8" } {
         puts "Using PCIe IP for x8..."
         set bridge [tapasco::ip::create_pciebridgetolite "PCIeBridgeToLite"]
diff --git a/toolflow/vivado/platform/pcie/plugins/hsa.tcl b/toolflow/vivado/platform/pcie/plugins/hsa.tcl
index 0336d81d..2930c380 100644
--- a/toolflow/vivado/platform/pcie/plugins/hsa.tcl
+++ b/toolflow/vivado/platform/pcie/plugins/hsa.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 if {[tapasco::is_feature_enabled "HSA"]} {
     proc create_custom_subsystem_hsa {{args {}}} {
         set vlnv_package_processor "fau.de:hsa:accelerator_backend:1.0"
diff --git a/toolflow/vivado/platform/pcie/plugins/system_cache.tcl b/toolflow/vivado/platform/pcie/plugins/system_cache.tcl
index 9a29bfa3..686055ab 100644
--- a/toolflow/vivado/platform/pcie/plugins/system_cache.tcl
+++ b/toolflow/vivado/platform/pcie/plugins/system_cache.tcl
@@ -1,20 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2019 Carsten Heinz, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
 namespace eval system_cache {
diff --git a/toolflow/vivado/platform/pynq/platform.json b/toolflow/vivado/platform/pynq/platform.json
index 070a4a05..745340e3 100644
--- a/toolflow/vivado/platform/pynq/platform.json
+++ b/toolflow/vivado/platform/pynq/platform.json
@@ -3,7 +3,9 @@
 	"Description" : "PyNQ-Z1 Python Productivity for Zynq",
 	"TclLibrary" : "pynq.tcl",
 	"Part" : "xc7z020clg400-1",
-	"BoardPart" : "digilentinc.com:arty-z7-20:part0",
+	"BoardPart" : "www.digilentinc.com:pynq-z1:part0",
+	"BoardPreset": "None",
 	"TargetUtilization" : 99,
-	"Benchmark": "pynq.benchmark"
+	"Benchmark": "pynq.benchmark",
+	"FileExtension": "bit.bin"
 }
diff --git a/toolflow/vivado/platform/pynq/plugins/leds.tcl b/toolflow/vivado/platform/pynq/plugins/leds.tcl
index 94dc29b6..1ba507e2 100644
--- a/toolflow/vivado/platform/pynq/plugins/leds.tcl
+++ b/toolflow/vivado/platform/pynq/plugins/leds.tcl
@@ -1,20 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2019 Carsten Heinz, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
 namespace eval leds {
diff --git a/toolflow/vivado/platform/pynq/plugins/leds.xdc b/toolflow/vivado/platform/pynq/plugins/leds.xdc
index ba8f3795..86c4dad1 100644
--- a/toolflow/vivado/platform/pynq/plugins/leds.xdc
+++ b/toolflow/vivado/platform/pynq/plugins/leds.xdc
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS33} [get_ports {led[4]}]
 set_property -dict {PACKAGE_PIN L14 IOSTANDARD LVCMOS33} [get_ports {led[5]}]
 set_property -dict {PACKAGE_PIN R14 IOSTANDARD LVCMOS33} [get_ports {led[0]}]
diff --git a/toolflow/vivado/platform/pynq/pynq.benchmark b/toolflow/vivado/platform/pynq/pynq.benchmark
index 18dc0346..833f542b 100644
--- a/toolflow/vivado/platform/pynq/pynq.benchmark
+++ b/toolflow/vivado/platform/pynq/pynq.benchmark
@@ -1 +1 @@
-{"Host": {"Machine": "armv7l", "Node": "pynq", "Operating System": "Linux", "Release": "4.6.0-tapasco", "Version": "#1 SMP PREEMPT Fri May 26 16:26:16 CEST 2017"}, "Interrupt Latency": [{"Avg Latency": 10.074659806377346, "Cycle Count": 1, "Max Latency": 126, "Min Latency": 7}, {"Avg Latency": 10.079997285006407, "Cycle Count": 2, "Max Latency": 256, "Min Latency": 10}, {"Avg Latency": 10.089049387249867, "Cycle Count": 4, "Max Latency": 258, "Min Latency": 10}, {"Avg Latency": 10.081130256493735, "Cycle Count": 8, "Max Latency": 91, "Min Latency": 10}, {"Avg Latency": 10.08361876800957, "Cycle Count": 16, "Max Latency": 107, "Min Latency": 10}, {"Avg Latency": 10.081874209215943, "Cycle Count": 32, "Max Latency": 82, "Min Latency": 10}, {"Avg Latency": 10.08230374453535, "Cycle Count": 64, "Max Latency": 228, "Min Latency": 10}, {"Avg Latency": 9.0758820817398735, "Cycle Count": 128, "Max Latency": 88, "Min Latency": 9}, {"Avg Latency": 11.437901094752773, "Cycle Count": 256, "Max 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23}, {"Avg Latency": 31.324538258575199, "Cycle Count": 524288, "Max Latency": 45, "Min Latency": 24}, {"Avg Latency": 34.583333333333321, "Cycle Count": 1048576, "Max Latency": 56, "Min Latency": 28}, {"Avg Latency": 34.822916666666664, "Cycle Count": 2097152, "Max Latency": 57, "Min Latency": 30}, {"Avg Latency": 35.458333333333343, "Cycle Count": 4194304, "Max Latency": 43, "Min Latency": 29}, {"Avg Latency": 37.678571428571423, "Cycle Count": 8388608, "Max Latency": 48, "Min Latency": 32}, {"Avg Latency": 41.277777777777779, "Cycle Count": 16777216, "Max Latency": 48, "Min Latency": 37}, {"Avg Latency": 45.833333333333336, "Cycle Count": 33554432, "Max Latency": 53, "Min Latency": 40}, {"Avg Latency": 55.629629629629626, "Cycle Count": 67108864, "Max Latency": 86, "Min Latency": 42}, {"Avg Latency": 64.117647058823536, "Cycle Count": 134217728, "Max Latency": 75, "Min Latency": 52}, {"Avg Latency": 77.727272727272734, "Cycle Count": 268435456, "Max Latency": 85, "Min Latency": 74}, {"Avg Latency": 106.63636363636364, "Cycle Count": 536870912, "Max Latency": 120, "Min Latency": 102}, {"Avg Latency": 156.13333333333333, "Cycle Count": 1073741824, "Max Latency": 163, "Min Latency": 144}, {"Avg Latency": 255.86666666666667, "Cycle Count": 2147483648, "Max Latency": 262, "Min Latency": 249}], "Job Throughput": [{"Jobs per second": 118786.25133333335, "Number of threads": 1}, {"Jobs per second": 209597.21285714285, "Number of threads": 2}, {"Jobs per second": 201305.10128334505, "Number of threads": 3}, {"Jobs per second": 197343.52768253972, "Number of threads": 4}], "Library Versions": {"Platform API": "1.3", "Tapasco API": "1.3"}, "Timestamp": "2018-01-30 15:01:59", "Transfer Speed": [{"Chunk Size": 1024, "Read": 1.0454197692482221, "ReadWrite": 2.0872158685879945, "Write": 1.0504207526183171}, {"Chunk Size": 2048, "Read": 2.0838183959098493, "ReadWrite": 4.1535197916227977, "Write": 2.0990286046583599}, {"Chunk Size": 4096, "Read": 4.1034050357575227, "ReadWrite": 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\ No newline at end of file
+{"Host": {"Machine": "armv7l", "Node": "pynq", "Operating System": "Linux", "Release": "4.19.0-tapasco", "Version": "#1 SMP PREEMPT Fri May 1 13:06:40 CEST 2020"}, "Interrupt Latency": [{"Avg Latency": 63.695506463306202, "Cycle Count": 1, "Max Latency": 417, "Min Latency": 38}, {"Avg Latency": 64.44691153074568, "Cycle Count": 2, "Max Latency": 496, "Min Latency": 39}, {"Avg Latency": 63.452158494169197, "Cycle Count": 4, "Max Latency": 284, "Min Latency": 38}, {"Avg Latency": 65.144675197538433, "Cycle Count": 8, "Max Latency": 279, "Min Latency": 39}, {"Avg Latency": 65.237068663820011, "Cycle Count": 16, "Max Latency": 279, "Min Latency": 39}, {"Avg Latency": 59.060005101390132, "Cycle Count": 32, "Max Latency": 510, "Min Latency": 41}, {"Avg Latency": 60.406225579578027, "Cycle Count": 64, "Max Latency": 273, "Min Latency": 43}, {"Avg Latency": 65.233643532003015, "Cycle Count": 128, "Max Latency": 265, "Min Latency": 43}, {"Avg Latency": 61.325818974324065, "Cycle Count": 256, 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Latency": 60}, {"Avg Latency": 72.994680851063904, "Cycle Count": 524288, "Max Latency": 117, "Min Latency": 62}, {"Avg Latency": 79.149647887324051, "Cycle Count": 1048576, "Max Latency": 106, "Min Latency": 66}, {"Avg Latency": 83.272727272727295, "Cycle Count": 2097152, "Max Latency": 207, "Min Latency": 68}, {"Avg Latency": 84.772727272727309, "Cycle Count": 4194304, "Max Latency": 169, "Min Latency": 74}, {"Avg Latency": 88.514970059880213, "Cycle Count": 8388608, "Max Latency": 125, "Min Latency": 78}, {"Avg Latency": 95.259459459459492, "Cycle Count": 16777216, "Max Latency": 139, "Min Latency": 82}, {"Avg Latency": 103.342372881356, "Cycle Count": 33554432, "Max Latency": 153, "Min Latency": 79}, {"Avg Latency": 122.21428571428571, "Cycle Count": 67108864, "Max Latency": 170, "Min Latency": 100}, {"Avg Latency": 143.97959183673464, "Cycle Count": 134217728, "Max Latency": 185, "Min Latency": 117}], "Job Throughput": [{"Jobs per second": 22090.204710144939, "Number of threads": 1}, {"Jobs per second": 34239.665529010155, "Number of threads": 2}, {"Jobs per second": 57968.825242718434, "Number of threads": 3}, {"Jobs per second": 54266.750803858544, "Number of threads": 4}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 11:53:31", "Transfer Speed": [{"Chunk Size": 1024, "Read": 151.09140382029693, "ReadWrite": 467.2791421187062, "Write": 335.19284207752008}, {"Chunk Size": 2048, "Read": 185.54978230721588, "ReadWrite": 705.2357650193519, "Write": 555.83918322563181}, {"Chunk Size": 4096, "Read": 208.74524145061542, "ReadWrite": 965.06113236242516, "Write": 824.47833088468633}, {"Chunk Size": 8192, "Read": 221.8244411746829, "ReadWrite": 1239.7094337070114, "Write": 1086.2192643834856}, {"Chunk Size": 16384, "Read": 228.32167633326469, "ReadWrite": 1391.8963158223769, "Write": 1269.061970257721}, {"Chunk Size": 32768, "Read": 230.72217456816819, "ReadWrite": 1416.745316311647, "Write": 1352.6871975654699}, {"Chunk Size": 65536, "Read": 232.21139070476573, "ReadWrite": 1449.3464918049233, "Write": 1346.7204029179311}, {"Chunk Size": 131072, "Read": 233.11599526790104, "ReadWrite": 1270.866649563166, "Write": 1339.7023571462794}, {"Chunk Size": 262144, "Read": 226.7759830682175, "ReadWrite": 897.35567160549056, "Write": 1326.2277819335011}, {"Chunk Size": 524288, "Read": 212.34977383122194, "ReadWrite": 550.21350822430179, "Write": 772.12662554997644}, {"Chunk Size": 1048576, "Read": 204.92359496157954, "ReadWrite": 446.24961004826105, "Write": 525.97144019056259}, {"Chunk Size": 2097152, "Read": 201.69539556548389, "ReadWrite": 465.21199639670698, "Write": 517.19052491019272}, {"Chunk Size": 4194304, "Read": 195.52969480876234, "ReadWrite": 429.39368318843742, "Write": 480.72832493804322}, {"Chunk Size": 8388608, "Read": 196.62405765932493, "ReadWrite": 352.95752893605521, "Write": 542.26992688546329}, {"Chunk Size": 16777216, "Read": 190.80409997437292, "ReadWrite": 333.85953701995862, "Write": 532.3643473722467}, {"Chunk Size": 33554432, "Read": 183.31050923389151, "ReadWrite": 441.34021864857016, "Write": 524.64687236147199}, {"Chunk Size": 67108864, "Read": 167.78064848744538, "ReadWrite": 420.9742173706552, "Write": 362.48084423901605}, {"Chunk Size": 134217728, "Read": 149.91666488455715, "ReadWrite": 0, "Write": 489.37298664470956}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/pynq/pynq.tcl b/toolflow/vivado/platform/pynq/pynq.tcl
index 28edd623..52a1a7a3 100644
--- a/toolflow/vivado/platform/pynq/pynq.tcl
+++ b/toolflow/vivado/platform/pynq/pynq.tcl
@@ -1,21 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 source -notrace $::env(TAPASCO_HOME_TCL)/platform/zynq/zynq.tcl
 
 namespace eval platform {
diff --git a/toolflow/vivado/platform/tests/CMakeLists.txt b/toolflow/vivado/platform/tests/CMakeLists.txt
deleted file mode 100644
index aa93d1de..00000000
--- a/toolflow/vivado/platform/tests/CMakeLists.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-cmake_minimum_required(VERSION 2.8)
-project(libplatform-tests)
-set(CMAKE_INSTALL_PREFIX "..")
-set(CMAKE_SKIP_RPATH true)
-
-if ("$ENV{TAPASCO_HOME}" STREQUAL "")
-  message(FATAL_ERROR "Please set env var TAPASCO_HOME to root directory of Tapasco.")
-endif ("$ENV{TAPASCO_HOME}" STREQUAL "")
-
-include ("$ENV{TAPASCO_HOME}/cmake/Tapasco.cmake")
-
-include_directories(${TAPASCO_INCDIRS})
-link_directories(${TAPASCO_STATICLINKDIRS})
-
-add_executable(platform-stress-alloc platform_stress_alloc.c ${TAPASCO_PLATFORM_LIB})
-set_target_properties(platform-stress-alloc PROPERTIES LINK_SEARCH_START_STATIC 1 LINK_SEARCH_END_STATIC 1)
-target_link_libraries(platform-stress-alloc m platform atomic pthread)
-
-add_executable(platform-stress-ioctl platform_stress_ioctl.c ${TAPASCO_PLATFORM_LIB})
-set_target_properties(platform-stress-ioctl PROPERTIES LINK_SEARCH_START_STATIC 1 LINK_SEARCH_END_STATIC 1)
-target_link_libraries(platform-stress-ioctl m platform atomic pthread)
-
-add_executable(platform-alloc platform_alloc.c ${TAPASCO_PLATFORM_LIB})
-set_target_properties(platform-alloc PROPERTIES LINK_SEARCH_START_STATIC 1 LINK_SEARCH_END_STATIC 1)
-target_link_libraries(platform-alloc m platform atomic pthread)
-
-add_executable(platform-slots platform_slots.c ${TAPASCO_PLATFORM_LIB})
-target_link_libraries(platform-slots m platform atomic pthread)
-
-add_executable(iplatform iplatform.c)
-target_link_libraries(iplatform m platform atomic pthread ncurses ${TAPASCO_PLATFORM_LIB})
-
-set_target_properties(platform-stress-alloc platform-stress-ioctl platform-slots iplatform PROPERTIES COMPILE_FLAGS ${TAPASCO_CFLAGS})
-set_target_properties(platform-stress-alloc platform-stress-ioctl platform-slots iplatform PROPERTIES LINKER_FLAGS ${TAPASCO_LDFLAGS})
-install(TARGETS platform-stress-alloc platform-slots
-        RUNTIME DESTINATION bin/${TAPASCO_TARGET})
diff --git a/toolflow/vivado/platform/tests/common.h b/toolflow/vivado/platform/tests/common.h
deleted file mode 100644
index f32c2f05..00000000
--- a/toolflow/vivado/platform/tests/common.h
+++ /dev/null
@@ -1,44 +0,0 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-//! @file	common.h
-//! @brief	Common helper functions for Platform API tests.
-//! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
-//!
-#ifndef COMMON_H__
-#define COMMON_H__
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <platform_errors.h>
-#include <platform.h>
-
-static inline int check(platform_res_t res)
-{
-	if (res != PLATFORM_SUCCESS) {
-		fprintf(stderr, "platform-error: %s (" PRIres ")\n", platform_strerror(res), res);
-	}
-	return res == PLATFORM_SUCCESS;
-}
-
-static inline int clock_period(void)
-{
-	return getenv("TAPASCO_FREQ") ? (1000 / strtoul(getenv("TAPASCO_FREQ"), NULL, 0)) : 4;
-}
-
-#endif /* COMMON_H__ */
diff --git a/toolflow/vivado/platform/tests/iplatform.c b/toolflow/vivado/platform/tests/iplatform.c
deleted file mode 100644
index d245b906..00000000
--- a/toolflow/vivado/platform/tests/iplatform.c
+++ /dev/null
@@ -1,297 +0,0 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	iplatform.c
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <errno.h>
-#include <string.h>
-#include <time.h>
-#include <math.h>
-#include <assert.h>
-#include <pthread.h>
-#include <ncurses.h>
-#include <sys/ioctl.h>
-#include <sched.h>
-#include <platform.h>
-
-static platform_ctx_t *ctx = NULL;
-static platform_devctx_t *devctx = NULL;
-static long thrdcnt = 0;
-static volatile int stop = 0;
-static volatile int finish = 0;
-static volatile long runs = 0;
-static volatile unsigned long long alloced_bytes = 0ULL;
-static volatile unsigned long long freed_bytes   = 0ULL;
-static volatile unsigned long long copyto_bytes = 0ULL;
-static volatile unsigned long long copyfrom_bytes = 0ULL;
-static volatile long errors = 0;
-static volatile long terrors = 0;
-
-static inline void random_fill(void *p, size_t const len)
-{
-	FILE *fd = fopen("/dev/urandom", "r");
-	assert(fd);
-	if (fread(p, 1, len, fd)) ;
-	fclose(fd);
-}
-
-static inline void copy_check(size_t const *lp)
-{
-	size_t const sz = lp ? *lp : rand() % (1 << 20) & ~0x3;
-	platform_mem_addr_t addr;
-	unsigned char *data1 = malloc(sz);
-	unsigned char *data2 = malloc(sz);
-	assert(data1); assert(data2);
-
-	random_fill(data1, sz);
-
-	if (platform_alloc(devctx, sz, &addr, PLATFORM_ALLOC_FLAGS_NONE) == PLATFORM_SUCCESS &&
-			platform_write_mem(devctx, addr, sz, data1, PLATFORM_MEM_FLAGS_NONE)
-			== PLATFORM_SUCCESS) {
-		__atomic_fetch_add(&alloced_bytes, sz, __ATOMIC_SEQ_CST);
-		__atomic_fetch_add(&copyto_bytes, sz, __ATOMIC_SEQ_CST);
-		if (platform_read_mem(devctx, addr, sz, data2, PLATFORM_MEM_FLAGS_NONE) == PLATFORM_SUCCESS) {
-			__atomic_fetch_add(&copyfrom_bytes, sz, __ATOMIC_SEQ_CST);
-		} else __atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-		if (platform_dealloc(devctx, addr, PLATFORM_MEM_FLAGS_NONE) == PLATFORM_SUCCESS) {
-			__atomic_fetch_add(&freed_bytes, sz, __ATOMIC_SEQ_CST);
-		} else __atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-	} else __atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-
-	if (memcmp(data1, data2, sz) != 0)
-		__atomic_fetch_add(&terrors, 1, __ATOMIC_SEQ_CST);
-
-	free(data1);
-	free(data2);
-}
-
-static inline void alloc_free(size_t const *lp)
-{
-	size_t sz = lp ? *lp : rand() % (1 << 20) & ~0x3;
-	platform_mem_addr_t addr;
-	if (platform_alloc(devctx, sz, &addr, PLATFORM_ALLOC_FLAGS_NONE) == PLATFORM_SUCCESS) {
-		__atomic_fetch_add(&alloced_bytes, sz, __ATOMIC_SEQ_CST);
-		if (platform_dealloc(devctx, addr, PLATFORM_MEM_FLAGS_NONE) == PLATFORM_SUCCESS)
-			__atomic_fetch_add(&freed_bytes, sz, __ATOMIC_SEQ_CST);
-		else
-			__atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-	} else __atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-}
-
-static inline void platform_write_ctl_speed(void)
-{
-	const uint32_t x = 0xe5ae1337;
-	uint32_t d = 42;
-	if (platform_write_ctl(devctx, platform_address_get_slot_base(devctx, 0, 0) + 0x20,
-			4, &x, PLATFORM_CTL_FLAGS_NONE) != PLATFORM_SUCCESS) {
-		__atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-	} else {
-		__atomic_fetch_add(&copyto_bytes, 4, __ATOMIC_SEQ_CST);
-	}
-	if (platform_read_ctl(devctx, platform_address_get_slot_base(devctx, 0, 0) + 0x20,
-			4, &d, PLATFORM_CTL_FLAGS_NONE) != PLATFORM_SUCCESS || d != x) {
-		__atomic_fetch_add(&errors, 1, __ATOMIC_SEQ_CST);
-	} else {
-		__atomic_fetch_add(&copyfrom_bytes, 4, __ATOMIC_SEQ_CST);
-	}
-}
-
-static void *stress(void *p)
-{
-	long const which = (long) p;
-	while (! finish) {
-		switch (which) {
-		case 1: alloc_free(NULL); break;
-		case 2: copy_check(NULL); break;
-		case 3: platform_write_ctl_speed(); break;
-		default: stop = 1; return NULL;
-		}
-		__atomic_fetch_add(&runs, 1, __ATOMIC_SEQ_CST);
-		sched_yield();
-	}
-	return NULL;
-}
-
-static void init_ncurses()
-{
-	initscr();
-	noecho();
-	cbreak();
-	curs_set(0);
-	timeout(0);
-}
-
-static void exit_ncurses()
-{
-	endwin();
-}
-
-static int runtest(long const which)
-{
-	const char *const stre = "--- press any key to exit ---";
-	struct timespec tv_begin, tv_now;
-	pthread_t threads[thrdcnt];
-	char str[255];
-	int rows, cols;
-	double to_speed = 0.0;
-	double from_speed = 0.0;
-	double to_speed_delta = 100000.0;
-	unsigned long refreshes = 0;
-
-	getmaxyx(stdscr, rows, cols);
-
-	platform_res_t res = platform_init(&ctx);
-	if (res != PLATFORM_SUCCESS) {
-		exit_ncurses();
-		fprintf(stderr, "Platform init failed: %s\n", platform_strerror(res));
-		exit(EXIT_FAILURE);
-	}
-	if ((res = platform_create_device(ctx, 0, PLATFORM_EXCLUSIVE_ACCESS, &devctx)) != PLATFORM_SUCCESS) {
-		exit_ncurses();
-		fprintf(stderr, "Platform create device failed: %s\n", platform_strerror(res));
-		platform_deinit(ctx);
-		exit(EXIT_FAILURE);
-	}
-
-	clear();
-	mvprintw(rows / 2, (cols - strlen(stre)) / 2, stre);
-
-	clock_gettime(CLOCK_MONOTONIC, &tv_begin);
-
-	for (long t = 0; t < thrdcnt; ++t)
-		pthread_create(&threads[t], NULL, stress, (void *)which);
-
-	while (getch() == ERR && (refreshes < 10000 || to_speed_delta > 1.0)) {
-		clock_gettime(CLOCK_MONOTONIC, &tv_now);
-		if (tv_now.tv_nsec < tv_begin.tv_nsec) tv_now.tv_sec += 1;
-		int r = rows / 3 - 3;
-
-		double nfrom_speed = tv_now.tv_sec == tv_begin.tv_sec ? 0.0 :
-				(copyfrom_bytes >> 10) / (double)
-				(tv_now.tv_sec - tv_begin.tv_sec);
-		from_speed = ((from_speed * refreshes) + nfrom_speed) / (double)(refreshes + 1);
-		double nto_speed = tv_now.tv_sec == tv_begin.tv_sec ? 0.0 :
-				(copyto_bytes >> 10) / (double)
-				(tv_now.tv_sec - tv_begin.tv_sec);
-		double delta = abs(to_speed - nto_speed);
-		to_speed_delta = ((to_speed_delta * refreshes) + delta) / (double)(refreshes + 1);
-		to_speed = ((to_speed * refreshes) + nto_speed) / (double)(refreshes + 1);
-
-		snprintf(str, 255, "     Passes: %16lu runs ", runs);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "     Errors: %16lu      ", errors);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "   T-Errors: %16lu      ", terrors);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "   Alloc'ed: %16llu bytes", alloced_bytes);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "     Free'd: %16llu bytes", freed_bytes);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "  CopyTo'ed: %16llu bytes", copyto_bytes);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "CopyFrom'ed: %16llu bytes", copyfrom_bytes);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-
-		snprintf(str, 255, "      Delta: %16.2f KiB/s", to_speed_delta);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-
-		snprintf(str, 255, "    SpeedTo: %16.2f KiB/s", to_speed);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		snprintf(str, 255, "  SpeedFrom: %16.2f KiB/s", from_speed);
-		mvprintw(r++, (cols - strlen(str)) / 2, str);
-		refresh();
-		++refreshes;
-	}
-	finish = 1;
-
-	for (long t = 0; t < thrdcnt; ++t)
-		pthread_join(threads[t], NULL);
-
-	platform_destroy_device(ctx, 0);
-	platform_deinit(ctx);
-	return errors + terrors;
-}
-
-static int menu(long const thrdcnt)
-{
-	int rows, cols, r, c;
-	const char *const strwelcome = "Welcome to TPC Platform Test! Choose Test:";
-	const char *const strc1 = "1) alloc-free (multi-threaded)";
-	const char *const strc2 = "2) copyto-copyfree (multi-threaded)";
-	const char *const strc3 = "3) measure platform_write_ctl speed";
-	const char *const strcq = "--- any other key to exit ---";
-	char strparams[255];
-	const int off = strlen(strc2);
-	getmaxyx(stdscr, rows, cols);
-	r = rows / 3;
-	mvprintw(r++, (cols - strlen(strwelcome)) / 2, strwelcome);
-	r += 2;
-	mvprintw(r++, (cols - off) / 2, strc1);
-	mvprintw(r++, (cols - off) / 2, strc2);
-	mvprintw(r++, (cols - off) / 2, strc3);
-	r += 1;
-	mvprintw(r++, (cols - strlen(strcq)) / 2, strcq);
-
-	r += 2;
-	snprintf(strparams, 255, "Threads: %lu", thrdcnt);
-	mvprintw(r, (cols - strlen(strparams)) / 2, strparams);
-
-	while ((c = getch()) == ERR);
-	if (c == '1' || c == '2' || c == '3')
-		runtest(c == '1' ? 1 : (c == '2' ? 2 : 3));
-	return c;
-}
-
-static void print_summary()
-{
-	printf( "Passes   : %16lu runs\n"
-			"Errors   : %16lu\n"
-			"T-Errors : %16lu\n"
-			"Allocated: %16llu bytes\n"
-			"Freed    : %16llu bytes\n"
-			"CopyTo   : %16llu bytes\n"
-			"CopyFrom : %16llu bytes\n",
-			runs, errors, terrors, alloced_bytes, freed_bytes,
-			copyto_bytes, copyfrom_bytes);
-}
-
-int main(int argc, char *argv[])
-{
-	thrdcnt = argc > 1 ? strtol(argv[1], NULL, 0) : sysconf(_SC_NPROCESSORS_CONF);
-
-	srand(time(NULL));
-
-	init_ncurses();
-	menu(thrdcnt);
-	exit_ncurses();
-
-	print_summary();
-
-	if (! stop)
-		printf("Test successful.\n");
-	else
-		fprintf(stderr, "Test failed!\n");
-	return stop ? EXIT_FAILURE : EXIT_SUCCESS;
-}
-/* vim: set foldmarker=@{,}@ foldlevel=0 foldmethod=marker : */
diff --git a/toolflow/vivado/platform/tests/platform_alloc.c b/toolflow/vivado/platform/tests/platform_alloc.c
deleted file mode 100644
index 0115fc3e..00000000
--- a/toolflow/vivado/platform/tests/platform_alloc.c
+++ /dev/null
@@ -1,23 +0,0 @@
-#include <stdio.h>
-#include <platform.h>
-
-int main(int argc, char *argv[])
-{
-	platform_res_t res;
-	platform_ctx_t *ctx;
-	platform_devctx_t *devctx;
-	platform_mem_addr_t addr;
-	size_t sz = argc > 1 ? strtoul(argv[1], NULL, 0) : 1024;
-
-	platform_init(&ctx);
-	platform_devctx_init(ctx, 0, PLATFORM_SHARED_ACCESS, &devctx);
-
-	if ((res = platform_alloc(devctx, sz, &addr, 0)) != PLATFORM_SUCCESS) {
-		fprintf(stderr, "platform error during allocation: %s", platform_strerror(res));
-	} else {
-		if ((res = platform_dealloc(devctx, addr, 0)) != PLATFORM_SUCCESS) {
-			fprintf(stderr, "platform error during free: %s", platform_strerror(res));
-		}
-	}
-	return res != PLATFORM_SUCCESS;
-}
diff --git a/toolflow/vivado/platform/tests/platform_slots.c b/toolflow/vivado/platform/tests/platform_slots.c
deleted file mode 100644
index 6237811c..00000000
--- a/toolflow/vivado/platform/tests/platform_slots.c
+++ /dev/null
@@ -1,180 +0,0 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-//! @file	platform_slots.c
-//! @brief	Platform API test which triggers countdown kernels (ID 14) in all
-//!		available slots. Basic tool to debug IRQ mechanisms.
-//! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
-//!
-#include <stdio.h>
-#include <stdlib.h>
-#include <pthread.h>
-#include <string.h>
-#include <stdint.h>
-#include <errno.h>
-#include <signal.h>
-
-#include <platform.h>
-#include "common.h"
-
-#define COUNTER_ID					14
-
-extern void platform_logging_deinit(void);
-
-static platform_ctx_t *ctx;
-static platform_devctx_t *devctx;
-static platform_info_t info;
-
-struct cfg_t {
-	long all_slots, slot_id, delay, iterations, mt;
-};
-
-static int call_slot(struct cfg_t const *cfg, short unsigned const slot_id)
-{
-	if (info.composition.kernel[slot_id] != COUNTER_ID) return 0;
-	printf("Calling slot #%u ...\n", slot_id);
-	uint32_t cd_loops = cfg->delay <= clock_period() ? 1 : (cfg->delay / clock_period() - 2) >> 1;
-	const uint32_t addr = info.base.arch[slot_id];
-	const uint32_t fire = 1;
-	uint32_t retval = 0;
-	for (long i = 0; i < cfg->iterations; ++i) {
-		if (! check( platform_write_ctl(devctx, addr + 0x4, sizeof(fire), &fire, PLATFORM_CTL_FLAGS_NONE) ))
-			return 1;
-		if (! check( platform_write_ctl(devctx, addr + 0x8, sizeof(fire), &fire, PLATFORM_CTL_FLAGS_NONE) ))
-			return 1;
-		if (! check( platform_write_ctl(devctx, addr + 0x20, sizeof(cd_loops), &cd_loops, PLATFORM_CTL_FLAGS_NONE) ))
-			return 1;
-		if (! check( platform_write_ctl(devctx, addr, sizeof(fire), &fire, PLATFORM_CTL_FLAGS_NONE) ))
-			return 1;
-		if (! check( platform_wait_for_slot(devctx, slot_id) ))
-			return 1;
-		if (! check( platform_write_ctl(devctx, addr + 0xc, sizeof(fire), &fire, PLATFORM_CTL_FLAGS_NONE) ))
-			return 1;
-		if (! check( platform_read_ctl(devctx, addr + 0x10, sizeof(retval), &retval, PLATFORM_CTL_FLAGS_NONE) ))
-			return 1;
-		if (retval <= cd_loops) {
-			fprintf(stderr, "ERROR: returned value = %u, expected: >= %u\n", retval, cd_loops);
-			return 1;
-		}
-	}
-	return 0;
-}
-
-struct call_t {
-	struct cfg_t *cfg;
-	long slot_id;
-};
-
-static void *run_call_slot(void *p)
-{
-	struct call_t *c = (struct call_t *)p;
-	long ret = call_slot(c->cfg, c->slot_id);
-	return (void *)ret;
-}
-
-static void print_usage_and_exit(void)
-{
-	printf("Usage: platform_slots (<slot #> | -a) [<delay>] [<iterations>]\n"
-			"\t<slot #>:\thardware thread slot to test, or -a for all\n"
-			"\t<delay>:\tdesired countdown delay (in ns) (default: 10000)\n"
-			"\t<iterations>:\tnumber of calls to perform (default: 1)\n\n");
-	exit(EXIT_FAILURE);
-}
-
-static
-void _flush_logs_on_sigint(int sig)
-{
-	platform_logging_deinit();
-	exit(sig);
-}
-
-static
-int _install_sigint_handler()
-{
-	struct sigaction act;
-	memset(&act, '\0', sizeof(act));
-	act.sa_handler = &_flush_logs_on_sigint;
-	return sigaction(SIGINT, &act, NULL) + sigaction(SIGABRT, &act, NULL);
-}
-
-int main(int argc, char **argv)
-{
-	struct cfg_t cfg;
-	platform_res_t res;
-	int errs = 0;
-	if (argc < 2)
-		print_usage_and_exit();
-
-	cfg.all_slots = strcmp("-a", argv[1]) == 0;
-
-	if (! cfg.all_slots)
-		cfg.slot_id = strtoul(argv[1], NULL, 0);
-	else
-		cfg.slot_id = -1;
-
-	if (argc > 2)
-		cfg.delay = strtoul(argv[2], NULL, 0);
-	else
-		cfg.delay = 10000;
-
-	if (argc > 3)
-		cfg.iterations = strtoul(argv[3], NULL, 0);
-	else
-		cfg.iterations = 1;
-
-	cfg.mt = cfg.all_slots && argc > 4;
-
-	_install_sigint_handler();
-	printf("Starting: all_slots = %ld, slot_id = %ld, delay = %ld, iterations = %ld\n",
-			cfg.all_slots, cfg.slot_id, cfg.delay, cfg.iterations);
-
-	if ((res = platform_init(&ctx)) != PLATFORM_SUCCESS) {
-		fprintf(stderr, "Failed to initialize Platform API: %s\n", platform_strerror(res));
-		exit(EXIT_FAILURE);
-	} else if ((res = platform_create_device(ctx, 0, PLATFORM_EXCLUSIVE_ACCESS, &devctx)) != PLATFORM_SUCCESS) {
-		fprintf(stderr, "Failed to create Platform device: %s\n", platform_strerror(res));
-		platform_deinit(ctx);
-		exit(EXIT_FAILURE);
-	}
-	platform_info(devctx, &info);
-	if (cfg.all_slots) {
-		if (cfg.mt) {
-			pthread_t t[PLATFORM_NUM_SLOTS];
-			long ret[PLATFORM_NUM_SLOTS];
-			struct call_t c[PLATFORM_NUM_SLOTS];
-			for (int i = 0; i < PLATFORM_NUM_SLOTS; ++i) {
-				c[i].cfg = &cfg;
-				c[i].slot_id = i;
-				pthread_create(&t[i], NULL, run_call_slot, &c[i]);
-			}
-			for (int i = 0; i < PLATFORM_NUM_SLOTS; ++i)
-				pthread_join(t[i], (void *)&ret[i]);
-			for (int i = 0; i < PLATFORM_NUM_SLOTS; ++i)
-				errs += ret[i];
-		} else {
-			for (unsigned short i = 0; i < PLATFORM_NUM_SLOTS; ++i) {
-				errs += call_slot(&cfg, i);
-			}
-		}
-	} else {
-		errs = call_slot(&cfg, cfg.slot_id);
-	}
-	platform_destroy_device_by_id(ctx, 0);
-	platform_deinit(ctx);
-	return errs;
-}
diff --git a/toolflow/vivado/platform/tests/platform_stress_alloc.c b/toolflow/vivado/platform/tests/platform_stress_alloc.c
deleted file mode 100644
index 3cfa56cf..00000000
--- a/toolflow/vivado/platform/tests/platform_stress_alloc.c
+++ /dev/null
@@ -1,167 +0,0 @@
-//
-// Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TaPaSCo).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-//! @file	platform_stress_alloc.c
-//! @brief	Platform API based stress test for memory allocation / deallocation:
-//!		Configurable number of threads allocates randomly sized device mem,
-//!		holds it for a random time < 1ms, and finally frees it.
-//!		Each thread performs a configurable number of iteration (def: 1000).
-//! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
-//!
-#include <stdio.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <math.h>
-#include <pthread.h>
-#include <fcntl.h>
-#include <string.h>
-#include <errno.h>
-
-#include <platform.h>
-#include "common.h"
-
-#define LOWER_BND					(2)
-#define UPPER_BND					(20)
-
-static long stop = 0;
-static unsigned long mode = 0;
-static platform_ctx_t *ctx;
-static platform_devctx_t *devctx;
-
-static inline int check_transfer(platform_devctx_t *devctx,
-		platform_mem_addr_t const addr,
-		size_t const sz)
-{
-	int fd, result;
-	size_t rd;
-	ssize_t res;
-	void *rnddata = malloc(sz);
-	void *resdata = malloc(sz);
-	char *p;
-	if (rnddata == NULL || resdata == NULL) {
-		fprintf(stderr, "FATAL: out of memory\n");
-		return 0;
-	}
-	fd = open("/dev/urandom", O_RDONLY);
-	if (fd == -1) {
-		fprintf(stderr, "FATAL: could not open /dev/urandom: %s", strerror(errno));
-		free(rnddata);
-		return 0;
-	}
-	rd = sz;
-	p = (char *)rnddata;
-	do {
-		res = read(fd, p, rd);
-		if (res >= 0) {
-			rd -= res;
-			p += res;
-		}
-	} while (! stop && rd > 0 && res >= 0);
-	close(fd);
-
-	platform_write_mem(devctx, addr, sz, rnddata, PLATFORM_MEM_FLAGS_NONE);
-	platform_read_mem(devctx, addr, sz, resdata, PLATFORM_MEM_FLAGS_NONE);
-
-	result = memcmp(resdata, rnddata, sz) == 0;
-
-	free(resdata);
-	free(rnddata);
-	return result;
-}
-
-static void *stress(void *p)
-{
-	unsigned long runs = (unsigned long)p;
-	platform_mem_addr_t addr;
-	platform_res_t res;
-	while (runs && ! stop) {
-		size_t const sz = pow(2, LOWER_BND + rand() % (UPPER_BND - LOWER_BND));
-		res = platform_alloc(devctx, sz, &addr, PLATFORM_ALLOC_FLAGS_NONE);
-		if (! check(res)) {
-			stop = 1;
-			fprintf(stderr, "error during allocation of size %zu bytes: %s\n",
-					sz, platform_strerror(res));
-			return NULL;
-		}
-		/* if mode > 0, actual data is copied and checked */
-		if (mode) {
-			if (! check_transfer(devctx, addr, sz)) {
-				stop = 1;
-				fprintf(stderr, "data corrupted, transfer of %zu bytes failed\n", sz);
-				return NULL;
-			}
-		} else {
-			usleep(rand() % 1000); /* just sleep a while */
-		}
-		res = platform_dealloc(devctx, addr, PLATFORM_ALLOC_FLAGS_NONE);
-		if (! check(res)) {
-			stop = 1;
-			fprintf(stderr, "error during release of size %zu bytes: %s\n",
-					sz, platform_strerror(res));
-			return NULL;
-		}
-		--runs;
-	}
-	return NULL;
-}
-
-static inline void print_usage_and_exit(void)
-{
-	printf("Usage: platform-stress-alloc [<threads>] [<iterations>] [<mode>]\n"
-			"\t<threads>   : number of threads to use\n"
-			"\t<iterations>: number of iterations per thread\n"
-			"\t<mode>      : 0 == random usleep, 1 == actual copy & compare\n\n");
-	exit(EXIT_SUCCESS);
-}
-
-int main(int argc, char **argv)
-{
-	if (argc == 2 && strcmp("-h", argv[1]) == 0)
-		print_usage_and_exit();
-	int t;
-	long const thread_count = argc > 1 ? strtol(argv[1], NULL, 0) : sysconf(_SC_NPROCESSORS_CONF);
-	unsigned long const runs = argc > 2 ? strtoul(argv[2], NULL, 0) : 10000;
-	mode = argc > 3 ? strtoul(argv[3], NULL, 0) : 0;
-	pthread_t threads[thread_count];
-
-	srand(time(NULL));
-	if (!check(platform_init(&ctx))) {
-		fprintf(stderr, "error during init, exiting");
-		exit(EXIT_FAILURE);
-	}
-	if (!check(platform_create_device(ctx, 0, PLATFORM_EXCLUSIVE_ACCESS, &devctx))) {
-		fprintf(stderr, "error during init device, exiting");
-		platform_deinit(ctx);
-		exit(EXIT_FAILURE);
-	}
-
-	printf("Starting %ld threads with %lu runs each, mode = %lu...\n", thread_count, runs, mode);
-	for (t = 0; t < thread_count; ++t)
-		pthread_create(&threads[t], NULL, stress, (void *)runs);
-	for (t = 0; t < thread_count; ++t)
-		pthread_join(threads[t], NULL);
-	
-	platform_destroy_device_by_id(ctx, 0);
-	platform_deinit(ctx);
-
-	if (! stop)
-		printf("Test successful.\n");
-	else
-		fprintf(stderr, "Test failed!\n");
-	return stop ? EXIT_FAILURE : EXIT_SUCCESS;
-}
diff --git a/toolflow/vivado/platform/tests/platform_stress_ioctl.c b/toolflow/vivado/platform/tests/platform_stress_ioctl.c
deleted file mode 100644
index 3a63b5b0..00000000
--- a/toolflow/vivado/platform/tests/platform_stress_ioctl.c
+++ /dev/null
@@ -1,35 +0,0 @@
-#include <stdio.h>
-#include <unistd.h>
-#include <platform.h>
-
-#define NUM_RUNS				1000
-
-static
-void stress(platform_ctx_t *ctx, platform_dev_id_t dev_id)
-{
-	platform_res_t res = PLATFORM_SUCCESS;
-	for (size_t i = NUM_RUNS; i > 0 && res == PLATFORM_SUCCESS; --i) {
-		res = platform_create_device(ctx, dev_id, PLATFORM_EXCLUSIVE_ACCESS, NULL);
-		if (res == PLATFORM_SUCCESS)
-			platform_destroy_device_by_id(ctx, dev_id);
-	}
-}
-
-int main(int argc, char *argv[])
-{
-	platform_ctx_t *ctx;
-	size_t num_devs = 0;
-	platform_device_info_t *devs;
-	platform_res_t res = platform_init(&ctx);
-	if (res != PLATFORM_SUCCESS) {
-		fprintf(stderr, "could not initialize platform: %s (" PRIres ")", platform_strerror(res), res);
-		exit(EXIT_FAILURE);
-	}
-
-	platform_enum_devices(ctx, &num_devs, &devs);
-	for (platform_dev_id_t i = 0; i < num_devs; ++i) {
-		printf("Stressing device #" PRIdev " ...\n", i);
-		stress(ctx, i);
-	}
-	platform_deinit(ctx);
-}
diff --git a/toolflow/vivado/platform/ultra96v2/platform.json b/toolflow/vivado/platform/ultra96v2/platform.json
new file mode 100644
index 00000000..eb6dd383
--- /dev/null
+++ b/toolflow/vivado/platform/ultra96v2/platform.json
@@ -0,0 +1,12 @@
+{
+	"Name" : "ultra96v2",
+	"Description" : "Xilinx Zynq UltraScale+ MPSoC",
+	"TclLibrary" : "ultra96v2.tcl",
+	"Part" : "xczu3eg-sbva484-1-e",
+	"BoardPart" : "em.avnet.com:ultra96v2:part0:1.0",
+	"BoardPreset" : "ultra96v2",
+	"HostFrequency" : 100.0,
+	"MemFrequency" : 533.0,
+	"TargetUtilization" : 97,
+	"Benchmark" : "ultra96v2.benchmark"
+}
diff --git a/toolflow/vivado/platform/ultra96v2/ultra96v2.benchmark b/toolflow/vivado/platform/ultra96v2/ultra96v2.benchmark
new file mode 100644
index 00000000..15aaf586
--- /dev/null
+++ b/toolflow/vivado/platform/ultra96v2/ultra96v2.benchmark
@@ -0,0 +1 @@
+{"Host": {"Machine": "aarch64", "Node": "ultra96v2", "Operating System": "Linux", "Release": "4.19.0-tapasco", "Version": "#1 SMP Mon May 4 22:17:47 CEST 2020"}, "Interrupt Latency": [{"Avg Latency": 21.207113110482361, "Cycle Count": 1, "Max Latency": 324, "Min Latency": 20}, {"Avg Latency": 21.199359792268229, "Cycle Count": 2, "Max Latency": 100, "Min Latency": 20}, {"Avg Latency": 21.187680075045378, "Cycle Count": 4, "Max Latency": 62, "Min Latency": 21}, {"Avg Latency": 21.199982100505554, "Cycle Count": 8, "Max Latency": 163, "Min Latency": 20}, {"Avg Latency": 21.192200681105057, "Cycle Count": 16, "Max Latency": 285, "Min Latency": 20}, {"Avg Latency": 21.245916064981873, "Cycle Count": 32, "Max Latency": 157, "Min Latency": 21}, {"Avg Latency": 21.989146115271119, "Cycle Count": 64, "Max Latency": 62, "Min Latency": 20}, {"Avg Latency": 21.167936604693772, "Cycle Count": 128, "Max Latency": 109, "Min Latency": 21}, {"Avg Latency": 21.595234564239313, "Cycle Count": 256, "Max Latency": 88, "Min Latency": 21}, {"Avg Latency": 21.124771493274366, "Cycle Count": 512, "Max Latency": 61, "Min Latency": 20}, {"Avg Latency": 21.253901032674321, "Cycle Count": 1024, "Max Latency": 47, "Min Latency": 21}, {"Avg Latency": 21.774758195668898, "Cycle Count": 2048, "Max Latency": 97, "Min Latency": 21}, {"Avg Latency": 22.125725826811415, "Cycle Count": 4096, "Max Latency": 55, "Min Latency": 21}, {"Avg Latency": 22.158037295551573, "Cycle Count": 8192, "Max Latency": 44, "Min Latency": 21}, {"Avg Latency": 22.166046165301562, "Cycle Count": 16384, "Max Latency": 38, "Min Latency": 21}, {"Avg Latency": 22.293520140105084, "Cycle Count": 32768, "Max Latency": 73, "Min Latency": 21}, {"Avg Latency": 28.238030095759242, "Cycle Count": 65536, "Max Latency": 183, "Min Latency": 21}, {"Avg Latency": 33.379704301075293, "Cycle Count": 131072, "Max Latency": 178, "Min Latency": 23}, {"Avg Latency": 84.359269282814594, "Cycle Count": 262144, "Max Latency": 191, "Min Latency": 23}, {"Avg Latency": 96.106316725978687, "Cycle Count": 524288, "Max Latency": 464, "Min Latency": 25}, {"Avg Latency": 105.47008999470624, "Cycle Count": 1048576, "Max Latency": 181, "Min Latency": 26}, {"Avg Latency": 51.708407871198531, "Cycle Count": 2097152, "Max Latency": 129, "Min Latency": 26}, {"Avg Latency": 94.174556213017738, "Cycle Count": 4194304, "Max Latency": 218, "Min Latency": 28}, {"Avg Latency": 106.61648745519716, "Cycle Count": 8388608, "Max Latency": 166, "Min Latency": 32}, {"Avg Latency": 108.25096312603188, "Cycle Count": 16777216, "Max Latency": 175, "Min Latency": 34}, {"Avg Latency": 144.90791896869251, "Cycle Count": 33554432, "Max Latency": 15208, "Min Latency": 43}, {"Avg Latency": 133.56659142212186, "Cycle Count": 67108864, "Max Latency": 168, "Min Latency": 58}, {"Avg Latency": 105.64605263157901, "Cycle Count": 134217728, "Max Latency": 183, "Min Latency": 80}, {"Avg Latency": 203.88461538461542, "Cycle Count": 268435456, "Max Latency": 250, "Min Latency": 140}], "Job Throughput": [{"Jobs per second": 65451.773734177179, "Number of threads": 1}, {"Jobs per second": 106275.18769230769, "Number of threads": 2}, {"Jobs per second": 144691.81914893611, "Number of threads": 3}, {"Jobs per second": 168024.72878787894, "Number of threads": 4}, {"Jobs per second": 193041.98798798805, "Number of threads": 5}, {"Jobs per second": 219809.63525835861, "Number of threads": 6}, {"Jobs per second": 226434.57680722896, "Number of threads": 7}, {"Jobs per second": 235096.54852941172, "Number of threads": 8}, {"Jobs per second": 254298.60856269108, "Number of threads": 9}, {"Jobs per second": 249026.44516129032, "Number of threads": 10}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 12:59:41", "Transfer Speed": [{"Chunk Size": 1024, "Read": 65.817252906199002, "ReadWrite": 919.24331278481714, "Write": 867.73917311807372}, {"Chunk Size": 2048, "Read": 68.300746575673827, "ReadWrite": 1466.2118799634104, "Write": 1442.1366746969784}, {"Chunk Size": 4096, "Read": 69.449982136230631, "ReadWrite": 2135.3279275195268, "Write": 2122.3322950159695}, {"Chunk Size": 8192, "Read": 69.954983072469872, "ReadWrite": 2720.3943680396278, "Write": 2754.2908579478635}, {"Chunk Size": 16384, "Read": 70.288968598530246, "ReadWrite": 2742.4420693749466, "Write": 3244.6343590900019}, {"Chunk Size": 32768, "Read": 70.369169732217557, "ReadWrite": 2709.1860506890348, "Write": 3459.038209321589}, {"Chunk Size": 65536, "Read": 70.245177290713769, "ReadWrite": 2713.8190927260662, "Write": 3519.49346596022}, {"Chunk Size": 131072, "Read": 69.809073028593374, "ReadWrite": 2740.0275880434037, "Write": 3579.5905482088028}, {"Chunk Size": 262144, "Read": 69.850819764610009, "ReadWrite": 2738.0074968665349, "Write": 3589.8721992472065}, {"Chunk Size": 524288, "Read": 69.102862879765695, "ReadWrite": 2672.6259422962198, "Write": 3569.5366804055234}, {"Chunk Size": 1048576, "Read": 65.102017364677209, "ReadWrite": 1893.0090749099027, "Write": 2143.3698969807083}, {"Chunk Size": 2097152, "Read": 61.697692310966524, "ReadWrite": 951.29707244776318, "Write": 1032.0244862440666}, {"Chunk Size": 4194304, "Read": 57.51629046719431, "ReadWrite": 918.25814699167859, "Write": 988.40294274882012}, {"Chunk Size": 8388608, "Read": 51.223098212376208, "ReadWrite": 909.24238379621193, "Write": 978.21923154647652}, {"Chunk Size": 16777216, "Read": 43.345096736132213, "ReadWrite": 901.70303329307262, "Write": 984.72907466129323}, {"Chunk Size": 33554432, "Read": 33.170981462896833, "ReadWrite": 902.2710799960754, "Write": 978.74105614970142}, {"Chunk Size": 67108864, "Read": 33.41184142900002, "ReadWrite": 823.82984869886718, "Write": 953.13972280526798}, {"Chunk Size": 134217728, "Read": 33.472176503417643, "ReadWrite": 792.1985482790127, "Write": 826.46938816588079}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/ultra96v2/ultra96v2.tcl b/toolflow/vivado/platform/ultra96v2/ultra96v2.tcl
new file mode 100644
index 00000000..f59f1143
--- /dev/null
+++ b/toolflow/vivado/platform/ultra96v2/ultra96v2.tcl
@@ -0,0 +1,24 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+namespace eval platform {
+  set platform_dirname "ultra96v2"
+
+  source -notrace $::env(TAPASCO_HOME_TCL)/platform/zynqmp/zynqmp.tcl
+}
diff --git a/toolflow/vivado/platform/vc709/vc709.benchmark b/toolflow/vivado/platform/vc709/vc709.benchmark
new file mode 100644
index 00000000..ac80eb71
--- /dev/null
+++ b/toolflow/vivado/platform/vc709/vc709.benchmark
@@ -0,0 +1 @@
+{"Host": {"Machine": "x86_64", "Node": "mountdoom-vc709", "Operating System": "Linux", "Release": "5.6.7-300.fc32.x86_64", "Version": "#1 SMP Thu Apr 23 14:13:50 UTC 2020"}, "Interrupt Latency": [{"Avg Latency": 18.626169119901821, "Cycle Count": 1, "Max Latency": 1487, "Min Latency": 11}, {"Avg Latency": 17.567762848140362, "Cycle Count": 2, "Max Latency": 133, "Min Latency": 11}, {"Avg Latency": 15.951339856793876, "Cycle Count": 4, "Max Latency": 727, "Min Latency": 11}, {"Avg Latency": 20.363340677788251, "Cycle Count": 8, "Max Latency": 434, "Min Latency": 15}, {"Avg Latency": 18.40849008159147, "Cycle Count": 16, "Max Latency": 845, "Min Latency": 12}, {"Avg Latency": 19.810683184104199, "Cycle Count": 32, "Max Latency": 447, "Min Latency": 15}, {"Avg Latency": 19.826827725519859, "Cycle Count": 64, "Max Latency": 771, "Min Latency": 12}, {"Avg Latency": 19.723860990665731, "Cycle Count": 128, "Max Latency": 461, "Min Latency": 13}, {"Avg Latency": 20.865176724948316, "Cycle Count": 256, "Max Latency": 186, "Min Latency": 17}, {"Avg Latency": 19.172558047428154, "Cycle Count": 512, "Max Latency": 795, "Min Latency": 13}, {"Avg Latency": 18.769485660665108, "Cycle Count": 1024, "Max Latency": 113, "Min Latency": 14}, {"Avg Latency": 19.514210125465983, "Cycle Count": 2048, "Max Latency": 772, "Min Latency": 13}, {"Avg Latency": 20.471803018268581, "Cycle Count": 4096, "Max Latency": 122, "Min Latency": 16}, {"Avg Latency": 17.063567268779043, "Cycle Count": 8192, "Max Latency": 99, "Min Latency": 12}, {"Avg Latency": 18.078474114441384, "Cycle Count": 16384, "Max Latency": 111, "Min Latency": 13}, {"Avg Latency": 50.050623347185535, "Cycle Count": 32768, "Max Latency": 9012, "Min Latency": 25}, {"Avg Latency": 60.87750716332377, "Cycle Count": 65536, "Max Latency": 233, "Min Latency": 41}, {"Avg Latency": 67.27272727272738, "Cycle Count": 131072, "Max Latency": 8975, "Min Latency": 39}, {"Avg Latency": 70.173991031390216, "Cycle Count": 262144, "Max Latency": 7936, "Min Latency": 41}, {"Avg Latency": 60.343915343915342, "Cycle Count": 524288, "Max Latency": 268, "Min Latency": 44}, {"Avg Latency": 61.659649122807018, "Cycle Count": 1048576, "Max Latency": 90, "Min Latency": 48}, {"Avg Latency": 70.020979020979055, "Cycle Count": 2097152, "Max Latency": 103, "Min Latency": 54}, {"Avg Latency": 68.395209580838312, "Cycle Count": 4194304, "Max Latency": 98, "Min Latency": 52}, {"Avg Latency": 72.045161290322554, "Cycle Count": 8388608, "Max Latency": 113, "Min Latency": 58}, {"Avg Latency": 73.421568627450938, "Cycle Count": 16777216, "Max Latency": 122, "Min Latency": 57}, {"Avg Latency": 81.166666666666671, "Cycle Count": 33554432, "Max Latency": 110, "Min Latency": 66}, {"Avg Latency": 95.735537190082638, "Cycle Count": 67108864, "Max Latency": 144, "Min Latency": 69}, {"Avg Latency": 115.29787234042553, "Cycle Count": 134217728, "Max Latency": 152, "Min Latency": 85}, {"Avg Latency": 98.04651162790698, "Cycle Count": 268435456, "Max Latency": 126, "Min Latency": 77}], "Job Throughput": [{"Jobs per second": 64430.739616613428, "Number of threads": 1}, {"Jobs per second": 121951.56769230774, "Number of threads": 2}, {"Jobs per second": 165814.39999999991, "Number of threads": 3}, {"Jobs per second": 202579.38955223889, "Number of threads": 4}, {"Jobs per second": 234483.17325227964, "Number of threads": 5}, {"Jobs per second": 257419.76363636355, "Number of threads": 6}, {"Jobs per second": 291357.38244047604, "Number of threads": 7}, {"Jobs per second": 309934.16124260344, "Number of threads": 8}, {"Jobs per second": 295064.51780415437, "Number of threads": 9}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 13:46:09", "Transfer Speed": [{"Chunk Size": 1024, "Read": 107.97590363372484, "ReadWrite": 209.08045779204886, "Write": 83.797248526709367}, {"Chunk Size": 2048, "Read": 210.79385834489088, "ReadWrite": 334.93100500614207, "Write": 211.5269092609133}, {"Chunk Size": 4096, "Read": 401.20523631864802, "ReadWrite": 760.25684869727547, "Write": 318.4124920751529}, {"Chunk Size": 8192, "Read": 753.39044774219883, "ReadWrite": 1466.1187128579818, "Write": 792.03117196359369}, {"Chunk Size": 16384, "Read": 1369.6896097838044, "ReadWrite": 2328.5558653132016, "Write": 1312.8173165599435}, {"Chunk Size": 32768, "Read": 2020.6831776067925, "ReadWrite": 3499.7490449098459, "Write": 1968.1190403949659}, {"Chunk Size": 65536, "Read": 2572.9988660033196, "ReadWrite": 4637.596340502213, "Write": 2594.1530180516547}, {"Chunk Size": 131072, "Read": 3361.3604780457476, "ReadWrite": 4949.9159295264717, "Write": 3086.5731232208295}, {"Chunk Size": 262144, "Read": 3723.1650350228401, "ReadWrite": 5361.8554170627813, "Write": 3524.8580886828099}, {"Chunk Size": 524288, "Read": 4560.4906281478197, "ReadWrite": 5927.0746830629187, "Write": 4161.2712759130927}, {"Chunk Size": 1048576, "Read": 5128.5571462625921, "ReadWrite": 6263.8561152276279, "Write": 4465.5906633112954}, {"Chunk Size": 2097152, "Read": 5500.0193211563474, "ReadWrite": 6396.9911026789678, "Write": 4677.5193201782249}, {"Chunk Size": 4194304, "Read": 5621.8639643266124, "ReadWrite": 6430.2268024137038, "Write": 4699.4043475206854}, {"Chunk Size": 8388608, "Read": 5684.42203318679, "ReadWrite": 6477.6145618723676, "Write": 4774.8725019055428}, {"Chunk Size": 16777216, "Read": 5782.8170526410886, "ReadWrite": 6513.4815363997459, "Write": 4825.1633305227706}, {"Chunk Size": 33554432, "Read": 5825.6583197580667, "ReadWrite": 6511.1785821784479, "Write": 4841.2473457815195}, {"Chunk Size": 67108864, "Read": 5836.3322744639827, "ReadWrite": 6508.3635994184024, "Write": 4837.9425507699762}, {"Chunk Size": 134217728, "Read": 5830.2146781242391, "ReadWrite": 6485.3197508722069, "Write": 4822.158703070113}, {"Chunk Size": 268435456, "Read": 5806.6577381083553, "ReadWrite": 6445.6920922283707, "Write": 4795.2237788456878}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/vc709/vc709.tcl b/toolflow/vivado/platform/vc709/vc709.tcl
index 88d5dcc1..c8889a42 100644
--- a/toolflow/vivado/platform/vc709/vc709.tcl
+++ b/toolflow/vivado/platform/vc709/vc709.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		vc709.tcl
-# @brief	VC709 platform implementation.
-# @author	J. Korinth, TU Darmstadt (jk@esa.tu-darmstadt.de)
-# @author	J. A. Hofmann, TU Darmstadt (jah@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
 
   set platform_dirname "vc709"
diff --git a/toolflow/vivado/platform/vcu108/vcu108.tcl b/toolflow/vivado/platform/vcu108/vcu108.tcl
index e0d3316e..a6d0a3db 100644
--- a/toolflow/vivado/platform/vcu108/vcu108.tcl
+++ b/toolflow/vivado/platform/vcu108/vcu108.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2018 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		vc709.tcl
-# @brief	VC709 platform implementation.
-# @author	J. Korinth, TU Darmstadt (jk@esa.tu-darmstadt.de)
-# @author	J. A. Hofmann, TU Darmstadt (jah@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
 
   set platform_dirname "vcu108"
diff --git a/toolflow/vivado/platform/vcu118/vcu118.tcl b/toolflow/vivado/platform/vcu118/vcu118.tcl
index ac986fac..b464729d 100644
--- a/toolflow/vivado/platform/vcu118/vcu118.tcl
+++ b/toolflow/vivado/platform/vcu118/vcu118.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		vcu118.tcl
-# @brief	VCU118 platform implementation.
-# @author	J. A. Hofmann, TU Darmstadt (hofmann@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
   set platform_dirname "vcu118"
   set pcie_width "x16"
@@ -77,7 +74,9 @@ namespace eval platform {
       CONFIG.bar0_indicator {0}
       ]
 
-    set_property -dict $pcie_properties $axi_pcie3_0
+    if {[catch {set_property -dict $pcie_properties $axi_pcie3_0}]} {
+        error "ERROR: Failed to configure PCIe bridge. For Vivado 2019.2, please install patch from Xilinx AR# 73001."
+    }
 
     apply_bd_automation -rule xilinx.com:bd_rule:xdma \
       -config {auto_level "IP Level" \
diff --git a/toolflow/vivado/platform/vcu1525/vcu1525.tcl b/toolflow/vivado/platform/vcu1525/vcu1525.tcl
index f5dfa0d5..1ab94051 100644
--- a/toolflow/vivado/platform/vcu1525/vcu1525.tcl
+++ b/toolflow/vivado/platform/vcu1525/vcu1525.tcl
@@ -1,25 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2018 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		vcu1525.tcl
-# @brief	VCU1525 platform implementation.
-# @author	J. A. Hofmann, TU Darmstadt (hofmann@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval platform {
   set platform_dirname "vcu1525"
   variable pcie_width "x16"
@@ -105,7 +102,9 @@ namespace eval platform {
       CONFIG.bar0_indicator {0}
       ]
 
-    set_property -dict $pcie_properties $axi_pcie3_0
+    if {[catch {set_property -dict $pcie_properties $axi_pcie3_0}]} {
+        error "ERROR: Failed to configure PCIe bridge. For Vivado 2019.2, please install patch from Xilinx AR# 73001."
+    }
 
     tapasco::ip::create_msixusptrans "MSIxTranslator" $axi_pcie3_0
 
diff --git a/toolflow/vivado/platform/xupvvh/MTA18ADF2G72PZ-2G3.csv b/toolflow/vivado/platform/xupvvh/MTA18ADF2G72PZ-2G3.csv
new file mode 100644
index 00000000..f5027b28
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/MTA18ADF2G72PZ-2G3.csv
@@ -0,0 +1,2 @@
+Part type,Part name,Rank,StackHeight,CA Mirror,Data mask,Address width,Row width,Column width,Bank width,Bank group width,CS width,CKE width,ODT width,CK width,Memory speed grade,Memory density,Component density,Memory device width,Memory component width,Data bits per strobe,IO Voltages,Data widths,Min period,Max period,tCKE,tFAW,tMRD,tRAS,tRCD,tREFI,tRFC,tRP,tRRD_S,tRRD_L,tRTP,tWR,tWTR_S,tWTR_L,tXPR,tZQCS,tZQINIT,cas latency,cas write latency,burst length,RTT (nominal) - ODT
+RDIMMs,MTA18ADF2G72PZ-2G3,1,1,0,0,17,17,10,2,2,1,1,1,1,2G3,16GB,8Gb,72,4,4,1.2V,72,833,1600,5000 ps,13000 ps,8 tck,32000 ps,13320 ps,7800000 ps,350000 ps,13320 ps,3300 ps,4900 ps,7500 ps,15000 ps,2500 ps,7500 ps,360 ns,128 tck,1024 tck,18,16,8,RZQ/6
diff --git a/toolflow/vivado/platform/xupvvh/board.xdc b/toolflow/vivado/platform/xupvvh/board.xdc
new file mode 100644
index 00000000..29408222
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/board.xdc
@@ -0,0 +1,51 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+#The following two properties should be set for every design
+set_property CONFIG_VOLTAGE 1.8 [current_design]
+set_property BITSTREAM.CONFIG.USR_ACCESS TIMESTAMP [current_design]
+set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
+set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
+set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR YES [current_design]
+set_property BITSTREAM.CONFIG.CONFIGRATE 85.0 [current_design]
+set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
+
+##############################################
+##########           PCIe           ##########
+##############################################
+set_property PACKAGE_PIN BG23 [get_ports pcie_sys_reset_l]
+set_property IOSTANDARD LVCMOS12 [get_ports pcie_sys_reset_l]
+set_property PULLUP true [get_ports pcie_sys_reset_l]
+set_property PACKAGE_PIN AR14 [get_ports pcie_sys_clk_clk_n]
+set_property PACKAGE_PIN AR15 [get_ports pcie_sys_clk_clk_p]
+create_clock -period 10.000 -name refclk_100 [get_ports pcie_sys_clk_clk_p]
+
+##############################################
+##########    Board Clocks/Reset    ##########
+##############################################
+set_property IOSTANDARD LVCMOS18 [get_ports sys_rst_l]
+set_property PACKAGE_PIN F18 [get_ports sys_rst_l]
+
+
+
+# Fix PCIe core to SLR0
+create_pblock pblock_axi_pcie
+resize_pblock pblock_axi_pcie -add SLR0
+set_property IS_SOFT TRUE [get_pblocks pblock_axi_pcie]
+add_cells_to_pblock pblock_axi_pcie [get_cells [list system_i/host/axi_pcie3_0]]
diff --git a/toolflow/vivado/platform/xupvvh/ddr4.xdc b/toolflow/vivado/platform/xupvvh/ddr4.xdc
new file mode 100644
index 00000000..aecf4f23
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/ddr4.xdc
@@ -0,0 +1,182 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+##############################################
+##########      Memory Clocks       ##########
+##############################################
+set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports ddr4_sys_clk_1_clk_p]
+set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports ddr4_sys_clk_1_clk_n]
+set_property ODT RTT_48 [get_ports ddr4_sys_clk_1_clk_p]
+set_property PACKAGE_PIN G35   [get_ports ddr4_sys_clk_1_clk_p]
+
+#set_clock_groups -group [get_clocks ddr4_sys_clk_1_clk_p -include_generated_clocks] -asynchronous
+#set_clock_groups -group [get_clocks ddr4_sys_clk_1_p -include_generated_clocks] -asynchronous
+
+##############################################
+##########   DDR4 Pin Properties    ##########
+##############################################
+### RDIMM 1
+set_property PACKAGE_PIN J34 [get_ports "C0_DDR4_0_act_n"]
+set_property PACKAGE_PIN D35 [get_ports "C0_DDR4_0_adr[0]"]
+set_property PACKAGE_PIN D36 [get_ports "C0_DDR4_0_adr[1]"]
+set_property PACKAGE_PIN B38 [get_ports "C0_DDR4_0_adr[10]"]
+set_property PACKAGE_PIN C35 [get_ports "C0_DDR4_0_adr[11]"]
+set_property PACKAGE_PIN B36 [get_ports "C0_DDR4_0_adr[12]"]
+set_property PACKAGE_PIN B35 [get_ports "C0_DDR4_0_adr[13]"]
+set_property PACKAGE_PIN A36 [get_ports "C0_DDR4_0_adr[14]"]
+set_property PACKAGE_PIN A34 [get_ports "C0_DDR4_0_adr[15]"]
+set_property PACKAGE_PIN A35 [get_ports "C0_DDR4_0_adr[16]"]
+#set_property PACKAGE_PIN C38 [get_ports "C0_DDR4_0_adr[17]"]
+set_property PACKAGE_PIN F34 [get_ports "C0_DDR4_0_adr[2]"]
+set_property PACKAGE_PIN E34 [get_ports "C0_DDR4_0_adr[3]"]
+set_property PACKAGE_PIN E36 [get_ports "C0_DDR4_0_adr[4]"]
+set_property PACKAGE_PIN D37 [get_ports "C0_DDR4_0_adr[5]"]
+set_property PACKAGE_PIN C39 [get_ports "C0_DDR4_0_adr[6]"]
+set_property PACKAGE_PIN D34 [get_ports "C0_DDR4_0_adr[7]"]
+set_property PACKAGE_PIN C34 [get_ports "C0_DDR4_0_adr[8]"]
+set_property PACKAGE_PIN C37 [get_ports "C0_DDR4_0_adr[9]"]
+#set_property PACKAGE_PIN B37 [get_ports "C0_DDR4_0_alert_n"]
+set_property PACKAGE_PIN F35 [get_ports "C0_DDR4_0_ba[0]"]
+set_property PACKAGE_PIN F36 [get_ports "C0_DDR4_0_ba[1]"]
+set_property PACKAGE_PIN E37 [get_ports "C0_DDR4_0_bg[0]"]
+set_property PACKAGE_PIN E38 [get_ports "C0_DDR4_0_bg[1]"]
+#set_property PACKAGE_PIN H39 [get_ports "C0_DDR4_0_c[0]"]
+#set_property PACKAGE_PIN H37 [get_ports "C0_DDR4_0_c[1]"]
+#set_property PACKAGE_PIN A38 [get_ports "C0_DDR4_0_c[2]"]
+#set_property PACKAGE_PIN C33 [get_ports "C0_DDR4_0_c[3]"]
+#set_property PACKAGE_PIN B43 [get_ports "C0_DDR4_0_c[4]"]
+set_property PACKAGE_PIN D39 [get_ports "C0_DDR4_0_ck_c"]
+set_property PACKAGE_PIN H35 [get_ports "C0_DDR4_0_cke[0]"]
+#set_property PACKAGE_PIN G38 [get_ports "C0_DDR4_0_cke[1]"]
+set_property PACKAGE_PIN E39 [get_ports "C0_DDR4_0_ck_t"]
+set_property PACKAGE_PIN H38 [get_ports "C0_DDR4_0_cs_n[0]"]
+#set_property PACKAGE_PIN H34 [get_ports "C0_DDR4_0_cs_n[1]"]
+set_property PACKAGE_PIN A28 [get_ports "C0_DDR4_0_dq[0]"]
+set_property PACKAGE_PIN B28 [get_ports "C0_DDR4_0_dq[1]"]
+set_property PACKAGE_PIN C32 [get_ports "C0_DDR4_0_dq[10]"]
+set_property PACKAGE_PIN D32 [get_ports "C0_DDR4_0_dq[11]"]
+set_property PACKAGE_PIN E33 [get_ports "C0_DDR4_0_dq[12]"]
+set_property PACKAGE_PIN F33 [get_ports "C0_DDR4_0_dq[13]"]
+set_property PACKAGE_PIN E29 [get_ports "C0_DDR4_0_dq[14]"]
+set_property PACKAGE_PIN F29 [get_ports "C0_DDR4_0_dq[15]"]
+set_property PACKAGE_PIN F30 [get_ports "C0_DDR4_0_dq[16]"]
+set_property PACKAGE_PIN G30 [get_ports "C0_DDR4_0_dq[17]"]
+set_property PACKAGE_PIN F31 [get_ports "C0_DDR4_0_dq[18]"]
+set_property PACKAGE_PIN G31 [get_ports "C0_DDR4_0_dq[19]"]
+set_property PACKAGE_PIN A30 [get_ports "C0_DDR4_0_dq[2]"]
+set_property PACKAGE_PIN G32 [get_ports "C0_DDR4_0_dq[20]"]
+set_property PACKAGE_PIN H32 [get_ports "C0_DDR4_0_dq[21]"]
+set_property PACKAGE_PIN H30 [get_ports "C0_DDR4_0_dq[22]"]
+set_property PACKAGE_PIN H29 [get_ports "C0_DDR4_0_dq[23]"]
+set_property PACKAGE_PIN J29 [get_ports "C0_DDR4_0_dq[24]"]
+set_property PACKAGE_PIN K29 [get_ports "C0_DDR4_0_dq[25]"]
+set_property PACKAGE_PIN J31 [get_ports "C0_DDR4_0_dq[26]"]
+set_property PACKAGE_PIN J30 [get_ports "C0_DDR4_0_dq[27]"]
+set_property PACKAGE_PIN K31 [get_ports "C0_DDR4_0_dq[28]"]
+set_property PACKAGE_PIN L31 [get_ports "C0_DDR4_0_dq[29]"]
+set_property PACKAGE_PIN A29 [get_ports "C0_DDR4_0_dq[3]"]
+set_property PACKAGE_PIN L30 [get_ports "C0_DDR4_0_dq[30]"]
+set_property PACKAGE_PIN L29 [get_ports "C0_DDR4_0_dq[31]"]
+set_property PACKAGE_PIN A40 [get_ports "C0_DDR4_0_dq[32]"]
+set_property PACKAGE_PIN A39 [get_ports "C0_DDR4_0_dq[33]"]
+set_property PACKAGE_PIN B42 [get_ports "C0_DDR4_0_dq[34]"]
+set_property PACKAGE_PIN B41 [get_ports "C0_DDR4_0_dq[35]"]
+set_property PACKAGE_PIN D41 [get_ports "C0_DDR4_0_dq[36]"]
+set_property PACKAGE_PIN E41 [get_ports "C0_DDR4_0_dq[37]"]
+set_property PACKAGE_PIN C40 [get_ports "C0_DDR4_0_dq[38]"]
+set_property PACKAGE_PIN D40 [get_ports "C0_DDR4_0_dq[39]"]
+set_property PACKAGE_PIN A33 [get_ports "C0_DDR4_0_dq[4]"]
+set_property PACKAGE_PIN A44 [get_ports "C0_DDR4_0_dq[40]"]
+set_property PACKAGE_PIN A43 [get_ports "C0_DDR4_0_dq[41]"]
+set_property PACKAGE_PIN B45 [get_ports "C0_DDR4_0_dq[42]"]
+set_property PACKAGE_PIN C44 [get_ports "C0_DDR4_0_dq[43]"]
+set_property PACKAGE_PIN B46 [get_ports "C0_DDR4_0_dq[44]"]
+set_property PACKAGE_PIN C45 [get_ports "C0_DDR4_0_dq[45]"]
+set_property PACKAGE_PIN C43 [get_ports "C0_DDR4_0_dq[46]"]
+set_property PACKAGE_PIN D42 [get_ports "C0_DDR4_0_dq[47]"]
+set_property PACKAGE_PIN D45 [get_ports "C0_DDR4_0_dq[48]"]
+set_property PACKAGE_PIN D44 [get_ports "C0_DDR4_0_dq[49]"]
+set_property PACKAGE_PIN B32 [get_ports "C0_DDR4_0_dq[5]"]
+set_property PACKAGE_PIN E44 [get_ports "C0_DDR4_0_dq[50]"]
+set_property PACKAGE_PIN F44 [get_ports "C0_DDR4_0_dq[51]"]
+set_property PACKAGE_PIN G45 [get_ports "C0_DDR4_0_dq[52]"]
+set_property PACKAGE_PIN H45 [get_ports "C0_DDR4_0_dq[53]"]
+set_property PACKAGE_PIN F46 [get_ports "C0_DDR4_0_dq[54]"]
+set_property PACKAGE_PIN F45 [get_ports "C0_DDR4_0_dq[55]"]
+set_property PACKAGE_PIN G43 [get_ports "C0_DDR4_0_dq[56]"]
+set_property PACKAGE_PIN H43 [get_ports "C0_DDR4_0_dq[57]"]
+set_property PACKAGE_PIN G42 [get_ports "C0_DDR4_0_dq[58]"]
+set_property PACKAGE_PIN G41 [get_ports "C0_DDR4_0_dq[59]"]
+set_property PACKAGE_PIN C29 [get_ports "C0_DDR4_0_dq[6]"]
+set_property PACKAGE_PIN J41 [get_ports "C0_DDR4_0_dq[60]"]
+set_property PACKAGE_PIN J40 [get_ports "C0_DDR4_0_dq[61]"]
+set_property PACKAGE_PIN H42 [get_ports "C0_DDR4_0_dq[62]"]
+set_property PACKAGE_PIN J42 [get_ports "C0_DDR4_0_dq[63]"]
+set_property PACKAGE_PIN J37 [get_ports "C0_DDR4_0_dq[64]"]
+set_property PACKAGE_PIN K37 [get_ports "C0_DDR4_0_dq[65]"]
+set_property PACKAGE_PIN K34 [get_ports "C0_DDR4_0_dq[66]"]
+set_property PACKAGE_PIN L34 [get_ports "C0_DDR4_0_dq[67]"]
+set_property PACKAGE_PIN J36 [get_ports "C0_DDR4_0_dq[68]"]
+set_property PACKAGE_PIN K36 [get_ports "C0_DDR4_0_dq[69]"]
+set_property PACKAGE_PIN C28 [get_ports "C0_DDR4_0_dq[7]"]
+set_property PACKAGE_PIN K39 [get_ports "C0_DDR4_0_dq[70]"]
+set_property PACKAGE_PIN L39 [get_ports "C0_DDR4_0_dq[71]"]
+set_property PACKAGE_PIN D29 [get_ports "C0_DDR4_0_dq[8]"]
+set_property PACKAGE_PIN E28 [get_ports "C0_DDR4_0_dq[9]"]
+set_property PACKAGE_PIN A31 [get_ports "C0_DDR4_0_dqs_c[0]"]
+set_property PACKAGE_PIN B31 [get_ports "C0_DDR4_0_dqs_c[1]"]
+set_property PACKAGE_PIN A46 [get_ports "C0_DDR4_0_dqs_c[10]"]
+set_property PACKAGE_PIN E43 [get_ports "C0_DDR4_0_dqs_c[11]"]
+set_property PACKAGE_PIN D46 [get_ports "C0_DDR4_0_dqs_c[12]"]
+set_property PACKAGE_PIN H44 [get_ports "C0_DDR4_0_dqs_c[13]"]
+set_property PACKAGE_PIN G40 [get_ports "C0_DDR4_0_dqs_c[14]"]
+set_property PACKAGE_PIN K42 [get_ports "C0_DDR4_0_dqs_c[15]"]
+set_property PACKAGE_PIN K38 [get_ports "C0_DDR4_0_dqs_c[16]"]
+set_property PACKAGE_PIN L36 [get_ports "C0_DDR4_0_dqs_c[17]"]
+set_property PACKAGE_PIN D31 [get_ports "C0_DDR4_0_dqs_c[2]"]
+set_property PACKAGE_PIN E32 [get_ports "C0_DDR4_0_dqs_c[3]"]
+set_property PACKAGE_PIN F28 [get_ports "C0_DDR4_0_dqs_c[4]"]
+set_property PACKAGE_PIN G33 [get_ports "C0_DDR4_0_dqs_c[5]"]
+set_property PACKAGE_PIN J32 [get_ports "C0_DDR4_0_dqs_c[6]"]
+set_property PACKAGE_PIN K33 [get_ports "C0_DDR4_0_dqs_c[7]"]
+set_property PACKAGE_PIN A41 [get_ports "C0_DDR4_0_dqs_c[8]"]
+set_property PACKAGE_PIN F41 [get_ports "C0_DDR4_0_dqs_c[9]"]
+set_property PACKAGE_PIN B30 [get_ports "C0_DDR4_0_dqs_t[0]"]
+set_property PACKAGE_PIN C30 [get_ports "C0_DDR4_0_dqs_t[1]"]
+set_property PACKAGE_PIN A45 [get_ports "C0_DDR4_0_dqs_t[10]"]
+set_property PACKAGE_PIN E42 [get_ports "C0_DDR4_0_dqs_t[11]"]
+set_property PACKAGE_PIN E46 [get_ports "C0_DDR4_0_dqs_t[12]"]
+set_property PACKAGE_PIN J44 [get_ports "C0_DDR4_0_dqs_t[13]"]
+set_property PACKAGE_PIN H40 [get_ports "C0_DDR4_0_dqs_t[14]"]
+set_property PACKAGE_PIN K41 [get_ports "C0_DDR4_0_dqs_t[15]"]
+set_property PACKAGE_PIN L38 [get_ports "C0_DDR4_0_dqs_t[16]"]
+set_property PACKAGE_PIN L35 [get_ports "C0_DDR4_0_dqs_t[17]"]
+set_property PACKAGE_PIN D30 [get_ports "C0_DDR4_0_dqs_t[2]"]
+set_property PACKAGE_PIN E31 [get_ports "C0_DDR4_0_dqs_t[3]"]
+set_property PACKAGE_PIN G28 [get_ports "C0_DDR4_0_dqs_t[4]"]
+set_property PACKAGE_PIN H33 [get_ports "C0_DDR4_0_dqs_t[5]"]
+set_property PACKAGE_PIN K32 [get_ports "C0_DDR4_0_dqs_t[6]"]
+set_property PACKAGE_PIN L33 [get_ports "C0_DDR4_0_dqs_t[7]"]
+set_property PACKAGE_PIN B40 [get_ports "C0_DDR4_0_dqs_t[8]"]
+set_property PACKAGE_PIN F40 [get_ports "C0_DDR4_0_dqs_t[9]"]
+set_property PACKAGE_PIN F39 [get_ports "C0_DDR4_0_odt[0]"]
+#set_property PACKAGE_PIN G37 [get_ports "C0_DDR4_0_odt[1]"]
+set_property PACKAGE_PIN F38 [get_ports "C0_DDR4_0_par"]
+set_property PACKAGE_PIN J39 [get_ports "C0_DDR4_0_reset_n"]
+
diff --git a/toolflow/vivado/platform/xupvvh/platform.json b/toolflow/vivado/platform/xupvvh/platform.json
new file mode 100644
index 00000000..5cc84077
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/platform.json
@@ -0,0 +1,10 @@
+{
+	"Name" : "xupvvh",
+	"Description" : "Xilinx UltraScale+ 3/4-Length PCIe Board by Bittware",
+	"TclLibrary" : "xupvvh.tcl",
+	"Part" : "xcvu37p-fsvh2892-2-e-es1",
+	"TargetUtilization" : 90,
+	"Benchmark" : "xupvvh.benchmark",
+	"HostFrequency": 250.0,
+	"MemFrequency": 300.0
+}
diff --git a/toolflow/vivado/platform/xupvvh/plugins/hbm.tcl b/toolflow/vivado/platform/xupvvh/plugins/hbm.tcl
new file mode 100644
index 00000000..3e74c803
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/plugins/hbm.tcl
@@ -0,0 +1,362 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+if {[tapasco::is_feature_enabled "HBM"]} {
+  proc create_custom_subsystem_hbm {{args {}}} {
+
+    set hbmInterfaces [hbm::get_hbm_interfaces]
+
+    hbm::validate_pe_configuration $hbmInterfaces
+
+    set numInterfaces [llength $hbmInterfaces]
+    set bothStacks [expr ($numInterfaces > 16)]
+
+    hbm::create_refclk_ports $bothStacks
+
+    hbm::generate_hbm_core $hbmInterfaces
+    
+  }
+}
+
+namespace eval hbm {
+
+  # Extracts AXI-MM masters with HBM access from feature configuration
+  proc get_hbm_interfaces {} {
+    set hbmInterfaces [list]
+
+    set hbm [tapasco::get_feature "HBM"]
+
+    set value [dict values [dict remove $hbm enabled]]
+
+    foreach kernel $value {
+      dict with kernel {
+        set core [find_ID $ID]
+        # select required number PEs of given type
+        set end [expr ($Count - 1)]
+        set PEs [lrange [get_bd_cells /arch/target_ip_[format %02d $core]_*] 0 $end]
+        foreach PE $PEs {
+          foreach interface $Interfaces {
+            # select all given interfaces of the given PEs
+            set hbmInterfaces [lappend hbmInterfaces [format "%s/%s" $PE $interface]]
+          }
+        }
+      }
+    }
+    return $hbmInterfaces
+  }
+
+  proc validate_pe_configuration {hbmInterfaces} {
+    set numInterfaces [llength $hbmInterfaces]
+
+    if { $numInterfaces > 32 } {
+      puts "Currently only 32 Master interfaces with HBM connection supported."
+      puts "Got $hbmInterfaces"
+      exit
+    }
+
+    if { $numInterfaces == 0 } {
+      puts "No IP with HBM connections found."
+      puts "Disable Feature HBM if not used."
+      exit
+    }
+  }
+
+  # Creates input ports for reference clock(s)
+  proc create_refclk_ports {bothStacks} {
+      set hbm_ref_clk_0 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 hbm_ref_clk_0 ]
+      set_property CONFIG.FREQ_HZ 100000000 $hbm_ref_clk_0
+
+      if {$bothStacks} {
+        set hbm_ref_clk_1 [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 hbm_ref_clk_1 ]
+        set_property CONFIG.FREQ_HZ 100000000 $hbm_ref_clk_1
+      }
+  }
+
+  # Creates HBM configuration for given number of active HBM ports
+  proc create_hbm_properties {numInterfaces} {
+    # disable APB debug port
+    # disable AXI crossbar (global addressing)
+    # configure AXI clock freq
+    set hbm_properties [list \
+      CONFIG.USER_APB_EN {false} \
+      CONFIG.USER_SWITCH_ENABLE_00 {false} \
+      CONFIG.USER_SWITCH_ENABLE_01 {false} \
+      CONFIG.USER_AXI_INPUT_CLK_FREQ {450} \
+      CONFIG.USER_AXI_INPUT_CLK_NS {2.222} \
+      CONFIG.USER_AXI_INPUT_CLK_PS {2222} \
+      CONFIG.USER_AXI_INPUT_CLK_XDC {2.222} \
+      CONFIG.HBM_MMCM_FBOUT_MULT0 {51} \
+      CONFIG.USER_XSDB_INTF_EN {FALSE}
+    ]
+
+    # configure stacks used
+    if {$numInterfaces <= 16} {
+      set maxSlaves 16
+      lappend hbm_properties \
+        CONFIG.USER_HBM_DENSITY {4GB} \
+        CONFIG.USER_HBM_STACK {1} \
+    } else {
+      set maxSlaves 32
+      lappend hbm_properties \
+        CONFIG.USER_HBM_DENSITY {8GB} \
+    }
+
+
+    # enable HBM ports and memory controllers as required (two ports per mc)
+    for {set i $numInterfaces} {$i < $maxSlaves} {incr i} {
+      set saxi [format %02s $i]
+      lappend hbm_properties CONFIG.USER_SAXI_${saxi} {false}
+      if ([even $i]) {
+        set mc [format %02s [expr {$i / 2}]]
+        lappend hbm_properties CONFIG.USER_MC_ENABLE_${mc} {false}
+      }
+    }
+
+
+    # configure memory controllers
+    for {set i 0} {$i < $maxSlaves} {incr i} {
+      if ([even $i]) {
+        set mc [format %s [expr {$i / 2}]]
+        lappend hbm_properties CONFIG.USER_MC${mc}_ECC_BYPASS false
+        lappend hbm_properties CONFIG.USER_MC${mc}_ECC_CORRECTION false
+        lappend hbm_properties CONFIG.USER_MC${mc}_EN_DATA_MASK true
+        lappend hbm_properties CONFIG.USER_MC${mc}_TRAFFIC_OPTION {Linear}
+        lappend hbm_properties CONFIG.USER_MC${mc}_BG_INTERLEAVE_EN true
+      }
+    }
+
+    return $hbm_properties
+  }
+
+  # Creates HBM clocking infrastructure for a single stack
+  proc create_clocking {name port} {
+    set group [create_bd_cell -type hier $name]
+    set instance [current_bd_instance .]
+    current_bd_instance $group
+
+    set hbm_ref_clk [create_bd_pin -type "clk" -dir "O" "hbm_ref_clk"]
+    set axi_clk_0 [create_bd_pin -type "clk" -dir "O" "axi_clk_0"]
+    set axi_clk_1 [create_bd_pin -type "clk" -dir "O" "axi_clk_1"]
+    set axi_clk_2 [create_bd_pin -type "clk" -dir "O" "axi_clk_2"]
+    set axi_clk_3 [create_bd_pin -type "clk" -dir "O" "axi_clk_3"]
+    set axi_clk_4 [create_bd_pin -type "clk" -dir "O" "axi_clk_4"]
+    set axi_clk_5 [create_bd_pin -type "clk" -dir "O" "axi_clk_5"]
+    set axi_clk_6 [create_bd_pin -type "clk" -dir "O" "axi_clk_6"]
+    set axi_reset [create_bd_pin -type "rst" -dir "O" "axi_reset"]
+    set mem_peripheral_aresetn [create_bd_pin -type "rst" -dir "I" "mem_peripheral_aresetn"]
+
+    set ibuf [tapasco::ip::create_util_buf ibuf]
+    set_property -dict [ list CONFIG.C_BUF_TYPE {IBUFDS}  ] $ibuf
+
+    connect_bd_intf_net $port [get_bd_intf_pins $ibuf/CLK_IN_D]
+
+    set clk_wiz [tapasco::ip::create_clk_wiz clk_wiz]
+    set_property -dict [list CONFIG.PRIM_SOURCE {No_buffer} CONFIG.CLKOUT1_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT2_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT3_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT4_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT5_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT6_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT7_REQUESTED_OUT_FREQ {450} CONFIG.CLKOUT2_USED {true} CONFIG.CLKOUT3_USED {true} CONFIG.CLKOUT4_USED {true} CONFIG.CLKOUT5_USED {true} CONFIG.CLKOUT6_USED {true} CONFIG.CLKOUT7_USED {true} CONFIG.RESET_TYPE {ACTIVE_LOW} CONFIG.NUM_OUT_CLKS {7} CONFIG.RESET_PORT {resetn}] $clk_wiz
+
+    connect_bd_net [get_bd_pins $ibuf/IBUF_OUT] $hbm_ref_clk
+    connect_bd_net [get_bd_pins $ibuf/IBUF_OUT] [get_bd_pins $clk_wiz/clk_in1]
+
+    connect_bd_net $mem_peripheral_aresetn [get_bd_pins $clk_wiz/resetn]
+
+    set reset_generator [tapasco::ip::create_logic_vector reset_generator]
+    set_property -dict [list CONFIG.C_SIZE {1} CONFIG.C_OPERATION {and} CONFIG.LOGO_FILE {data/sym_andgate.png}] $reset_generator
+
+    connect_bd_net $mem_peripheral_aresetn [get_bd_pins $reset_generator/Op1]
+    connect_bd_net [get_bd_pins $clk_wiz/locked] [get_bd_pins $reset_generator/Op2]
+
+    for {set i 0} {$i < 7} {incr i} {
+      set incr [expr $i + 1]
+      connect_bd_net [get_bd_pins axi_clk_${i}] [get_bd_pins $clk_wiz/clk_out${incr}]
+    }
+
+    connect_bd_net $axi_reset [get_bd_pins $reset_generator/Res]
+
+    current_bd_instance $instance
+    connect_bd_net [get_bd_pins mem_peripheral_aresetn] $mem_peripheral_aresetn
+    return $group
+  }
+
+  # Connects a range of HBM AXI clocks with the outputs of a clocking infrastructure
+  proc connect_clocking {clocking hbm startInterface numInterfaces} {
+    for {set i 0} {$i < $numInterfaces} {incr i} {
+        set hbm_index [format %02s [expr $i + $startInterface]]
+        set block_index [expr $i < 16 ? 0 : 1]
+        set clk_index [expr ($i % 16) / 2]
+        set clk_index [expr $clk_index < 7 ? $clk_index : 6]
+        connect_bd_net [get_bd_pins $clocking/axi_reset] [get_bd_pins $hbm/AXI_${hbm_index}_ARESET_N]
+        connect_bd_net [get_bd_pins $clocking/axi_clk_${clk_index}] [get_bd_pins $hbm/AXI_${hbm_index}_ACLK]
+      }
+  }
+
+  # Ṕrovides HBM access for the given AXI-MM masters
+  proc generate_hbm_core {hbmInterfaces} {
+    if {[tapasco::is_feature_enabled "HBM"]} {
+      puts "Generating HBM Core"
+      set numInterfaces [llength $hbmInterfaces]
+      set bothStacks [expr ($numInterfaces > 16)]
+
+      set hbm_properties [create_hbm_properties $numInterfaces]
+
+      # create and configure HBM IP
+      set hbm [ create_bd_cell -type ip -vlnv xilinx.com:ip:hbm:1.0 "hbm_0" ]
+      set_property -dict $hbm_properties $hbm
+
+      # create and connect clocking infrastructure for left stack
+      set clocking_0 [create_clocking "clocking_0" [get_bd_intf_ports /hbm_ref_clk_0]]
+      connect_clocking $clocking_0 $hbm 0 [expr min($numInterfaces,16)]
+      connect_bd_net [get_bd_pins $clocking_0/hbm_ref_clk] [get_bd_pins $hbm/HBM_REF_CLK_0]
+
+      connect_bd_net [get_bd_pins $clocking_0/hbm_ref_clk] [get_bd_pins $hbm/APB_0_PCLK]
+      connect_bd_net [get_bd_pins /host/axi_pcie3_0/user_lnk_up] [get_bd_pins $hbm/APB_0_PRESET_N]
+
+      if {$bothStacks} {
+        # create and connect clocking infrastructure for right stack
+        set clocking_1 [create_clocking "clocking_1" [get_bd_intf_ports /hbm_ref_clk_1]]
+        connect_clocking $clocking_1 $hbm 16 [expr $numInterfaces - 16]
+        connect_bd_net [get_bd_pins $clocking_1/hbm_ref_clk] [get_bd_pins $hbm/HBM_REF_CLK_1]
+
+        connect_bd_net [get_bd_pins $clocking_1/hbm_ref_clk] [get_bd_pins $hbm/APB_1_PCLK]
+        connect_bd_net [get_bd_pins /host/axi_pcie3_0/user_lnk_up] [get_bd_pins $hbm/APB_1_PRESET_N]
+      }
+
+      # remove standard memory interconnect network
+      delete_bd_objs [get_bd_cells /arch/out_*]
+      delete_bd_objs [get_bd_intf_pins /arch/M_MEM_*]
+
+      for {set i 0} {$i < $numInterfaces} {incr i} {
+        variable master [lindex $hbmInterfaces $i]
+
+        set pin [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 /arch/M_AXI_HBM_${i}]
+        connect_bd_intf_net $pin $master
+
+        set hbm_index [format %02s $i]
+
+        # create smartconnect for clock domain conversion, protocol conversion (AXI4->AXI3) and data width conversion
+        set converter [create_bd_cell -type ip -vlnv xilinx.com:ip:smartconnect:1.0 smartconnect_${i}]
+        set_property -dict [list CONFIG.NUM_SI {1} CONFIG.NUM_CLKS {2} CONFIG.HAS_ARESETN {0}] $converter
+        
+        # create connections between PE and smartconnect, and smartconnect and HBM
+
+        connect_bd_net [get_bd_pins design_clk] [get_bd_pins $converter/aclk]
+        connect_bd_net [get_bd_pins $hbm/AXI_${hbm_index}_ACLK] [get_bd_pins $converter/aclk1]
+
+        if {[platform::is_regslice_enabled "hbm_pe" false] || [platform::is_regslice_enabled [format "hbm_pe%s" $hbm_index] false]} {
+          # insert register slice between PE and smartconnect
+          set regslice_pre [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 regslice_pre_${i}]
+          set_property -dict [list CONFIG.REG_AW {15} CONFIG.REG_AR {15} CONFIG.REG_W {15} CONFIG.REG_R {15} CONFIG.REG_B {15} CONFIG.USE_AUTOPIPELINING {1}] $regslice_pre
+
+          connect_bd_intf_net $pin [get_bd_intf_pins $regslice_pre/S_AXI]
+          connect_bd_intf_net [get_bd_intf_pins $regslice_pre/M_AXI] [get_bd_intf_pins $converter/S00_AXI]
+
+          connect_bd_net [get_bd_pins design_clk] [get_bd_pins $regslice_pre/aclk]
+          connect_bd_net [get_bd_pins design_interconnect_aresetn] [get_bd_pins $regslice_pre/aresetn]
+        } else {
+          connect_bd_intf_net $pin [get_bd_intf_pins $converter/S00_AXI]
+        }
+
+        set address_offset [tapasco::ip::create_axioffset_hbm offset_${i}]
+        set offset [format "0x0000000%02x0000000" $i]
+        set_property -dict [list CONFIG.offset $offset CONFIG.offset_bits {5}] $address_offset
+        connect_bd_intf_net [get_bd_intf_pins $converter/M00_AXI] [get_bd_intf_pins $address_offset/S_AXI]
+        connect_bd_net [get_bd_pins $hbm/AXI_${hbm_index}_ACLK] [get_bd_pins $address_offset/CLK]
+        connect_bd_net [get_bd_pins $hbm/AXI_${hbm_index}_ARESET_N] [get_bd_pins $address_offset/RST_N]
+
+        if {[platform::is_regslice_enabled "hbm_hbm" false] || [platform::is_regslice_enabled [format "hbm_hbm%s" $hbm_index] false]} {
+          # insert register slice between smartconnect and HBM
+          set regslice_post [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 regslice_post_${i}]
+          set_property -dict [list CONFIG.REG_AW {15} CONFIG.REG_AR {15} CONFIG.REG_W {15} CONFIG.REG_R {15} CONFIG.REG_B {15} CONFIG.USE_AUTOPIPELINING {1}] $regslice_post
+
+          connect_bd_intf_net [get_bd_intf_pins $address_offset/M_AXI] [get_bd_intf_pins $regslice_post/S_AXI]
+          connect_bd_intf_net [get_bd_intf_pins $regslice_post/M_AXI] [get_bd_intf_pins $hbm/SAXI_${hbm_index}]
+          connect_bd_net [get_bd_pins $hbm/AXI_${hbm_index}_ACLK] [get_bd_pins $regslice_post/aclk]
+          connect_bd_net [get_bd_pins $hbm/AXI_${hbm_index}_ARESET_N] [get_bd_pins $regslice_post/aresetn]
+        } else {
+          connect_bd_intf_net [get_bd_intf_pins $address_offset/M_AXI] [get_bd_intf_pins $hbm/SAXI_${hbm_index}]
+        }
+
+      }
+
+      # recreate memory interconnect network for AXI-MM masters not connected to HBM
+      current_bd_instance /arch
+      set mgroups [platform::max_masters]
+      set masters [ldiff [lsort -dictionary [tapasco::get_aximm_interfaces [get_bd_cells /arch/target_ip_*]]] $hbmInterfaces]
+      set arch_mem_ics [arch::arch_create_mem_interconnects $mgroups [llength $masters]]
+      arch::arch_connect_mem $arch_mem_ics $masters
+      catch {arch::arch_connect_clocks} issue
+      catch {arch::arch_connect_resets} issue
+
+      # apply constraints for one or both stacks
+      current_bd_instance /hbm
+      set constraints_l "$::env(TAPASCO_HOME_TCL)/platform/xupvvh/plugins/hbm_l.xdc"
+      read_xdc $constraints_l
+      set_property PROCESSING_ORDER EARLY [get_files $constraints_l]
+
+      if {$bothStacks} {
+        set constraints_r "$::env(TAPASCO_HOME_TCL)/platform/xupvvh/plugins/hbm_r.xdc"
+        read_xdc $constraints_r
+        set_property PROCESSING_ORDER EARLY [get_files $constraints_r]
+      }
+
+
+    }
+  }
+
+  proc addressmap {{args {}}} {
+    if {[tapasco::is_feature_enabled "HBM"]} {
+      set hbmInterfaces [get_hbm_interfaces]
+      for {set i 0} {$i < [llength $hbmInterfaces]} {incr i} {
+        set args [lappend args M_AXI_HBM_${i} [list 0 0 -1 ""]]
+      }
+      
+    }
+    return $args
+  }
+
+  proc ldiff {a b} {
+    lmap elem $a {
+        expr {[lsearch -exact $b $elem] > -1 ? [continue] : $elem}
+    }
+  }
+
+  proc lmap {varname listval body} {
+    upvar 1 $varname var
+    set temp [list]
+    foreach var $listval {
+        lappend temp [uplevel 1 $body]
+    }
+    set temp
+  }
+
+  proc even x {expr {($x % 2) == 0}}
+
+  proc find_ID {input} {
+    set composition [tapasco::get_composition]
+    for {set o 0} {$o < [llength $composition] -1} {incr o} {
+      if {[regexp ".*:$input:.*" [dict get $composition $o vlnv]]} {
+        return $o
+      }
+    }
+    return -1
+  }
+
+
+}
+
+
+tapasco::register_plugin "platform::hbm::addressmap" "post-address-map"
\ No newline at end of file
diff --git a/toolflow/vivado/platform/xupvvh/plugins/hbm_l.xdc b/toolflow/vivado/platform/xupvvh/plugins/hbm_l.xdc
new file mode 100644
index 00000000..0daa6ba1
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/plugins/hbm_l.xdc
@@ -0,0 +1,39 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# Constraints for left HBM stack
+
+set_property PACKAGE_PIN BH27 [get_ports hbm_ref_clk_0_clk_p]
+set_property PACKAGE_PIN BJ27 [get_ports hbm_ref_clk_0_clk_n]
+set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports hbm_ref_clk_0_clk_p]
+set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports hbm_ref_clk_0_clk_n]
+set_property ODT RTT_48 [get_ports hbm_ref_clk_0_clk_p]
+create_clock -period 10 -name hbm_ref_clk_0_clk_p [get_ports hbm_ref_clk_0_clk_p]
+
+set_clock_groups -asynchronous -group [get_clocks hbm_ref_clk_0_clk_p -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out1_system_clk_wiz_0 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out2_system_clk_wiz_0 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out3_system_clk_wiz_0 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out4_system_clk_wiz_0 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out5_system_clk_wiz_0 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out6_system_clk_wiz_0 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out7_system_clk_wiz_0 -include_generated_clocks]
+
+
+set_property CLOCK_DEDICATED_ROUTE BACKBONE [get_nets system_i/hbm/clocking_0/ibuf/U0/IBUF_OUT[0]]
\ No newline at end of file
diff --git a/toolflow/vivado/platform/xupvvh/plugins/hbm_r.xdc b/toolflow/vivado/platform/xupvvh/plugins/hbm_r.xdc
new file mode 100644
index 00000000..6848bbc5
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/plugins/hbm_r.xdc
@@ -0,0 +1,36 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+# Constraints for right HBM stack
+
+set_property PACKAGE_PIN BH26 [get_ports hbm_ref_clk_1_clk_p]
+set_property PACKAGE_PIN BH25 [get_ports hbm_ref_clk_1_clk_n]
+set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports hbm_ref_clk_1_clk_p]
+set_property IOSTANDARD DIFF_SSTL12_DCI [get_ports hbm_ref_clk_1_clk_n]
+set_property ODT RTT_48 [get_ports hbm_ref_clk_1_clk_p]
+create_clock -period 10 -name hbm_ref_clk_1_clk_p [get_ports hbm_ref_clk_1_clk_p]
+
+set_clock_groups -asynchronous -group [get_clocks hbm_ref_clk_1_clk_p -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out1_system_clk_wiz_1 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out2_system_clk_wiz_1 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out3_system_clk_wiz_1 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out4_system_clk_wiz_1 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out5_system_clk_wiz_1 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out6_system_clk_wiz_1 -include_generated_clocks]
+set_clock_groups -asynchronous -group [get_clocks clk_out7_system_clk_wiz_1 -include_generated_clocks]
\ No newline at end of file
diff --git a/toolflow/vivado/platform/xupvvh/xupvvh.benchmark b/toolflow/vivado/platform/xupvvh/xupvvh.benchmark
new file mode 100644
index 00000000..7f069674
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/xupvvh.benchmark
@@ -0,0 +1 @@
+{"Host": {"Machine": "x86_64", "Node": "dwimorberg", "Operating System": "Linux", "Release": "5.4.2-1.el7.elrepo.x86_64", "Version": "#1 SMP Wed Dec 4 17:32:23 EST 2019"}, "Interrupt Latency": [{"Avg Latency": 23.140690553117764, "Cycle Count": 1, "Max Latency": 380, "Min Latency": 21}, {"Avg Latency": 24.910409713279542, "Cycle Count": 2, "Max Latency": 240, "Min Latency": 22}, {"Avg Latency": 26.562051339348105, "Cycle Count": 4, "Max Latency": 292, "Min Latency": 24}, {"Avg Latency": 24.801682033065998, "Cycle Count": 8, "Max Latency": 188, "Min Latency": 19}, {"Avg Latency": 26.546079664570225, "Cycle Count": 16, "Max Latency": 92, "Min Latency": 24}, {"Avg Latency": 25.165309208606431, "Cycle Count": 32, "Max Latency": 104, "Min Latency": 22}, {"Avg Latency": 26.952857951329918, "Cycle Count": 64, "Max Latency": 309, "Min Latency": 25}, {"Avg Latency": 24.79467866045313, "Cycle Count": 128, "Max Latency": 125, "Min Latency": 22}, {"Avg Latency": 26.87353411112117, "Cycle Count": 256, "Max Latency": 295, "Min Latency": 25}, {"Avg Latency": 25.665498730270986, "Cycle Count": 512, "Max Latency": 202, "Min Latency": 22}, {"Avg Latency": 26.458953813591389, "Cycle Count": 1024, "Max Latency": 348, "Min Latency": 24}, {"Avg Latency": 25.90532936113874, "Cycle Count": 2048, "Max Latency": 294, "Min Latency": 22}, {"Avg Latency": 27.935226879113284, "Cycle Count": 4096, "Max Latency": 273, "Min Latency": 25}, {"Avg Latency": 31.880927893954976, "Cycle Count": 8192, "Max Latency": 319, "Min Latency": 24}, {"Avg Latency": 37.008455808335007, "Cycle Count": 16384, "Max Latency": 319, "Min Latency": 26}, {"Avg Latency": 39.311282616685098, "Cycle Count": 32768, "Max Latency": 308, "Min Latency": 24}, {"Avg Latency": 89.908140403286055, "Cycle Count": 65536, "Max Latency": 331, "Min Latency": 29}, {"Avg Latency": 131.36639383726543, "Cycle Count": 131072, "Max Latency": 658, "Min Latency": 42}, {"Avg Latency": 158.36388888888885, "Cycle Count": 262144, "Max Latency": 400, "Min Latency": 106}, {"Avg Latency": 151.99768875192629, "Cycle Count": 524288, "Max Latency": 415, "Min Latency": 73}, {"Avg Latency": 146.25024154589352, "Cycle Count": 1048576, "Max Latency": 403, "Min Latency": 56}, {"Avg Latency": 116.42669007901662, "Cycle Count": 2097152, "Max Latency": 351, "Min Latency": 49}, {"Avg Latency": 140.39851485148515, "Cycle Count": 4194304, "Max Latency": 378, "Min Latency": 79}, {"Avg Latency": 143.09731543624144, "Cycle Count": 8388608, "Max Latency": 394, "Min Latency": 85}, {"Avg Latency": 146.44720496894422, "Cycle Count": 16777216, "Max Latency": 596, "Min Latency": 72}, {"Avg Latency": 147.18848167539267, "Cycle Count": 33554432, "Max Latency": 2140, "Min Latency": 82}, {"Avg Latency": 130.18421052631589, "Cycle Count": 67108864, "Max Latency": 310, "Min Latency": 87}, {"Avg Latency": 204.59482758620689, "Cycle Count": 134217728, "Max Latency": 354, "Min Latency": 89}, {"Avg Latency": 240.22222222222223, "Cycle Count": 268435456, "Max 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302501.04769230768, "Number of threads": 45}, {"Jobs per second": 313208.01347305393, "Number of threads": 46}, {"Jobs per second": 317947.96987951826, "Number of threads": 47}, {"Jobs per second": 301706.47962382447, "Number of threads": 48}, {"Jobs per second": 272842.12824207521, "Number of threads": 49}, {"Jobs per second": 314251.98192771076, "Number of threads": 50}, {"Jobs per second": 269535.75588235294, "Number of threads": 51}, {"Jobs per second": 264865.92058823543, "Number of threads": 52}, {"Jobs per second": 272095.22898550692, "Number of threads": 53}, {"Jobs per second": 271045.12012011983, "Number of threads": 54}, {"Jobs per second": 268172.24122806994, "Number of threads": 55}, {"Jobs per second": 260177.08771929838, "Number of threads": 56}, {"Jobs per second": 278341.36127167637, "Number of threads": 57}, {"Jobs per second": 266100.92815249256, "Number of threads": 58}, {"Jobs per second": 291439.32240437169, "Number of threads": 59}, {"Jobs per second": 285374.79428571434, "Number of threads": 60}, {"Jobs per second": 277160.33333333337, "Number of threads": 61}, {"Jobs per second": 270135.64035087748, "Number of threads": 62}, {"Jobs per second": 282013.71798780473, "Number of threads": 63}, {"Jobs per second": 282764.8497191011, "Number of threads": 64}, {"Jobs per second": 268423.01934523811, "Number of threads": 65}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 10:53:48", "Transfer Speed": [{"Chunk Size": 1024, "Read": 74.631012916017426, "ReadWrite": 164.36421338504778, "Write": 65.580113268759817}, {"Chunk Size": 2048, "Read": 204.20626801527317, "ReadWrite": 279.35636872114543, "Write": 157.16941536172268}, {"Chunk Size": 4096, "Read": 319.15241993468715, "ReadWrite": 598.77777993394875, "Write": 303.60261697440097}, {"Chunk Size": 8192, "Read": 546.34014999882731, "ReadWrite": 996.95209932525881, "Write": 509.86191571942425}, {"Chunk Size": 16384, "Read": 1084.911755380833, "ReadWrite": 1821.7176242387657, "Write": 888.77747925975791}, {"Chunk Size": 32768, "Read": 1694.5934161509538, "ReadWrite": 2938.6837749655911, "Write": 1552.0390316362641}, {"Chunk Size": 65536, "Read": 2470.1461898331413, "ReadWrite": 4566.7026932529952, "Write": 2475.056995866104}, {"Chunk Size": 131072, "Read": 3201.7514496288695, "ReadWrite": 5764.268754154893, "Write": 3161.5380419084804}, {"Chunk Size": 262144, "Read": 3585.5982924501627, "ReadWrite": 6493.0107308020815, "Write": 3305.841479280677}, {"Chunk Size": 524288, "Read": 4918.3936691896779, "ReadWrite": 9086.5412240618007, "Write": 4513.4564968688837}, {"Chunk Size": 1048576, "Read": 7109.4622804666042, "ReadWrite": 11775.838250141662, "Write": 6509.0849740075892}, {"Chunk Size": 2097152, "Read": 7928.3691175187914, "ReadWrite": 13048.799424184042, "Write": 7245.8582444789336}, {"Chunk Size": 4194304, "Read": 8326.9476451945302, "ReadWrite": 13643.167516053729, "Write": 7866.4265175396404}, {"Chunk Size": 8388608, "Read": 7995.1110346102378, "ReadWrite": 13493.172071231464, "Write": 8087.8458888660743}, {"Chunk Size": 16777216, "Read": 6521.2633037768073, "ReadWrite": 12254.282055108162, "Write": 8171.4385203188594}, {"Chunk Size": 33554432, "Read": 6534.7792687564715, "ReadWrite": 11690.520113049128, "Write": 8223.5826467346269}, {"Chunk Size": 67108864, "Read": 7030.4548215759805, "ReadWrite": 13095.261936248127, "Write": 8247.7837033739343}, {"Chunk Size": 134217728, "Read": 7119.8209256682821, "ReadWrite": 12524.479770712867, "Write": 8246.3620956797295}, {"Chunk Size": 268435456, "Read": 7076.9106851783908, "ReadWrite": 12962.750419211086, "Write": 8213.5858482033418}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/xupvvh/xupvvh.tcl b/toolflow/vivado/platform/xupvvh/xupvvh.tcl
new file mode 100644
index 00000000..2c1163d6
--- /dev/null
+++ b/toolflow/vivado/platform/xupvvh/xupvvh.tcl
@@ -0,0 +1,257 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+namespace eval platform {
+  set platform_dirname "xupvvh"
+  set pcie_width "x16"
+
+  source $::env(TAPASCO_HOME_TCL)/platform/pcie/pcie_base.tcl
+
+  if {[tapasco::is_feature_enabled "HBM"]} {
+
+    proc get_ignored_segments { } {
+      set hbmInterfaces [hbm::get_hbm_interfaces]
+      set ignored [list]
+      #lappend ignored "hbm/hbm_0/SAXI_"
+      for {set i 0} {$i < [llength $hbmInterfaces]} {incr i} {
+        for {set j 0} {$j < [llength $hbmInterfaces]} {incr j} {
+          set axi_index [format %02s $i]
+          set mem_index [format %02s $j]
+          lappend ignored "/hbm/hbm_0/SAXI_${axi_index}/HBM_MEM${mem_index}"
+        }
+      }
+      return $ignored
+    }
+
+  }
+
+  proc create_mig_core {name} {
+    puts "Creating MIG core for DDR ..."
+
+
+    # create MIG core
+    set mig [tapasco::ip::create_us_ddr ${name}]
+    make_bd_intf_pins_external [get_bd_intf_pins $mig/C0_DDR4]
+
+    # create system reset
+    set sys_rst_l [create_bd_port -dir I -type rst sys_rst_l]
+    set sys_rst_inverter [create_bd_cell -type ip -vlnv xilinx.com:ip:util_vector_logic:2.0 sys_rst_inverter]
+    set_property -dict [list CONFIG.C_SIZE {1} CONFIG.C_OPERATION {not} CONFIG.LOGO_FILE {data/sym_notgate.png}] $sys_rst_inverter
+    connect_bd_net $sys_rst_l [get_bd_pins $sys_rst_inverter/Op1]
+    connect_bd_net [get_bd_pins $sys_rst_inverter/Res] [get_bd_pins $mig/sys_rst]
+
+    # create system clock
+    set sys_clk [ create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 ddr4_sys_clk_1 ]
+    connect_bd_intf_net $sys_clk [get_bd_intf_pins $mig/C0_SYS_CLK]
+    set_property CONFIG.FREQ_HZ 100000000 $sys_clk
+
+    # configure MIG core
+    set part_file "[get_property DIRECTORY [current_project]]/MTA18ADF2G72PZ-2G3.csv"
+    if { [file exists $part_file] == 1} {
+      puts "Delete MIG configuration from project directory"
+      file delete $part_file
+    }
+    puts "Copying MIG configuration to project directory"
+    file copy "$::env(TAPASCO_HOME_TCL)/platform/xupvvh/MTA18ADF2G72PZ-2G3.csv" $part_file
+
+    set properties  [list CONFIG.C0.DDR4_TimePeriod {833} \
+      CONFIG.C0.DDR4_InputClockPeriod {9996} \
+      CONFIG.C0.DDR4_CLKOUT0_DIVIDE {5} \
+      CONFIG.C0.DDR4_MemoryType {RDIMMs} \
+      CONFIG.C0.DDR4_MemoryPart {MTA18ADF2G72PZ-2G3} \
+      CONFIG.C0.DDR4_DataWidth {72} \
+      CONFIG.C0.DDR4_DataMask {NONE} \
+      CONFIG.C0.DDR4_CasWriteLatency {16} \
+      CONFIG.C0.DDR4_AxiDataWidth {512} \
+      CONFIG.C0.DDR4_AxiAddressWidth {34} \
+      CONFIG.C0.DDR4_CustomParts $part_file \
+      CONFIG.C0.DDR4_isCustom {true} \
+      ]
+
+
+    set_property -dict $properties $mig
+
+
+    # connect MEM_CTRL interface (ECC configuration + status)
+    set s_axi_mem_ctrl [create_bd_intf_pin -mode Slave -vlnv xilinx.com:interface:aximm_rtl:1.0 S_MEM_CTRL]
+
+    set m_axi_mem_ctrl [create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:aximm_rtl:1.0 /host/M_MEM_CTRL]
+
+    set num_mi_old [get_property CONFIG.NUM_MI [get_bd_cells /host/out_ic]]
+    set num_mi [expr "$num_mi_old + 1"]
+    set_property -dict [list CONFIG.NUM_MI $num_mi] [get_bd_cells /host/out_ic]
+
+    connect_bd_intf_net [get_bd_intf_pins $mig/C0_DDR4_S_AXI_CTRL] $s_axi_mem_ctrl
+    connect_bd_intf_net $s_axi_mem_ctrl $m_axi_mem_ctrl
+    connect_bd_intf_net $m_axi_mem_ctrl [get_bd_intf_pins /host/out_ic/[format "M%02d_AXI" $num_mi_old]]
+
+
+    create_ddr4_constraints
+
+    return $mig
+  }
+
+  proc create_ddr4_constraints {} {
+    set constraints_fn "$::env(TAPASCO_HOME_TCL)/platform/xupvvh/ddr4.xdc"
+    read_xdc $constraints_fn
+    set_property PROCESSING_ORDER EARLY [get_files $constraints_fn]
+  }
+  
+
+  proc create_pcie_core {} {
+    puts "Creating AXI PCIe Gen3 bridge ..."
+
+    # create PCIe Clock
+    set pcie_sys_clk [create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 pcie_sys_clk]
+    set pcie_sys_clk_ibuf [tapasco::ip::create_util_buf refclk_ibuf]
+    set_property -dict [ list CONFIG.C_BUF_TYPE {IBUFDSGTE}  ] $pcie_sys_clk_ibuf
+
+    # create PCIe reset
+    set pcie_sys_reset_l [create_bd_port -dir I -type rst pcie_sys_reset_l]
+    set_property -dict [ list CONFIG.POLARITY {ACTIVE_LOW}  ] $pcie_sys_reset_l
+
+    # create PCIe core
+    set pcie_7x_mgt [create_bd_intf_port -mode Master -vlnv xilinx.com:interface:pcie_7x_mgt_rtl:1.0 pcie_7x_mgt]
+    set pcie_core [tapasco::ip::create_axi_pcie3_0_usp axi_pcie3_0]
+
+    set pcie_properties [list \
+      CONFIG.functional_mode {AXI_Bridge} \
+      CONFIG.mode_selection {Advanced} \
+      CONFIG.pcie_blk_locn {PCIE4C_X1Y1} \
+      CONFIG.pl_link_cap_max_link_width {X16} \
+      CONFIG.pl_link_cap_max_link_speed {8.0_GT/s} \
+      CONFIG.axi_addr_width {64} \
+      CONFIG.pipe_sim {true} \
+      CONFIG.pf0_revision_id {01} \
+      CONFIG.pf0_base_class_menu {Memory_controller} \
+      CONFIG.pf0_sub_class_interface_menu {Other_memory_controller} \
+      CONFIG.pf0_interrupt_pin {NONE} \
+      CONFIG.pf0_msi_enabled {false} \
+      CONFIG.SYS_RST_N_BOARD_INTERFACE {Custom} \
+      CONFIG.PCIE_BOARD_INTERFACE {Custom} \
+      CONFIG.pf0_msix_enabled {true} \
+      CONFIG.c_m_axi_num_write {32} \
+      CONFIG.pf0_msix_impl_locn {External} \
+      CONFIG.pf0_bar0_size {64} \
+      CONFIG.pf0_bar0_scale {Megabytes} \
+      CONFIG.pf0_bar0_64bit {true} \
+      CONFIG.axi_data_width {512_bit} \
+      CONFIG.pf0_device_id {7038} \
+      CONFIG.pf0_class_code_base {05} \
+      CONFIG.pf0_class_code_sub {80} \
+      CONFIG.pf0_class_code_interface {00} \
+      CONFIG.xdma_axilite_slave {true} \
+      CONFIG.coreclk_freq {500} \
+      CONFIG.plltype {QPLL1} \
+      CONFIG.pf0_msix_cap_table_size {83} \
+      CONFIG.pf0_msix_cap_table_offset {20000} \
+      CONFIG.pf0_msix_cap_table_bir {BAR_1:0} \
+      CONFIG.pf0_msix_cap_pba_offset {28000} \
+      CONFIG.pf0_msix_cap_pba_bir {BAR_1:0} \
+      CONFIG.bar_indicator {BAR_1:0} \
+      CONFIG.bar0_indicator {0}
+      ]
+
+    set_property -dict $pcie_properties $pcie_core
+
+    # create connections
+    connect_bd_intf_net $pcie_7x_mgt [get_bd_intf_pins $pcie_core/pcie_mgt]
+    connect_bd_intf_net $pcie_sys_clk [get_bd_intf_pins $pcie_sys_clk_ibuf/CLK_IN_D]
+    connect_bd_net [get_bd_pins $pcie_core/sys_clk] [get_bd_pins $pcie_sys_clk_ibuf/IBUF_DS_ODIV2]
+    connect_bd_net [get_bd_pins $pcie_core/sys_clk_gt] [get_bd_pins $pcie_sys_clk_ibuf/IBUF_OUT]
+    connect_bd_net $pcie_sys_reset_l [get_bd_pins $pcie_core/sys_rst_n]
+
+
+    tapasco::ip::create_msixusptrans "MSIxTranslator" $pcie_core
+
+    create_constraints
+
+    return $pcie_core
+  }
+
+  proc create_constraints {} {
+    set constraints_fn "$::env(TAPASCO_HOME_TCL)/platform/xupvvh/board.xdc"
+    read_xdc $constraints_fn
+    set_property PROCESSING_ORDER EARLY [get_files $constraints_fn]
+  }
+
+  # Checks if the optional register slice given by the name is enabled (based on regslice feature and default value)
+  proc is_regslice_enabled {name default} {
+    if {[tapasco::is_feature_enabled "Regslice"]} {
+      set regslices [tapasco::get_feature "Regslice"]
+      if  {[dict exists $regslices $name]} {
+          return [dict get $regslices $name]
+        } else {
+          return $default
+        }
+    } else {
+      return $default
+    }
+  }
+
+  # Inserts a new register slice between given master and slave (for SLR crossing)
+  proc insert_regslice {name default master slave clock reset subsystem} {
+    if {[is_regslice_enabled $name $default]} {
+      set regslice [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_register_slice:2.1 $subsystem/regslice_${name}]
+      set_property -dict [list CONFIG.REG_AW {15} CONFIG.REG_AR {15} CONFIG.REG_W {15} CONFIG.REG_R {15} CONFIG.REG_B {15} CONFIG.USE_AUTOPIPELINING {1}] $regslice
+      delete_bd_objs [get_bd_intf_nets -of_objects [get_bd_intf_pins $master]]
+      connect_bd_intf_net [get_bd_intf_pins $master] [get_bd_intf_pins $regslice/S_AXI]
+      connect_bd_intf_net [get_bd_intf_pins $regslice/M_AXI] [get_bd_intf_pins $slave]
+      connect_bd_net [get_bd_pins $clock] [get_bd_pins $regslice/aclk]
+      connect_bd_net [get_bd_pins $reset] [get_bd_pins $regslice/aresetn]
+    }
+  }
+
+  # Insert optional register slices
+  proc insert_regslices {} {
+    insert_regslice "dma_migic" false "/memory/dma/m32_axi" "/memory/mig_ic/S00_AXI" "/memory/mem_clk" "/memory/mem_peripheral_aresetn" "/memory"
+    insert_regslice "host_memctrl" true "/host/M_MEM_CTRL" "/memory/S_MEM_CTRL" "/clocks_and_resets/mem_clk" "/clocks_and_resets/mem_interconnect_aresetn" ""
+    insert_regslice "arch_mem" false "/arch/M_MEM_0" "/memory/S_MEM_0" "/clocks_and_resets/design_clk" "/clocks_and_resets/design_interconnect_aresetn" ""
+    insert_regslice "host_dma" true "/host/M_DMA" "/memory/S_DMA" "/clocks_and_resets/host_clk" "/clocks_and_resets/host_interconnect_aresetn" ""
+    insert_regslice "dma_host" true "/memory/M_HOST" "/host/S_HOST" "/clocks_and_resets/host_clk" "/clocks_and_resets/host_interconnect_aresetn" ""
+    insert_regslice "host_arch" true "/host/M_ARCH" "/arch/S_ARCH" "/clocks_and_resets/design_clk" "/clocks_and_resets/design_interconnect_aresetn" ""
+
+    if {[is_regslice_enabled "pe" false]} {
+      set ips [get_bd_cells /arch/target_ip_*]
+      foreach ip $ips {
+        set masters [tapasco::get_aximm_interfaces $ip]
+        foreach master $masters {
+          set slave [get_bd_intf_pins -filter {MODE == Slave} -of_objects [get_bd_intf_nets -of_objects $master]]
+          insert_regslice [get_property NAME $ip] true $master $slave "/arch/design_clk" "/arch/design_interconnect_aresetn" "/arch"
+        }
+      }
+    }
+  }
+
+  namespace eval xupvvh {
+        namespace export addressmap
+
+        proc addressmap {args} {
+            # add ECC config to platform address map
+            set args [lappend args "M_MEM_CTRL" [list 0x40000 0x10000 0 "PLATFORM_COMPONENT_ECC"]]
+            return $args
+        }
+    }
+
+
+  tapasco::register_plugin "platform::xupvvh::addressmap" "post-address-map"
+
+  tapasco::register_plugin "platform::insert_regslices" "post-platform"
+
+}
diff --git a/toolflow/vivado/platform/zc706/platform.json b/toolflow/vivado/platform/zc706/platform.json
index 305ce40f..3171c5d0 100644
--- a/toolflow/vivado/platform/zc706/platform.json
+++ b/toolflow/vivado/platform/zc706/platform.json
@@ -6,5 +6,6 @@
 	"BoardPart" : "xilinx.com:zc706:part0",
 	"BoardPreset" : "ZC706",
 	"TargetUtilization" : 97,
-	"Benchmark" : "zc706.benchmark"
+	"Benchmark" : "zc706.benchmark",
+	"FileExtension": "bit.bin"
 }
diff --git a/toolflow/vivado/platform/zc706/plugins/apu_frequency.tcl b/toolflow/vivado/platform/zc706/plugins/apu_frequency.tcl
index 0f25fa1c..641b4320 100644
--- a/toolflow/vivado/platform/zc706/plugins/apu_frequency.tcl
+++ b/toolflow/vivado/platform/zc706/plugins/apu_frequency.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   apu_frequency.tcl
-# @brief  Plugin to set APU (ARM core on PS side) frequency to 800 MHz for the
-#         ZC706 to override board preset of 667 MHz.
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval apu_frequency {
   proc set_max_apu_frequency {{args {}}} {
     puts "Increasing ZC706 APU frequency to 800 MHz ..."
diff --git a/toolflow/vivado/platform/zc706/plugins/fancontrol-zc706.xdc b/toolflow/vivado/platform/zc706/plugins/fancontrol-zc706.xdc
index 5a2a6e95..7ba2791c 100644
--- a/toolflow/vivado/platform/zc706/plugins/fancontrol-zc706.xdc
+++ b/toolflow/vivado/platform/zc706/plugins/fancontrol-zc706.xdc
@@ -1,20 +1,21 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 set_property PACKAGE_PIN AB19 [get_ports {pwm[0]}]
 set_property IOSTANDARD LVCMOS33 [get_ports {pwm[0]}]
diff --git a/toolflow/vivado/platform/zc706/plugins/fancontrol.tcl b/toolflow/vivado/platform/zc706/plugins/fancontrol.tcl
index e241471c..a924dc39 100644
--- a/toolflow/vivado/platform/zc706/plugins/fancontrol.tcl
+++ b/toolflow/vivado/platform/zc706/plugins/fancontrol.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   fancontrol.tcl
-# @brief  Plugin to add a primitive counter-based PWM to slow down the noisy
-#         fan on the ZC706 (use at own risk!).
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval fancontrol {
   proc fancontrol_feature {{args {}}} {
     if {[tapasco::is_feature_enabled "FanControl"]} {
diff --git a/toolflow/vivado/platform/zc706/plugins/sfpplus.tcl b/toolflow/vivado/platform/zc706/plugins/sfpplus.tcl
index 8006cfc9..eeac4fc9 100644
--- a/toolflow/vivado/platform/zc706/plugins/sfpplus.tcl
+++ b/toolflow/vivado/platform/zc706/plugins/sfpplus.tcl
@@ -1,3 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 if {[tapasco::is_feature_enabled "SFPPLUS"]} {
 proc create_custom_subsystem_network {{args {}}} {
 
diff --git a/toolflow/vivado/platform/zc706/zc706.benchmark b/toolflow/vivado/platform/zc706/zc706.benchmark
index def25e85..6ce9cc0e 100644
--- a/toolflow/vivado/platform/zc706/zc706.benchmark
+++ b/toolflow/vivado/platform/zc706/zc706.benchmark
@@ -1,350 +1 @@
-{
-  "Host": {
-    "Machine": "armv7l",
-    "Node": "zc706",
-    "Operating System": "Linux",
-    "Release": "4.6.0-tapasco",
-    "Version": "#1 SMP PREEMPT Fri May 26 14:55:24 CEST 2017"
-  },
-  "Interrupt Latency": [
-    {
-      "Avg Latency": 8.0527019620740496,
-      "Cycle Count": 1,
-      "Max Latency": 237,
-      "Min Latency": 5
-    },
-    {
-      "Avg Latency": 8.0558602945203344,
-      "Cycle Count": 2,
-      "Max Latency": 95,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 8.0594427517023774,
-      "Cycle Count": 4,
-      "Max Latency": 231,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 8.0584534243727397,
-      "Cycle Count": 8,
-      "Max Latency": 231,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 8.0617024090278218,
-      "Cycle Count": 16,
-      "Max Latency": 230,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 8.0587538575218396,
-      "Cycle Count": 32,
-      "Max Latency": 236,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 8.0548328559871845,
-      "Cycle Count": 64,
-      "Max Latency": 233,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 7.0553164999344826,
-      "Cycle Count": 128,
-      "Max Latency": 231,
-      "Min Latency": 7
-    },
-    {
-      "Avg Latency": 12.90728536283155,
-      "Cycle Count": 256,
-      "Max Latency": 236,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 16.956652963521737,
-      "Cycle Count": 512,
-      "Max Latency": 242,
-      "Min Latency": 15
-    },
-    {
-      "Avg Latency": 21.489337943952048,
-      "Cycle Count": 1024,
-      "Max Latency": 233,
-      "Min Latency": 17
-    },
-    {
-      "Avg Latency": 19.416458743707619,
-      "Cycle Count": 2048,
-      "Max Latency": 41,
-      "Min Latency": 15
-    },
-    {
-      "Avg Latency": 22.792719919110166,
-      "Cycle Count": 4096,
-      "Max Latency": 246,
-      "Min Latency": 19
-    },
-    {
-      "Avg Latency": 21.855747558226899,
-      "Cycle Count": 8192,
-      "Max Latency": 142,
-      "Min Latency": 16
-    },
-    {
-      "Avg Latency": 20.089272318079495,
-      "Cycle Count": 16384,
-      "Max Latency": 42,
-      "Min Latency": 16
-    },
-    {
-      "Avg Latency": 21.626412429378536,
-      "Cycle Count": 32768,
-      "Max Latency": 91,
-      "Min Latency": 16
-    },
-    {
-      "Avg Latency": 20.211133740665318,
-      "Cycle Count": 65536,
-      "Max Latency": 65,
-      "Min Latency": 16
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-    {
-      "Avg Latency": 22.806408544726303,
-      "Cycle Count": 131072,
-      "Max Latency": 45,
-      "Min Latency": 17
-    },
-    {
-      "Avg Latency": 24.047619047619037,
-      "Cycle Count": 262144,
-      "Max Latency": 33,
-      "Min Latency": 19
-    },
-    {
-      "Avg Latency": 25.778947368421047,
-      "Cycle Count": 524288,
-      "Max Latency": 33,
-      "Min Latency": 21
-    },
-    {
-      "Avg Latency": 27.94240837696335,
-      "Cycle Count": 1048576,
-      "Max Latency": 44,
-      "Min Latency": 23
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-    {
-      "Avg Latency": 28.78125,
-      "Cycle Count": 2097152,
-      "Max Latency": 67,
-      "Min Latency": 23
-    },
-    {
-      "Avg Latency": 28.941666666666666,
-      "Cycle Count": 4194304,
-      "Max Latency": 39,
-      "Min Latency": 25
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-    {
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-      "Cycle Count": 8388608,
-      "Max Latency": 38,
-      "Min Latency": 25
-    },
-    {
-      "Avg Latency": 32.127450980392169,
-      "Cycle Count": 16777216,
-      "Max Latency": 42,
-      "Min Latency": 28
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-    {
-      "Avg Latency": 33.368794326241115,
-      "Cycle Count": 33554432,
-      "Max Latency": 63,
-      "Min Latency": 27
-    },
-    {
-      "Avg Latency": 36,
-      "Cycle Count": 67108864,
-      "Max Latency": 41,
-      "Min Latency": 29
-    },
-    {
-      "Avg Latency": 37,
-      "Cycle Count": 134217728,
-      "Max Latency": 46,
-      "Min Latency": 33
-    },
-    {
-      "Avg Latency": 31.785714285714285,
-      "Cycle Count": 268435456,
-      "Max Latency": 41,
-      "Min Latency": 26
-    },
-    {
-      "Avg Latency": 20.999999999999996,
-      "Cycle Count": 536870912,
-      "Max Latency": 31,
-      "Min Latency": 14
-    },
-    {
-      "Avg Latency": -1.0540540540540537,
-      "Cycle Count": 1073741824,
-      "Max Latency": 10,
-      "Min Latency": -10
-    },
-    {
-      "Avg Latency": -43.18,
-      "Cycle Count": 2147483648,
-      "Max Latency": 2.2250738585072014E-308,
-      "Min Latency": -59
-    }
-  ],
-  "Job Throughput": [
-    {
-      "Jobs per second": 138592.56733333334,
-      "Number of threads": 1
-    },
-    {
-      "Jobs per second": 232312.96777777778,
-      "Number of threads": 2
-    },
-    {
-      "Jobs per second": 219136.08115800866,
-      "Number of threads": 3
-    },
-    {
-      "Jobs per second": 219428.05910714288,
-      "Number of threads": 4
-    },
-    {
-      "Jobs per second": 222018.6763017076,
-      "Number of threads": 5
-    },
-    {
-      "Jobs per second": 220085.67681037713,
-      "Number of threads": 6
-    },
-    {
-      "Jobs per second": 219701.88838512715,
-      "Number of threads": 7
-    },
-    {
-      "Jobs per second": 225917.50698412699,
-      "Number of threads": 8
-    },
-    {
-      "Jobs per second": 220201.23333333331,
-      "Number of threads": 9
-    }
-  ],
-  "Library Versions": {
-    "Platform API": "1.2.2",
-    "Tapasco API": "1.2.1"
-  },
-  "Timestamp": "2017-05-30 17:16:46",
-  "Transfer Speed": [
-    {
-      "Chunk Size": 1024,
-      "Read": 22.259345893205822,
-      "ReadWrite": 42.500357442733176,
-      "Write": 24.102710854747176
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-    {
-      "Chunk Size": 2048,
-      "Read": 41.292149780294622,
-      "ReadWrite": 78.128774178089031,
-      "Write": 47.479922297111749
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-    {
-      "Chunk Size": 4096,
-      "Read": 71.40583928618193,
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-      "Write": 92.521009788864006
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-    {
-      "Chunk Size": 8192,
-      "Read": 94.201085448512288,
-      "ReadWrite": 175.66232120497139,
-      "Write": 132.82372109908727
-    },
-    {
-      "Chunk Size": 16384,
-      "Read": 107.85257728914266,
-      "ReadWrite": 200.0683413857482,
-      "Write": 160.54442455412905
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-    {
-      "Chunk Size": 32768,
-      "Read": 119.93015547936392,
-      "ReadWrite": 221.57787291687399,
-      "Write": 188.93629482533481
-    },
-    {
-      "Chunk Size": 65536,
-      "Read": 125.56426741446468,
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-    {
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-    {
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-    {
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-  ]
-}
\ No newline at end of file
+{"Host": {"Machine": "armv7l", "Node": "zc706", "Operating System": "Linux", "Release": "4.19.0-tapasco", "Version": "#1 SMP PREEMPT Thu May 7 13:43:24 CEST 2020"}, "Interrupt Latency": [{"Avg Latency": 41.198726919778096, "Cycle Count": 1, "Max Latency": 355, "Min Latency": 32}, {"Avg Latency": 42.041394535921349, "Cycle Count": 2, "Max Latency": 317, "Min Latency": 33}, {"Avg Latency": 42.346631452136016, "Cycle Count": 4, "Max Latency": 296, "Min Latency": 32}, {"Avg Latency": 41.524422412224915, "Cycle Count": 8, "Max Latency": 414, "Min Latency": 32}, {"Avg Latency": 45.201112095266204, "Cycle Count": 16, "Max Latency": 308, "Min Latency": 32}, {"Avg Latency": 50.196593251600433, "Cycle Count": 32, "Max Latency": 304, "Min Latency": 34}, {"Avg Latency": 49.71976988010109, "Cycle Count": 64, "Max Latency": 287, "Min Latency": 37}, {"Avg Latency": 52.513862470459443, "Cycle Count": 128, "Max Latency": 305, "Min Latency": 36}, {"Avg Latency": 52.445772543504965, "Cycle Count": 256, "Max Latency": 284, "Min Latency": 46}, {"Avg Latency": 48.06820002288589, "Cycle Count": 512, "Max Latency": 295, "Min Latency": 46}, {"Avg Latency": 52.405790349417636, "Cycle Count": 1024, "Max Latency": 265, "Min Latency": 47}, {"Avg Latency": 48.900921322023962, "Cycle Count": 2048, "Max Latency": 274, "Min Latency": 47}, {"Avg Latency": 49.7632963728623, "Cycle Count": 4096, "Max Latency": 277, "Min Latency": 47}, {"Avg Latency": 49.964734495338476, "Cycle Count": 8192, "Max Latency": 253, "Min Latency": 47}, {"Avg Latency": 50.308462040461123, "Cycle Count": 16384, "Max Latency": 256, "Min Latency": 47}, {"Avg Latency": 50.993504012227717, "Cycle Count": 32768, "Max Latency": 232, "Min Latency": 48}, {"Avg Latency": 51.450994318181841, "Cycle Count": 65536, "Max Latency": 84, "Min Latency": 47}, {"Avg Latency": 53.633879781420767, "Cycle Count": 131072, "Max Latency": 81, "Min Latency": 51}, {"Avg Latency": 55.839572192513366, "Cycle Count": 262144, "Max Latency": 93, "Min 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88}], "Job Throughput": [{"Jobs per second": 28044.538062283744, "Number of threads": 1}, {"Jobs per second": 40116.944999999992, "Number of threads": 2}, {"Jobs per second": 68650.426751592313, "Number of threads": 3}, {"Jobs per second": 67908.705882352908, "Number of threads": 4}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 10:20:41", "Transfer Speed": [{"Chunk Size": 1024, "Read": 179.03351245432546, "ReadWrite": 562.80674067004941, "Write": 413.7691090676521}, {"Chunk Size": 2048, "Read": 217.07447049459807, "ReadWrite": 843.94265585584094, "Write": 670.83257321367591}, {"Chunk Size": 4096, "Read": 237.68940362784906, "ReadWrite": 1166.4830532350954, "Write": 1000.5071393644768}, {"Chunk Size": 8192, "Read": 253.92376947325297, "ReadWrite": 1483.0670669816921, "Write": 1322.6273227481238}, {"Chunk Size": 16384, "Read": 261.41458466172776, "ReadWrite": 1724.8114817735604, "Write": 1560.4657783873845}, {"Chunk Size": 32768, "Read": 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Size": 16777216, "Read": 227.45093775432608, "ReadWrite": 564.0424715856326, "Write": 624.34814209292711}, {"Chunk Size": 33554432, "Read": 219.38547473003197, "ReadWrite": 460.59152846666797, "Write": 611.73725019372182}, {"Chunk Size": 67108864, "Read": 204.13228881590624, "ReadWrite": 529.645015894013, "Write": 598.51391588298247}, {"Chunk Size": 134217728, "Read": 182.85324398357267, "ReadWrite": 0, "Write": 582.5393667588271}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/zc706/zc706.tcl b/toolflow/vivado/platform/zc706/zc706.tcl
index 946c9c3f..acb6b201 100644
--- a/toolflow/vivado/platform/zc706/zc706.tcl
+++ b/toolflow/vivado/platform/zc706/zc706.tcl
@@ -1,21 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 source -notrace $::env(TAPASCO_HOME_TCL)/platform/zynq/zynq.tcl
 
 namespace eval platform {
diff --git a/toolflow/vivado/platform/zcu102/zcu102.benchmark b/toolflow/vivado/platform/zcu102/zcu102.benchmark
new file mode 100644
index 00000000..8728097e
--- /dev/null
+++ b/toolflow/vivado/platform/zcu102/zcu102.benchmark
@@ -0,0 +1 @@
+{"Host": {"Machine": "aarch64", "Node": "zcu102", "Operating System": "Linux", "Release": "4.19.0-tapasco", "Version": "#1 SMP Thu Apr 30 22:40:25 CEST 2020"}, "Interrupt Latency": [{"Avg Latency": 20.154453650957805, "Cycle Count": 1, "Max Latency": 224, "Min Latency": 20}, {"Avg Latency": 20.177900839318333, "Cycle Count": 2, "Max Latency": 204, "Min Latency": 20}, {"Avg Latency": 20.14309720785911, "Cycle Count": 4, "Max Latency": 206, "Min Latency": 20}, {"Avg Latency": 20.855229941828533, "Cycle Count": 8, "Max Latency": 182, "Min Latency": 20}, {"Avg Latency": 20.601159230096282, "Cycle Count": 16, "Max Latency": 472, "Min Latency": 20}, {"Avg Latency": 20.664763654657982, "Cycle Count": 32, "Max Latency": 195, "Min Latency": 20}, {"Avg Latency": 20.952182038034437, "Cycle Count": 64, "Max Latency": 195, "Min Latency": 20}, {"Avg Latency": 20.60641166255364, "Cycle Count": 128, "Max Latency": 194, "Min Latency": 20}, {"Avg Latency": 21.092435353145646, "Cycle Count": 256, "Max Latency": 193, "Min Latency": 20}, {"Avg Latency": 20.21266099570671, "Cycle Count": 512, "Max Latency": 207, "Min Latency": 20}, {"Avg Latency": 20.482499681812438, "Cycle Count": 1024, "Max Latency": 197, "Min Latency": 20}, {"Avg Latency": 21.12707462308369, "Cycle Count": 2048, "Max Latency": 207, "Min Latency": 20}, {"Avg Latency": 21.298532731376941, "Cycle Count": 4096, "Max Latency": 189, "Min Latency": 21}, {"Avg Latency": 21.387274237077062, "Cycle Count": 8192, "Max Latency": 160, "Min Latency": 21}, {"Avg Latency": 21.538661710037218, "Cycle Count": 16384, "Max Latency": 68, "Min Latency": 21}, {"Avg Latency": 21.657102869139237, "Cycle Count": 32768, "Max Latency": 185, "Min Latency": 21}, {"Avg Latency": 28.132694938440483, "Cycle Count": 65536, "Max Latency": 140, "Min Latency": 20}, {"Avg Latency": 75.788626907073649, "Cycle Count": 131072, "Max Latency": 216, "Min Latency": 22}, {"Avg Latency": 75.275831087151872, "Cycle Count": 262144, "Max Latency": 172, "Min Latency": 22}, {"Avg Latency": 109.11497326203209, "Cycle Count": 524288, "Max Latency": 165, "Min Latency": 23}, {"Avg Latency": 122.22261484098945, "Cycle Count": 1048576, "Max Latency": 170, "Min Latency": 25}, {"Avg Latency": 146.68743718592967, "Cycle Count": 2097152, "Max Latency": 200, "Min Latency": 35}, {"Avg Latency": 136.22847358121368, "Cycle Count": 4194304, "Max Latency": 216, "Min Latency": 67}, {"Avg Latency": 137.50354251012115, "Cycle Count": 8388608, "Max Latency": 215, "Min Latency": 69}, {"Avg Latency": 121.85260482846252, "Cycle Count": 16777216, "Max Latency": 192, "Min Latency": 35}, {"Avg Latency": 115.15686274509802, "Cycle Count": 33554432, "Max Latency": 217, "Min Latency": 70}, {"Avg Latency": 128.0634057971015, "Cycle Count": 67108864, "Max Latency": 194, "Min Latency": 58}, {"Avg Latency": 123.04210526315791, "Cycle Count": 134217728, "Max Latency": 219, "Min Latency": 36}, {"Avg Latency": 118.3623188405797, "Cycle Count": 268435456, "Max Latency": 174, "Min Latency": 80}], "Job Throughput": [{"Jobs per second": 60709.3761904762, "Number of threads": 1}, {"Jobs per second": 116336.11846153846, "Number of threads": 2}, {"Jobs per second": 153153.84036144588, "Number of threads": 3}, {"Jobs per second": 178698.50595238101, "Number of threads": 4}, {"Jobs per second": 204209.69938650297, "Number of threads": 5}, {"Jobs per second": 225877.59969788516, "Number of threads": 6}, {"Jobs per second": 237248.27863777088, "Number of threads": 7}, {"Jobs per second": 247763.35608308614, "Number of threads": 8}, {"Jobs per second": 260106.47214076255, "Number of threads": 9}, {"Jobs per second": 282370.96627565986, "Number of threads": 10}, {"Jobs per second": 259650.02769679256, "Number of threads": 11}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 11:49:42", "Transfer Speed": [{"Chunk Size": 1024, "Read": 121.28795991570877, "ReadWrite": 973.81362809496977, "Write": 882.99742957645003}, {"Chunk Size": 2048, "Read": 128.05868804307795, "ReadWrite": 1613.0974625572348, "Write": 1494.4273086819146}, {"Chunk Size": 4096, "Read": 132.00385315443975, "ReadWrite": 2349.0635641164208, "Write": 2249.0643091349975}, {"Chunk Size": 8192, "Read": 134.17142448960308, "ReadWrite": 3202.6755113635745, "Write": 3094.9407008333665}, {"Chunk Size": 16384, "Read": 135.11769472220115, "ReadWrite": 3800.3277676905359, "Write": 3721.6609467968096}, {"Chunk Size": 32768, "Read": 135.5764469203373, "ReadWrite": 3935.8540711346204, "Write": 3804.0550973018162}, {"Chunk Size": 65536, "Read": 135.76108242694201, "ReadWrite": 4057.1819599051141, "Write": 3967.6287686677301}, {"Chunk Size": 131072, "Read": 135.81655692509517, "ReadWrite": 4236.9652165631078, "Write": 4161.9070455481979}, {"Chunk Size": 262144, "Read": 135.5510092438376, "ReadWrite": 4289.0028611181451, "Write": 4222.978551182835}, {"Chunk Size": 524288, "Read": 134.61680660825675, "ReadWrite": 4297.4021692972037, "Write": 4219.1602071274328}, {"Chunk Size": 1048576, "Read": 128.99351810838158, "ReadWrite": 3476.4672857280548, "Write": 3602.9396176072696}, {"Chunk Size": 2097152, "Read": 120.23076341432424, "ReadWrite": 2137.6023493886264, "Write": 2274.7001101458318}, {"Chunk Size": 4194304, "Read": 115.30662659745045, "ReadWrite": 2008.5554166406623, "Write": 2089.7521853861222}, {"Chunk Size": 8388608, "Read": 109.50510367788077, "ReadWrite": 1987.9336628399271, "Write": 2058.5484513892125}, {"Chunk Size": 16777216, "Read": 103.66000463129591, "ReadWrite": 2036.0519585844984, "Write": 2196.6864136972385}, {"Chunk Size": 33554432, "Read": 92.380777104993285, "ReadWrite": 2047.8341871013454, "Write": 2150.9775781685325}, {"Chunk Size": 67108864, "Read": 82.629697732889582, "ReadWrite": 2067.1091550268402, "Write": 1883.8162511438766}, {"Chunk Size": 134217728, "Read": 64.398226734685238, "ReadWrite": 2054.6451044131982, "Write": 1683.5407861250078}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/zcu102/zcu102.tcl b/toolflow/vivado/platform/zcu102/zcu102.tcl
index 3dd9f84c..57b21c4d 100644
--- a/toolflow/vivado/platform/zcu102/zcu102.tcl
+++ b/toolflow/vivado/platform/zcu102/zcu102.tcl
@@ -1,22 +1,23 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
+
 namespace eval platform {
   set platform_dirname "zcu102"
 
diff --git a/toolflow/vivado/platform/zcu102revd/plugins/sfpplus.tcl b/toolflow/vivado/platform/zcu102revd/plugins/sfpplus.tcl
index 22f3b768..0e12f211 100644
--- a/toolflow/vivado/platform/zcu102revd/plugins/sfpplus.tcl
+++ b/toolflow/vivado/platform/zcu102revd/plugins/sfpplus.tcl
@@ -1,3 +1,23 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+
 namespace eval sfpplus {
   namespace export generate_sfp_cores
 
diff --git a/toolflow/vivado/platform/zcu102revd/zcu102revd.tcl b/toolflow/vivado/platform/zcu102revd/zcu102revd.tcl
index eb9f0811..8f669cf8 100644
--- a/toolflow/vivado/platform/zcu102revd/zcu102revd.tcl
+++ b/toolflow/vivado/platform/zcu102revd/zcu102revd.tcl
@@ -1,20 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
 
 namespace eval platform {
diff --git a/toolflow/vivado/platform/zedboard/platform.json b/toolflow/vivado/platform/zedboard/platform.json
index 9951dd0a..3a12f100 100644
--- a/toolflow/vivado/platform/zedboard/platform.json
+++ b/toolflow/vivado/platform/zedboard/platform.json
@@ -6,5 +6,6 @@
 	"BoardPart" : "em.avnet.com:zed:part0",
 	"BoardPreset" : "ZedBoard",
 	"TargetUtilization" : 97,
-	"Benchmark" : "zedboard.benchmark"
+	"Benchmark" : "zedboard.benchmark",
+	"FileExtension": "bit.bin"
 }
diff --git a/toolflow/vivado/platform/zedboard/plugins/oled.tcl b/toolflow/vivado/platform/zedboard/plugins/oled.tcl
index f4ae6bf0..5dea6b78 100644
--- a/toolflow/vivado/platform/zedboard/plugins/oled.tcl
+++ b/toolflow/vivado/platform/zedboard/plugins/oled.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file   oled.tcl
-# @brief  Plugin to add a OLED display driver that shows the occurrence and
-#         counts of interrupts at each slot graphically.
-# @author J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 if {[tapasco::is_feature_enabled "OLED"]} {
   # Creates the optional OLED controller indicating interrupts.
   # @param ps Processing System instance
diff --git a/toolflow/vivado/platform/zedboard/zedboard.benchmark b/toolflow/vivado/platform/zedboard/zedboard.benchmark
index 91208c64..c541ac5f 100644
--- a/toolflow/vivado/platform/zedboard/zedboard.benchmark
+++ b/toolflow/vivado/platform/zedboard/zedboard.benchmark
@@ -1,346 +1 @@
-{
-  "Host": {
-    "Machine": "armv7l",
-    "Node": "zedboard",
-    "Operating System": "Linux",
-    "Release": "4.6.0-tapasco",
-    "Version": "#1 SMP PREEMPT Fri May 26 13:52:12 CEST 2017"
-  },
-  "Interrupt Latency": [
-    {
-      "Avg Latency": 9.9431585153286939,
-      "Cycle Count": 1,
-      "Max Latency": 229,
-      "Min Latency": 6
-    },
-    {
-      "Avg Latency": 7.996009115668933,
-      "Cycle Count": 2,
-      "Max Latency": 579,
-      "Min Latency": 6
-    },
-    {
-      "Avg Latency": 8.5216444672129672,
-      "Cycle Count": 4,
-      "Max Latency": 91,
-      "Min Latency": 6
-    },
-    {
-      "Avg Latency": 9.9784257759263273,
-      "Cycle Count": 8,
-      "Max Latency": 222,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 10.013321480565248,
-      "Cycle Count": 16,
-      "Max Latency": 223,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 9.7667489062975452,
-      "Cycle Count": 32,
-      "Max Latency": 221,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 9.9418871015216084,
-      "Cycle Count": 64,
-      "Max Latency": 229,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 8.9866469984608468,
-      "Cycle Count": 128,
-      "Max Latency": 225,
-      "Min Latency": 8
-    },
-    {
-      "Avg Latency": 12.458512632800598,
-      "Cycle Count": 256,
-      "Max Latency": 223,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 20.783296676441772,
-      "Cycle Count": 512,
-      "Max Latency": 723,
-      "Min Latency": 16
-    },
-    {
-      "Avg Latency": 25.767146312466764,
-      "Cycle Count": 1024,
-      "Max Latency": 233,
-      "Min Latency": 18
-    },
-    {
-      "Avg Latency": 25.507020757020765,
-      "Cycle Count": 2048,
-      "Max Latency": 223,
-      "Min Latency": 9
-    },
-    {
-      "Avg Latency": 26.272460448135185,
-      "Cycle Count": 4096,
-      "Max Latency": 190,
-      "Min Latency": 22
-    },
-    {
-      "Avg Latency": 25.675439578900203,
-      "Cycle Count": 8192,
-      "Max Latency": 223,
-      "Min Latency": 22
-    },
-    {
-      "Avg Latency": 25.896136672490773,
-      "Cycle Count": 16384,
-      "Max Latency": 258,
-      "Min Latency": 19
-    },
-    {
-      "Avg Latency": 26.247670250896078,
-      "Cycle Count": 32768,
-      "Max Latency": 53,
-      "Min Latency": 19
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-    {
-      "Avg Latency": 27.028865979381465,
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-    {
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-    {
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-    {
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-    {
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-    {
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-    {
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-    {
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-    {
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-    {
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-    {
-      "Avg Latency": 80.785714285714292,
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-    {
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-      "Max Latency": 118,
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-    },
-    {
-      "Avg Latency": 176.5,
-      "Cycle Count": 2147483648,
-      "Max Latency": 182,
-      "Min Latency": 170
-    }
-  ],
-  "Job Throughput": [
-    {
-      "Jobs per second": 119108.932,
-      "Number of threads": 1
-    },
-    {
-      "Jobs per second": 235687.03111111108,
-      "Number of threads": 2
-    },
-    {
-      "Jobs per second": 232242.31323102824,
-      "Number of threads": 3
-    },
-    {
-      "Jobs per second": 223602.84656385283,
-      "Number of threads": 4
-    },
-    {
-      "Jobs per second": 208161.28204699006,
-      "Number of threads": 5
-    },
-    {
-      "Jobs per second": 202283.74761904762,
-      "Number of threads": 6
-    },
-    {
-      "Jobs per second": 196126.20992749318,
-      "Number of threads": 7
-    },
-    {
-      "Jobs per second": 194698.04297344972,
-      "Number of threads": 8
-    }
-  ],
-  "Library Versions": {
-    "Platform API": "1.2.2",
-    "Tapasco API": "1.2.1"
-  },
-  "Timestamp": "2017-05-30 17:44:27",
-  "Transfer Speed": [
-    {
-      "Chunk Size": 1024,
-      "Read": 23.363108106596496,
-      "ReadWrite": 43.968669085823834,
-      "Write": 25.512788225278989
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-}
\ No newline at end of file
+{"Host": {"Machine": "armv7l", "Node": "zedboard", "Operating System": "Linux", "Release": "4.19.0-tapasco", "Version": "#1 SMP PREEMPT Fri May 8 12:10:33 CEST 2020"}, "Interrupt Latency": [{"Avg Latency": 60.361745010077364, "Cycle Count": 1, "Max Latency": 411, "Min Latency": 37}, {"Avg Latency": 63.66573302363711, "Cycle Count": 2, "Max Latency": 492, "Min Latency": 38}, {"Avg Latency": 63.531041069723017, "Cycle Count": 4, "Max Latency": 309, "Min Latency": 38}, {"Avg Latency": 63.118297064605777, "Cycle Count": 8, "Max Latency": 245, "Min Latency": 38}, {"Avg Latency": 66.951196789451203, "Cycle Count": 16, "Max Latency": 195, "Min Latency": 38}, {"Avg Latency": 59.832828119961334, "Cycle Count": 32, "Max Latency": 464, "Min Latency": 42}, {"Avg Latency": 60.914574182128092, "Cycle Count": 64, "Max Latency": 269, "Min Latency": 42}, {"Avg Latency": 64.829889272868215, "Cycle Count": 128, "Max Latency": 198, "Min Latency": 41}, {"Avg Latency": 63.982668364459506, "Cycle Count": 256, "Max Latency": 184, "Min Latency": 52}, {"Avg Latency": 56.593729285430229, "Cycle Count": 512, "Max Latency": 199, "Min Latency": 53}, {"Avg Latency": 61.898351858949788, "Cycle Count": 1024, "Max Latency": 252, "Min Latency": 53}, {"Avg Latency": 56.767060741948598, "Cycle Count": 2048, "Max Latency": 186, "Min Latency": 54}, {"Avg Latency": 57.536730100265942, "Cycle Count": 4096, "Max Latency": 273, "Min Latency": 54}, {"Avg Latency": 57.991225546605293, "Cycle Count": 8192, "Max Latency": 208, "Min Latency": 55}, {"Avg Latency": 58.122006326253974, "Cycle Count": 16384, "Max Latency": 1118, "Min Latency": 54}, {"Avg Latency": 58.573770491803302, "Cycle Count": 32768, "Max Latency": 98, "Min Latency": 55}, {"Avg Latency": 60.14902807775379, "Cycle Count": 65536, "Max Latency": 239, "Min Latency": 55}, {"Avg Latency": 62.02200825309491, "Cycle Count": 131072, "Max Latency": 110, "Min Latency": 59}, {"Avg Latency": 64.741935483870961, "Cycle Count": 262144, "Max Latency": 145, "Min Latency": 59}, {"Avg Latency": 73.97606382978725, "Cycle Count": 524288, "Max Latency": 205, "Min Latency": 61}, {"Avg Latency": 77.860915492957773, "Cycle Count": 1048576, "Max Latency": 103, "Min Latency": 65}, {"Avg Latency": 81.231578947368433, "Cycle Count": 2097152, "Max Latency": 238, "Min Latency": 68}, {"Avg Latency": 82.56279069767443, "Cycle Count": 4194304, "Max Latency": 120, "Min Latency": 75}, {"Avg Latency": 84.580645161290306, "Cycle Count": 8388608, "Max Latency": 126, "Min Latency": 71}, {"Avg Latency": 89.333333333333329, "Cycle Count": 16777216, "Max Latency": 119, "Min Latency": 81}, {"Avg Latency": 95.860248447204938, "Cycle Count": 33554432, "Max Latency": 151, "Min Latency": 77}, {"Avg Latency": 104.29333333333331, "Cycle Count": 67108864, "Max Latency": 161, "Min Latency": 91}, {"Avg Latency": 111.3, "Cycle Count": 134217728, "Max Latency": 143, "Min Latency": 99}], "Job Throughput": [{"Jobs per second": 22952.381720430112, "Number of threads": 1}, {"Jobs per second": 35464.023728813561, "Number of threads": 2}, {"Jobs per second": 59000.230031948879, "Number of threads": 3}, {"Jobs per second": 53753.478758169971, "Number of threads": 4}], "Library Versions": {"Platform API": "1.6", "Tapasco API": "1.6"}, "Timestamp": "2020-05-08 15:07:57", "Transfer Speed": [{"Chunk Size": 1024, "Read": 161.30049876340919, "ReadWrite": 470.72031395771631, "Write": 343.49291687025101}, {"Chunk Size": 2048, "Read": 197.67796921990043, "ReadWrite": 738.1626558225289, "Write": 566.61853177581827}, {"Chunk Size": 4096, "Read": 222.22265682190991, "ReadWrite": 1013.1249248684735, "Write": 843.83022155494803}, {"Chunk Size": 8192, "Read": 236.8943873770352, "ReadWrite": 1248.535845609036, "Write": 1095.1941931956201}, {"Chunk Size": 16384, "Read": 244.74009692304341, "ReadWrite": 1479.5473820732386, "Write": 1301.3947175930125}, {"Chunk Size": 32768, "Read": 247.65204596494996, "ReadWrite": 1540.3755219252082, "Write": 1388.1117748269182}, {"Chunk Size": 65536, "Read": 248.74246323017084, "ReadWrite": 1516.7371504605492, "Write": 1373.4430039959759}, {"Chunk Size": 131072, "Read": 248.51876496262554, "ReadWrite": 1480.3617008304909, "Write": 1392.2021819602294}, {"Chunk Size": 262144, "Read": 245.09471995733853, "ReadWrite": 1089.0948375166508, "Write": 1378.2339775470639}, {"Chunk Size": 524288, "Read": 234.99514350953837, "ReadWrite": 680.4841594167126, "Write": 889.37706577610686}, {"Chunk Size": 1048576, "Read": 223.73058043406712, "ReadWrite": 597.23758578382808, "Write": 669.18744908916153}, {"Chunk Size": 2097152, "Read": 221.25204422032061, "ReadWrite": 542.42529614679449, "Write": 609.15383401525037}, {"Chunk Size": 4194304, "Read": 221.69918285032912, "ReadWrite": 573.62593176216012, "Write": 657.82436303604959}, {"Chunk Size": 8388608, "Read": 218.2892190836892, "ReadWrite": 575.13848827133324, "Write": 656.2634433333825}, {"Chunk Size": 16777216, "Read": 211.95036215177987, "ReadWrite": 592.31557107090191, "Write": 616.44307451169959}, {"Chunk Size": 33554432, "Read": 201.23765026073477, "ReadWrite": 568.31918647531381, "Write": 616.94706555415769}, {"Chunk Size": 67108864, "Read": 137.23075832427446, "ReadWrite": 518.65730409814807, "Write": 602.45554160218478}, {"Chunk Size": 134217728, "Read": 172.95657646417061, "ReadWrite": 0, "Write": 569.47548974647543}]}
\ No newline at end of file
diff --git a/toolflow/vivado/platform/zedboard/zedboard.tcl b/toolflow/vivado/platform/zedboard/zedboard.tcl
index 74be3691..8f59b93f 100644
--- a/toolflow/vivado/platform/zedboard/zedboard.tcl
+++ b/toolflow/vivado/platform/zedboard/zedboard.tcl
@@ -1,21 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 source -notrace $::env(TAPASCO_HOME_TCL)/platform/zynq/zynq.tcl
 
 namespace eval ::platform {
diff --git a/toolflow/vivado/platform/zynq/plugins/zynq_bin_file.tcl b/toolflow/vivado/platform/zynq/plugins/zynq_bin_file.tcl
new file mode 100644
index 00000000..46982fc0
--- /dev/null
+++ b/toolflow/vivado/platform/zynq/plugins/zynq_bin_file.tcl
@@ -0,0 +1,33 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
+namespace eval zynq {
+
+	proc bin_bitstream {} {
+		global bitstreamname
+		set bif [open "zynq_bin.bif" w]
+		puts $bif "all: { ${bitstreamname}.bit }"
+		close $bif
+		exec bootgen -image zynq_bin.bif -arch zynq -process_bitstream bin -w
+		puts "Bitstream converted to byte swapped bin file."
+		return {}
+	}
+}
+
+tapasco::register_plugin "platform::zynq::bin_bitstream" "post-bitstream"
diff --git a/toolflow/vivado/platform/zynq/zynq.tcl b/toolflow/vivado/platform/zynq/zynq.tcl
index ee91116a..3698888e 100644
--- a/toolflow/vivado/platform/zynq/zynq.tcl
+++ b/toolflow/vivado/platform/zynq/zynq.tcl
@@ -1,28 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2014-2018 Jens Korinth, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TaPaSCo).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		zynq.tcl
-# @brief	Zynq-7000 platform implementation: For simulation, there is an extra AXI
-#               master connected to HP3 (to simulate loading of data). Up to 16 instances
-#               of AXI Interrupt Controllers are instantiated, depending on the number
-#               interrupt sources returned by the architecture.
-# @author	J. Korinth, TU Darmstadt (jk@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
 namespace eval ::platform {
   namespace export max_masters
   namespace export get_address_map
@@ -277,8 +271,7 @@ namespace eval ::platform {
     }
 
     set reset_in [create_bd_pin -dir O -type rst "reset_in"]
-    set irq_0 [create_bd_pin -dir I -type intr -from 7 -to 0 "irq_0"]
-    set pirq_0 [create_bd_pin -dir I -type intr -from 7 -to 0 "platform_irq_0"]
+    set irq_0 [create_bd_pin -dir I -type intr -from 15 -to 0 "irq_0"]
     set mem_aclk [tapasco::subsystem::get_port "mem" "clk"]
     set mem_p_arstn [tapasco::subsystem::get_port "mem" "rst" "peripheral" "resetn"]
     set mem_ic_arstn [tapasco::subsystem::get_port "mem" "rst" "interconnect"]
@@ -331,12 +324,7 @@ namespace eval ::platform {
     foreach ms $mem_slaves pms $ps_mem_slaves { connect_bd_intf_net $ms $pms }
 
     # connect interrupts
-    set irq_cc [tapasco::ip::create_xlconcat "irq_cc" 2]
-    connect_bd_net $pirq_0 [get_bd_pins "$irq_cc/In0"]
-    connect_bd_net $irq_0 [get_bd_pins "$irq_cc/In1"]
-    set_property -dict [list CONFIG.IN0_WIDTH.VALUE_SRC USER CONFIG.IN1_WIDTH.VALUE_SRC USER] $irq_cc
-    set_property -dict [list CONFIG.IN0_WIDTH {8} CONFIG.IN1_WIDTH {8}] $irq_cc
-    connect_bd_net [get_bd_pins -of_objects $irq_cc -filter { DIR == O }] [get_bd_pins "$ps/IRQ_F2P"]
+    connect_bd_net $irq_0 [get_bd_pins "$ps/IRQ_F2P"]
 
     # connect reset
     connect_bd_net [get_bd_pins "$ps/FCLK_RESET0_N"] $reset_in
diff --git a/toolflow/vivado/platform/zynqmp/platform.cmake b/toolflow/vivado/platform/zynqmp/platform.cmake
deleted file mode 100644
index f43d56fa..00000000
--- a/toolflow/vivado/platform/zynqmp/platform.cmake
+++ /dev/null
@@ -1,6 +0,0 @@
-add_definitions(-DPLATFORM_API_TAPASCO_STATUS_BASE=0x00A0000000)
-
-LIST(APPEND SRCS "${PLATFORM}/src/platform_zynqmp.c")
-
-SET(EXTRA_INCLUDES_PUBLIC "")
-SET(EXTRA_INCLUDES_PRIVATE "${PLATFORM}/")
\ No newline at end of file
diff --git a/toolflow/vivado/platform/zynqmp/src/platform_address_map.c b/toolflow/vivado/platform/zynqmp/src/platform_address_map.c
deleted file mode 100644
index bee32c4a..00000000
--- a/toolflow/vivado/platform/zynqmp/src/platform_address_map.c
+++ /dev/null
@@ -1,46 +0,0 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-/**
- *  @file	platform_address_map.c
- *  @brief	Implementation for platform API address calls.
- *  @author	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
- **/
-#include <platform.h>
-
-platform_ctl_addr_t platform_address_get_slot_base(
-    platform_slot_id_t const slot_id,
-    platform_slot_region_id_t const region_id)
-{
-	// TODO region_id is ignored, should be fixed for multi-slave Functions
-	return 0xA1000000 + slot_id * 0x00010000;
-}
-
-platform_ctl_addr_t platform_address_get_special_base(
-    platform_special_ctl_t const ent)
-{
-	switch (ent) {
-	case PLATFORM_SPECIAL_CTL_STATUS: return 0xA0000000;
-	case PLATFORM_SPECIAL_CTL_INTC0 : return 0xB0000000;
-	case PLATFORM_SPECIAL_CTL_INTC1 : return 0xB0010000;
-	case PLATFORM_SPECIAL_CTL_INTC2 : return 0xB0020000;
-	case PLATFORM_SPECIAL_CTL_INTC3 : return 0xB0030000;
-	case PLATFORM_SPECIAL_CTL_ATSPRI: return 0xFFFFFFFF;
-	}
-	return 0;
-}
diff --git a/toolflow/vivado/platform/zynqmp/src/platform_zynqmp.c b/toolflow/vivado/platform/zynqmp/src/platform_zynqmp.c
deleted file mode 100644
index 70d2e0e6..00000000
--- a/toolflow/vivado/platform/zynqmp/src/platform_zynqmp.c
+++ /dev/null
@@ -1,487 +0,0 @@
-//
-// Copyright (C) 2014 Jens Korinth, TU Darmstadt
-//
-// This file is part of Tapasco (TPC).
-//
-// Tapasco is free software: you can redistribute it and/or modify
-// it under the terms of the GNU Lesser General Public License as published by
-// the Free Software Foundation, either version 3 of the License, or
-// (at your option) any later version.
-//
-// Tapasco is distributed in the hope that it will be useful,
-// but WITHOUT ANY WARRANTY; without even the implied warranty of
-// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-// GNU Lesser General Public License for more details.
-//
-// You should have received a copy of the GNU Lesser General Public License
-// along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-//
-//! @file	platform_zynqmp.c
-//! @brief	Platform API implementation for zynqmp platform based on the
-//!		loadable kernel module. Communicates with the zynqmp fabric via
-//!		device driver.
-//! @authors	J. Korinth, TU Darmstadt (jk@esa.cs.tu-darmstadt.de)
-//! @version	1.2
-//! @copyright  Copyright 2014, 2015 J. Korinth
-//!
-//!		This file is part of Tapasco (TPC).
-//!
-//!  		Tapasco is free software: you can redistribute it
-//!		and/or modify it under the terms of the GNU Lesser General
-//!		Public License as published by the Free Software Foundation,
-//!		either version 3 of the License, or (at your option) any later
-//!		version.
-//!
-//!  		Tapasco is distributed in the hope that it will be
-//!		useful, but WITHOUT ANY WARRANTY; without even the implied
-//!		warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-//!		See the GNU Lesser General Public License for more details.
-//!
-//!  		You should have received a copy of the GNU Lesser General Public
-//!		License along with Tapasco.  If not, see
-//!		<http://www.gnu.org/licenses/>.
-//!
-#include <sys/mman.h>
-#include <sys/resource.h>
-#include <sys/ioctl.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdarg.h>
-#include <string.h>
-#include <unistd.h>
-#include <errno.h>
-#include <assert.h>
-#include <module/zynqmp_platform.h>
-#include <module/zynqmp_ioctl_cmds.h>
-#include <platform.h>
-#include <platform_errors.h>
-#include "platform_logging.h"
-
-/******************************************************************************/
-
-#define ZYNQMP_ADDR_STATUS (0xA0000000)
-#define ZYNQMP_SIZE_STATUS (0x01000000)
-#define ZYNQMP_ADDR_SLOTS  (0xA1000000)
-#define ZYNQMP_SIZE_SLOTS  (0x00800000)
-#define ZYNQMP_ADDR_INTC   (0xB0000000)
-#define ZYNQMP_SIZE_INTC   (0x00040000)
-
-#define ZYNQMP_ADDR_IN_RANGE(type, addr) (ZYNQMP_ADDR_ ## type <= (addr) && (addr) < (ZYNQMP_ADDR_ ## type + ZYNQMP_SIZE_ ## type))
-
-static struct zynqmp_platform_t {
-	int		fd_wait;
-	int 		fd_gp0_map;
-	int 		fd_gp1_map;
-	int 		fd_status_map;
-	volatile void	*gp0_map;
-	volatile void	*gp1_map;
-	volatile void	*status_map;
-	int		fd_control;
-} zynqmp_platform = {
-	.fd_wait       = -1,
-	.fd_gp0_map    = -1,
-	.fd_gp1_map    = -1,
-	.fd_status_map = -1,
-	.gp0_map       = NULL,
-	.gp1_map       = NULL,
-	.status_map    = NULL,
-	.fd_control    = -1,
-};
-
-static platform_res_t fpga_available()
-{
-	platform_res_t result = PLATFORM_SUCCESS;
-	int i = 0;
-	const char* operating_str = "operating";
-	char operating_str_cmp[9];
-	FILE *fd = fopen("/sys/class/fpga_manager/fpga0/state", "r");
-	if(fd <= 0) {
-		ERR("Could not open FPGA state file");
-		result = PERR_OPEN_DEV;
-	} else {
-		int c = getc(fd);
-		for(i = 0; i < strlen(operating_str) && c != EOF; ++i) {
-			operating_str_cmp[i] = (char)c;
-			c = getc(fd);
-		}
-		fclose(fd);
-		if(c == EOF && i != strlen(operating_str)) {
-			ERR("FPGA is not ready");
-			result = PERR_OPEN_DEV;
-		} else {
-			if(strncmp(operating_str, operating_str_cmp, 9)) {
-				ERR("FPGA is not ready");
-				result = PERR_OPEN_DEV;
-			}
-		}
-	}
-
-	return result;
-}
-
-static platform_res_t init_platform(struct zynqmp_platform_t *p)
-{
-	platform_res_t result = PLATFORM_SUCCESS;
-
-	if(fpga_available() != PLATFORM_SUCCESS)
-		return PERR_OPEN_DEV;
-	else
-		LOG(LPLL_INIT, "FPGA is initialized");
-
-	p->fd_wait     = open(ZYNQ_PLATFORM_WAITFILENAME, O_WRONLY);
-	if (p->fd_wait == -1) {
-		ERR("could not open device file: %s", ZYNQ_PLATFORM_WAITFILENAME);
-		result = PERR_OPEN_DEV;
-	}
-	p->fd_gp0_map = open("/dev/" ZYNQ_PLATFORM_DEVFILENAME "_gp0", O_RDWR);
-	if (p->fd_gp0_map != -1) {
-		p->gp0_map = mmap(
-		                 NULL,
-		                 ZYNQMP_SIZE_SLOTS,
-		                 PROT_READ | PROT_WRITE | PROT_EXEC,
-		                 MAP_SHARED,
-		                 p->fd_gp0_map,
-		                 0);
-		if (p->gp0_map == MAP_FAILED) {
-			ERR("could not mmap regmap: %s", strerror(errno));
-			result = PERR_MMAP_DEV;
-		}
-	} else {
-		ERR("could not open '%s': %s",
-		    "/dev/" ZYNQ_PLATFORM_DEVFILENAME "_gp0",
-		    strerror(errno));
-		result = PERR_OPEN_DEV;
-	}
-
-	p->fd_gp1_map = open("/dev/" ZYNQ_PLATFORM_DEVFILENAME "_gp1", O_RDWR);
-	if (p->fd_gp1_map != -1) {
-		p->gp1_map = mmap(
-		                 NULL,
-		                 ZYNQMP_SIZE_INTC,
-		                 PROT_READ | PROT_WRITE | PROT_EXEC,
-		                 MAP_SHARED,
-		                 p->fd_gp1_map,
-		                 0);
-		if (p->gp1_map == MAP_FAILED) {
-			ERR("could not mmap regmap: %s", strerror(errno));
-			result = PERR_MMAP_DEV;
-		}
-	} else {
-		ERR("could not open '%s': %s",
-		    "/dev/" ZYNQ_PLATFORM_DEVFILENAME "_gp1",
-		    strerror(errno));
-		result = PERR_OPEN_DEV;
-	}
-
-	p->fd_status_map = open("/dev/" ZYNQ_PLATFORM_DEVFILENAME "_tapasco_status", O_RDWR);
-	if (p->fd_status_map != -1) {
-		p->status_map = mmap(
-		                    NULL,
-		                    ZYNQMP_SIZE_STATUS,
-		                    PROT_READ | PROT_WRITE | PROT_EXEC,
-		                    MAP_SHARED,
-		                    p->fd_status_map,
-		                    0);
-		if (p->status_map == MAP_FAILED) {
-			ERR("could not mmap regmap: %s", strerror(errno));
-			result = PERR_MMAP_DEV;
-		}
-	} else {
-		ERR("could not open '%s': %s",
-		    "/dev/" ZYNQ_PLATFORM_DEVFILENAME "_tapasco_status",
-		    strerror(errno));
-		result = PERR_OPEN_DEV;
-	}
-
-	p->fd_control = open("/dev/" ZYNQ_PLATFORM_DEVFILENAME "_control", O_RDONLY);
-	if (! p->fd_control) {
-		ERR("could not open '%s': %s",
-		    "/dev/" ZYNQ_PLATFORM_DEVFILENAME "_control",
-		    strerror(errno));
-		result = PERR_OPEN_DEV;
-	}
-	LOG(LPLL_INIT, "platform initialization done");
-	return result;
-}
-
-static platform_res_t release_platform(struct zynqmp_platform_t *p)
-{
-	if (p->fd_control != -1) {
-		close(p->fd_control);
-		p->fd_control = -1;
-	}
-	if (p->fd_status_map != -1) {
-		if (p->status_map != NULL && p->status_map != MAP_FAILED) {
-			munmap((void *)p->status_map, ZYNQMP_SIZE_STATUS);
-			p->status_map = NULL;
-		}
-		close(p->fd_status_map);
-		p->fd_status_map = -1;
-		p->status_map    = NULL;
-	}
-	if (p->fd_gp1_map != -1) {
-		if (p->gp1_map != NULL && p->gp1_map != MAP_FAILED) {
-			munmap((void *)p->gp1_map, ZYNQMP_SIZE_INTC);
-			p->gp1_map = NULL;
-		}
-		close(p->fd_gp1_map);
-		p->fd_gp1_map = -1;
-		p->gp1_map    = NULL;
-	}
-	if (p->fd_gp0_map != -1) {
-		if (p->gp0_map != NULL && p->gp0_map != MAP_FAILED) {
-			munmap((void *)p->gp0_map, ZYNQMP_SIZE_SLOTS);
-			p->gp0_map = NULL;
-		}
-		close(p->fd_gp0_map);
-		p->fd_gp0_map = -1;
-		p->gp0_map    = NULL;
-	}
-	if (p->fd_wait != -1) {
-		close(p->fd_wait);
-		p->fd_wait = -1;
-	}
-	LOG(LPLL_INIT, "so long & thanks for all the fish, bye");
-	platform_logging_exit();
-	return PLATFORM_SUCCESS;
-}
-
-/******************************************************************************/
-
-/** Enables the interrupt controllers. */
-static platform_res_t enable_interrupts(void)
-{
-	int32_t const on = -1, off = 0;
-	int32_t outstanding = 0;
-	uint32_t intcs = 1;
-	platform_read_ctl(platform_address_get_special_base(
-			PLATFORM_SPECIAL_CTL_STATUS) + 0x4,
-			4, &intcs, PLATFORM_CTL_FLAGS_NONE);
-	assert (intcs > 0 && intcs <= ZYNQ_PLATFORM_INTC_NUM);
-	LOG(LPLL_IRQ, "enabling interrupts at %d controllers", intcs);
-	for (int i = 0; i < intcs; ++i) {
-		platform_ctl_addr_t intc = ZYNQ_PLATFORM_INTC_BASE + ZYNQ_PLATFORM_INTC_OFFS * i;
-		// disable all interrupts
-		platform_write_ctl(intc + 0x8, sizeof(off), &off, PLATFORM_CTL_FLAGS_NONE);
-		platform_write_ctl(intc + 0x1c, sizeof(off), &off, PLATFORM_CTL_FLAGS_NONE);
-		// check & ack all outstanding IRQs
-		platform_read_ctl(intc, sizeof(outstanding), &outstanding, PLATFORM_CTL_FLAGS_NONE);
-		platform_write_ctl(intc, sizeof(outstanding), &outstanding, PLATFORM_CTL_FLAGS_NONE);
-		// enable all interrupts
-		platform_write_ctl(intc + 0x8, sizeof(on), &on, PLATFORM_CTL_FLAGS_NONE);
-		platform_write_ctl(intc + 0x1c, sizeof(on), &on, PLATFORM_CTL_FLAGS_NONE);
-		platform_read_ctl(intc, sizeof(outstanding), &outstanding, PLATFORM_CTL_FLAGS_NONE);
-	}
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t _platform_init(const char *const version)
-{
-	platform_logging_init();
-	LOG(LPLL_INIT, "Platform API Version: %s", platform_version());
-	if (platform_check_version(version) != PLATFORM_SUCCESS) {
-		ERR("Platform API version mismatch: found %s, expected %s",
-		    platform_version(), version);
-		return PERR_VERSION_MISMATCH;
-	}
-
-	platform_res_t const r = init_platform(&zynqmp_platform);
-	if (r != PLATFORM_SUCCESS) {
-		ERR("failed with error: %s\n", platform_strerror(r));
-		platform_logging_exit();
-	} else
-		ERR("SUCCESS!");
-	enable_interrupts();
-	return r;
-}
-
-void platform_deinit(void)
-{
-	LOG(LPLL_INIT, "shutting down platform");
-	release_platform(&zynqmp_platform);
-}
-
-/******************************************************************************/
-platform_res_t platform_alloc(size_t const len, platform_mem_addr_t *addr,
-                              platform_alloc_flags_t const flags)
-{
-	assert(addr);
-	struct zynqmp_ioctl_cmd_t cmd = { 0 };
-	cmd.id = -1;
-	cmd.length = len;
-	if (ioctl(zynqmp_platform.fd_control, ZYNQ_IOCTL_ALLOC, &cmd)) {
-		ERR("could not allocate: %s", strerror(errno));
-		return PERR_MEM_ALLOC;
-	}
-	*addr = cmd.dma_addr;
-	LOG(LPLL_MM, "len = %zu bytes, dma = 0x%08lx", len,
-	    (long unsigned) *addr);
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_dealloc(platform_mem_addr_t const addr,
-                                platform_alloc_flags_t const flags)
-{
-	LOG(LPLL_MM, "dma_addr = 0x%08lx", (unsigned long) addr);
-	struct zynqmp_ioctl_cmd_t cmd = { 0 };
-	cmd.id = -1;
-	cmd.dma_addr = addr;
-	if (ioctl(zynqmp_platform.fd_control, ZYNQ_IOCTL_FREE, &cmd)) {
-		ERR("could not free: %s", strerror(errno));
-		return PERR_MEM_ALLOC;
-	}
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_read_mem(platform_mem_addr_t const start_addr,
-                                 size_t const no_of_bytes, void *data,
-                                 platform_mem_flags_t const flags)
-{
-	LOG(LPLL_MEM, "start_addr = 0x%08lx, no_of_bytes = %zu, data = 0x%08lx",
-	    (unsigned long) start_addr, no_of_bytes,
-	    (unsigned long) data);
-	struct zynqmp_ioctl_cmd_t cmd = { 0 };
-	cmd.id = -1;
-	cmd.length = no_of_bytes;
-	cmd.dma_addr = start_addr;
-	cmd.data = data;
-	if (ioctl(zynqmp_platform.fd_control, ZYNQ_IOCTL_COPYFROM, &cmd)) {
-		ERR("could not read: %s", strerror(errno));
-		return PERR_MEM_NO_SUCH_HANDLE; // FIXME
-	}
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_write_mem(platform_mem_addr_t const start_addr,
-                                  size_t const no_of_bytes, void const*data,
-                                  platform_mem_flags_t const flags)
-{
-	LOG(LPLL_MEM, "start_addr = 0x%08lx, no_of_bytes = %zu, data = 0x%08lx",
-	    (unsigned long) start_addr, no_of_bytes, (unsigned long)data);
-	struct zynqmp_ioctl_cmd_t cmd = { 0 };
-	cmd.id = -1;
-	cmd.length = no_of_bytes;
-	cmd.dma_addr = start_addr;
-	cmd.data = (void *)data;
-	if (ioctl(zynqmp_platform.fd_control, ZYNQ_IOCTL_COPYTO, &cmd)) {
-		ERR("could not write: %s", strerror(errno));
-		return PERR_MEM_NO_SUCH_HANDLE; // FIXME
-	}
-	return PLATFORM_SUCCESS;
-}
-
-static inline
-platform_res_t platform_check_ctl_addr(platform_ctl_addr_t const addr)
-{
-	if (!(ZYNQMP_ADDR_IN_RANGE(STATUS, addr)
-	        || ZYNQMP_ADDR_IN_RANGE(SLOTS, addr)
-	        || ZYNQMP_ADDR_IN_RANGE(INTC, addr))) {
-		ERR("invalid start_addr: start_addr = 0x%08lx", (unsigned long)addr);
-		return PERR_CTL_INVALID_ADDRESS;
-	}
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_read_ctl(
-    platform_ctl_addr_t const start_addr,
-    size_t const no_of_bytes,
-    void *data,
-    platform_ctl_flags_t const flags)
-{
-	int i;
-	uint32_t *p = (uint32_t *)data;
-	volatile uint32_t *r;
-	platform_res_t res;
-	LOG(LPLL_CTL, "start_addr = 0x%08lx, no_of_bytes = %zu, data = 0x%08lx",
-	    (unsigned long)start_addr, no_of_bytes, (unsigned long)data);
-
-	res = platform_check_ctl_addr(start_addr);
-	if (res != PLATFORM_SUCCESS)
-		return res;
-
-	if (no_of_bytes % 4) {
-		ERR("error: invalid size!");
-		return PERR_CTL_INVALID_SIZE;
-	}
-	if (start_addr >= 0xB0000000)
-		r = (volatile uint32_t *)zynqmp_platform.gp1_map +
-		    ((start_addr - 0xB0000000) >> 2);
-	else if (start_addr >= 0xA1000000)
-		r = (volatile uint32_t *)zynqmp_platform.gp0_map +
-		    ((start_addr - 0xA1000000) >> 2);
-	else
-		r = (volatile uint32_t *)zynqmp_platform.status_map +
-		    ((start_addr - 0xA0000000) >> 2);
-	for (i = 0; i < (no_of_bytes >> 2); ++i, ++p, ++r)
-		*p = *r;
-
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_write_ctl(
-    platform_ctl_addr_t const start_addr,
-    size_t const no_of_bytes,
-    void const*data,
-    platform_ctl_flags_t const flags)
-{
-	int i;
-	uint32_t const *p = (uint32_t const *)data;
-	volatile uint32_t *r;
-	platform_res_t res;
-	LOG(LPLL_CTL, "start_addr = 0x%08lx, no_of_bytes = %zu, data = 0x%08lx",
-	    (unsigned long)start_addr, no_of_bytes, (unsigned long)data);
-
-	res = platform_check_ctl_addr(start_addr);
-	if (res != PLATFORM_SUCCESS)
-		return res;
-
-	if (no_of_bytes % 4) {
-		ERR("invalid size: %zd", no_of_bytes);
-		return PERR_CTL_INVALID_SIZE;
-	}
-	if (start_addr >= 0xB0000000)
-		r = (volatile uint32_t *)zynqmp_platform.gp1_map +
-		    ((start_addr - 0xB0000000) >> 2);
-	else if (start_addr >= 0xA1000000)
-		r = (volatile uint32_t *)zynqmp_platform.gp0_map +
-		    ((start_addr - 0xA1000000) >> 2);
-	else
-		r = (volatile uint32_t *)zynqmp_platform.status_map +
-		    ((start_addr - 0xA0000000) >> 2);
-	for (i = 0; i < (no_of_bytes >> 2); ++i, ++p, ++r)
-		*r = *p;
-
-	return PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_write_ctl_and_wait(
-    platform_ctl_addr_t const w_addr,
-    size_t const w_no_of_bytes,
-    void const *w_data,
-    uint32_t const event,
-    platform_ctl_flags_t const flags)
-{
-	platform_res_t res = platform_write_ctl(w_addr, w_no_of_bytes, w_data,
-	                                        PLATFORM_CTL_FLAGS_NONE);
-	if (res != PLATFORM_SUCCESS) return res;
-	return platform_wait_for_irq(event);
-}
-
-platform_res_t platform_wait_for_irq(const uint32_t inst)
-{
-	int retval = write(zynqmp_platform.fd_wait, &inst, sizeof(inst));
-	if (retval < 0)
-		WRN("waiting for %u failed: %d", inst, retval);
-	return retval < 0 ? PERR_IRQ_WAIT : PLATFORM_SUCCESS;
-}
-
-platform_res_t platform_register_irq_callback(platform_irq_callback_t cb)
-{
-	return PERR_NOT_IMPLEMENTED;
-}
-
-platform_res_t platform_stop(const int result)
-{
-	return PERR_NOT_IMPLEMENTED;
-}
diff --git a/toolflow/vivado/platform/zynqmp/zynqmp.tcl b/toolflow/vivado/platform/zynqmp/zynqmp.tcl
index 88ef6833..53f57908 100644
--- a/toolflow/vivado/platform/zynqmp/zynqmp.tcl
+++ b/toolflow/vivado/platform/zynqmp/zynqmp.tcl
@@ -1,26 +1,22 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
 #
-# Copyright (C) 2017 Jaco A. Hofmann, TU Darmstadt
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
 #
-# This file is part of Tapasco (TPC).
-#
-# Tapasco is free software: you can redistribute it and/or modify
+# This program is free software: you can redistribute it and/or modify
 # it under the terms of the GNU Lesser General Public License as published by
 # the Free Software Foundation, either version 3 of the License, or
 # (at your option) any later version.
 #
-# Tapasco is distributed in the hope that it will be useful,
+# This program is distributed in the hope that it will be useful,
 # but WITHOUT ANY WARRANTY; without even the implied warranty of
 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 # GNU Lesser General Public License for more details.
 #
 # You should have received a copy of the GNU Lesser General Public License
-# along with Tapasco.  If not, see <http://www.gnu.org/licenses/>.
-#
-# @file		zynqmp.tcl
-# @brief	MPSoC platform implementation: Up to 16 instances of AXI Interrupt Controllers
-#         are instantiated, depending on the number interrupt sources returned by the architecture.
-# @author	Jaco A. Hofmann, TU Darmstadt (hofmann@esa.tu-darmstadt.de)
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
 #
+
   if { [::tapasco::vivado_is_newer "2018.1"] == 0 } {
     puts "Vivado [version -short] is too old to support MPSoC."
     exit 1
@@ -98,10 +94,12 @@
     set_property -dict [list CONFIG.USE_LOCKED {false} CONFIG.USE_RESET {false}] $clk_wiz
     set clk_mode [lindex [get_board_part_interfaces -filter { NAME =~ *sys*cl*k }] 0]
 
-    if {$clk_mode == ""} {
-      error "could not find a board interface for the sys clock - check board part?"
+    if {$clk_mode != ""} {
+      set_property CONFIG.CLK_IN1_BOARD_INTERFACE $clk_mode $clk_wiz
+    } else {
+      puts "Could not find a board interface for the sys clock. Trying to use processing system clock."
+      set ps_clk_in [create_bd_pin -dir I -type clk "ps_clk_in"]
     }
-    set_property CONFIG.CLK_IN1_BOARD_INTERFACE $clk_mode $clk_wiz
 
     # check if external port already exists, re-use
     if {[get_bd_ports -quiet "/$clk_mode"] != {}} {
@@ -111,16 +109,21 @@
       set_property -dict [list CONFIG.PRIMITIVE {PLL} CONFIG.USE_MIN_POWER {true}] $clk_wiz
     } {
       # apply board automation to create top-level port
-      if {[get_property VLNV $clk_mode] == "xilinx.com:interface:diff_clock_rtl:1.0"} {
+      if {($clk_mode != "") && ([get_property VLNV $clk_mode] == "xilinx.com:interface:diff_clock_rtl:1.0")} {
         set cport [get_bd_intf_pins -of_objects $clk_wiz]
       } {
         set cport [get_bd_pins -filter {DIR == I} -of_objects $clk_wiz]
       }
       puts "  clk_wiz: $clk_wiz, cport: $cport"
       if {$cport != {}} {
-        # apply board automation
-        apply_bd_automation -rule xilinx.com:bd_rule:board -config "Board_Interface $clk_mode" $cport
-        puts "board automation worked, moving on"
+        if {[info exists ps_clk_in]} {
+          # connect ps clock in with clk_wizard
+          connect_bd_net $ps_clk_in $cport
+        } else {
+          # apply board automation
+          apply_bd_automation -rule xilinx.com:bd_rule:board -config "Board_Interface $clk_mode" $cport
+          puts "board automation worked, moving on"
+        }
       } {
         # last resort: try to call platform::create_clock_port
         set clk_mode "sys_clk"
@@ -296,6 +299,10 @@
     }
 
     set reset_in [create_bd_pin -dir O -type rst "reset_in"]
+    if {[get_bd_pins /clocks_and_resets/ps_clk_in] != {}} {
+      puts "Found pin in clock subsystem that requires a clock input from the processing system."
+      set ps_clk_in [create_bd_pin -dir O -type clk "ps_clk_in"]
+    }
     set irq_0 [create_bd_pin -dir I -type intr -from 15 -to 0 "irq_0"]
     set mem_aclk [tapasco::subsystem::get_port "mem" "clk"]
     set mem_p_arstn [tapasco::subsystem::get_port "mem" "rst" "peripheral" "resetn"]
@@ -378,6 +385,11 @@
     # connect reset
     connect_bd_net [get_bd_pins "$ps/pl_resetn0"] $reset_in
 
+    # connect output clock if needed
+    if {[info exists ps_clk_in]} {
+      connect_bd_net [get_bd_pins "$ps/pl_clk0"] $ps_clk_in
+    }
+
     # connect memory slaves to memory clock and reset
     connect_bd_net $mem_aclk [get_bd_pins -of_objects $ps -filter {NAME =~ "s*hp*aclk"}]
 
diff --git a/toolflow/vivado/status/json_to_status/gen_pb.sh b/toolflow/vivado/status/json_to_status/gen_pb.sh
index fc4a838d..2fd9fa3c 100755
--- a/toolflow/vivado/status/json_to_status/gen_pb.sh
+++ b/toolflow/vivado/status/json_to_status/gen_pb.sh
@@ -1 +1,20 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 cd src && protoc --python_out=../print_message/ --nanopb_out=$TAPASCO_HOME_RUNTIME/kernel/nanopb status_core.proto
\ No newline at end of file
diff --git a/toolflow/vivado/status/json_to_status/print_message/print_message.py b/toolflow/vivado/status/json_to_status/print_message/print_message.py
index 85f9ea96..66968b9b 100644
--- a/toolflow/vivado/status/json_to_status/print_message/print_message.py
+++ b/toolflow/vivado/status/json_to_status/print_message/print_message.py
@@ -1,12 +1,32 @@
+# Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+#
+# This file is part of TaPaSCo
+# (see https://github.com/esa-tu-darmstadt/tapasco).
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU Lesser General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU Lesser General Public License for more details.
+#
+# You should have received a copy of the GNU Lesser General Public License
+# along with this program. If not, see <http://www.gnu.org/licenses/>.
+#
+
 from google.protobuf import text_format
 from google.protobuf.internal.decoder import _DecodeVarint32
 import status_core_pb2
 
 import argparse
 
-parser = argparse.ArgumentParser(description='Prints TaPaSCo status core binaries as human readable text.')
+parser = argparse.ArgumentParser(
+    description='Prints TaPaSCo status core binaries as human readable text.')
 parser.add_argument('filename', type=str)
-args=parser.parse_args()
+args = parser.parse_args()
 
 with open(args.filename, 'rb') as f:
     buf = f.read()
@@ -15,4 +35,4 @@
     msg = status_core_pb2.Status()
     msg.ParseFromString(buf[new_pos:])
 
-    print msg
\ No newline at end of file
+    print msg
diff --git a/toolflow/vivado/status/json_to_status/src/main.rs b/toolflow/vivado/status/json_to_status/src/main.rs
index 85d006fd..2bd8f406 100644
--- a/toolflow/vivado/status/json_to_status/src/main.rs
+++ b/toolflow/vivado/status/json_to_status/src/main.rs
@@ -1,3 +1,22 @@
+// Copyright (c) 2014-2020 Embedded Systems and Applications, TU Darmstadt.
+//
+// This file is part of TaPaSCo
+// (see https://github.com/esa-tu-darmstadt/tapasco).
+//
+// This program is free software: you can redistribute it and/or modify
+// it under the terms of the GNU Lesser General Public License as published by
+// the Free Software Foundation, either version 3 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+// GNU Lesser General Public License for more details.
+//
+// You should have received a copy of the GNU Lesser General Public License
+// along with this program. If not, see <http://www.gnu.org/licenses/>.
+//
+
 #[macro_use]
 extern crate log;
 #[macro_use]