From 52b89b60d562a844f299ba671f04859639aedbed Mon Sep 17 00:00:00 2001 From: d0k3 Date: Fri, 24 Feb 2017 21:26:19 +0100 Subject: [PATCH] Merged linker & start.s files thanks to @Wolfvak --- Makefile | 42 ++++------ a9lh.ld | 12 --- a9lh.specs | 5 -- gateway.ld | 12 --- gateway.specs | 5 -- link.ld | 18 ++++ source/abstraction/a9-start.s | 68 --------------- source/abstraction/gw-start.s | 101 ----------------------- source/common.h | 3 + source/draw.h | 11 +-- source/start.s | 150 ++++++++++++++++++++++++++++++++++ 11 files changed, 190 insertions(+), 237 deletions(-) delete mode 100644 a9lh.ld delete mode 100644 a9lh.specs delete mode 100644 gateway.ld delete mode 100644 gateway.specs create mode 100644 link.ld delete mode 100644 source/abstraction/a9-start.s delete mode 100644 source/abstraction/gw-start.s create mode 100644 source/start.s diff --git a/Makefile b/Makefile index c0a7584..5a1f12b 100644 --- a/Makefile +++ b/Makefile @@ -18,7 +18,7 @@ include $(DEVKITARM)/ds_rules #--------------------------------------------------------------------------------- export TARGET := Decrypt9WIP BUILD := build -SOURCES := source source/fatfs source/decryptor source/gamecart source/abstraction +SOURCES := source source/fatfs source/decryptor source/gamecart DATA := data INCLUDES := source source/font source/fatfs @@ -32,7 +32,7 @@ THEME := #--------------------------------------------------------------------------------- ARCH := -mthumb -mthumb-interwork -flto -CFLAGS := -g -Wall -Wextra -Wpedantic -pedantic -O2\ +CFLAGS := -g -Wall -Wextra -Wpedantic -Wno-main -O2\ -march=armv5te -mtune=arm946e-s -fomit-frame-pointer\ -ffast-math -std=c99\ $(ARCH) @@ -60,13 +60,7 @@ endif CXXFLAGS := $(CFLAGS) -fno-rtti -fno-exceptions ASFLAGS := -g $(ARCH) -DEXEC_$(EXEC_METHOD) -LDFLAGS = -nostartfiles -g $(ARCH) -Wl,-Map,$(TARGET).map - -ifeq ($(EXEC_METHOD),GATEWAY) - LDFLAGS += --specs=../gateway.specs -else ifeq ($(EXEC_METHOD),A9LH) - LDFLAGS += --specs=../a9lh.specs -endif +LDFLAGS = -T../link.ld -nostartfiles -g $(ARCH) -Wl,-Map,$(TARGET).map LIBS := @@ -120,36 +114,34 @@ export INCLUDE := $(foreach dir,$(INCLUDES),-I$(CURDIR)/$(dir)) \ export LIBPATHS := $(foreach dir,$(LIBDIRS),-L$(dir)/lib) -.PHONY: common clean all gateway a9lh cakehax cakerop brahma release +.PHONY: common clean all gateway binary cakehax cakerop brahma release #--------------------------------------------------------------------------------- -all: a9lh +all: binary common: @[ -d $(OUTPUT_D) ] || mkdir -p $(OUTPUT_D) @[ -d $(BUILD) ] || mkdir -p $(BUILD) - + submodules: @-git submodule update --init --recursive -gateway: common - @make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=GATEWAY +binary: common + @make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile + +gateway: binary @cp resources/LauncherTemplate.dat $(OUTPUT_D)/Launcher.dat @dd if=$(OUTPUT).bin of=$(OUTPUT_D)/Launcher.dat bs=1497296 seek=1 conv=notrunc -a9lh: common - @make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=A9LH - -cakehax: submodules common - @make --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile EXEC_METHOD=GATEWAY +cakehax: submodules binary @make dir_out=$(OUTPUT_D) name=$(TARGET).dat -C CakeHax bigpayload @dd if=$(OUTPUT).bin of=$(OUTPUT).dat bs=512 seek=160 - + cakerop: cakehax @make DATNAME=$(TARGET).dat DISPNAME=$(TARGET) GRAPHICS=../resources/CakesROP -C CakesROP @mv CakesROP/CakesROP.nds $(OUTPUT_D)/$(TARGET).nds -brahma: submodules a9lh +brahma: submodules binary @[ -d BrahmaLoader/data ] || mkdir -p BrahmaLoader/data @cp $(OUTPUT).bin BrahmaLoader/data/payload.bin @cp resources/BrahmaAppInfo BrahmaLoader/resources/AppInfo @@ -157,13 +149,13 @@ brahma: submodules a9lh @make --no-print-directory -C BrahmaLoader APP_TITLE=$(TARGET) @mv BrahmaLoader/output/*.3dsx $(OUTPUT_D) @mv BrahmaLoader/output/*.smdh $(OUTPUT_D) - + release: @rm -fr $(BUILD) $(OUTPUT_D) $(RELEASE) + @make --no-print-directory binary @-make --no-print-directory gateway @-make --no-print-directory cakerop - @rm -fr $(BUILD) $(OUTPUT).bin $(OUTPUT).elf - @make --no-print-directory brahma + @-make --no-print-directory brahma @[ -d $(RELEASE) ] || mkdir -p $(RELEASE) @[ -d $(RELEASE)/$(TARGET) ] || mkdir -p $(RELEASE)/$(TARGET) @[ -d $(RELEASE)/scripts ] || mkdir -p $(RELEASE)/scripts @@ -178,7 +170,7 @@ release: @cp $(CURDIR)/README.md $(RELEASE) @-[ ! -n "$(strip $(THEME))" ] || (mkdir $(RELEASE)/$(THEME) && cp $(CURDIR)/resources/$(THEME)/*.bin $(RELEASE)/$(THEME)) @-7z a $(RELEASE)/$(TARGET)-`date +'%Y%m%d-%H%M%S'`.zip $(RELEASE)/* - + #--------------------------------------------------------------------------------- clean: @echo clean ... diff --git a/a9lh.ld b/a9lh.ld deleted file mode 100644 index 95dbe9e..0000000 --- a/a9lh.ld +++ /dev/null @@ -1,12 +0,0 @@ -ENTRY(_start) -SECTIONS -{ - . = 0x23F00000; - .text.start : { *(.text.start) } - .text : { *(.text) } - .data : { *(.data) } - .bss : { *(.bss COMMON) } - .rodata : { *(.rodata) } - . = ALIGN(4); - __end__ = ABSOLUTE(.); -} \ No newline at end of file diff --git a/a9lh.specs b/a9lh.specs deleted file mode 100644 index 79b8164..0000000 --- a/a9lh.specs +++ /dev/null @@ -1,5 +0,0 @@ -%rename link old_link - -*link: -%(old_link) -T ../a9lh.ld%s - diff --git a/gateway.ld b/gateway.ld deleted file mode 100644 index ae2478b..0000000 --- a/gateway.ld +++ /dev/null @@ -1,12 +0,0 @@ -ENTRY(_start) -SECTIONS -{ - . = 0x08000000; - .text.start : { *(.text.start) } - .text : { *(.text) } - .data : { *(.data) } - .bss : { *(.bss COMMON) } - .rodata : { *(.rodata) } - . = ALIGN(4); - __end__ = ABSOLUTE(.); -} diff --git a/gateway.specs b/gateway.specs deleted file mode 100644 index ff32c30..0000000 --- a/gateway.specs +++ /dev/null @@ -1,5 +0,0 @@ -%rename link old_link - -*link: -%(old_link) -T ../gateway.ld%s - diff --git a/link.ld b/link.ld new file mode 100644 index 0000000..72a46fa --- /dev/null +++ b/link.ld @@ -0,0 +1,18 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) + +SECTIONS +{ + . = 0x23F00000; + + .text.start : ALIGN(4) { *(.text.start) } + .text : ALIGN(4) { *(.text*) } + .rodata : ALIGN(4) { *(.rodata*) } + .data : ALIGN(4) { *(.data*) } + .bss : ALIGN(4) { __bss_start = .; *(.bss* COMMON); __bss_end = .;} + + . = ALIGN(4); + + __end__ = ABSOLUTE(.); +} diff --git a/source/abstraction/a9-start.s b/source/abstraction/a9-start.s deleted file mode 100644 index 932b891..0000000 --- a/source/abstraction/a9-start.s +++ /dev/null @@ -1,68 +0,0 @@ -#ifdef EXEC_A9LH - -.section .text.start -.align 4 -.global _start -_start: - @ Change the stack pointer - mov sp, #0x27000000 - - @ Disable caches / mpu - mrc p15, 0, r4, c1, c0, 0 @ read control register - bic r4, #(1<<12) @ - instruction cache disable - bic r4, #(1<<2) @ - data cache disable - bic r4, #(1<<0) @ - mpu disable - mcr p15, 0, r4, c1, c0, 0 @ write control register - - @ Give read/write access to all the memory regions - ldr r5, =0x33333333 - mcr p15, 0, r5, c5, c0, 2 @ write data access - mcr p15, 0, r5, c5, c0, 3 @ write instruction access - - @ Sets MPU permissions and cache settings - ldr r0, =0xFFFF001D @ ffff0000 32k - ldr r1, =0x01FF801D @ 01ff8000 32k - ldr r2, =0x08000027 @ 08000000 1M - ldr r3, =0x10000021 @ 10000000 128k - ldr r4, =0x10100025 @ 10100000 512k - ldr r5, =0x20000035 @ 20000000 128M - ldr r6, =0x1FF00027 @ 1FF00000 1M - ldr r7, =0x1800002D @ 18000000 8M - mov r8, #0x25 - mcr p15, 0, r0, c6, c0, 0 - mcr p15, 0, r1, c6, c1, 0 - mcr p15, 0, r2, c6, c2, 0 - mcr p15, 0, r3, c6, c3, 0 - mcr p15, 0, r4, c6, c4, 0 - mcr p15, 0, r5, c6, c5, 0 - mcr p15, 0, r6, c6, c6, 0 - mcr p15, 0, r7, c6, c7, 0 - mcr p15, 0, r8, c3, c0, 0 @ Write bufferable 0, 2, 5 - mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 2, 5 - mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 2, 5 - - @ Enable caches - mrc p15, 0, r4, c1, c0, 0 @ read control register - orr r4, r4, #(1<<18) @ - itcm enable - orr r4, r4, #(1<<12) @ - instruction cache enable - orr r4, r4, #(1<<2) @ - data cache enable - orr r4, r4, #(1<<0) @ - mpu enable - mcr p15, 0, r4, c1, c0, 0 @ write control register - - @ Flush caches - mov r5, #0 - mcr p15, 0, r5, c7, c5, 0 @ flush I-cache - mcr p15, 0, r5, c7, c6, 0 @ flush D-cache - mcr p15, 0, r5, c7, c10, 4 @ drain write buffer - - @ Fixes mounting of SDMC - ldr r0, =0x10000020 - mov r1, #0x340 - str r1, [r0] - - bl main - -.die: - b .die - -#endif // EXEC_A9LH diff --git a/source/abstraction/gw-start.s b/source/abstraction/gw-start.s deleted file mode 100644 index ab5b5d4..0000000 --- a/source/abstraction/gw-start.s +++ /dev/null @@ -1,101 +0,0 @@ -#ifdef EXEC_GATEWAY - -.section .text.start -.global _start -.align 4 -.arm - -_vectors: - ldr pc, =InfiniteLoop - .pool - ldr pc, =InfiniteLoop - .pool - ldr pc, =InfiniteLoop - .pool - ldr pc, =InfiniteLoop - .pool - ldr pc, =InfiniteLoop - .pool - ldr pc, =InfiniteLoop - .pool - -_start: - ldr sp,=0x22140000 - - @@wait for the arm11 kernel threads to be ready - ldr r1, =0x10000 - waitLoop9: - sub r1, #1 - - cmp r1, #0 - bgt waitLoop9 - - ldr r1, =0x10000 - waitLoop92: - sub r1, #1 - - cmp r1, #0 - bgt waitLoop92 - - @ Disable caches / mpu - mrc p15, 0, r4, c1, c0, 0 @ read control register - bic r4, #(1<<12) @ - instruction cache disable - bic r4, #(1<<2) @ - data cache disable - bic r4, #(1<<0) @ - mpu disable - mcr p15, 0, r4, c1, c0, 0 @ write control register - - @ Give read/write access to all the memory regions - ldr r5, =0x33333333 - mcr p15, 0, r5, c5, c0, 2 @ write data access - mcr p15, 0, r5, c5, c0, 3 @ write instruction access - - @ Sets MPU permissions and cache settings - ldr r0, =0xFFFF001D @ ffff0000 32k - ldr r1, =0x01FF801D @ 01ff8000 32k - ldr r2, =0x08000027 @ 08000000 1M - ldr r3, =0x10000021 @ 10000000 128k - ldr r4, =0x10100025 @ 10100000 512k - ldr r5, =0x20000035 @ 20000000 128M - ldr r6, =0x1FF00027 @ 1FF00000 1M - ldr r7, =0x1800002D @ 18000000 8M - mov r8, #0x25 - mcr p15, 0, r0, c6, c0, 0 - mcr p15, 0, r1, c6, c1, 0 - mcr p15, 0, r2, c6, c2, 0 - mcr p15, 0, r3, c6, c3, 0 - mcr p15, 0, r4, c6, c4, 0 - mcr p15, 0, r5, c6, c5, 0 - mcr p15, 0, r6, c6, c6, 0 - mcr p15, 0, r7, c6, c7, 0 - mcr p15, 0, r8, c3, c0, 0 @ Write bufferable 0, 2, 5 - mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 2, 5 - mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 2, 5 - - @ Enable caches - mrc p15, 0, r4, c1, c0, 0 @ read control register - orr r4, r4, #(1<<18) @ - itcm enable - orr r4, r4, #(1<<12) @ - instruction cache enable - orr r4, r4, #(1<<2) @ - data cache enable - orr r4, r4, #(1<<0) @ - mpu enable - mcr p15, 0, r4, c1, c0, 0 @ write control register - - @ Flush caches - mov r5, #0 - mcr p15, 0, r5, c7, c5, 0 @ flush I-cache - mcr p15, 0, r5, c7, c6, 0 @ flush D-cache - mcr p15, 0, r5, c7, c10, 4 @ drain write buffer - - @ Fixes mounting of SDMC - ldr r0, =0x10000020 - mov r1, #0x340 - str r1, [r0] - - ldr sp,=0x22160000 - ldr r3, =main - blx r3 -.pool - -InfiniteLoop: - b InfiniteLoop - -#endif // EXEC_GATEWAY diff --git a/source/common.h b/source/common.h index 2f71139..25857a8 100644 --- a/source/common.h +++ b/source/common.h @@ -37,6 +37,9 @@ #define align(v,a) \ (((v) % (a)) ? ((v) + (a) - ((v) % (a))) : (v)) +#define ENTRY_BRAHMA (1) +#define ENTRY_GATEWAY (2) + // standard work area, size must be a multiple of 0x200 (512) #define BUFFER_ADDRESS ((u8*) 0x21000000) #define BUFFER_MAX_SIZE ((u32) (1 * 1024 * 1024)) diff --git a/source/draw.h b/source/draw.h index ff2ddac..6594bf5 100644 --- a/source/draw.h +++ b/source/draw.h @@ -59,15 +59,8 @@ #define DBG_N_CHARS_Y ((DBG_END_Y - DBG_START_Y) / DBG_STEP_Y) #define DBG_N_CHARS_X (((DBG_END_X - DBG_START_X) / FONT_WIDTH) + 1) -#ifdef EXEC_GATEWAY - #define TOP_SCREEN (u8*)(*(u32*)((uint32_t)0x080FFFC0 + 4 * (*(u32*)0x080FFFD8 & 1))) - #define BOT_SCREEN (u8*)(*(u32*)((uint32_t)0x080FFFD0 + 4 * (*(u32*)0x080FFFDC & 1))) -#elif defined EXEC_A9LH - #define TOP_SCREEN (u8*)(*(u32*)0x23FFFE00) - #define BOT_SCREEN (u8*)(*(u32*)0x23FFFE08) -#else - #error "Unknown execution method" -#endif +#define TOP_SCREEN (u8*)(*(u32*)0x23FFFE00) +#define BOT_SCREEN (u8*)(*(u32*)0x23FFFE08) #define ScreenWidth(x) (((x) == (TOP_SCREEN) ? 400 : 320)) #define IsCharPartOfWord(x) (((x) >= 'a' && (x) <= 'z') || ((x) >= '0' && (x) <= '9') || ((x) >= 'A' && (x) <= 'Z')) diff --git a/source/start.s b/source/start.s new file mode 100644 index 0000000..45df288 --- /dev/null +++ b/source/start.s @@ -0,0 +1,150 @@ +.section .text.start +.global _start +.align 4 +.arm + +@ if the binary is booted from Brahma/CakeHax/k9lh +@ the entrypoint is +@ framebuffers are already set +_start: + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop + nop @ dummy + b _skip_gw + +@ if the binary is booted from the GW exploit +@ the entrypoint is +_start_gw: + + @@wait for the arm11 kernel threads to be ready + mov r1, #0x10000 + waitLoop9: + sub r1, #1 + cmp r1, #0 + bgt waitLoop9 + + mov r1, #0x10000 + waitLoop92: + sub r1, #1 + cmp r1, #0 + bgt waitLoop92 + + + @ copy the payload to the standard entrypoint (0x23F00000) + adr r0, _start + add r1, r0, #0x100000 + ldr r2, .entry + .copy_binary_fcram: + cmp r0, r1 + ldrlt r3, [r0], #4 + strlt r3, [r2], #4 + blt .copy_binary_fcram + + @ setup framebuffers to look like Brahma/etc + + ldr r0, .gw_fba + ldr r1, [r0, #0x18] + and r1, #1 + ldr r1, [r0, r1, lsl #2] @ r1 := top framebuffer loc + mov r2, r1 @ r2 := top framebuffer loc + + ldr r0, .gw_fbb + ldr r3, [r0, #0xC] + and r3, #1 + ldr r3, [r0, r3, lsl #2] @ r3 := bottom framebuffer loc + + ldr r0, .cakehax + stmia r0, {r1,r2,r3} + @ framebuffers properly set + + ldr r3, .entry + bx r3 + +.gw_fba: .word 0x080FFFC0 +.gw_fbb: .word 0x080FFFD0 +.cakehax: .word 0x23FFFE00 +.entry: .word 0x23F00000 + +_skip_gw: + @ Disable caches / mpu + mrc p15, 0, r4, c1, c0, 0 @ read control register + bic r4, #(1<<12) @ - instruction cache disable + bic r4, #(1<<2) @ - data cache disable + bic r4, #(1<<0) @ - mpu disable + mcr p15, 0, r4, c1, c0, 0 @ write control register + + @ Clear bss + ldr r0, =__bss_start + ldr r1, =__end__ + mov r2, #0 + + .bss_clr: + cmp r0, r1 + strlt r2, [r0], #4 + blt .bss_clr + + @ Give read/write access to all the memory regions + ldr r5, =0x33333333 + mcr p15, 0, r5, c5, c0, 2 @ write data access + mcr p15, 0, r5, c5, c0, 3 @ write instruction access + + @ Sets MPU permissions and cache settings + ldr r0, =0xFFFF001F @ ffff0000 64k | bootrom (unprotected / protected) + ldr r1, =0x3000801B @ 30000000 16k | dtcm + ldr r2, =0x01FF801D @ 01ff8000 32k | itcm + ldr r3, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS) + ldr r4, =0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB) + ldr r5, =0x20000037 @ 20000000 256M | fcram (O3DS / N3DS) + ldr r6, =0x1FF00027 @ 1FF00000 1M | dsp / axi wram + ldr r7, =0x1800002D @ 18000000 8M | vram (+ 2MB) + mov r8, #0x2D + mcr p15, 0, r0, c6, c0, 0 + mcr p15, 0, r1, c6, c1, 0 + mcr p15, 0, r2, c6, c2, 0 + mcr p15, 0, r3, c6, c3, 0 + mcr p15, 0, r4, c6, c4, 0 + mcr p15, 0, r5, c6, c5, 0 + mcr p15, 0, r6, c6, c6, 0 + mcr p15, 0, r7, c6, c7, 0 + mcr p15, 0, r8, c3, c0, 0 @ Write bufferable 0, 2, 5 + mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 2, 5 + mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 2, 5 + + @ Enable dctm + ldr r1, =0x3000800A @ set dtcm + mcr p15, 0, r1, c9, c1, 0 @ set the dtcm Region Register + + @ Enable caches + mrc p15, 0, r4, c1, c0, 0 @ read control register + orr r4, r4, #(1<<18) @ - itcm enable + orr r4, r4, #(1<<16) @ - dtcm enable + orr r4, r4, #(1<<12) @ - instruction cache enable + orr r4, r4, #(1<<2) @ - data cache enable + orr r4, r4, #(1<<0) @ - mpu enable + mcr p15, 0, r4, c1, c0, 0 @ write control register + + @ Flush caches + mov r5, #0 + mcr p15, 0, r5, c7, c5, 0 @ flush I-cache + mcr p15, 0, r5, c7, c6, 0 @ flush D-cache + mcr p15, 0, r5, c7, c10, 4 @ drain write buffer + + @ Fixes mounting of SDMC + ldr r0, =0x10000020 + mov r1, #0x340 + str r1, [r0] + + mov sp, #0x27000000 + + blx main + b _start + +.pool