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Parser missing IRQs (CMSDK_CM3.svd) #87
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I pulled down this file. I believe the SVD provided by ARM does follow the spec but does it in a way that is more than a little obnoxious and different than how all the vendors appear to be doing things (at least as far as I have encountered) CMSDK_CM3.svd: <interrupt>
<name>UART0_RX</name>
<description>UART 0 Receive Interrupt</description>
<value>0</value>
<name>UART0_TX</name>
<description>UART 0 Transmit Interrupt</description>
<value>1</value>
</interrupt> How everyone else does it: <interrupt>
<name>UART0_RX</name>
<description>UART 0 Receive Interrupt</description>
<value>0</value>
</interrupt>
<interrrupt>
<name>UART0_TX</name>
<description>UART 0 Transmit Interrupt</description>
<value>1</value>
</interrupt> However, the schema does have the type for "interrupt" defined as follows: <!-- interruptType specifies how to describe an interrupt associated with a peripheral -->
<xs:complexType name="interruptType">
<xs:sequence>
<xs:element name="name" type="stringType"/>
<xs:element name="description" type="xs:string" minOccurs="0"/>
<xs:element name="value" type="xs:integer"/>
</xs:sequence>
</xs:complexType> Which, if I understand |
This commit introduces a core idea for how to model the parsing of the fairly obnoxious required xs:sequence type parsing that shows up in some of ARM's examples (and is part of the spec). Initially just the register parsing is converted over per #87. Signed-off-by: Paul Osborne <osbpau@gmail.com>
This commit introduces a core idea for how to model the parsing of the fairly obnoxious required xs:sequence type parsing that shows up in some of ARM's examples (and is part of the spec). Initially just the register parsing is converted over per cmsis-svd#87. Signed-off-by: Paul Osborne <osbpau@gmail.com>
This commit introduces a core idea for how to model the parsing of the fairly obnoxious required xs:sequence type parsing that shows up in some of ARM's examples (and is part of the spec). Initially just the register parsing is converted over per cmsis-svd/cmsis-svd#87. Signed-off-by: Paul Osborne <osbpau@gmail.com>
This commit introduces a core idea for how to model the parsing of the fairly obnoxious required xs:sequence type parsing that shows up in some of ARM's examples (and is part of the spec). Initially just the register parsing is converted over per cmsis-svd/cmsis-svd#87. Signed-off-by: Paul Osborne <osbpau@gmail.com>
This commit introduces a core idea for how to model the parsing of the fairly obnoxious required xs:sequence type parsing that shows up in some of ARM's examples (and is part of the spec). Initially just the register parsing is converted over per cmsis-svd/cmsis-svd#87. Signed-off-by: Paul Osborne <osbpau@gmail.com>
While parsing ARM CMSDK_CM3.svd extracted from Keil.V2M-MPS2_CMx_BSP.1.7.0.pack it appears the second IRQs for all peripherals are missing. Everything looks fine when I examine the SVD file manually. This device is of special importance as its available in QEMU. Any assistance would be appreciated as my python skills are poor.
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