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The SVD file states that the register is at offset 0xC whereas the ST's RM0360 states that it is at offset 0x10. I also checked with VSCode and a debugger that in fact offset 0x10 provides all the functionality defined for the INIT regsiter while 0xC does not.
The text was updated successfully, but these errors were encountered:
https://github.com/posborne/cmsis-svd/blob/0dd8f9af9a69399088a711259af813383bef08d3/data/STMicro/STM32F030.svd#L98
The SVD file states that the register is at offset 0xC whereas the ST's RM0360 states that it is at offset 0x10. I also checked with VSCode and a debugger that in fact offset 0x10 provides all the functionality defined for the INIT regsiter while 0xC does not.
The text was updated successfully, but these errors were encountered: