Usage instructions for ReplSeqMemsAnnotation are incorrect

[mwachs5]

Checklist

• Did you specify the current behavior?
• Did you specify the expected behavior?
• Did you provide a code example showing the problem?
• Did you describe your environment?
• Did you specify relevant external information?

What is the current behavior?

The usage string for ReplSeqMems says:

  --replSeqMem -c:<circuit>:-i:<filename>:-o:<filename>
  *** Note: sub-arguments to --replSeqMem should be delimited by : and not white space!
Required Arguments:
  -o<filename>         Specify the output configuration file
  -c<circuit>          Specify the target circuit

What is the expected behavior?

The actual argument is --repl-seq-mem.
It's also unclear to me if -c option is still correct/usable (@sequencer was this changed in #2191 ?)

Steps to Reproduce

Your environment

• Chisel Verions: master
• OS:
• Verilator version:

External Information

[sequencer]

I was confused by this when I refactoring it, it seems memlib didn't use parsed circuit.

However, after my checking to this API again, I found it was because of ClockListTransform using PassConfigUtil in:

firrtl/src/main/scala/firrtl/passes/clocklist/ClockListTransform.scala

Lines 36 to 39 in 1f7faaa

	val passCircuit = passOptions.getOrElse(
	PassCircuitName,
	error("No circuit name specified for ClockList!" + usage)
	)

, I cannot remove -c parser(although I want to do this)

Personally I think -c can be removed if we use memlib. But for not breaking backward compatibility, I keep -c.