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Requirements when C<5, Dimensionality = 0 and Throughput > 1 #226

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matthijsr opened this issue Mar 26, 2022 · 0 comments
Open

Requirements when C<5, Dimensionality = 0 and Throughput > 1 #226

matthijsr opened this issue Mar 26, 2022 · 0 comments
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@matthijsr
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Background

https://abs-tudelft.github.io/tydi/specification/physical.html#signal-omission

Specifies that:

  • stai is contingent on C≥6∧N>1
  • endi is contingent on (C≥5∨D≥1)∧N>1
  • strb is contingent on C≥7∨D≥1

Potential Issue

As a result of these requirements, a Stream with C<5, D=0 and element lanes N>1 should not have an endi signal.
This means that all lanes in a transfer must be valid, as there is no way to set individual lanes as being inactive.

Suggested Fix

The current specification implies that any transfer with C<5, D=0, N>1 must consist of Q elements where Q mod N = 0.

It is not clear whether this is intentional, I can think of two other ways in which to make behavior consistent:

  1. N>1 is contingent on D>0∨C≥5 - i.e., it is not allowed to transfer multiple elements at the same time except in a list or at higher complexities.
  2. endi is solely contingent on N>1 - i.e., it is always allowed to transfer multiple elements, and endi can be used to encode lane validity when sequences do not align to the number of element lanes.
@mbrobbel mbrobbel added the 🐬 specification Item related to the specification label Mar 28, 2022
@mbrobbel mbrobbel changed the title [Spec] Requirements when C<5, Dimensionality = 0 and Throughput > 1 Requirements when C<5, Dimensionality = 0 and Throughput > 1 Mar 28, 2022
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