{"payload":{"header_redesign_enabled":false,"results":[{"id":"405408817","archived":false,"color":"#DAE1C2","followers":78,"has_funding_file":false,"hl_name":"WangXuan95/UH-JLS","hl_trunc_description":"FPGA-based Ultra-High Throughput JPEG-LS encoder, which provides lossless image compression. 一个超高性能的FPGA JPEG-LS编码器,用来进行无损图像压缩。","language":"SystemVerilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":405408817,"name":"UH-JLS","owner_id":20251744,"owner_login":"WangXuan95","updated_at":"2023-09-14T13:02:28.449Z","has_issues":true}},"sponsorable":false,"topics":["fpga","verilog","image-compression","image-encoder","jpeg-ls"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":75,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253AWangXuan95%252FUH-JLS%2B%2Blanguage%253ASystemVerilog","metadata":null,"csrf_tokens":{"/WangXuan95/UH-JLS/star":{"post":"ywJiNJqLcbyGm7XURYyulFOhiGw01nJ-76YD03VeC1mpSqIF9b6xpTZ-oEBcvWP6BsFLBFyd74P_LCPNsS57xA"},"/WangXuan95/UH-JLS/unstar":{"post":"LlirR1RYCZGAAsDuni7AXEX69f9JPAI5sHLqqw9_bYlXvTIdxIPnigAfrPISproqkfCht9dv1iI6HBQ3AGjxCg"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"UagWs1yErIUir76DyduMylx6zAE6sS50Wi4mn1yeRbvYvsGbRRTQm8Pe3ZzBeXPsa6ck06VRAZFwNLPNcUJxyQ"}}},"title":"Repository search results"}