Recommended future improvements

[David-customMK]

In reviewing the design of the Unified Daughterboard I found some room for improvements in future iterations of the design:

• A bidirectional TVS is not ideal across the 5V rail, because it will permit a negative transient on VCC (such that VCC sees a negative voltage below GND). Better protection would be provided with a unidirectional TVS, as it would prevent VCC from being forced below GND.
• The TVS in the BOM provides a min breakdown of 10V and a reverse standoff of 9V. This seems unnecessarily high for a 5V line.
• Instead of having a discrete TVS, it seems like it would be optimal to make use of the existing ESD component on the board. It provides four channels of ESD protection, and there is no need for redundant ESD protection on the data lines. Recommend removing two of the redundant channels from the ESD I/O lines and using one of those channels to protect VCC instead. For an similar example of how this looks, see the datasheet for USBLC6-2SC6.
• Ferrites are designed to filter out EMI in the >10MHz range. The intended use of a ferrite to restrict ESD currents will not be very effective, because the 8/20us ESD transient exists more in the 100kHz range where ferrites are still low impedance. Instead of using a ferrite for ESD purposes, it would be more effective for EMI purposes, by placing it between USB-C shield and USB-C GND connections, so as to provide higher impedance to the USB cable shield connection.
• For metal keyboard cases (which are inherently susceptible to ESD discharges during normal use), there isn't really a great place to dissipate the discharge because USB devices typically don't have a direct path to earth ground (due to isolated power supplies upstream). Given that, that best option is simply shunt the discharge currents to the local ground, which will (harmlessly) cause the entire circuit potential to shift together during the transient. I mention this because it seems emphasized that the metal connection to case only goes through one mounting hole, which really doesn't benefit the circuit in any way. Whether it is tied to digital GND (or the USB shield) through one hole or four makes no difference.
• If you really wanted to keep only one hole as conductive to the case, it would be better to remove the copper plane on the back of the board on those corner (or at least have them match the annular ring on the front). When making a mechanical connection to a metal surface, soldermask is not a reliable insulator; there are no inherent voltage withstand guarantees (noting however that the IPC standards do acknowledge some presumed voltage withstand capability), and soldermask is far to easy too accidentally scrape off during fastening.
• The description states "when a voltge spike is detected, it shorts VCC and GND" which isn't quite accurate, in reality it just clamps the voltage (VCC or I/O line) to a safe level so as to prevent damage to other components.
• It looks like there are a few instances of via-in-pad; this is not ideal for manufacturing as solder gets pulled into the via (unless you do a nonconductive epoxy fill), so yield may go down (or cost will go up).
• A power trace on the back side immediately cuts underneath the data lines coming off the connector. Might be better for the USB signals if that trace were pushed up higher to be under the connector instead, giving a more consistent ground plane underneath. That said, I realize it will interfere with the star pattern in the copper, so...it may not be worthwhile?
• USB signal traces aren't really the right width as per USB spec, but these traces are short enough that it might not matter. You'd probably need to go four layer to actually meet spec while keeping trace widths reasonable.

[David-customMK]

For the ESD component, NUP4114 looks like a good option for the future. It has low capacitances compatible with USB 2.0 speeds; I would not worry at all about the need for USB 3.0/3.1 Superspeed compatibility because this board (nor any 2-layer board) is already unable to handle anything near that data rate. This component includes protection for the power rail, and is even a little lower cost and smaller (for the SC-88 a.k.a. SOT-363 package at least).

[Gondolindrim]

Nice, thanks for your input, really awesome feedback here! Let me explain some of the design decisions here.

A bidirectional TVS is not ideal across the 5V rail, because it will permit a negative transient on VCC (such that VCC sees a negative voltage below GND). Better protection would be provided with a unidirectional TVS, as it would prevent VCC from being forced below GND.

The problem here is that we have seen many users connect their daughterboards in the reverse direction of the connector. This causes a negative spike in the GND, as you mentioned. If we use a uni-directional TVS, that problem will generate high back-currents in the PCB components, potentially damaging them. This also happens with custom cables that have GND and VCC backwards, which are fairly common, specially with those DIY custom cable kits.

EDIT: took a look at some datasheets and a unidirectional TVS would indeed have an even better effect on this. Awesome! Thanks.

Instead of having a discrete TVS, it seems like it would be optimal to make use of the existing ESD component on the board. It provides four channels of ESD protection, and there is no need for redundant ESD protection on the data lines. Recommend removing two of the redundant channels from the ESD I/O lines and using one of those channels to protect VCC instead. For an similar example of how this looks, see the datasheet for USBLC6-2SC6.

The ESD protection chip used does not have a rail for the power supply, only for the data lines, hence the TVS diode. It is also made with ultra-high-speeds in mind and, most importantly, made in the same format as the USBC connector. USBLC series and NUP as you suggested are ideal for USB2.0 connections and USB connectors that have only two data pins. This is specially important because the data lines speeds are much higher than transients in the power rails, so even if we used an integrated solution like USBLC or NUP, they are not ideal because their filtering is not ideal.

However, having super-speed protection here doesn't matter much here and I agree. The big reasion this chip was used is it is cheaper, smaller and more reliable than USBLC or NUP since the routing needed is much simpler (it has a "flow-through" pinout). The most critical part of the daughteboard is that space between the USBC and the JST connector. I couldn't make it work with the USBLC because it was too big and the routing got unfeasible.

There is another potential issue here. The USBC connector in USB2.0 is four-channeled, because it has two sides. Using chips like NUP and USBLC force you to join the data lines before the chip, which might cause ESD issues. If this was a USB mini conenctor or something similar, where you only need two channels, those chips would be fine. This is why I can't simply remove a channel from the ESD chip for the VBUS, and dedicated a TVS for it.

We are discussing this and we might get back to USBLC. I agree with you -- with some more effort we could make it work with this chip, removing the discrete TVS. The other designers went by your opinion, while I particularly disagree.

For metal keyboard cases (which are inherently susceptible to ESD discharges during normal use), there isn't really a great place to dissipate the discharge because USB devices typically don't have a direct path to earth ground (due to isolated power supplies upstream). Given that, that best option is simply shunt the discharge currents to the local ground, which will (harmlessly) cause the entire circuit potential to shift together during the transient. I mention this because it seems emphasized that the metal connection to case only goes through one mounting hole, which really doesn't benefit the circuit in any way. Whether it is tied to digital GND (or the USB shield) through one hole or four makes no difference.

The fact that the GND is tied to a single path makes a world of difference -- that means there are no ground loops inside the case. As you might know, ground loops are extremely detrimental to the circuit and are potentially hazardous to the user. Having the ground supply come from a single path is paramount to ensure user ESD safety. Second, the problem with hard-grounding the case to the GND is that we never know if the shield is grounded and earthed in upstream or not. They are generally not earthed, due to the isolated power supplies, but they are generally grounded. Even then, there are instances where the outlet neutral is grounded, and some modern power supplies do not properly isolate earth and ground.

Having shield grounded also generates more ground loops, but this time on the cable itself, which can potentially destroy the upstream port but, more importantly, fry components on the PCB or even shock the user. Hence why the metal enclosure is drectly grounded and the signal ground is isolated with a ferrite bead. Ideally here I'd make an RC shield discharge, but that'd ideally require a 1206 resistor and an 0805 capacitor and I couldn't make it work in the tight space.

The ferrite bead also makes for the potential shift effect. If a voltage spike happens on GNDPWR, the bead will delay it but not avoid it.

If you really wanted to keep only one hole as conductive to the case, it would be better to remove the copper plane on the back of the board on those corner (or at least have them match the annular ring on the front). When making a mechanical connection to a metal surface, soldermask is not a reliable insulator; there are no inherent voltage withstand guarantees (noting however that the IPC standards do acknowledge some presumed voltage withstand capability), and soldermask is far to easy too accidentally scrape off during fastening.

Here I agree with you. Soldermask is not a reliable insulator. However, I could not make this PCB work with a single layer, hence why I used the back copper layer for the low speed signals. Remember that the case is grounded; if we route the USB signals in the back copper for a long distance, we can have significant parasitic capacitance and destroy signal integrity there. I think it is a good impovement to try and make a C4 version that is single layered, but I will have to spend more time on that.

Also, the screw pads are metallized for a reason. The soldermask will not be scraped off during fastening because there is no soldermask to scrape there.

The description states "when a voltge spike is detected, it shorts VCC and GND" which isn't quite accurate, in reality it just clamps the voltage (VCC or I/O line) to a safe level so as to prevent damage to other components.

Indeed, the correct term is not "shorting", but the README is not meant to be itty-gritty correct. Most of the users in this hobby do not have a technical background but do understand "grounding" and "shorting". The term "shorting" here means that any spike current is directed to ground. Anyone that knows the characteristic transconductance curve of a Schottky diode will known what "shorting" means here.

A power trace on the back side immediately cuts underneath the data lines coming off the connector. Might be better for the USB signals if that trace were pushed up higher to be under the connector instead, giving a more consistent ground plane underneath. That said, I realize it will interfere with the star pattern in the copper, so...it may not be worthwhile?

Then again I agree with you, but I couldn't make this work in a single-layer PCB. I will work better on this.

USB signal traces aren't really the right width as per USB spec, but these traces are short enough that it might not matter. You'd probably need to go four layer to actually meet spec while keeping trace widths reasonable.

Right again. But you gave my response here. This was the best I could do on a two-layer board, and four-layer here would be way overkill.

TLDR: I agree with you in all aspects (except the single path ground), but I couldn't make everything fall into spec in a 2-layered board. I will work harder on it.

I think your feedback here is amazing, and we have a nice route to C4:

• USB data lines to with/diff impedance spec
• Fix the "shorting" inconsistency in the README
• Single-layer
• Remove vias on pads
• Move the ferrite bead to EMI shield-ground path
• Use an RC discharge for the shield

EDITS: typos and grammar

EDITs 2: This was discussed with the designers. We are making a new C4 version using:

I think your feedback here is amazing, and we have a nice route to C4:

• Discuss falling back to PRTR5V0U2X/USBLC6 ESD chips (integrated VBUS protection)
• Using SMF6.0A, which is unidirectional and clamps at 6V, instead of SMF9.0CA which clamps at 9
• Ferrite bead for shield and case EMI only
• Getting USB traces to spec
• We are discussing still using a bidirectional TVS to avoid problems with mis-constructed custom cables and mis-connected JST connectors

Thank you for your amazing considerations!

[David-customMK]

Thank you for your comments and feedback on my recommendations, and for taking them into consideration!

On the few topics where we seem to have a different understanding (i.e. grounding and the 2 vs. 4 channels), I'd love to discuss more--if you're so inclined--so that the resulting daughter board design is unassailable. If it turns out that my thinking is wrong somewhere I'd love to correct it and learn more in the process, so I'll go into pretty good depth about my reasoning and just lay it all out there. Feel free to call me out on anything, or ask for more details if I happen to gloss over something important.

Starting with the topics we appear to be in agreement on:
Regarding the USBLC, I only referenced it because the datasheet had the clearest examples showing that the same TVS that protects the data lines can also protect the power rails, and thus conclude that the discrete TVS was unnecessary. NUP didn't demonstrate that as clearly in its datasheet, but it was a small enough part that it could be used instead of the TI part. The only concern I would have had about the selected TI part is that it doesn't specifically state anywhere that it can be used for USB power rails, and so if the datasheet doesn't state it, in general you can't rely on it. :) That said, for a component like this, I'm personally comfortable with taking such an exception (that is, tying a power rail to a pin intended for an I/O data line)

Understood regarding the "flow through" layout and I agree the selected TI part can make that a bit easier, especially under the objective of needing to support four channels.

I think a change to a TVS that clamps at just above 6V is very good. And if you are going to use integrated VBUS protection, then the discrete TVS itself won't be needed at all

I'm not sure exactly which edit of yours was the most recent, but if it is the one indicating that you plan to use a unidirectional TVS, that is great news, as unidirectional should provide even better protection than the bidirectional TVS.

While it is a nice goal to get USB traces to spec, I think that is going to be very challenging to achieve with a 2 layer board (unless the board is unnaturally thin), simply because the traces will need to be really wide. I think if you aim to just make them as wide and short as you can (as wide as the pin footprints, basically), that should suffice, much like how traces can be necked down for a short distance to reach the inner balls of a large BGA device.

Regarding the 4 channels:
While I can see how there is the appearance of a potential issue regarding two channel vs. four channel, I'm fairly certain that it ends up not being an actual issue. As an aside, I'm not sure what is referred to by "before the chip" in this context; electrically, they are the exact same net. Despite that the schematic depicts multiple net names (DP/DN, DA+/-, and DB+/-), if you open up the netlist file, or even looking at the trace/pin names in the layout, the DB+ and DB- (as well as DP, DN) are entirely nonexistent, leaving only DA+ and DA-. Physically, yes, I see that the channels have distinct traces coming out of the USB connector itself, but a mere 3mm away at the JST connector, they join up to become one trace electrically. As they are electrically hard-tied together, then for USB signaling purposes normal voltages and even ESD transients which occur on one channel, it will immediately will show up on the other. I don't see a benefit in "waiting" 3mm to tie them together (vs tying them together immediately at the USB connector); if there is a voltage rise due to ESD transient, all nets will start to see it, the clamping will happen at the TVS regardless of where DA and DB nets are tied together. The trace inductances here are too short to provide any inherent inductive filtering against the transients, and will conduct normal USB signaling through the hard connection anyway. So from an ESD suppression standpoint, I see no reason why they would need dedicated ESD channel. If they were instead joined together immediately at the USB connector, that does open up more possibilities to use this chip (or others) for all the necessary ESD suppression, even for the power rails.

Regarding ground loops:
I understand the basic premise of "ground loops = bad", but thinking through the actual paths of potential current flow, as well as the intended/desired effects when an ESD event occurs, it does not actually seem that bad, and even then, it can actually be mitigated pretty easily. But first, just ensure we are working with the same definitions:

What is ground? In this context, I would define this simply as the ground pins of the USB connector, or nets connected to those ground pins.
What is isolation? For this discussion, I would consider it any sufficiently high DC impedance. This could be anything from an air gap, to traditional insulators like plastics, to even high value resistances (e.g. megaohms or gigaohms, particularly because they aren't going to "conduct" USB signaling or ESD events...although over time though they do help dissipate static charge buildup and ensure even "isolated" circuits are at a known, safe potential).
What is meant by earthed (a.k.a. safety ground, a.k.a. chassis ground)? I would consider this to be the "green wire" or "third pin" of AC outlets, which ultimately ties to AC Neutral at the circuit breaker box, and is then connected to the actual earth/soil through one or more nice long ground rods just outside of the home or business. Safety grounds do not typically carry current, they merely provide a ground potential to metal housings of equipment that use AC voltage (so that if a wire were to accidentally come loose and touch a chassis internally, current will prefer to find a return path through that third wire instead of shocking the user). Earth grounds are not directly available laptops (they stop at the power supply brick, if they even make it that far...depends on if a 3 prong plug was used), and for a desktop computer the earth ground is not available in any wiring coming out of the PSU--it is all isolated power/ground (aside from the case itself, which is tied to earth ground). I mention this to emphasize that for USB connected devices, there is no reliable opportunity for an intentional earth connection. The whole world of the USB connector consists of power, ground, shield, and the data lines.....there is no earth ground present as I've defined it. Put another way: a mechanical keyboard (nor a metal case of a mechanical keyboard) does not have normal access a safety ground (earth ground) through the USB connector. Thus, earthing itself is not an applicable concept for mechanical keyboards.
What is USB shielding (or more specifically, what is its purpose)? It is to mitigate incoming electromagnetic events from coupling onto the USB data lines, and to mitigate the emission of EMI from the USB data lines. On either end of the connector, it can/should be connected to the GND lines, albeit through an impedance (a ferrite or an RC) that only lets lower frequency stuff through. At the frequencies of ESD events, the shield-to-GND impedances will look more like short circuits. So put a ferrite between them to stop high frequency (signaling) noise, but at DC, the GND and shield are essentially the same.
What is an ESD strike? It is when a difference in static charge buildup (normally from a human touching it, but could be from anything really) causes a large potential difference to show up on a metal surface. Discharges can happen to the case or to any of the USB pins (power, gnd, shield, or data lines). Unmanaged discharges to any one of these will result in a large voltage spike (either positive or negative) relative to the others. This large voltage differential is what causes damage to electronic components. To protect against this, we use TVSes, which clamp the relative voltages to reasonable levels. TVSes can only limit these relative voltages though....if you hook a metal keyboard circuit up to a Van de Graff generator, the electronics will all be sitting at very large voltages (relative to earth ground), but they'll be there together and happy, not breaking anything. With reasonable isolation from AC mains at the USB host, the host will also be at a high potential relative to earth ground, but should otherwise be happy and content.

So, from those definitions, what can be concluded? (Note, I know I'm covering probably obvious stuff but I'm trying to ensure nothing is missed)
-The metal case of a keyboard really has only two fundamental options connection-wise: connect to USB GND or don't connect to USB GND. And just to state it for completeness, a plastic (or otherwise insulative) case is unable to make a useful connection to anything, so ESD discharge to a plastic case is a non-issue.
--If we elect connect the metal case to USB GND, then we have this big hunk of metal hanging off the GND rail. In the event of an ESD strike on the case, the USB GND will see a transient, TVSes will do their TVS thing, and the whole circuit (and the upstream host) goes for a high voltage ride together transiently, but nothing will break. In this situation of an ESD strike, having one connection or many makes no practical difference (aside from electromechanical contact reliability), because there is no current loop whatsoever. That is, for an ESD strike, there is no current loop, no ground loop...just unidirectional current flows from static sources that never return. Thus, multiple connection points don't cause a problem for ESD discharges, but can only serve to increase the reliability of the electromechanical connection.
--In the other option, if we don't connect the case to USB GND, the entire case takes the brunt of the ESD discharge, voltage goes sky high on the case relative to everything else transiently, and either (1) the electrons dissipate over time through various high impedances like the surface of the desk or (2) they find a place to arc over to the traces on the board(s), where hopefully some TVSes are standing by to clamp. Given those two options, having a hard tie to case is preferred as you then know the path the ESD currents will take, and you are prepared to adequately clamp it (instead of having to put TVSes on all traces that go near the metal of the case).

But what about currents from normal USB power? If there are multiple connections to the case and the board uses a fairly solid copper plane, then yes, it is quite true that some amount of current will prefer to flow through the parallel path(s) provided by the mounting holes and the case. As this current flow can be fully accounted for (that is, current isn't incentivized to go elsewhere), the consequences of this are very limited; you will have a very small voltage potential across some mounting holes at worst. However, as you suggest, it is still a ground loop, or a parallel return current path. So I would propose a third option that offers the increased reliability of multiple connections, and also eliminates the potential for uncontrolled ground current flowing through the mounting holes: tie the mounting holes all to each other (and only each other) through a copper perimeter, and then provide a single trace from the GND traces to the ganged-together mounting hole copper. This single trace shared among the four mounting holes would ensure that zero USB ground current flows through the mounting holes, yet provides increased reliability for ESD currents that come in from the case (or for more flexible assembly configuration where fewer mounting holes are actually used).

Additional observations:
-Mechanical keyboards have no responsibility to protect upstream ports from ESD. A common mode shift (where all lines are shifted to a high potential, as with the Van de Graff generator situation) on a USB device will propagate that common mode shift to the USB host, and the host will have its own precautions to manage such occurrences (specifically: USB ESD protection to prevent damage to components and possibly high resistances in the power supply across which excess static charge can safely bleed off to neutral and/or earth grounds).
-The ferrite bead does not play a role in ESD suppression. Even if there were a slight delay of an ESD transient applied to GND, this is of no consequence, the ESD strike will still play out basically the same as it would have without the ferrite, because the ferrite only stops frequencies in the MHz domain.

I'm not sure what is implied in reference to the hazard to the user, and what is meant by user ESD safety; are you suggesting that the user could be shocked electrically, and that this circuit can somehow help mitigate that? I am curious what scenario is envisioned where this could occur. If the user shuffles their feet on the carpet a lot and touches anything conductive (metal case of a keyboard, metal case of a computer, another person, etc.) they are going to be subject to a small shock regardless; I don't see how this is preventable. The only responsibility we have is to clamp that voltage and protect the mechanical keyboard internal electronics. To shock the user in any manner will require more than 5V, which no normal mechanical keyboard should be doing anyway, as it won't have access to anything more than 5V through the USB connection.

Again, thank you for even just taking the time to consider my recommendations. Any feedback is very welcome; I figure if we're all going to use be using a common, unified daughter board, then, it makes good sense to ensure the design is as robust as it can be.

[TweetyDaBird]

Is there any work being done on this?

I love the idea of a unified breakout board, and I'd want to incorporate support for it in a few designs, but I'm a bit hesitant to start from a design where I can see obvious flaws in the design. Especially ones pointed out where I see no work for close to a year.

I'd be more than willing to submit updates for the design if it's welcomed, but I see no point in people doing the same work twice.

[David-customMK]

I haven't made any updates outside of what is contained in my pull request. Gondolindrim and I have had a few attempts at follow up discussions since then, but there has been no full resolution that has brought us into 100% agreement thus far (to my knowledge).

Fortunately, the issues where we see differently don't make much difference in practice; they are things that might come up if you must to meet fairly rigorous requirements than what most custom mechanical keyboards undergo (e.g. FCC testing, or high-speed USB data transfer rates). For the vast majority of keyboard applications, you can use either design without consequence.

That said, I am interested in better understanding the obvious flaws you mention; if they are problematic in my pull request as well, I'd like to make updates to correct any such flaws. If you are referring to issues that I raised, it wouldn't hurt to have more input and understanding of what you consider needing to be addressed the most. Also, if you prefer to discuss your thoughts in a more informal setting, the Keyboard Atelier discord server pcb-discussion channel is a great place for that.

[Gondolindrim]

Is there any work being done on this?

I love the idea of a unified breakout board, and I'd want to incorporate support for it in a few designs, but I'm a bit hesitant to start from a design where I can see obvious flaws in the design. Especially ones pointed out where I see no work for close to a year.

I'd be more than willing to submit updates for the design if it's welcomed, but I see no point in people doing the same work twice.

Yes, me and David are in talks for C4. I can assure you C3 was run through eye diagram, EMI and ESD tests and it is perfectly usable and was shipped by the thousands in recent projects

[TweetyDaBird]

Is there any work being done on this?
I love the idea of a unified breakout board, and I'd want to incorporate support for it in a few designs, but I'm a bit hesitant to start from a design where I can see obvious flaws in the design. Especially ones pointed out where I see no work for close to a year.
I'd be more than willing to submit updates for the design if it's welcomed, but I see no point in people doing the same work twice.

Yes, me and David are in talks for C4. I can assure you C3 was run through eye diagram, EMI and ESD tests and it is perfectly usable and was shipped by the thousands in recent projects

Oh, I'm quite confident it works as is, and it most certainly has better protection than the average mech keyboard (cheap china ones are outright abysmal!) But I think we all agree there is room for improvement.

One of my main points would be that being concerned about users plugging thing in the wrong way is perfectly fine, but it shouldn't compromise the ESD/EMI side of things. Users will forever finds ways to make a perfectly working design misbehave somehow.

Is sort of took a halfhearted stab at it, and quickly found that I could get the USB signals a lot cleaner and in a single layer, but it requires swapping the pins on the connector and running a cable with opposing contacts. And since that's a 'breaking change', meaning I'd not want to fork out on my own if I could rather influence you guys, and we get a C4 design that I'm happy to use.