timing closure for hosted revision

[ssa-tii]

Hello,

I built latest commit [9fc57e6] for hosted revision and found timing violations:

• setup in rx_clock domain
• recovery in pclk domain

See resulting static timing analysis report (hosted.sta.zip)

The recovery violation can be fixed by correcting false_path objects in bladerf.sdc (see bladerf.zip attachment), but the setup violation of ~2ns for the slow corner means reducing rx_clock to 46.8M samples/sec.

Quartus version 17.1

Versions of ALTLVDS_RX and ALTLVDS_TX : v17.1.0 Build 590 SJ Lite Edition.

Could you please clarify if this is expected behavior. We have some improvements to setup timing (-1ns) (by modifying Quartus optimization settings) and can raise a pull request if desired.

Static timing analysis report (hosted.sta.zip)
bladerf.sdc (bladerf.zip)

[rghilduta]

@ssa-tii we're looking at potentially updating the SDC. Curious if you had a pull request for the false_path and rx_clock you mentioned? Also, the timing closure values may differ a bit with a newer version of Quartus, I'd suggest using at least version 20.