From b312c751ad3e9dc6d330c61d9fbfcf0d0eeaaf33 Mon Sep 17 00:00:00 2001 From: Jean Minet Date: Sun, 23 Apr 2017 19:18:37 +0200 Subject: [PATCH 1/6] try updating to Vivado 2047.1: ethernet not working --- Makefile | 2 +- boards/red-pitaya/patches/devicetree.patch | 66 +++++++++++----------- examples/cluster/redp_adc_dac_ext_clk.tcl | 2 +- fpga/fpga.mk | 2 +- fpga/install_vivado.sh | 21 +------ fpga/lib/redp_adc_dac.tcl | 2 +- os/os.mk | 16 +++--- 7 files changed, 50 insertions(+), 61 deletions(-) diff --git a/Makefile b/Makefile index 45ccce0b2..a774f69cc 100644 --- a/Makefile +++ b/Makefile @@ -12,7 +12,7 @@ HOST ?= 192.168.1.100 TMP ?= tmp KOHERON_VERSION := 0.14.0 -VIVADO_VERSION := 2016.4 +VIVADO_VERSION := 2017.1 .PHONY: help help: diff --git a/boards/red-pitaya/patches/devicetree.patch b/boards/red-pitaya/patches/devicetree.patch index 1defe6846..4681acf95 100644 --- a/boards/red-pitaya/patches/devicetree.patch +++ b/boards/red-pitaya/patches/devicetree.patch @@ -1,42 +1,18 @@ ---- system.dts.old -+++ system.dts -@@ -17,6 +17,13 @@ - chosen { - bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 ro rootfstype=ext4 earlyprintk rootwait"; - }; -+ usb_phy0: phy0 { -+ #phy-cells = <0>; -+ compatible = "ulpi-phy"; -+ reg = <0xe0002000 0x1000>; -+ view-port = <0x0170>; -+ drv-vbus; -+ }; - aliases { - ethernet0 = &gem0; - serial0 = &uart0; -@@ -27,7 +34,7 @@ - }; - memory { - device_type = "memory"; -- reg = <0x0 0x20000000>; -+ reg = <0x0 0x1E000000>; - }; - }; - &gem0 { -@@ -45,6 +52,12 @@ +diff -rupN devicetree.old/pcw.dtsi devicetree/pcw.dtsi +--- devicetree.old/pcw.dtsi ++++ devicetree/pcw.dtsi +@@ -25,6 +25,10 @@ + &i2c0 { clock-frequency = <400000>; status = "okay"; - }; -+&i2c0 { + eep@50 { + compatible = "24c64"; + reg = <0x50>; + }; -+}; + }; &intc { num_cpus = <2>; - num_interrupts = <96>; -@@ -64,11 +77,21 @@ +@@ -45,11 +49,21 @@ is-decoded-cs = <0>; num-cs = <3>; status = "okay"; @@ -58,7 +34,7 @@ }; &uart0 { device_type = "serial"; -@@ -82,9 +105,9 @@ +@@ -63,9 +77,9 @@ }; &usb0 { dr_mode = "host"; @@ -70,3 +46,29 @@ }; &clkc { fclk-enable = <0x1>; +diff -rupN devicetree.old/system-top.dts devicetree/system-top.dts +--- devicetree.old/system-top.dts ++++ devicetree/system-top.dts +@@ -14,6 +14,13 @@ + bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 ro rootfstype=ext4 earlyprintk rootwait earlycon"; + stdout-path = "serial0:115200n8"; + }; ++ usb_phy0: phy0 { ++ #phy-cells = <0>; ++ compatible = "ulpi-phy"; ++ reg = <0xe0002000 0x1000>; ++ view-port = <0x0170>; ++ drv-vbus; ++ }; + aliases { + ethernet0 = &gem0; + serial0 = &uart0; +@@ -24,7 +31,7 @@ + }; + memory { + device_type = "memory"; +- reg = <0x0 0x20000000>; ++ reg = <0x0 0x1E000000>; + }; + cpus { + }; diff --git a/examples/cluster/redp_adc_dac_ext_clk.tcl b/examples/cluster/redp_adc_dac_ext_clk.tcl index d4a632ba5..42f90f57d 100644 --- a/examples/cluster/redp_adc_dac_ext_clk.tcl +++ b/examples/cluster/redp_adc_dac_ext_clk.tcl @@ -15,7 +15,7 @@ proc add_redp_adc_dac {module_name} { # Mixed-mode clock manager - cell xilinx.com:ip:clk_wiz:5.3 mmcm { + cell xilinx.com:ip:clk_wiz:5.4 mmcm { PRIMITIVE MMCM PRIM_IN_FREQ.VALUE_SRC USER PRIM_IN_FREQ 125.0 diff --git a/fpga/fpga.mk b/fpga/fpga.mk index e049d2afd..cd6f9a996 100644 --- a/fpga/fpga.mk +++ b/fpga/fpga.mk @@ -7,7 +7,7 @@ $(TMP_FPGA_PATH): BOARD_PATH := $(shell $(MAKE_PY) --board $(CONFIG) $(TMP_FPGA_PATH)/board && cat $(TMP_FPGA_PATH)/board) PART := $(shell cat $(BOARD_PATH)/PART) -VIVADO := source $(FPGA_PATH)/settings.sh && vivado -nolog -nojournal +VIVADO := source /opt/Xilinx/Vivado/$(VIVADO_VERSION)/settings64.sh && vivado -nolog -nojournal VIVADO_BATCH := $(VIVADO) -mode batch $(MEMORY_YML): $(CONFIG) diff --git a/fpga/install_vivado.sh b/fpga/install_vivado.sh index 132a1ab27..01a25288d 100644 --- a/fpga/install_vivado.sh +++ b/fpga/install_vivado.sh @@ -1,7 +1,7 @@ #!/usr/bin/env bash -vivado_release=2016.4 -vivado_version=${vivado_release}_1215_1 +vivado_release=2017.1 +vivado_version=${vivado_release}_0415_1 tar -xvzf Xilinx_Vivado_SDK_${vivado_version}.tar.gz @@ -25,19 +25,4 @@ EOF_CAT bash Xilinx_Vivado_SDK_${vivado_version}/xsetup --agree 3rdPartyEULA,WebTalkTerms,XilinxEULA --batch Install --config install_config.txt rm install_config.txt -rm -r Xilinx_Vivado_SDK_${vivado_version} - -## System version of glibc ## - -for folder in Vivado SDK -do - path=/opt/Xilinx/${folder}/${vivado_release}/lib/lnx64.o - mv $path/libstdc++.so.6 $path/libstdc++.so.6.orig - ln -s /usr/lib/x86_64-linux-gnu/libstdc++.so.6.0.21 $path/libstdc++.so.6 -done - -## awk issue ## - -path=/opt/Xilinx/Vivado/${vivado_release}/lib/lnx64.o -mv $path/libmpfr.so.4 $path/libmpfr.so.4.orig -ln -s /usr/lib/x86_64-linux-gnu/libmpfr.so.4 $path/libmpfr.so.4 +rm -r Xilinx_Vivado_SDK_${vivado_version} \ No newline at end of file diff --git a/fpga/lib/redp_adc_dac.tcl b/fpga/lib/redp_adc_dac.tcl index ba708e1e2..5282e1e57 100644 --- a/fpga/lib/redp_adc_dac.tcl +++ b/fpga/lib/redp_adc_dac.tcl @@ -12,7 +12,7 @@ proc add_redp_adc_dac {module_name} { create_bd_pin -dir O pwm_clk # Phase-locked Loop (PLL) - cell xilinx.com:ip:clk_wiz:5.3 pll { + cell xilinx.com:ip:clk_wiz:5.4 pll { PRIMITIVE PLL PRIM_IN_FREQ.VALUE_SRC USER PRIM_IN_FREQ 125.0 diff --git a/os/os.mk b/os/os.mk index 81387b67f..df3fe3eeb 100644 --- a/os/os.mk +++ b/os/os.mk @@ -6,7 +6,7 @@ PATCHES := $(BOARD_PATH)/patches PROC := ps7_cortexa9_0 -HSI := source $(FPGA_PATH)/settings.sh && hsi -nolog -nojournal -mode batch +HSI := source /opt/Xilinx/Vivado/$(VIVADO_VERSION)/settings64.sh && hsi -nolog -nojournal -mode batch BOOTGEN := source $(FPGA_PATH)/settings.sh && bootgen BOARD := $(shell basename $(BOARD_PATH)) @@ -14,7 +14,9 @@ BOARD := $(shell basename $(BOARD_PATH)) # Linux and U-boot UBOOT_TAG := koheron-$(BOARD)-v$(VIVADO_VERSION) LINUX_TAG := koheron-$(BOARD)-v$(VIVADO_VERSION) -DTREE_TAG := xilinx-v$(VIVADO_VERSION) +DTREE_TAG := master +#xilinx-v2016.4 + #$(VIVADO_VERSION) TMP_OS_PATH := $(TMP_PROJECT_PATH)/os @@ -101,13 +103,13 @@ $(DTREE_PATH): $(DTREE_TAR) @echo [$@] OK .PHONY: devicetree -devicetree: $(TMP_OS_PATH)/devicetree/system.dts +devicetree: $(TMP_OS_PATH)/devicetree/system-top.dts -$(TMP_OS_PATH)/devicetree/system.dts: $(TMP_FPGA_PATH)/$(NAME).hwdef $(DTREE_PATH) $(PATCHES)/devicetree.patch +$(TMP_OS_PATH)/devicetree/system-top.dts: $(TMP_FPGA_PATH)/$(NAME).hwdef $(DTREE_PATH) $(PATCHES)/devicetree.patch mkdir -p $(@D) $(HSI) -source $(FPGA_PATH)/hsi/devicetree.tcl -tclargs $(NAME) $(PROC) $(DTREE_PATH) $(VIVADO_VERSION) \ $(TMP_OS_PATH)/hard $(TMP_OS_PATH)/devicetree $(TMP_FPGA_PATH)/$(NAME).hwdef - patch $@ $(PATCHES)/devicetree.patch + patch -d $(TMP_OS_PATH) -p -0 < $(PATCHES)/devicetree.patch @echo [$@] OK ############################################################################### @@ -133,9 +135,9 @@ $(TMP_OS_PATH)/uImage: $(LINUX_PATH) cp $ Date: Mon, 19 Jun 2017 15:19:55 +0200 Subject: [PATCH 2/6] use xilinx-v2017.1 for device tree --- os/os.mk | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/os/os.mk b/os/os.mk index df3fe3eeb..dc7389e0b 100644 --- a/os/os.mk +++ b/os/os.mk @@ -14,9 +14,7 @@ BOARD := $(shell basename $(BOARD_PATH)) # Linux and U-boot UBOOT_TAG := koheron-$(BOARD)-v$(VIVADO_VERSION) LINUX_TAG := koheron-$(BOARD)-v$(VIVADO_VERSION) -DTREE_TAG := master -#xilinx-v2016.4 - #$(VIVADO_VERSION) +DTREE_TAG := xilinx-v$(VIVADO_VERSION) TMP_OS_PATH := $(TMP_PROJECT_PATH)/os From 33557d4c22f42bc9de117a58b462e80b69bc3e8e Mon Sep 17 00:00:00 2001 From: Jean Minet Date: Mon, 19 Jun 2017 16:28:04 +0200 Subject: [PATCH 3/6] add devicetree.patch for Zedboard Vivado 2017.1 --- boards/zedboard/patches/devicetree.patch | 38 +++++++++++++----------- 1 file changed, 21 insertions(+), 17 deletions(-) diff --git a/boards/zedboard/patches/devicetree.patch b/boards/zedboard/patches/devicetree.patch index 9fb072833..a1ecf9fee 100644 --- a/boards/zedboard/patches/devicetree.patch +++ b/boards/zedboard/patches/devicetree.patch @@ -1,20 +1,7 @@ ---- system.dts.old -+++ system.dts -@@ -21,11 +21,11 @@ - ethernet0 = &gem0; - serial0 = &uart1; - spi0 = &qspi; -- spi1 = &spi0; -+ spi2 = &spi0; - }; - memory { - device_type = "memory"; -- reg = <0x0 0x20000000>; -+ reg = <0x0 0x1E000000>; - }; - }; - &gem0 { -@@ -58,6 +58,11 @@ +diff -rupN devicetree.old/pcw.dtsi devicetree/pcw.dtsi +--- devicetree.old/pcw.dtsi ++++ devicetree/pcw.dtsi +@@ -45,6 +45,11 @@ is-decoded-cs = <0>; num-cs = <3>; status = "okay"; @@ -26,3 +13,20 @@ }; &uart1 { device_type = "serial"; +diff -rupN devicetree.old/system-top.dts devicetree/system-top.dts +--- devicetree.old/system-top.dts ++++ devicetree/system-top.dts +@@ -18,11 +18,11 @@ + ethernet0 = &gem0; + serial0 = &uart1; + spi0 = &qspi; +- spi1 = &spi0; ++ spi2 = &spi0; + }; + memory { + device_type = "memory"; +- reg = <0x0 0x20000000>; ++ reg = <0x0 0x1E000000>; + }; + cpus { + }; From 8ddc0524bcab33671f62001704becf7f871edb44 Mon Sep 17 00:00:00 2001 From: Jean Minet Date: Tue, 20 Jun 2017 20:42:18 +0200 Subject: [PATCH 4/6] update README for Vivado 2017.1 --- README.md | 2 +- build_examples.sh | 2 +- python/koheron/version.py | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/README.md b/README.md index 5fc99fe1e..ddbb5ca12 100644 --- a/README.md +++ b/README.md @@ -9,7 +9,7 @@ ## Getting started -1. [Install Vivado 2016.4](https://koheron.com/software-development-kit/documentation/setup-development-machine) +1. [Install Vivado 2017.1](https://koheron.com/software-development-kit/documentation/setup-development-machine) 2. Install required packages diff --git a/build_examples.sh b/build_examples.sh index a93a7e6ea..bdc2824e2 100644 --- a/build_examples.sh +++ b/build_examples.sh @@ -2,7 +2,7 @@ set -e target=$1 -mode=production +mode=development make CONFIG=examples/led-blinker/config.yml MODE=$mode $target make CONFIG=examples/oscillo/config.yml MODE=$mode $target diff --git a/python/koheron/version.py b/python/koheron/version.py index 92f67b29a..03ac58cd4 100644 --- a/python/koheron/version.py +++ b/python/koheron/version.py @@ -1,2 +1,2 @@ -version_info = (0, 14, 3) +version_info = (0, 15, 0) __version__ = '.'.join(str(v) for v in version_info) From 1237e33f8f3f4c695a5159872f4c3ac4ffe2ead4 Mon Sep 17 00:00:00 2001 From: Jean Minet Date: Tue, 20 Jun 2017 22:52:47 +0200 Subject: [PATCH 5/6] reduce some clock speeds for timing in Vivado 2017.1 --- examples/decimator/config.yml | 2 +- examples/oscillo/config.yml | 2 +- examples/pulse-generator/config.yml | 2 +- examples/spectrum/config.yml | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/examples/decimator/config.yml b/examples/decimator/config.yml index bd0733455..bd3eb8b10 100644 --- a/examples/decimator/config.yml +++ b/examples/decimator/config.yml @@ -28,7 +28,7 @@ status_registers: - adc[n_adc] parameters: - fclk0: 200000000 + fclk0: 166666667 adc_clk: 125000000 adc_width: 14 dac_width: 14 diff --git a/examples/oscillo/config.yml b/examples/oscillo/config.yml index aa4b7b45f..e71994ae0 100644 --- a/examples/oscillo/config.yml +++ b/examples/oscillo/config.yml @@ -8,7 +8,7 @@ board: boards/red-pitaya parameters: fclk0: 200000000 - fclk1: 200000000 + fclk1: 166666667 sampling_rate: 125000000 wfm_size: 8192 dac_width: 14 diff --git a/examples/pulse-generator/config.yml b/examples/pulse-generator/config.yml index 53d61d410..46e4f402d 100644 --- a/examples/pulse-generator/config.yml +++ b/examples/pulse-generator/config.yml @@ -35,7 +35,7 @@ status_registers: - count parameters: - fclk0: 200000000 + fclk0: 166666667 bram_addr_width: 13 dac_width: 14 adc_width: 14 diff --git a/examples/spectrum/config.yml b/examples/spectrum/config.yml index 2a062210e..92480bd48 100644 --- a/examples/spectrum/config.yml +++ b/examples/spectrum/config.yml @@ -62,7 +62,7 @@ status_registers: parameters: fclk0: 200000000 - fclk1: 187500000 + fclk1: 166666667 sampling_rate: 125000000 wfm_size: 4096 dac_width: 14 From 5ff7ba66bfcc74681a3672486235bb33d9daaab4 Mon Sep 17 00:00:00 2001 From: Jean Minet Date: Tue, 20 Jun 2017 22:53:13 +0200 Subject: [PATCH 6/6] fix zedboard-picoblaze web --- examples/zedboard-picoblaze/config.yml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/examples/zedboard-picoblaze/config.yml b/examples/zedboard-picoblaze/config.yml index f0d8a6fa4..4bc40fb16 100644 --- a/examples/zedboard-picoblaze/config.yml +++ b/examples/zedboard-picoblaze/config.yml @@ -36,3 +36,6 @@ xdc: drivers: - server/drivers/common.hpp - ./picoblaze.hpp + +web: + - web/index.html