{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":131925641,"defaultBranch":"master","name":"PipelineC","ownerLogin":"JulianKemmerer","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2018-05-03T01:35:25.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/4951894?v=4","public":true,"private":false,"isOrgOwned":false},"refInfo":{"name":"","listCacheKey":"v0:1712711691.0","currentOid":""},"activityList":{"items":[{"before":"aabf183a10498376b390055bc3119ef5f08fb607","after":"ca3c3e622d1b67d3d1dd98e59adc87d64b0248dc","ref":"refs/heads/master","pushedAt":"2024-05-19T16:30:25.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv pipeline and frame buf dataflow with bouncing ball shader working","shortMessageHtmlLink":"barrel riscv pipeline and frame buf dataflow with bouncing ball shade…"}},{"before":"a99a5e4eb91dd11c033096f32428dfb7a691be85","after":"aabf183a10498376b390055bc3119ef5f08fb607","ref":"refs/heads/master","pushedAt":"2024-05-19T02:27:32.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf shader as dataflow network computation working","shortMessageHtmlLink":"barrel riscv frame buf shader as dataflow network computation working"}},{"before":"178ec829f08ec2a59324e25c82864016323a33b9","after":"a99a5e4eb91dd11c033096f32428dfb7a691be85","ref":"refs/heads/master","pushedAt":"2024-05-12T21:18:16.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf with bouncing ball shader pipeline working","shortMessageHtmlLink":"barrel riscv frame buf with bouncing ball shader pipeline working"}},{"before":"5ec0258cae9bf18d2073be2fb59b4a29b3cd98e0","after":"178ec829f08ec2a59324e25c82864016323a33b9","ref":"refs/heads/master","pushedAt":"2024-05-12T02:38:39.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf with test pattern hardware pipeline working","shortMessageHtmlLink":"barrel riscv frame buf with test pattern hardware pipeline working"}},{"before":"8eb7a6f816ed1d87357250272456071fc946600f","after":"5ec0258cae9bf18d2073be2fb59b4a29b3cd98e0","ref":"refs/heads/master","pushedAt":"2024-05-08T04:38:32.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf -O3 works same as -O2 but faster same glitch","shortMessageHtmlLink":"barrel riscv frame buf -O3 works same as -O2 but faster same glitch"}},{"before":"1eff921e4a7b87f06b22d7ef74825ffaf0a6df53","after":"8eb7a6f816ed1d87357250272456071fc946600f","ref":"refs/heads/master","pushedAt":"2024-05-08T02:36:59.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf -O2 bouncing ball working","shortMessageHtmlLink":"barrel riscv frame buf -O2 bouncing ball working"}},{"before":"b3ff384f773b9a909c04c7627d437a569ad0cfb7","after":"1eff921e4a7b87f06b22d7ef74825ffaf0a6df53","ref":"refs/heads/master","pushedAt":"2024-05-06T21:19:13.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel frame bug demo changing over time works again, something with O3","shortMessageHtmlLink":"riscv barrel frame bug demo changing over time works again, something…"}},{"before":"6fc46b2a9a2d4b0860159d2c0b72b06f04fe42e8","after":"b3ff384f773b9a909c04c7627d437a569ad0cfb7","ref":"refs/heads/master","pushedAt":"2024-05-06T17:20:24.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf 480p test working, still mixed rgb order and something with -O3 maybe","shortMessageHtmlLink":"barrel riscv frame buf 480p test working, still mixed rgb order and s…"}},{"before":"bc395b5640467b3e042f2005032f9adb33363c21","after":"6fc46b2a9a2d4b0860159d2c0b72b06f04fe42e8","ref":"refs/heads/master","pushedAt":"2024-05-06T02:43:08.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf test burst read entire lines works TODO fix rbg ordering","shortMessageHtmlLink":"barrel riscv frame buf test burst read entire lines works TODO fix rb…"}},{"before":"29c9bd67a8cd3619b283ddb8de9c3b5513a90c81","after":"bc395b5640467b3e042f2005032f9adb33363c21","ref":"refs/heads/master","pushedAt":"2024-05-05T11:54:43.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel multi word burst like reads and writes working","shortMessageHtmlLink":"riscv barrel multi word burst like reads and writes working"}},{"before":"9e916817025070fbb04bfabc4f9d55061d999c7c","after":"29c9bd67a8cd3619b283ddb8de9c3b5513a90c81","ref":"refs/heads/master","pushedAt":"2024-05-03T15:57:30.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv frame buf increase ddr vga fifos and change axi rd priority logic to spend less time on idle priority port","shortMessageHtmlLink":"barrel riscv frame buf increase ddr vga fifos and change axi rd prior…"}},{"before":"0e9695f502a86a7f4ab0c8332750b4014a6afcdd","after":"9e916817025070fbb04bfabc4f9d55061d999c7c","ref":"refs/heads/master","pushedAt":"2024-05-03T02:39:41.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv fix missing upper sign bit of branch offset","shortMessageHtmlLink":"riscv fix missing upper sign bit of branch offset"}},{"before":"41023e388a2b952174df8335e59f27a91f0c2c90","after":"0e9695f502a86a7f4ab0c8332750b4014a6afcdd","ref":"refs/heads/master","pushedAt":"2024-05-02T22:12:18.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv separate leds for error flags","shortMessageHtmlLink":"barrel riscv separate leds for error flags"}},{"before":"31c3a413ef22b58d16f36599b1c9ed1cf236eae0","after":"41023e388a2b952174df8335e59f27a91f0c2c90","ref":"refs/heads/master","pushedAt":"2024-05-02T04:14:11.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel frame buf test make loop have threads accessing more local data. use test pattern instead of black and white.","shortMessageHtmlLink":"riscv barrel frame buf test make loop have threads accessing more loc…"}},{"before":"6af15d942dae6f73af924372b90c1edc54aeb8e8","after":"31c3a413ef22b58d16f36599b1c9ed1cf236eae0","ref":"refs/heads/master","pushedAt":"2024-05-02T02:06:08.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv ddr frame buf add extra fifo so vga reading stall doesnt block front of line coming out of mem controller","shortMessageHtmlLink":"barrel riscv ddr frame buf add extra fifo so vga reading stall doesnt…"}},{"before":"e9d692678ea9b3fa2d5e9b382e5e446b7b508cea","after":"6af15d942dae6f73af924372b90c1edc54aeb8e8","ref":"refs/heads/master","pushedAt":"2024-05-01T03:10:39.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"Xil cdc xpm is FUNC_WIRES","shortMessageHtmlLink":"Xil cdc xpm is FUNC_WIRES"}},{"before":"d0b3a7319e223c2aa1e0096cf9b17425484d70c4","after":"e9d692678ea9b3fa2d5e9b382e5e446b7b508cea","ref":"refs/heads/master","pushedAt":"2024-04-30T23:47:25.000Z","pushType":"push","commitsCount":2,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv use O3 for gcc and small code changes to use some pointers for about ~5x reduction in number of instructions to do reads and writes","shortMessageHtmlLink":"barrel riscv use O3 for gcc and small code changes to use some pointe…"}},{"before":"086a1afabee2c3ef54c28bffb8e0122c1f6ed566","after":"d0b3a7319e223c2aa1e0096cf9b17425484d70c4","ref":"refs/heads/master","pushedAt":"2024-04-29T04:09:53.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel add more helper funcs for async ram access","shortMessageHtmlLink":"riscv barrel add more helper funcs for async ram access"}},{"before":"737ef870868dd2581833eae91be63175c2ff2371","after":"086a1afabee2c3ef54c28bffb8e0122c1f6ed566","ref":"refs/heads/master","pushedAt":"2024-04-28T23:56:05.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel improve ram read and write funcs and also inline helper funcs is slightly faster","shortMessageHtmlLink":"riscv barrel improve ram read and write funcs and also inline helper …"}},{"before":"4bb813f46ef8120c07493c9160d54da877e47f34","after":"737ef870868dd2581833eae91be63175c2ff2371","ref":"refs/heads/master","pushedAt":"2024-04-28T19:47:04.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel frame buf changing over time works","shortMessageHtmlLink":"riscv barrel frame buf changing over time works"}},{"before":"9112cf0c6ea06048a07e6e72143979a0ce93e4ac","after":"4bb813f46ef8120c07493c9160d54da877e47f34","ref":"refs/heads/master","pushedAt":"2024-04-28T19:30:43.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv ddr dual frame buf works","shortMessageHtmlLink":"riscv ddr dual frame buf works"}},{"before":"91d0ac407ad96c81b50b6da6d08966ea2c272810","after":"9112cf0c6ea06048a07e6e72143979a0ce93e4ac","ref":"refs/heads/master","pushedAt":"2024-04-28T16:23:17.000Z","pushType":"push","commitsCount":3,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv frame buf demo use u32 for pixel addr math not u16","shortMessageHtmlLink":"riscv frame buf demo use u32 for pixel addr math not u16"}},{"before":"470a63749a0e916583606d003c221939e28a40c9","after":"91d0ac407ad96c81b50b6da6d08966ea2c272810","ref":"refs/heads/master","pushedAt":"2024-04-27T15:01:49.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"Add xilinx cdc xpm for single bit","shortMessageHtmlLink":"Add xilinx cdc xpm for single bit"}},{"before":"3547ed7fbabca71f1f1a858a7a98e5cd89ad0357","after":"470a63749a0e916583606d003c221939e28a40c9","ref":"refs/heads/master","pushedAt":"2024-04-26T23:28:56.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel ddr dual frame buf seems working","shortMessageHtmlLink":"riscv barrel ddr dual frame buf seems working"}},{"before":"1cb237fed53290431e852894e77a6d928b956135","after":"3547ed7fbabca71f1f1a858a7a98e5cd89ad0357","ref":"refs/heads/master","pushedAt":"2024-04-26T18:29:59.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel single frame buf in ddr works","shortMessageHtmlLink":"riscv barrel single frame buf in ddr works"}},{"before":"f47371607eba5249b06a8a7aff45ae3fc0082e97","after":"1cb237fed53290431e852894e77a6d928b956135","ref":"refs/heads/master","pushedAt":"2024-04-25T18:19:40.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel initial thread frame sync working","shortMessageHtmlLink":"riscv barrel initial thread frame sync working"}},{"before":"1391fa5cbb445d994c12f90cb696eda2c7d88927","after":"f47371607eba5249b06a8a7aff45ae3fc0082e97","ref":"refs/heads/master","pushedAt":"2024-04-25T00:41:57.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv barrel scale to initial demo with shared frame buffer","shortMessageHtmlLink":"riscv barrel scale to initial demo with shared frame buffer"}},{"before":"1d8799f41f34d54b9f72e6e9ead74cc87d9a7732","after":"1391fa5cbb445d994c12f90cb696eda2c7d88927","ref":"refs/heads/master","pushedAt":"2024-04-24T02:32:42.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"riscv: implement most of rv32i. add read byte enable control bits. Use read enables for partial word loads and sign extend. add 1 cycle block ram version of main memory. organize reg wr data select and branch math into helper funcs.","shortMessageHtmlLink":"riscv: implement most of rv32i. add read byte enable control bits. Us…"}},{"before":"c1cacfc96f62857e8ac38478a0ec70645ba95adb","after":"1d8799f41f34d54b9f72e6e9ead74cc87d9a7732","ref":"refs/heads/master","pushedAt":"2024-04-19T22:13:22.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv do manual pipelining until auto pipeling is needed","shortMessageHtmlLink":"barrel riscv do manual pipelining until auto pipeling is needed"}},{"before":"5703c3b62dd44c40bdf8eb09971895ac2fc3d006","after":"c1cacfc96f62857e8ac38478a0ec70645ba95adb","ref":"refs/heads/master","pushedAt":"2024-04-19T03:43:25.000Z","pushType":"push","commitsCount":1,"pusher":{"login":"JulianKemmerer","name":"Julian Kemmerer","path":"/JulianKemmerer","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/4951894?s=80&v=4"},"commit":{"message":"barrel riscv multiple instances works in hardware, reorg to be less nested loops which is faster to compile too","shortMessageHtmlLink":"barrel riscv multiple instances works in hardware, reorg to be less n…"}}],"hasNextPage":true,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAETicqGAA","startCursor":null,"endCursor":null}},"title":"Activity · JulianKemmerer/PipelineC"}