CHANGELOG

Version 00.018.000 (2015.10.01)
 - Simplified Graphics Display Generator removing 8 bit mode and some unused
   or less useful features in the remaining 4 bit mode.
 - Graphics Display Generator 4 bit mode was expanded to support a total of 64
   colors with palette selectors.
 - Graphics Display Generator got an X expansion feature making it possible to
   use wide pixel sprites or modes (such as 320x200 with double scanning).
 - Support for 8 bit mode was removed from the Accelerator.
 - Some changes in the User Library reflecting the removal of the 8 bit mode.
 - New, simpler event based input concept, completely redesigning the input
   interface.
 - 16 bit audio output accompanied with a redesigned Mixer.


Version 00.017.000 (2015.07.12)
 - New PSH (Push) and POP instructions for loading and storing multiple
   registers from / to the stack, decreasing function prolog and epilog sizes
   and execution times.
 - Function calls (JFR, JFA and JSV) no longer traverse the parameter list
   again after return.
 - CPU timing updates including adding coarse implementation details in
   "impl_hw", causing roughly a 5% - 10% raise in usual throughput. Function
   entry and exit codes became notably faster (which are also simpler to
   emulate by interpreting emulators).


Version 00.016.000 (2015.03.11)
 - User Library size increased from 4 KWords to 8 KWords, moving the entry
   point table down to start at 0xE000.
 - New object-oriented concepts in the User Library, notably at the
   realization of interfaces (tileset interface redesign), also changing the
   names of some functions ("new" functions introduced).
 - Calling convention modified: C and X3 are zeroed unless a return value is
   produced in either.
 - Two new pointer setup functions for 16 bit PRAM pointers, also changing the
   naming conventions. Pointer setup functions no longer produce return in C.
 - Font management refined, adding a larger, UTF capable font.
 - Printf and related character reader and writer infrastructure added.
 - CPU RAM data rearranged so User Library provided objects generate 1 word
   literals in function calls.
 - Accelerator destination partition size moved from 0x8014 to 0x8002, into
   the destination bank select, to completely separate source and destination
   configurations. Registers are renamed accordingly.
 - Mixer partitioning and bank selection registers are reorganized to seperate
   source and destination configurations (similarly to the Accelerator).
 - FIFO skip feature changed: now bit 15 set written to address skips.
 - Reordered instruction set along with removing the "ADD sp, adr" and the
   "SUB sp, adr" instructions. Otherwise source compatibility is retained.
 - Added special immediate encodings for register loads (MOV), function
   parameters and SP loads, reducing binary size.
 - JMR and JMA now can load PC into a register, providing support for "light"
   subroutines.
 - RFN now can load X3 and optionally zero C to produce return value.
 - New JNZ instruction jumping if its register operand is nonzero.
 - New skips for the Stack Pointer providing better support for variable
   number of arguments.
 - Sub-word memory addressing scheme changed to provide fractional bits (the
   XH register renamed to XB, referring to pointer fractional bits).
 - JSV changed to accept a service operand, kernel calls are re-allocated
   accordingly (the syntax of JSV is now similar to normal function calls).


Version 00.015.003 (2015.01.23)
 - Fast scrolling tile mapper added to the User Library.
 - Bug fixed in User Library Double Buffering Manager's initialization data,
   selecting wrong destination surface functions for hooks (ulboot.rst).


Version 00.015.002 (2015.01.10)
 - Destination surface got a function to retrieve width and partitioning
   (shifting some other functions upwards).
 - Tileset manager got a function to retrieve width and height.
 - Tile map manager added to the User Library, for assisting working with tile
   maps.


Version 00.015.001 (2015.01.04)
 - Tileset manager added to the User Library, for accelerator sprite and
   tile output.
 - A code page 437 compliant font binary added (fontdata.rst), to be used as
   a tileset for basic text output.


Version 00.015.000 (2014.12.29)
 - Device specific flags may be returned by kernel call 0x0410: Get device
   properties, currently suggesting whether a cursor should be displayed for
   pointing devices.
 - New kernel call: 0x0414: Get device name.
 - Kernel call 0x0412: Get digital input descriptor changed to return textual
   description of the input source.
 - New kernel call: 0x0413: Get analog input descriptor for a similar role
   like 0x0412.
 - Pressure input introduced for touch devices (better support for digitizing
   pads and similar devices).
 - User Library, double buffering (in dlist.rst) changed: us_dbuf_getsurface
   and us_dbuf_setsurface are removed, introducing a set of initialization
   hooks instead (also slightly altering CPU RAM layout).
 - User Library, destination surface (dsurf.rst) object introduced.


Version 00.014.000 (2014.12.09)
 - Accelerator revision and simplifications, discarding many non-practical
   setups which could complicate implementations.
 - A more appropriate polygon blit support is introduced.
 - Accelerator registers are re-ordered to fit better practical uses (such as
   sprite and tile blits).


Version 00.013.007 (2014.11.30)
 - Square root functions added to the math component in the User Library.


Version 00.013.006 (2014.11.29)
 - Math functions introduced in the User Library.


Version 00.013.005 (2014.11.25)
 - Fix in data descriptions: Using the musical logarithmic table 0x76 produces
   a 440Hz tone from a 256 byte (one period) sample.


Version 00.013.004 (2014.11.23)
 - Graphics Display Generator sprite system user library functions and data
   introduced.
 - Clarifications in the use of Double buffering manager hooks.


Version 00.013.003 (2014.11.19)
 - GitHub quirk work-around on project front-end page.


Version 00.013.002 (2014.11.19)
 - Front-end (README.rst) updates, also introducing SVG logos.
 - Revised cycle counts of some User Library functions.


Version 00.013.001 (2014.11.13)
 - Display list and graphics double buffering related functions and data
   introduced in the user library.
 - Length parameter of user library memory set functions clarified to use word
   units.


Version 00.013.000 (2014.11.06)
 - User Library fundamentals were started, low level pointer & memory
   management functions added.
 - Current video mode removed from the Application State (this information is
   found in the Display List Definition register of the GDG).


Version 00.012.002 (2014.11.04)
 - Stack initialization description fixed according to the data space stack
   support.


Version 00.012.001 (2014.11.02)
 - An additional level of file I/O support defined in the Application Header.
 - Clarified the operation of the Display List Definition latch in the GDG.
 - The Display List Definition & Process Flags register now also reports the
   current graphics mode.


Version 00.012.000 (2014.10.25)
 - CPU: Pre-decrement mode dropped, a post-increment on write only introduced
   instead.
 - Peripheral RAM interface: Post-increment on write only introduced.
 - CPU: DIV and MUL / MAC instruction's timing is made more relaxed.
 - Accelerator: New mode flag added to specify graphics mode (4 bits / 8 bits)
   to use for the operation, so decoupling the Accelerator from the GDG state.
 - New kernel calls and state variable for simple stereoscopic 3D support.
 - Clarification in state saves regarding bits which must be set zero in the
   Application State.
 - License changed to the Temporary RRPGE License.


Version 00.011.003 (2014.10.24)
 - Bugfix in the GDG: Display list def. & process flags latch at 0x055 in the
   state must be initialized with the same value as the register in the UPA.


Version 00.011.002 (2014.09.25)
 - CPU: In post-incrementing or pre-decrementing modes the full XH part is
   affected irrespective of the pointer mode.
 - Formatting issue of a table in inputdev.rst fixed.


Version 00.011.001 (2014.09.24)
 - 48KHz audio base clock added to the Application State (necessary to provide
   the 187.5Hz clock).
 - Latched Display List Definition added to the Application State (necessary
   to support the Display List clear function in the GDG.


Version 00.011.000 (2014.09.20)
 - Introduction of data space stack, primarily to support adapting a C
   compiler in the future.
 - Application descriptor (in the Application binary) changes to accommodate
   stack configuration.
 - New immediate addressing mode in the CPU to make it possible to load BP
   relative pointers.
 - Reversed the position of Data and separate Stack areas in state saves to
   ease merging them in one address space in emulators.
 - Get UTF-8 representation of User ID kernel call's size parameters are
   changed to word units.


Version 00.010.001 (2014.09.19)
 - Application state fields added to hold important elements of the
   Application descriptor (from the application binary).
 - Acceleartor's remaining cycle count must not contain Mixer cycles.
 - File name area size parameters in File system kernel calls are added to
   contain undefined behavior if the application writes those while the kernel
   task is executing.
 - Processing time of 0x0425: Return area activity increased to 1200 cycles.
 - The main README.rst updated to match the new architecture.


Version 00.010.000 (2014.09.16)
 - Large changes!
 - Paging concept removed entirely. This affects file structures, kernel
   calls, RAM layout, and in general just about everything. Nothing remains at
   the user's point of view from the previous 4 KWord paging system. Paging
   implemented for the purposes of the kernel does not affect the user end
   RRPGE functionality, so does not belong to this specification.
 - File formats (RRPGE Application and State save) are redesigned entirely.
 - The ROPD (Read Only Process Descriptor) concept is removed.
 - New peripheral concept, roughly the Video RAM turning into a 2 MWords
   Peripheral RAM accessible on a 32 bit Peripheral bus. The peripherals
   (including the Mixer DMA) operate in parallel with the RRPGE CPU.
 - The CPU's address space is fixed from the user's point of view, giving
   access to about 64 KWords of CPU RAM.
 - DMA functions introduced in 00.006.000 are removed.
 - CPU: The ASL (Low bit extending shift to left) instruction is dropped for a
   NOT and a NEG instruction.
 - CPU: The JFL and JML opcodes changed into relative jumps and calls. The
   mnemonic of the original JMR changes into JMS.
 - Graphics Display Generator received a Display list clear feature which it
   can exploit in the VBlank after a Display list definition change.
 - Minor graphics double buffering assistance features introduced.
 - Arbitrary source start in the Accelerator's Block Blitter removed.
 - Frequency source option and frequency tables from the Mixer removed.
 - Touch sensitive areas and touch awareness feature removed, changed over for
   a pointing device specific area query.
 - Kernel functions from now return in C:X3, to adapt to a preferred calling
   convention.
 - RRPGE logo trademark state changed (registered European trademark).


Version 00.009.002 (2014.08.04)
 - Color output (Graphics Display Generator) specification made more accurate
   by mandating a gamma of 2.2.
 - Boot state modified: Pointer modes are now initialized to 16 bit
   incrementing.


Version 00.009.001 (2014.07.27)
 - Accelerator's Pixel OR mask was moved down into the destination combine
   stage (to have it's effect after determining the colorkey).


Version 00.009.000 (2014.07.25)
 - Graphics FIFO command word got a skip feature.
 - Accelerator's register layout changed to fit better to a source definition
   versus blit style principle.
 - Graphics Display Generator's source definition format rewritten:
   simplified, and more flexible.


Version 00.008.001 (2014.07.19)
 - Updated the main README of the project (contained references to obsolete
   and removed features).


Version 00.008.000 (2014.07.03)
 - Reorganizing and cleaning up the changes introduced in 00.006.000 and
   00.007.000.
 - The Graphics FIFO no longer has a beam wait condition.
 - The Accelerator got a row counter so it is capable to blit rectangular
   areas in one go.
 - The Accelerator registers no longer change after a blit (the row counter
   obsoleted this feature), this rolls back the FIFO change of 00.007.003 as
   well.
 - Graphics Display Generator registers were removed from the Graphics FIFO,
   moved into the User Peripheral Area.


Version 00.007.003 (2014.07.01)
 - Graphics FIFO: Command word latch does not increment on store if it
   addresses the Accelerator's start trigger.


Version 00.007.002 (2014.07.01)
 - Fix in the accelerator's memory map (0x002 is not unused).


Version 00.007.001 (2014.06.29)
 - Undefined behavior noted for the Graphics Display Generator registers.
 - Probable Video RAM bank crossing in the Graphics Display Generator
   clarified.
 - Fix in the initialization data: the page of the ROPD was incorrect.


Version 00.007.000 (2014.06.28)
 - New Graphics Display Generator supporting more flexible means for
   generating the pixel data for the video signal.


Version 00.006.003 (2014.06.27)
 - Video kernel calls are allowed to termiate the application on Graphics FIFO
   non-empty condition.


Version 00.006.002 (2014.06.26)
 - Added some flexibility in handling an unfulfillable Graphics FIFO beam wait
   command (in ropddump.rst).
 - Clarifications in the emulation of Graphics FIFO processing cycles.
 - Graphics FIFO state storage fixes (in ropddump.rst).


Version 00.006.001 (2014.06.25)
 - Fixed initial ROPD state in boot.rst, according to starting in 8 bit mode.
 - Fixed snd_arch.rst so the sample counter points to samples, not words.


Version 00.006.000 (2014.06.20)
 - Large changes!
 - Graphics FIFO introduced, the Graphics registers are no longer accessible
   directly by the CPU.
 - Graphics display now is only capable to produce 2 distinct layers instead
   of 4, simplifying Video bus access schemes.
 - Relative addressing in display lists are removed.
 - All peripheral register areas are reorganized.
 - Memory on the CPU bus is increased from 1 MWords to 2 MWords.
 - The Accelerator got a line drawing mode (original "Line" mode renamed to
   "Fill" mode).
 - The Accelerator is capable to omit destination reads accelerating certain
   types of blits.
 - Separation of partition selects from address both in the Mixer and the
   Accelerator simplifying address calculations.
 - User accessible interrupt (event) system is removed.
 - Audio output reworked to be useful without interrupts.
 - DMA peripherals introduced for fast memory fills and copies.
 - The specification got an Overview document describing the overall hardware
   architecture.
 - Many minor changes to keep the system coherent with the listed
   modifications.


Version 00.005.000 (2014.05.11)
 - Introduced proper hotplug support for input devices.
 - Input device kernel call layout rearranged to be more consistent.


Version 00.004.002 (2014.05.10)
 - Fixed some inaccuracies in some kernel calls (kcall.rst), mostly relating
   to file I/O functions.


Version 00.004.001 (2014.05.07)
 - Fixed kc_usr_getutf to accept the user ID as parameter.
 - Fixed parameter descriptions of kc_usr_getcolors.


Version 00.004.000 (2014.05.06)
 - Audio output reworked into a simpler more flexible concept.
 - Video mode change (between 4 bit and 8 bit) added.


Version 00.003.000 (2014.05.04)
 - Update to RRPGE License version 2.
 - Input devices reworked, simplified, now supporting keyboard.
 - File system interface reworked for a more generic approach.


Version 00.002.000 (2014.04.23)
 - Video RAM partitioning changes to support scrolling surfaces better: now
   all four Video RAM banks can be partitioned seperately and have an X wrap
   feature.
 - RRPGE Incremetal palette minor tweak: Color index 11 is now CC4 (bright
   yellow) instead of BC4 (bright green).


Version 00.001.000 (2014.04.04)
 - Sprite clipping support introduced: the Block Blitter of the Graphics
   Accelerator is now able to start blitting from any source position which is
   necessary for this capability. The register layout of the accelerator was
   modified to properly fit in the new Block Blitter source fraction.


Version 00.000.001 (2014.04.02)
 - Typo and reStructuredText markup fixes.


Version 00.000.000 (2014.03.30)
 - Initial version, core specification roughly complete.