ASAP7 tutorial Post PAR Simulation

[nishanthsmurthy24]

Background Work

• Yes, I searched the mailing list
• Yes, I searched prior issues
• Yes, I searched the documentation

Chipyard Version and Hash

Release: 1.10.0
Hash: b7644b2

OS Setup

uname -a
Linux ece-buttonbox 3.10.0-1160.31.1.el7.x86_64 #1 SMP Wed May 26 20:18:08 UTC 2021 x86_64 GNU/Linux

lsb_release -a
LSB Version: :core-4.1-amd64:core-4.1-noarch
Distributor ID: n/a
Description: NAME="Red Hat Enterprise Linux Workstation"
Release: n/a
Codename: n/a

Other Setup

The paths for all tools are not in the standard location, so I have overridden the paths and ensured the tools are invoked correctly.

Current Behavior

make[1]: Leaving directory '/ece/home/somas026/Project/chipyard/vlsi/build/chipyard.harness.TestHarness.TinyRocketConfig-ChipTop/sim-par-rundir/csrc'
Verdi KDB elaboration done and the database successfully generated: 0 error(s), 0 warning(s)
[sim] Running sub-step 'run_simulation'
[<global>] Key sim.vcs.vcs_bin is not associated with a type
[<global>] Key sim.vcs.fgp is not associated with a type
Key sim.vcs.vcs_home is not associated with a type
Key sim.vcs.verdi_home is not associated with a type
Executing subprocess: /ece/home/somas026/Project/chipyard/vlsi/build/chipyard.harness.TestHarness.TinyRocketConfig-ChipTop/sim-par-rundir/simv +permissive +verbose +fsdbfile=/ece/home/somas026/Project/chipyard/vlsi/output/chipyard.harness.TestHarness.TinyRocketConfig/rv32ui-p-simple.fsdb +dramsim +dramsim_ini_dir=/ece/home/somas026/Project/chipyard/generators/testchipip/src/main/resources/dramsim2_ini +max-cycles=10000000 -saif_opt+toggle_start_at_set_region+toggle_stop_at_toggle_report -ucli2Proc -ucli -do /ece/home/somas026/Project/chipyard/vlsi/build/chipyard.harness.TestHarness.TinyRocketConfig-ChipTop/sim-par-rundir/run.tcl +permissive-off /ece/home/somas026/Project/chipyard/.conda-env/riscv-tools/riscv64-unknown-elf/share/riscv-tests/isa/rv32ui-p-simple
Chronologic VCS simulator copyright 1991-2022
Contains Synopsys proprietary information.
Compiler version T-2022.06-SP2-2_Full64; Runtime version T-2022.06-SP2-2_Full64;  Dec 16 12:44 2023
Doing SDF annotation ...... Done
ucli% # ---------------------------------------------------------------------------------
ucli% # Portions Copyright 2023 Synopsys, Inc. All rights reserved. Portions of
ucli% # these TCL scripts are proprietary to and owned by Synopsys, Inc. and may only be
ucli% # used for internal use by educational institutions (including United States
ucli% # government labs, research institutes and federally funded research and
ucli% # development centers) on Synopsys tools for non-profit research, development,
ucli% # instruction, and other non-commercial uses or as otherwise specifically set forth
ucli% # by written agreement with Synopsys. All other use, reproduction, modification, or
ucli% # distribution of these TCL scripts is strictly prohibited.
ucli% # ---------------------------------------------------------------------------------
ucli% source /ece/home/somas026/Project/chipyard/vlsi/build/chipyard.harness.TestHarness.TinyRocketConfig-ChipTop/sim-par-rundir/force_regs.ucli
Error: script /ece/home/somas026/Project/chipyard/vlsi/build/chipyard.harness.TestHarness.TinyRocketConfig-ChipTop/sim-par-rundir/force_regs.ucli stopped at line 1
file /ece/home/somas026/Project/chipyard/vlsi/build/chipyard.harness.TestHarness.TinyRocketConfig-ChipTop/sim-par-rundir/run.tcl, line 12: Error-[UCLI-FORCE-OBJ-NOT-FOUND] Force command error
  Force command on object 'TestDriver.testHarness.chiptop.clock_en_reg .QN'
  failed as the object was not found
  Please use 'show -signals|-variables' command to find all valid objects in
  the design hierarchy of interest

Expected Behavior

Synthesis and PAR flows are run for TinyRocketConfig, but post-PAR simulation is getting stuck with this command

$ make sim-par-timing-debug CONFIG=TinyRocketConfig BINARY=$RISCV/riscv64-unknown-elf/share/riscv-tests/isa/rv32ui-p-simple

Without this, post-PAR power analysis cannot be performed.

@harrisonliew any clue on what I am missing here?