{"payload":{"header_redesign_enabled":false,"results":[{"id":"171665435","archived":false,"color":"#DAE1C2","followers":553,"has_funding_file":false,"hl_name":"trivialmips/nontrivial-mips","hl_trunc_description":"NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.","language":"SystemVerilog","mirror":false,"owned_by_organization":true,"public":true,"repo":{"repository":{"id":171665435,"name":"nontrivial-mips","owner_id":54016167,"owner_login":"trivialmips","updated_at":"2020-07-07T04:44:00.276Z","has_issues":true}},"sponsorable":false,"topics":["cpu","fpga","mips","xilinx","fpga-soc-linux","systemverilog","fpga-soc"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":88,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Atrivialmips%252Fnontrivial-mips%2B%2Blanguage%253ASystemVerilog","metadata":null,"csrf_tokens":{"/trivialmips/nontrivial-mips/star":{"post":"_PcPjhIQl4CH-5fgTQjacSSY9JIBcIhC343jGHdXZAvK1Ha9htetzhJaKq6GlIsCMGuWNRRzt-ds0SRwxVPQEg"},"/trivialmips/nontrivial-mips/unstar":{"post":"l_H0Si7-f6T3rWS1iTAbu9fVVgZwvPWLOQTyXuEUGUaZeP2qpwsdatn6HxKWEMM48o8YqoPfKgnE_1ba0zgXrw"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"42PcPVcVjicYW7IBbOxDzrC0QVFkoUHaLpIprwRQs_oyhgY9KND176jKzrKto4vQsl0oaEzrEaiSbQyCe6a54g"}}},"title":"Repository search results"}