{"payload":{"feedbackUrl":"https://github.com/orgs/community/discussions/53140","repo":{"id":178923006,"defaultBranch":"sycl/unified/master","name":"sycl","ownerLogin":"triSYCL","currentUserCanPush":false,"isFork":false,"isEmpty":false,"createdAt":"2019-04-01T18:29:01.000Z","ownerAvatar":"https://avatars.githubusercontent.com/u/25647836?v=4","public":true,"private":false,"isOrgOwned":true},"refInfo":{"name":"","listCacheKey":"v0:1699388727.0","currentOid":""},"activityList":{"items":[{"before":"9026a0c7e3e27d2fd43517af51f6fbe82d76f508","after":"eb017e69a4313d5e2cd365a4b5fad65b8442a0aa","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-12-22T18:27:56.000Z","pushType":"pr_merge","commitsCount":16,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #234 from keryell/tweak-aie\n\n[SYCL][AIE][DOC] Improve documentation","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1850832826\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/234\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/234/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/234\">#234</a> from keryell/tweak-aie"}},{"before":null,"after":"9026a0c7e3e27d2fd43517af51f6fbe82d76f508","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-11-07T20:25:27.000Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #235 from Ralender/CleanUpCmake\n\n[SYCL][AIE][CMAKE] Fix cmake without aie","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1851640459\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/235\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/235/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/235\">#235</a> from Ralender/CleanUpCmake"}},{"before":"9026a0c7e3e27d2fd43517af51f6fbe82d76f508","after":null,"ref":"refs/heads/sycl/unified/next","pushedAt":"2023-11-07T20:13:22.000Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"}},{"before":"5a95a7136a11b75f01ef839d9229780032bbeecf","after":"3272498e3859636ed09cec345f8b81c9113643a6","ref":"refs/heads/sycl/unified/master","pushedAt":"2023-11-07T20:13:18.000Z","pushType":"pr_merge","commitsCount":197,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #237 from triSYCL/sycl/unified/next\n\nAdd AMD AIE1 CGRA support with ACAP++/AIE++ and ArchGenMLIR for FPGA","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1893179095\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/237\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/237/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/237\">#237</a> from triSYCL/sycl/unified/next"}},{"before":"ae7f9b7d2841cfe855a9079d77678d90f189d7a0","after":"9026a0c7e3e27d2fd43517af51f6fbe82d76f508","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-08-15T23:14:18.000Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #235 from Ralender/CleanUpCmake\n\n[SYCL][AIE][CMAKE] Fix cmake without aie","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1851640459\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/235\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/235/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/235\">#235</a> from Ralender/CleanUpCmake"}},{"before":"163938eab24fabf60b557847314b42b521868dcf","after":"ae7f9b7d2841cfe855a9079d77678d90f189d7a0","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-08-15T20:24:36.000Z","pushType":"pr_merge","commitsCount":3,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #233 from keryell/ArchGenMLIR\n\n[ArchGenMLIR][NFC] More typo fixes","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1850695200\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/233\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/233/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/233\">#233</a> from keryell/ArchGenMLIR"}},{"before":"5cf68ceb5042a5077aa16788d5a278605c9672fd","after":"163938eab24fabf60b557847314b42b521868dcf","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-08-14T22:58:16.000Z","pushType":"pr_merge","commitsCount":48,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #231 from Ralender/ArchGenMLIR\n\nAdd compiler support for ArchGenMLIR, a C++ framework to express fixed-point computation and provide optimal approximation implementation  for some precision constraints.\r\nUse MLIR and various external projects behind the scene.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1815700741\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/231\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/231/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/231\">#231</a> from Ralender/ArchGenMLIR"}},{"before":"b2f1dabd261e9cc0247c4dc6fa4743c4d7ad1563","after":"5cf68ceb5042a5077aa16788d5a278605c9672fd","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-07-26T23:18:09.000Z","pushType":"pr_merge","commitsCount":143,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #230 from Ralender/aie\n\nAdd the compiler-side and tests of the SYCL-like AIE++ API.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1742225141\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/230\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/230/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/230\">#230</a> from Ralender/aie"}},{"before":null,"after":"b2f1dabd261e9cc0247c4dc6fa4743c4d7ad1563","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-06-05T17:30:01.831Z","pushType":"branch_creation","commitsCount":0,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #225 from keryell/vitis-2022.2\n\nDocumentation update for Vitis 2022.2","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1664453646\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/225\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/225/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/225\">#225</a> from keryell/vitis-2022.2"}},{"before":"b2f1dabd261e9cc0247c4dc6fa4743c4d7ad1563","after":null,"ref":"refs/heads/sycl/unified/next","pushedAt":"2023-05-24T22:54:33.724Z","pushType":"branch_deletion","commitsCount":0,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"}},{"before":"d06d29185bc82698b80f2d0ff9f7144a824b7669","after":"5a95a7136a11b75f01ef839d9229780032bbeecf","ref":"refs/heads/sycl/unified/master","pushedAt":"2023-05-24T22:54:31.827Z","pushType":"pr_merge","commitsCount":9298,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #229 from triSYCL/sycl/unified/next\n\nLast update for Vitis 2022.2\r\n\r\n- add partial profilling support to `pi_xrt`;\r\n- clarify `sycl/test/vitis/edge_detection/edge_detection.cpp` test;\r\n- fix `ONEAPI_DEVICE_SELECTOR` usage syntax;\r\n- fix documentation for Vitis 2022.2;\r\n- update to new test layout.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1724829306\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/229\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/229/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/229\">#229</a> from triSYCL/sycl/unified/next"}},{"before":"c69b33d43a152e5f7b6d59e7f9d2020fb764c73b","after":"b2f1dabd261e9cc0247c4dc6fa4743c4d7ad1563","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-05-24T22:37:02.022Z","pushType":"pr_merge","commitsCount":10,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #225 from keryell/vitis-2022.2\n\nDocumentation update for Vitis 2022.2","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1664453646\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/225\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/225/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/225\">#225</a> from keryell/vitis-2022.2"}},{"before":"700681c57239b854498c56333b948302e10eb669","after":"c69b33d43a152e5f7b6d59e7f9d2020fb764c73b","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-05-23T17:59:19.130Z","pushType":"pr_merge","commitsCount":2,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #226 from Ralender/XRTProfilling\n\nThis changes adds basic support for profiling in `pi_xrt`.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1664925498\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/226\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/226/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/226\">#226</a> from Ralender/XRTProfilling"}},{"before":"19e31bc36973b38e69684815bbbc439c1ba77786","after":"700681c57239b854498c56333b948302e10eb669","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-04-25T22:06:55.000Z","pushType":"pr_merge","commitsCount":4,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #227 from Momellouky/fix_GettingStartedXilinxFPGA.md_links\n\nn the Get Started with FPGA md file:\r\n\"Installation\" hyperlink was missing causing a Not Found Error.\r\n\r\nHowever, in the \"main\" README file the link to v++ xilinx compiler still missing.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1681841635\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/227\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/227/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/227\">#227</a> from Momellouky/fix_GettingStartedXilinxFPGA.…"}},{"before":"10f1735f7c4ef8bc35cc4f90041dc8eb31cf83ce","after":"19e31bc36973b38e69684815bbbc439c1ba77786","ref":"refs/heads/sycl/unified/next","pushedAt":"2023-04-06T23:59:02.000Z","pushType":"pr_merge","commitsCount":5600,"pusher":{"login":"keryell","name":"Ronan Keryell","path":"/keryell","primaryAvatarUrl":"https://avatars.githubusercontent.com/u/1821746?s=80&v=4"},"commit":{"message":"Merge pull request #223 from Ralender/MergeUpstream\n\nMerge with the latest (at the time of starting) version of intel/sycl,\r\nthen fix failing tests.","shortMessageHtmlLink":"Merge pull request <a class=\"issue-link js-issue-link\" data-error-text=\"Failed to load title\" data-id=\"1652861116\" data-permission-text=\"Title is private\" data-url=\"https://github.com/triSYCL/sycl/issues/223\" data-hovercard-type=\"pull_request\" data-hovercard-url=\"/triSYCL/sycl/pull/223/hovercard\" href=\"https://github.com/triSYCL/sycl/pull/223\">#223</a> from Ralender/MergeUpstream"}}],"hasNextPage":false,"hasPreviousPage":false,"activityType":"all","actor":null,"timePeriod":"all","sort":"DESC","perPage":30,"cursor":"djE6ks8AAAAD0Iyr0QA","startCursor":null,"endCursor":null}},"title":"Activity · triSYCL/sycl"}