yosys
Here are 123 public repositories matching this topic...
A possible replacement for openflow, which would be ideally contributed to the SymbiFlow project
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Aug 2, 2021 - Python
Example of how to get started with olofk/fusesoc.
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Jul 25, 2021 - Python
A nextpnr arch definition for the TuringTumble board game.
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Nov 5, 2022 - Verilog
Time domain to logarithmic frequency domain converter, as the polyphase FFT do for the linear.
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Mar 11, 2024 - VHDL
Verilog implementations of different simple tasks
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Oct 10, 2022 - Verilog
Developing different projects in order to understand how the Icarus Verilog tools work with GTKWave and Yosys.
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Mar 22, 2024 - Verilog
Sipeed Tang Nano: Fully Opensource Toolchain for FPGA Synthesis, Place & Route, and Download/Flash.
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May 28, 2024 - Makefile
Yosys passes to syntheize to NaN gates (à la http://tom7.org/nand/)
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Apr 26, 2019 - C++
A template for starting a Verilog project with FuseSoC integration, Icarus simulation, Verilator linting, Yosys usage report, and VS Code syntax highlighting.
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Aug 2, 2023 - Makefile
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