Tutorial, examples and regression tests for Coriolis & Alliance (LIP6)
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Updated
May 24, 2024 - Python
Tutorial, examples and regression tests for Coriolis & Alliance (LIP6)
A collection of Schematics, PCBs and VLSI work on various platforms
A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.
VLSI Project for CMPE 480______ Authors: John San Juan, Cody Hum, Vincent Verdan, Jose Zaragosa
This is the Repository which contains the detail of my work done at SCL Mohali (formerly Department of Space, ISRO). This was the internship basically focused on the "Experimental Analysis of MOS Capacitor for Oxide Furnaces" and further study of VLSI.
This repository contains code files for VLSI Laboratory - EC39004, conducted in Spring 2024 at IIT Kharagpur
This repository contains python code snippets that implement several algorithms for automating the VLSI Physical Design process. This is based on the learnings from the course - EE5333W (Introduction to Physical Design Automation) at IITM.
Small designs made using Catapult-based HLS (C++ / SystemC)
VLSI System with memory that displays arithmetic operations on a Video Graphics Array. (October 2023)
Verilog programs in gate level, dataflow & behavioural modelling with testbenches written in intel FPGA tested with ModelSim simulator
GitHub repository dedicated to VLSI ASIC Design using open-source tools! A simple Vedic Multiplier is Forged, through the entire RTL to GDS process that meets various PPA
This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out
Designing & Implementing a 4-Bit ALU in MAGIC Layout
Unleash the power of VLSI design! From logic gates conception through integrated circuit creation to meticulous layout design, sculpt the heart of electronic systems. Dive into a world where every nanometer matters. 🚀🔧 #VLSI #ICDesign
an implementation of the FAN ATPG algorithm in c++ and verilog.
SystemVerilog verification of I2C interface
This project is a part of the report for my 7th semester program elective (EC-4142 Analog-VLSI).
Introducing an innovative H.264 decoder project with QCIF resolution, designed to enhance video playback performance. This open-source GitHub repository offers a robust solution for decoding H.264 video streams, enabling seamless playback on various platforms.
Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
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