This is a Smart_Lock Project using Ultra96_V2 and PYNQ.
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Updated
Aug 12, 2020 - Python
This is a Smart_Lock Project using Ultra96_V2 and PYNQ.
Team John Cena's Entry for the 2017 PYNQ Hackathon
Fork from PYNQ branch with fixes and modifications for Digilent Genesys Zu.
A framework to train a ResUNet architecture, quantize, compile and execute it on an FPGA.
FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)
SystemVerilog module for matrix multiplication
NN Training at the Edge with PyTorch, PYNQ and an Ultra96-V2 board
Proyecto de IoT usando la placa Base Shield V2 y sensores de Groove.
Hardware Accelerators on FPGA for Computer Vision Applications
Proyecto que utiliza sensores de Grove para medir la temperatura, el nivel de humedad y la luminosidad y crear así un invernadero monitorizado para controlar que las plantas tengan las mejores condiciones para vivir.
Base files for building PYNQ on Digilent's Cora Z7-10
Deploying Deep Learning on FPGA: an assessment of ConvNets performance on Xilinx Zynq MPSoC using Vitis-AI development platform
PYNQ 2.7 Run-Time Partial Reconfiguration via Python 3.8
Design of High-Level Synthesis of Xilinx FFT IP core via FFT library
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