Digital logic design tool and simulator
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Updated
May 28, 2024 - Java
Digital logic design tool and simulator
🚗 A Car Parking Simulator made in LogicWorks 5 as a final project for the course "Digital Logic Design (EE227)"
A modern hardware definition language and toolchain based on Python
8x8 LED Matrix built using MAX7219 modules and arduino.
A helicopter game written for the Nexys 4 DDR Board in VHDL
Clock and UART Baud rate generation, radix-4 multiplier, function generator & accelerator wrappers.
This repository contains information about Digital Logic Design (ecen 3233) laboratory elements for Fall 2023.
VHDL Code for Labs done in a 2nd year Digital Systems course at Queen's University.
One Way Traffic Flow System
Semester 2 course material for BS Computer Science at Fast National University Of Computer And Emerging Sciences
透過數位邏輯結合VHDL與Verilog的過程,作為從基礎數位邏輯到計算機系統結構,並實作出一顆CPU的教學書籍,希望未來可以成為教學範例檔案。目前將開發轉移到GitLab,因為可以呈現數學與MUL圖。
30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills and simulate your designs. Let's code and conquer circuits!
Composable digital logic simulation in Rust!
Python digital logic library
Xilinx Vivado project for nanoprocessor designing with VHDL
This is simple design of finite state machines in Digital Logic Design using VHDL.
This is a 8 bit binary number multiplier using wallace tree.
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