{"payload":{"header_redesign_enabled":false,"results":[{"id":"357546275","archived":false,"color":"#DAE1C2","followers":82,"has_funding_file":false,"hl_name":"spcl/pspin","hl_trunc_description":"PsPIN: A RISC-V in-network accelerator for flexible high-performance low-power packet processing","language":"SystemVerilog","mirror":false,"owned_by_organization":true,"public":true,"repo":{"repository":{"id":357546275,"name":"pspin","owner_id":31108244,"owner_login":"spcl","updated_at":"2023-02-22T09:51:37.698Z","has_issues":true}},"sponsorable":false,"topics":["networking","packet-processing","spin","pulp","in-network-compute"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":66,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Aspcl%252Fpspin%2B%2Blanguage%253ASystemVerilog","metadata":null,"csrf_tokens":{"/spcl/pspin/star":{"post":"6Laoqz3LMw7vgTegI_mXoiJ7CWXU85zbImN9y0pogh9DACbpG9NwoAOyuSyrkOgCNOVQ6tns6bQKZxVUWanliA"},"/spcl/pspin/unstar":{"post":"ghdqcJDEd2RZs2SNxmkoXvzjvSKB53EMLgU_M0sSC7lQn0ATweTT55XZVnVVAS_2nLWfHwXRUPSaMERjNuMKAg"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"jofmUEgxno-m_ow5JEIKKuZO_ZjKEc4NL6eV9UICmmdsBXyzvxUKBmNKo4UJdhKPSZ6VX2WvR0V1pqvVUF-yfw"}}},"title":"Repository search results"}