Audit warnings

[nmoroze]

It looks like there Verilator produces a bunch of lint warnings when running the design through the flow. I should look more closely at these to clean things up/make sure we don't have any undiscovered issues, although i think somethings will be tough to avoid if they're related to lowRISC code/sv2v transformations.

Should also check to see if Yosys is emitting any warnings during synthesis.